aboutsummaryrefslogtreecommitdiff
path: root/include/asm-parisc
diff options
context:
space:
mode:
authorKyle McMartin <kyle@parisc-linux.org>2006-08-13 22:15:47 -0400
committerMatthew Wilcox <willy@parisc-linux.org>2006-10-04 06:44:47 -0600
commit4068d93cd17561bcbfc821c831cb048385320bd6 (patch)
treedb2e8f3ad3c8ab729cff1304cba984a4bc0a3735 /include/asm-parisc
parent78b656b8bf933101b42409b4492734b23427bfc3 (diff)
[PARISC] Untangle <asm/processor.h> header include mess
asm/processor.h on parisc wants spinlocks for cpuinfo, but linux/spinlock_types.h needs lockdep, and lockdep wants prefetch. This leads to a horrible circular dependancy, because <asm/processor.h> is including something which depends on things which are not defined until the end of the file. Kludge around this by moving prefetch related code into <asm/prefetch.h> and including it before <linux/spinlock_types.h>, however this is just a temporary solution until this mess can be cleaned up. Signed-off-by: Kyle McMartin <kyle@parisc-linux.org>
Diffstat (limited to 'include/asm-parisc')
-rw-r--r--include/asm-parisc/prefetch.h36
-rw-r--r--include/asm-parisc/processor.h28
2 files changed, 38 insertions, 26 deletions
diff --git a/include/asm-parisc/prefetch.h b/include/asm-parisc/prefetch.h
new file mode 100644
index 00000000000..f5a2e7ae266
--- /dev/null
+++ b/include/asm-parisc/prefetch.h
@@ -0,0 +1,36 @@
+/*
+ * include/asm-parisc/prefetch.h
+ *
+ * PA 2.0 defines data prefetch instructions on page 6-11 of the Kane book.
+ * In addition, many implementations do hardware prefetching of both
+ * instructions and data.
+ *
+ * PA7300LC (page 14-4 of the ERS) also implements prefetching by a load
+ * to gr0 but not in a way that Linux can use. If the load would cause an
+ * interruption (eg due to prefetching 0), it is suppressed on PA2.0
+ * processors, but not on 7300LC.
+ *
+ */
+
+#ifndef __ASM_PARISC_PREFETCH_H
+#define __ASM_PARISC_PREFETCH_H
+
+#ifndef __ASSEMBLY__
+#ifdef CONFIG_PREFETCH
+
+#define ARCH_HAS_PREFETCH
+extern inline void prefetch(const void *addr)
+{
+ __asm__("ldw 0(%0), %%r0" : : "r" (addr));
+}
+
+#define ARCH_HAS_PREFETCHW
+extern inline void prefetchw(const void *addr)
+{
+ __asm__("ldd 0(%0), %%r0" : : "r" (addr));
+}
+
+#endif /* CONFIG_PREFETCH */
+#endif /* __ASSEMBLY__ */
+
+#endif /* __ASM_PARISC_PROCESSOR_H */
diff --git a/include/asm-parisc/processor.h b/include/asm-parisc/processor.h
index b73626f040d..c72b8fa4968 100644
--- a/include/asm-parisc/processor.h
+++ b/include/asm-parisc/processor.h
@@ -9,6 +9,8 @@
#define __ASM_PARISC_PROCESSOR_H
#ifndef __ASSEMBLY__
+#include <asm/prefetch.h> /* lockdep.h needs <linux/prefetch.h> */
+
#include <linux/threads.h>
#include <linux/spinlock_types.h>
@@ -328,32 +330,6 @@ extern unsigned long get_wchan(struct task_struct *p);
#define KSTK_EIP(tsk) ((tsk)->thread.regs.iaoq[0])
#define KSTK_ESP(tsk) ((tsk)->thread.regs.gr[30])
-
-/*
- * PA 2.0 defines data prefetch instructions on page 6-11 of the Kane book.
- * In addition, many implementations do hardware prefetching of both
- * instructions and data.
- *
- * PA7300LC (page 14-4 of the ERS) also implements prefetching by a load
- * to gr0 but not in a way that Linux can use. If the load would cause an
- * interruption (eg due to prefetching 0), it is suppressed on PA2.0
- * processors, but not on 7300LC.
- */
-#ifdef CONFIG_PREFETCH
-#define ARCH_HAS_PREFETCH
-#define ARCH_HAS_PREFETCHW
-
-extern inline void prefetch(const void *addr)
-{
- __asm__("ldw 0(%0), %%r0" : : "r" (addr));
-}
-
-extern inline void prefetchw(const void *addr)
-{
- __asm__("ldd 0(%0), %%r0" : : "r" (addr));
-}
-#endif
-
#define cpu_relax() barrier()
#endif /* __ASSEMBLY__ */