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| author | Linus Torvalds <torvalds@g5.osdl.org> | 2006-10-25 20:20:03 -0700 |
|---|---|---|
| committer | Linus Torvalds <torvalds@g5.osdl.org> | 2006-10-25 20:20:03 -0700 |
| commit | 8483ca3c99559027a3741af7f56f6b36887f7fd5 (patch) | |
| tree | 4c09e045467c4dd174508ffd9b55a857ee139869 /include/asm-powerpc/reg.h | |
| parent | ede847c406054ba2a1ef2d165d3fd9f8e2b8d1bc (diff) | |
| parent | 190a24f5605d95b786c92280bf7a51ebef43f29f (diff) | |
Merge branch 'merge' of master.kernel.org:/pub/scm/linux/kernel/git/paulus/powerpc
* 'merge' of master.kernel.org:/pub/scm/linux/kernel/git/paulus/powerpc:
[POWERPC] Make sure __cpu_preinit_ppc970 gets called on 970GX processors
[POWERPC] Fix CHRP platforms with only 8259
[POWERPC] IPIC: Fix spinlock recursion in set_irq_handler
[POWERPC] Fix the UCC rx/tx clock of QE
[POWERPC] cell: update defconfig
[POWERPC] spufs: fix another off-by-one bug in spufs_mbox_read
[POWERPC] spufs: fix signal2 file to report signal2
[POWERPC] Fix device_is_compatible() const warning
[POWERPC] Cell timebase bug workaround
[POWERPC] Support feature fixups in modules
[POWERPC] Support feature fixups in vdso's
[POWERPC] Support nested cpu feature sections
[POWERPC] Consolidate feature fixup code
[POWERPC] Fix hang in start_ldr if _end or _edata is unaligned
[POWERPC] Fix spelling errors in ucc_fast.c and ucc_slow.c
[POWERPC] Don't require execute perms on wrapper when building zImage.initrd
[POWERPC] Add 970GX cputable entry
[POWERPC] Fix build breakage with CONFIG_PPC32
[POWERPC] Fix compiler warning message on get_property call
[POWERPC] Simplify stolen time calculation
Diffstat (limited to 'include/asm-powerpc/reg.h')
| -rw-r--r-- | include/asm-powerpc/reg.h | 26 |
1 files changed, 26 insertions, 0 deletions
diff --git a/include/asm-powerpc/reg.h b/include/asm-powerpc/reg.h index 8fb96811b55..6faae7b14d5 100644 --- a/include/asm-powerpc/reg.h +++ b/include/asm-powerpc/reg.h @@ -591,6 +591,7 @@ #define PV_630 0x0040 #define PV_630p 0x0041 #define PV_970MP 0x0044 +#define PV_970GX 0x0045 #define PV_BE 0x0070 #define PV_PA6T 0x0090 @@ -618,10 +619,35 @@ : "=r" (rval)); rval;}) #define mtspr(rn, v) asm volatile("mtspr " __stringify(rn) ",%0" : : "r" (v)) +#ifdef __powerpc64__ +#ifdef CONFIG_PPC_CELL +#define mftb() ({unsigned long rval; \ + asm volatile( \ + "90: mftb %0;\n" \ + "97: cmpwi %0,0;\n" \ + " beq- 90b;\n" \ + "99:\n" \ + ".section __ftr_fixup,\"a\"\n" \ + ".align 3\n" \ + "98:\n" \ + " .llong %1\n" \ + " .llong %1\n" \ + " .llong 97b-98b\n" \ + " .llong 99b-98b\n" \ + ".previous" \ + : "=r" (rval) : "i" (CPU_FTR_CELL_TB_BUG)); rval;}) +#else #define mftb() ({unsigned long rval; \ asm volatile("mftb %0" : "=r" (rval)); rval;}) +#endif /* !CONFIG_PPC_CELL */ + +#else /* __powerpc64__ */ + #define mftbl() ({unsigned long rval; \ asm volatile("mftbl %0" : "=r" (rval)); rval;}) +#define mftbu() ({unsigned long rval; \ + asm volatile("mftbu %0" : "=r" (rval)); rval;}) +#endif /* !__powerpc64__ */ #define mttbl(v) asm volatile("mttbl %0":: "r"(v)) #define mttbu(v) asm volatile("mttbu %0":: "r"(v)) |