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authorLinus Torvalds <torvalds@g5.osdl.org>2006-07-08 15:00:28 -0700
committerLinus Torvalds <torvalds@g5.osdl.org>2006-07-08 15:00:28 -0700
commite2a3d40258fe20d205f8ed592e1e2c0d5529c2e1 (patch)
treeb8d778fb559c581e08bfc86831d16ee1cd43c841 /include/asm-powerpc
parenta496e25dfb25493a57bcee5d66875d6ff80a9093 (diff)
power: improve inline asm memory constraints
Use "+m" rather than a combination of "=m" and "m" for improved clarity and consistency. Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'include/asm-powerpc')
-rw-r--r--include/asm-powerpc/atomic.h32
-rw-r--r--include/asm-powerpc/bitops.h16
-rw-r--r--include/asm-powerpc/system.h16
3 files changed, 32 insertions, 32 deletions
diff --git a/include/asm-powerpc/atomic.h b/include/asm-powerpc/atomic.h
index bb3c0ab7e66..53283e2540b 100644
--- a/include/asm-powerpc/atomic.h
+++ b/include/asm-powerpc/atomic.h
@@ -27,8 +27,8 @@ static __inline__ void atomic_add(int a, atomic_t *v)
PPC405_ERR77(0,%3)
" stwcx. %0,0,%3 \n\
bne- 1b"
- : "=&r" (t), "=m" (v->counter)
- : "r" (a), "r" (&v->counter), "m" (v->counter)
+ : "=&r" (t), "+m" (v->counter)
+ : "r" (a), "r" (&v->counter)
: "cc");
}
@@ -63,8 +63,8 @@ static __inline__ void atomic_sub(int a, atomic_t *v)
PPC405_ERR77(0,%3)
" stwcx. %0,0,%3 \n\
bne- 1b"
- : "=&r" (t), "=m" (v->counter)
- : "r" (a), "r" (&v->counter), "m" (v->counter)
+ : "=&r" (t), "+m" (v->counter)
+ : "r" (a), "r" (&v->counter)
: "cc");
}
@@ -97,8 +97,8 @@ static __inline__ void atomic_inc(atomic_t *v)
PPC405_ERR77(0,%2)
" stwcx. %0,0,%2 \n\
bne- 1b"
- : "=&r" (t), "=m" (v->counter)
- : "r" (&v->counter), "m" (v->counter)
+ : "=&r" (t), "+m" (v->counter)
+ : "r" (&v->counter)
: "cc");
}
@@ -141,8 +141,8 @@ static __inline__ void atomic_dec(atomic_t *v)
PPC405_ERR77(0,%2)\
" stwcx. %0,0,%2\n\
bne- 1b"
- : "=&r" (t), "=m" (v->counter)
- : "r" (&v->counter), "m" (v->counter)
+ : "=&r" (t), "+m" (v->counter)
+ : "r" (&v->counter)
: "cc");
}
@@ -253,8 +253,8 @@ static __inline__ void atomic64_add(long a, atomic64_t *v)
add %0,%2,%0\n\
stdcx. %0,0,%3 \n\
bne- 1b"
- : "=&r" (t), "=m" (v->counter)
- : "r" (a), "r" (&v->counter), "m" (v->counter)
+ : "=&r" (t), "+m" (v->counter)
+ : "r" (a), "r" (&v->counter)
: "cc");
}
@@ -287,8 +287,8 @@ static __inline__ void atomic64_sub(long a, atomic64_t *v)
subf %0,%2,%0\n\
stdcx. %0,0,%3 \n\
bne- 1b"
- : "=&r" (t), "=m" (v->counter)
- : "r" (a), "r" (&v->counter), "m" (v->counter)
+ : "=&r" (t), "+m" (v->counter)
+ : "r" (a), "r" (&v->counter)
: "cc");
}
@@ -319,8 +319,8 @@ static __inline__ void atomic64_inc(atomic64_t *v)
addic %0,%0,1\n\
stdcx. %0,0,%2 \n\
bne- 1b"
- : "=&r" (t), "=m" (v->counter)
- : "r" (&v->counter), "m" (v->counter)
+ : "=&r" (t), "+m" (v->counter)
+ : "r" (&v->counter)
: "cc");
}
@@ -361,8 +361,8 @@ static __inline__ void atomic64_dec(atomic64_t *v)
addic %0,%0,-1\n\
stdcx. %0,0,%2\n\
bne- 1b"
- : "=&r" (t), "=m" (v->counter)
- : "r" (&v->counter), "m" (v->counter)
+ : "=&r" (t), "+m" (v->counter)
+ : "r" (&v->counter)
: "cc");
}
diff --git a/include/asm-powerpc/bitops.h b/include/asm-powerpc/bitops.h
index 76e2f08c3c8..c341063d080 100644
--- a/include/asm-powerpc/bitops.h
+++ b/include/asm-powerpc/bitops.h
@@ -65,8 +65,8 @@ static __inline__ void set_bit(int nr, volatile unsigned long *addr)
PPC405_ERR77(0,%3)
PPC_STLCX "%0,0,%3\n"
"bne- 1b"
- : "=&r"(old), "=m"(*p)
- : "r"(mask), "r"(p), "m"(*p)
+ : "=&r" (old), "+m" (*p)
+ : "r" (mask), "r" (p)
: "cc" );
}
@@ -82,8 +82,8 @@ static __inline__ void clear_bit(int nr, volatile unsigned long *addr)
PPC405_ERR77(0,%3)
PPC_STLCX "%0,0,%3\n"
"bne- 1b"
- : "=&r"(old), "=m"(*p)
- : "r"(mask), "r"(p), "m"(*p)
+ : "=&r" (old), "+m" (*p)
+ : "r" (mask), "r" (p)
: "cc" );
}
@@ -99,8 +99,8 @@ static __inline__ void change_bit(int nr, volatile unsigned long *addr)
PPC405_ERR77(0,%3)
PPC_STLCX "%0,0,%3\n"
"bne- 1b"
- : "=&r"(old), "=m"(*p)
- : "r"(mask), "r"(p), "m"(*p)
+ : "=&r" (old), "+m" (*p)
+ : "r" (mask), "r" (p)
: "cc" );
}
@@ -179,8 +179,8 @@ static __inline__ void set_bits(unsigned long mask, unsigned long *addr)
"or %0,%0,%2\n"
PPC_STLCX "%0,0,%3\n"
"bne- 1b"
- : "=&r" (old), "=m" (*addr)
- : "r" (mask), "r" (addr), "m" (*addr)
+ : "=&r" (old), "+m" (*addr)
+ : "r" (mask), "r" (addr)
: "cc");
}
diff --git a/include/asm-powerpc/system.h b/include/asm-powerpc/system.h
index d075725bf44..c6569516ba3 100644
--- a/include/asm-powerpc/system.h
+++ b/include/asm-powerpc/system.h
@@ -220,8 +220,8 @@ __xchg_u32(volatile void *p, unsigned long val)
" stwcx. %3,0,%2 \n\
bne- 1b"
ISYNC_ON_SMP
- : "=&r" (prev), "=m" (*(volatile unsigned int *)p)
- : "r" (p), "r" (val), "m" (*(volatile unsigned int *)p)
+ : "=&r" (prev), "+m" (*(volatile unsigned int *)p)
+ : "r" (p), "r" (val)
: "cc", "memory");
return prev;
@@ -240,8 +240,8 @@ __xchg_u64(volatile void *p, unsigned long val)
" stdcx. %3,0,%2 \n\
bne- 1b"
ISYNC_ON_SMP
- : "=&r" (prev), "=m" (*(volatile unsigned long *)p)
- : "r" (p), "r" (val), "m" (*(volatile unsigned long *)p)
+ : "=&r" (prev), "+m" (*(volatile unsigned long *)p)
+ : "r" (p), "r" (val)
: "cc", "memory");
return prev;
@@ -299,8 +299,8 @@ __cmpxchg_u32(volatile unsigned int *p, unsigned long old, unsigned long new)
ISYNC_ON_SMP
"\n\
2:"
- : "=&r" (prev), "=m" (*p)
- : "r" (p), "r" (old), "r" (new), "m" (*p)
+ : "=&r" (prev), "+m" (*p)
+ : "r" (p), "r" (old), "r" (new)
: "cc", "memory");
return prev;
@@ -322,8 +322,8 @@ __cmpxchg_u64(volatile unsigned long *p, unsigned long old, unsigned long new)
ISYNC_ON_SMP
"\n\
2:"
- : "=&r" (prev), "=m" (*p)
- : "r" (p), "r" (old), "r" (new), "m" (*p)
+ : "=&r" (prev), "+m" (*p)
+ : "r" (p), "r" (old), "r" (new)
: "cc", "memory");
return prev;