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author | Linus Torvalds <torvalds@woody.linux-foundation.org> | 2008-02-14 21:29:06 -0800 |
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committer | Linus Torvalds <torvalds@woody.linux-foundation.org> | 2008-02-14 21:29:06 -0800 |
commit | 11d64be6a631236b3b3d21711c7d1a83d9f85904 (patch) | |
tree | ddd4d2444ff79cc9866d30c35c16f75e0c6ce16d /include/asm-sh/io.h | |
parent | c24ce1d88781b4d2b8232967630abaa1c90724cf (diff) | |
parent | a602cc05f8fc849023e72e2857bd842f0104f648 (diff) |
Merge git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6
* git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6: (46 commits)
sh: Fix multiple UTLB hit on UP SH-4.
sh: fix pci io access for r2d boards
sh: fix ioreadN_rep and iowriteN_rep
sh: use ctrl_in/out for on chip pci access
sh: Kill off more dead symbols.
sh: __uncached_start only on sh32.
sh: asm/irq.h needs asm/cpu/irq.h.
serial: sh-sci: Fix up SH-5 build.
sh: Get SH-5 caches working again post-unification.
maple: Fix up maple build failure.
sh: Kill off bogus SH_SDK7780_STANDALONE symbol.
sh: asm/tlb.h needs linux/pagemap.h for CONFIG_SWAP=n.
sh: Tidy include/asm-sh/hp6xx.h
maple: improve detection of attached peripherals
sh: Shut up some trivial build warnings.
sh: Update SH-5 flush_cache_sigtramp() for API changes.
sh: Fix up set_fixmap_nocache() for SH-5.
sh: Fix up pte_mkhuge() build breakage for SH-5.
sh: Disable big endian for SH-5.
sh: Handle SH7366 CPU in check_bugs().
...
Diffstat (limited to 'include/asm-sh/io.h')
-rw-r--r-- | include/asm-sh/io.h | 22 |
1 files changed, 16 insertions, 6 deletions
diff --git a/include/asm-sh/io.h b/include/asm-sh/io.h index 94900c08951..356e50d0674 100644 --- a/include/asm-sh/io.h +++ b/include/asm-sh/io.h @@ -38,6 +38,7 @@ */ #define __IO_PREFIX generic #include <asm/io_generic.h> +#include <asm/io_trapped.h> #define maybebadio(port) \ printk(KERN_ERR "bad PC-like io %s:%u for port 0x%lx at 0x%08x\n", \ @@ -181,13 +182,13 @@ __BUILD_MEMORY_STRING(w, u16) #define iowrite32(v,a) writel((v),(a)) #define iowrite32be(v,a) __raw_writel(cpu_to_be32((v)),(a)) -#define ioread8_rep(a,d,c) insb((a),(d),(c)) -#define ioread16_rep(a,d,c) insw((a),(d),(c)) -#define ioread32_rep(a,d,c) insl((a),(d),(c)) +#define ioread8_rep(a, d, c) readsb((a), (d), (c)) +#define ioread16_rep(a, d, c) readsw((a), (d), (c)) +#define ioread32_rep(a, d, c) readsl((a), (d), (c)) -#define iowrite8_rep(a,s,c) outsb((a),(s),(c)) -#define iowrite16_rep(a,s,c) outsw((a),(s),(c)) -#define iowrite32_rep(a,s,c) outsl((a),(s),(c)) +#define iowrite8_rep(a, s, c) writesb((a), (s), (c)) +#define iowrite16_rep(a, s, c) writesw((a), (s), (c)) +#define iowrite32_rep(a, s, c) writesl((a), (s), (c)) #define mmiowb() wmb() /* synco on SH-4A, otherwise a nop */ @@ -207,6 +208,8 @@ static inline void __set_io_port_base(unsigned long pbase) generic_io_base = pbase; } +#define __ioport_map(p, n) sh_mv.mv_ioport_map((p), (n)) + /* We really want to try and get these to memcpy etc */ extern void memcpy_fromio(void *, volatile void __iomem *, unsigned long); extern void memcpy_toio(volatile void __iomem *, const void *, unsigned long); @@ -309,7 +312,14 @@ __ioremap_mode(unsigned long offset, unsigned long size, unsigned long flags) { #ifdef CONFIG_SUPERH32 unsigned long last_addr = offset + size - 1; +#endif + void __iomem *ret; + ret = __ioremap_trapped(offset, size); + if (ret) + return ret; + +#ifdef CONFIG_SUPERH32 /* * For P1 and P2 space this is trivial, as everything is already * mapped. Uncached access for P1 addresses are done through P2. |