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authorMagnus Damm <damm@igel.co.jp>2007-09-21 18:16:42 +0900
committerPaul Mundt <lethal@linux-sh.org>2007-09-21 18:16:42 +0900
commitf18d533e3cd476aedf41fe1e6e9dc3e0a2446bba (patch)
tree64e54cb0572f62f8d171ce7f779b50226bfe931f /include/asm-sh
parent9964fa8bf952c5c4df9676223fab4cd886d18200 (diff)
sh: intc - initial SMP support.
This implements initial support for the SMP INTC (particularly INTC2) controllers. These are largely implemented as conventional blocks, with register sets grouped together at fixed strides relative to the CPU id. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'include/asm-sh')
-rw-r--r--include/asm-sh/hw_irq.h12
1 files changed, 12 insertions, 0 deletions
diff --git a/include/asm-sh/hw_irq.h b/include/asm-sh/hw_irq.h
index 96d97104050..cb0b6c9f702 100644
--- a/include/asm-sh/hw_irq.h
+++ b/include/asm-sh/hw_irq.h
@@ -50,11 +50,17 @@ struct intc_group {
struct intc_mask_reg {
unsigned long set_reg, clr_reg, reg_width;
intc_enum enum_ids[32];
+#ifdef CONFIG_SMP
+ unsigned long smp;
+#endif
};
struct intc_prio_reg {
unsigned long set_reg, clr_reg, reg_width, field_width;
intc_enum enum_ids[16];
+#ifdef CONFIG_SMP
+ unsigned long smp;
+#endif
};
struct intc_sense_reg {
@@ -62,6 +68,12 @@ struct intc_sense_reg {
intc_enum enum_ids[16];
};
+#ifdef CONFIG_SMP
+#define INTC_SMP(stride, nr) .smp = (stride) | ((nr) << 8)
+#else
+#define INTC_SMP(stride, nr)
+#endif
+
struct intc_desc {
struct intc_vect *vectors;
unsigned int nr_vectors;