diff options
| author | Len Brown <len.brown@intel.com> | 2006-01-27 17:18:29 -0500 |
|---|---|---|
| committer | Len Brown <len.brown@intel.com> | 2006-01-27 17:18:29 -0500 |
| commit | 292dd876ee765c478b27c93cc51e93a558ed58bf (patch) | |
| tree | 5b740e93253295baee2a9c414a6c66d03d44a9ef /include/asm-x86_64/cache.h | |
| parent | d4ec6c7cc9a15a7a529719bc3b84f46812f9842e (diff) | |
| parent | 9fdb62af92c741addbea15545f214a6e89460865 (diff) | |
Pull release into acpica branch
Diffstat (limited to 'include/asm-x86_64/cache.h')
| -rw-r--r-- | include/asm-x86_64/cache.h | 13 |
1 files changed, 12 insertions, 1 deletions
diff --git a/include/asm-x86_64/cache.h b/include/asm-x86_64/cache.h index 33e53424128..263f0a211ed 100644 --- a/include/asm-x86_64/cache.h +++ b/include/asm-x86_64/cache.h @@ -9,6 +9,17 @@ /* L1 cache line size */ #define L1_CACHE_SHIFT (CONFIG_X86_L1_CACHE_SHIFT) #define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT) -#define L1_CACHE_SHIFT_MAX 7 /* largest L1 which this arch supports */ + +#ifdef CONFIG_X86_VSMP + +/* vSMP Internode cacheline shift */ +#define INTERNODE_CACHE_SHIFT (12) +#ifdef CONFIG_SMP +#define __cacheline_aligned_in_smp \ + __attribute__((__aligned__(1 << (INTERNODE_CACHE_SHIFT)))) \ + __attribute__((__section__(".data.page_aligned"))) +#endif + +#endif #endif |