diff options
author | Dmitry Baryshkov <dbaryshkov@gmail.com> | 2008-06-22 12:01:58 +0100 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2008-07-07 13:22:01 +0100 |
commit | d6315949ac5527efd00d48283a9e33361c86e8e9 (patch) | |
tree | 6da052f59a41647eb97bc11836c715fb51eb4293 /include/linux/mfd/tc6393xb.h | |
parent | b032fccca80cbbedaa80e5a72a202a43f08aa97e (diff) |
[ARM] 5096/2: Support Toshiba TC6393XB Mobile I/O Controller.
Add support for Toshiba TC6393XB companion chip. Currently
only GPIO and part of IRQ features of the device are supported.
Signed-off-by: Dmitry Baryshkov <dbaryshkov@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'include/linux/mfd/tc6393xb.h')
-rw-r--r-- | include/linux/mfd/tc6393xb.h | 47 |
1 files changed, 47 insertions, 0 deletions
diff --git a/include/linux/mfd/tc6393xb.h b/include/linux/mfd/tc6393xb.h new file mode 100644 index 00000000000..0e3dd4ca523 --- /dev/null +++ b/include/linux/mfd/tc6393xb.h @@ -0,0 +1,47 @@ +/* + * Toshiba TC6393XB SoC support + * + * Copyright(c) 2005-2006 Chris Humbert + * Copyright(c) 2005 Dirk Opfer + * Copyright(c) 2005 Ian Molton <spyro@f2s.com> + * Copyright(c) 2007 Dmitry Baryshkov + * + * Based on code written by Sharp/Lineo for 2.4 kernels + * Based on locomo.c + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef TC6393XB_H +#define TC6393XB_H + +/* Also one should provide the CK3P6MI clock */ +struct tc6393xb_platform_data { + u16 scr_pll2cr; /* PLL2 Control */ + u16 scr_gper; /* GP Enable */ + u32 scr_gpo_doecr; /* GPO Data OE Control */ + u32 scr_gpo_dsr; /* GPO Data Set */ + + int (*enable)(struct platform_device *dev); + int (*disable)(struct platform_device *dev); + int (*suspend)(struct platform_device *dev); + int (*resume)(struct platform_device *dev); + + int irq_base; /* a base for cascaded irq */ + int gpio_base; +}; + +/* + * Relative to irq_base + */ +#define IRQ_TC6393_NAND 0 +#define IRQ_TC6393_MMC 1 +#define IRQ_TC6393_OHCI 2 +#define IRQ_TC6393_SERIAL 3 +#define IRQ_TC6393_FB 4 + +#define TC6393XB_NR_IRQS 8 + +#endif |