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authorPaul Mundt <lethal@linux-sh.org>2006-02-01 03:06:04 -0800
committerLinus Torvalds <torvalds@g5.osdl.org>2006-02-01 08:53:20 -0800
commit8d27e08191379b7a3302a33a6efdb8bdfd319c95 (patch)
treedd63b12706e849bdb494b0cdd2f11e60feb9ca91 /include
parent50373c1b7ee9cdd9b8ccaa1b58d13ad43f879908 (diff)
[PATCH] sh: drop maskpos from make_ipr_irq(), remove duplicate irq definitions
Clean up some of the subtype IRQ definitions for IPR IRQ, and consolidate the make_ipr_irq() definitions by dropping maskpos. SH-4A was the only thing interested in the maskpos, and this should be handled through INTC2 rather than IPR. Signed-off-by: Paul Mundt <lethal@linux-sh.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'include')
-rw-r--r--include/asm-sh/irq-sh73180.h36
-rw-r--r--include/asm-sh/irq-sh7780.h23
-rw-r--r--include/asm-sh/irq.h10
3 files changed, 9 insertions, 60 deletions
diff --git a/include/asm-sh/irq-sh73180.h b/include/asm-sh/irq-sh73180.h
index bf2e4310ffa..d705252be26 100644
--- a/include/asm-sh/irq-sh73180.h
+++ b/include/asm-sh/irq-sh73180.h
@@ -25,11 +25,6 @@
#undef DMA_IPR_POS
#undef DMA_PRIORITY
-#undef NR_IRQS
-
-#undef __irq_demux
-#undef irq_demux
-
#undef INTC_IMCR0
#undef INTC_IMCR1
#undef INTC_IMCR2
@@ -229,33 +224,6 @@
#define SIU_IPR_POS 1
#define SIU_PRIORITY 3
-
-/* ONCHIP_NR_IRQS */
-#define NR_IRQS 109
-
-/* In a generic kernel, NR_IRQS is an upper bound, and we should use
- * ACTUAL_NR_IRQS (which uses the machine vector) to get the correct value.
- */
-#define ACTUAL_NR_IRQS NR_IRQS
-
-
-extern void disable_irq(unsigned int);
-extern void disable_irq_nosync(unsigned int);
-extern void enable_irq(unsigned int);
-
-/*
- * Simple Mask Register Support
- */
-extern void make_maskreg_irq(unsigned int irq);
-extern unsigned short *irq_mask_register;
-
-/*
- * Function for "on chip support modules".
- */
-extern void make_ipr_irq(unsigned int irq, unsigned int addr,
- int pos, int priority);
-extern void make_imask_irq(unsigned int irq);
-
#define PORT_PACR 0xA4050100UL
#define PORT_PBCR 0xA4050102UL
#define PORT_PCCR 0xA4050104UL
@@ -343,8 +311,6 @@ extern void make_imask_irq(unsigned int irq);
#define IRQ6_PRIORITY 1
#define IRQ7_PRIORITY 1
-extern int shmse_irq_demux(int irq);
-#define __irq_demux(irq) shmse_irq_demux(irq)
-#define irq_demux(irq) __irq_demux(irq)
+int shmse_irq_demux(int irq);
#endif /* __ASM_SH_IRQ_SH73180_H */
diff --git a/include/asm-sh/irq-sh7780.h b/include/asm-sh/irq-sh7780.h
index 8c8ca128108..7f90315cd83 100644
--- a/include/asm-sh/irq-sh7780.h
+++ b/include/asm-sh/irq-sh7780.h
@@ -299,29 +299,6 @@
#define GPIO_IPR_POS 2
#define GPIO_PRIORITY 3
-/* ONCHIP_NR_IRQS */
-#define NR_IRQS 150 /* 111 + 16 */
-
-/* In a generic kernel, NR_IRQS is an upper bound, and we should use
- * ACTUAL_NR_IRQS (which uses the machine vector) to get the correct value.
- */
-#define ACTUAL_NR_IRQS NR_IRQS
-
-extern void disable_irq(unsigned int);
-extern void disable_irq_nosync(unsigned int);
-extern void enable_irq(unsigned int);
-
-/*
- * Simple Mask Register Support
- */
-extern void make_maskreg_irq(unsigned int irq);
-extern unsigned short *irq_mask_register;
-
-/*
- * Function for "on chip support modules".
- */
-extern void make_imask_irq(unsigned int irq);
-
#define INTC_TMU0_MSK 0
#define INTC_TMU3_MSK 1
#define INTC_RTC_MSK 2
diff --git a/include/asm-sh/irq.h b/include/asm-sh/irq.h
index 060ec3c2720..42b8394c04e 100644
--- a/include/asm-sh/irq.h
+++ b/include/asm-sh/irq.h
@@ -245,6 +245,7 @@
#endif /* ST40STB1 */
#endif /* 775x / SH4-202 / ST40STB1 */
+#endif /* 7780 */
/* NR_IRQS is made from three components:
* 1. ONCHIP_NR_IRQS - number of IRLS + on-chip peripherial modules
@@ -274,8 +275,11 @@
# define ONCHIP_NR_IRQS 72
#elif defined(CONFIG_CPU_SUBTYPE_ST40STB1)
# define ONCHIP_NR_IRQS 144
-#elif defined(CONFIG_CPU_SUBTYPE_SH7300)
+#elif defined(CONFIG_CPU_SUBTYPE_SH7300) || \
+ defined(CONFIG_CPU_SUBTYPE_SH73180)
# define ONCHIP_NR_IRQS 109
+#elif defined(CONFIG_CPU_SUBTYPE_SH7780)
+# define ONCHIP_NR_IRQS 111
#elif defined(CONFIG_SH_UNKNOWN) /* Most be last */
# define ONCHIP_NR_IRQS 144
#endif
@@ -306,6 +310,8 @@
# define OFFCHIP_NR_IRQS 96
#elif defined (CONFIG_SH_TITAN)
# define OFFCHIP_NR_IRQS 4
+#elif defined(CONFIG_SH_R7780RP)
+# define OFFCHIP_NR_IRQS 16
#elif defined(CONFIG_SH_UNKNOWN)
# define OFFCHIP_NR_IRQS 16 /* Must also be last */
#else
@@ -550,7 +556,7 @@ extern int ipr_irq_demux(int irq);
#define INTC_ICR_IRLM (1<<7)
#endif
-#else
+#ifdef CONFIG_CPU_SUBTYPE_SH7780
#include <asm/irq-sh7780.h>
#endif