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authorIan Campbell <icampbell@arcom.com>2005-10-28 15:26:42 +0100
committerRussell King <rmk+kernel@arm.linux.org.uk>2005-10-28 15:26:42 +0100
commit63a4b52c9ddca944afc1b78aacbf641c650780d7 (patch)
treebc782e17f3f13de7fd6a7543c9806eaeec692f8f /include
parenta0e0adb96ebe6bf0b8b3fe4cd6c214b1e8964609 (diff)
[ARM] 3044/1: Fix sparse warnings about incompatible pointer types for register defined in pxa-regs.h
Patch from Ian Campbell The sparse warning initially surfaced in sound/arm/pxa2xx-ac97.c because it was using u32 * variables to hold the unsigned long * register addresses. I submitted an ALSA patch for this http://thread.gmane.org/gmane.linux.alsa.devel/27804 issue and it was suggested that it might be preferable to change the register definitions to use u32. Most other subarches seem to use u32 for their register type, at least the ones which use a __REG macro (like the PXA) do. Nico indicated in the thread above that he wouldn't mind this patch. Changing the type required fixes for opposite warnings in the pxa2xx usb gadget code but that was the only new warning introduced on defconfig or lubbock, mainstone and our own PXA255 boards. Signed-off-by: Ian Campbell <icampbell@arcom.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'include')
-rw-r--r--include/asm-arm/arch-pxa/hardware.h4
1 files changed, 2 insertions, 2 deletions
diff --git a/include/asm-arm/arch-pxa/hardware.h b/include/asm-arm/arch-pxa/hardware.h
index cf35721cfa4..3e70bd95472 100644
--- a/include/asm-arm/arch-pxa/hardware.h
+++ b/include/asm-arm/arch-pxa/hardware.h
@@ -44,12 +44,12 @@
#ifndef __ASSEMBLY__
-# define __REG(x) (*((volatile unsigned long *)io_p2v(x)))
+# define __REG(x) (*((volatile u32 *)io_p2v(x)))
/* With indexed regs we don't want to feed the index through io_p2v()
especially if it is a variable, otherwise horrible code will result. */
# define __REG2(x,y) \
- (*(volatile unsigned long *)((unsigned long)&__REG(x) + (y)))
+ (*(volatile u32 *)((u32)&__REG(x) + (y)))
# define __PREG(x) (io_v2p((u32)&(x)))