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authorKenji Kaneshige <kaneshige.kenji@jp.fujitsu.com>2008-05-27 19:04:30 +0900
committerJesse Barnes <jbarnes@virtuousgeek.org>2008-05-27 15:43:16 -0700
commit5808639bfa98d69f77a481d759570d85f164fea0 (patch)
treef691cf1890db51cb201a64c9420281684bf80608 /mm/sparse-vmemmap.c
parentdbd79aed1aea2bece0bf43cc2ff3b2f9baf48a08 (diff)
pciehp: fix slow probing
Fix the "pciehp probing slow" problem reported from Jan C. Nordholz in http://bugzilla.kernel.org/show_bug.cgi?id=10751. The command completed bit in Slot Status register applies only to commands issued to control the attention indicator, power indicator, power controller, or electromechanical interlock. However, writes to other parts of the Slot Control register would end up writing to the control fields. Hence, any write to Slot Control register is considered as a command. However, if the controller doesn't support any of attention indicator, power indicator, power controller and electromechanical interlock, command completed bit would not set in writing to Slot Control register. In this case, we should not wait for command completed bit set, otherwise all commands would be considered not completed in timeout seconds (1 sec.). The cause of the problem is pciehp driver didn't take this situation into account. This patch changes pciehp to take it into account. This patch also add the check for "No Command Completed Support" bit in Slot Capability register. If it is set, we should not wait for command completed bit set as well. This problem seems to be revealed by the commit c27fb883dffe11aa4cb35ecea1fa1832ba45d4da that fixed the bug that pciehp did not wait for command completed properly (pciehp just ignored the command completion event). Signed-off-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Signed-off-by: Kristen Carlson Accardi <kristen.c.accardi@intel.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Diffstat (limited to 'mm/sparse-vmemmap.c')
0 files changed, 0 insertions, 0 deletions