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authorKevin Hilman <khilman@deeprootsystems.com>2009-03-20 17:29:01 -0700
committerKevin Hilman <khilman@deeprootsystems.com>2009-04-23 09:31:00 -0700
commitc5b736d093217890245a33e9a98fe92d6f3529bf (patch)
tree387755844593ae99cdc38b4556d775a100cde7da /scripts/mkmakefile
parente653034e66ec406f37427f588115badc6fc6af64 (diff)
davinci: major rework of clock, PLL, PSC infrastructure
This is a significant rework of the low-level clock, PLL and Power Sleep Controller (PSC) implementation for the DaVinci family. The primary goal is to have better modeling if the hardware clocks and features with the aim of DVFS functionality. Highlights: - model PLLs and all PLL-derived clocks - model parent/child relationships of PLLs and clocks - convert to new clkdev layer - view clock frequency and refcount via /proc/davinci_clocks Special thanks to significant contributions and testing by David Brownell. Cc: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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