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authorLen Brown <len.brown@intel.com>2009-01-28 12:47:15 -0500
committerLen Brown <len.brown@intel.com>2009-01-28 13:59:56 -0500
commita2b7b01c072435b7832ab392167545a1b38cabc3 (patch)
tree6a8aeb8723c71bc819d9576ebbb6bc2110513a40 /virt
parent152a649b647a8ef47bb74ff9e11850fa6001bedc (diff)
ACPI: remove locking from PM1x_STS register reads
PM1a_STS and PM1b_STS are twins that get OR'd together on reads, and all writes are repeated to both. The fields in PM1x_STS are single bits only, there are no multi-bit fields. So it is not necessary to lock PM1x_STS reads against writes because it is impossible to read an intermediate value of a single bit. It will either be 0 or 1, even if a write is in progress during the read. Reads are asynchronous to writes no matter if a lock is used or not. Signed-off-by: Len Brown <len.brown@intel.com>
Diffstat (limited to 'virt')
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