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-rw-r--r--arch/powerpc/platforms/powermac/pci.c6
-rw-r--r--arch/ppc/kernel/pci.c10
-rw-r--r--arch/ppc/platforms/chrp_pci.c2
-rw-r--r--arch/ppc/platforms/pmac_pci.c6
-rw-r--r--arch/ppc/syslib/m82xx_pci.c2
-rw-r--r--arch/ppc/syslib/mpc52xx_pci.c2
-rw-r--r--arch/ppc64/kernel/maple_pci.c2
-rw-r--r--arch/ppc64/kernel/pmac_pci.c2
-rw-r--r--include/asm-ppc/pci.h4
9 files changed, 18 insertions, 18 deletions
diff --git a/arch/powerpc/platforms/powermac/pci.c b/arch/powerpc/platforms/powermac/pci.c
index afb147e6b89..34dfe1e9706 100644
--- a/arch/powerpc/platforms/powermac/pci.c
+++ b/arch/powerpc/platforms/powermac/pci.c
@@ -608,7 +608,7 @@ static inline void grackle_set_loop_snoop(struct pci_controller *bp, int enable)
static int __init
setup_uninorth(struct pci_controller* hose, struct reg_property* addr)
{
- pci_assign_all_busses = 1;
+ pci_assign_all_buses = 1;
has_uninorth = 1;
hose->ops = &macrisc_pci_ops;
hose->cfg_addr = ioremap(addr->address + 0x800000, 0x1000);
@@ -640,7 +640,7 @@ static void __init setup_u3_agp(struct pci_controller* hose)
{
/* On G5, we move AGP up to high bus number so we don't need
* to reassign bus numbers for HT. If we ever have P2P bridges
- * on AGP, we'll have to move pci_assign_all_busses to the
+ * on AGP, we'll have to move pci_assign_all_buses to the
* pci_controller structure so we enable it for AGP and not for
* HT childs.
* We hard code the address because of the different size of
@@ -1007,7 +1007,7 @@ void __init pmac_find_bridges(void)
* some offset between bus number and domains for now when we
* assign all busses should help for now
*/
- if (pci_assign_all_busses)
+ if (pci_assign_all_buses)
pcibios_assign_bus_offset = 0x10;
}
diff --git a/arch/ppc/kernel/pci.c b/arch/ppc/kernel/pci.c
index 163276be7cc..ad4ef2aaa6a 100644
--- a/arch/ppc/kernel/pci.c
+++ b/arch/ppc/kernel/pci.c
@@ -54,7 +54,7 @@ static u8* pci_to_OF_bus_map;
/* By default, we don't re-assign bus numbers. We do this only on
* some pmacs
*/
-int pci_assign_all_busses;
+int pci_assign_all_buses;
struct pci_controller* hose_head;
struct pci_controller** hose_tail = &hose_head;
@@ -827,7 +827,7 @@ EXPORT_SYMBOL(pci_device_to_OF_node);
* PCI bus numbers have not yet been assigned, and you need to
* issue PCI config cycles to an OF device.
* It could also be used to "fix" RTAS config cycles if you want
- * to set pci_assign_all_busses to 1 and still use RTAS for PCI
+ * to set pci_assign_all_buses to 1 and still use RTAS for PCI
* config cycles.
*/
struct pci_controller*
@@ -1270,12 +1270,12 @@ pcibios_init(void)
/* Scan all of the recorded PCI controllers. */
for (next_busno = 0, hose = hose_head; hose; hose = hose->next) {
- if (pci_assign_all_busses)
+ if (pci_assign_all_buses)
hose->first_busno = next_busno;
hose->last_busno = 0xff;
bus = pci_scan_bus(hose->first_busno, hose->ops, hose);
hose->last_busno = bus->subordinate;
- if (pci_assign_all_busses || next_busno <= hose->last_busno)
+ if (pci_assign_all_buses || next_busno <= hose->last_busno)
next_busno = hose->last_busno + pcibios_assign_bus_offset;
}
pci_bus_count = next_busno;
@@ -1284,7 +1284,7 @@ pcibios_init(void)
* numbers vs. kernel bus numbers since we may have to
* remap them.
*/
- if (pci_assign_all_busses && have_of)
+ if (pci_assign_all_buses && have_of)
pcibios_make_OF_bus_map();
/* Do machine dependent PCI interrupt routing */
diff --git a/arch/ppc/platforms/chrp_pci.c b/arch/ppc/platforms/chrp_pci.c
index f12192cc4d4..bd047aac01b 100644
--- a/arch/ppc/platforms/chrp_pci.c
+++ b/arch/ppc/platforms/chrp_pci.c
@@ -203,7 +203,7 @@ static void __init setup_peg2(struct pci_controller *hose, struct device_node *d
printk ("RTAS supporting Pegasos OF not found, please upgrade"
" your firmware\n");
}
- pci_assign_all_busses = 1;
+ pci_assign_all_buses = 1;
}
void __init
diff --git a/arch/ppc/platforms/pmac_pci.c b/arch/ppc/platforms/pmac_pci.c
index 1dc638f7223..786295b6ddd 100644
--- a/arch/ppc/platforms/pmac_pci.c
+++ b/arch/ppc/platforms/pmac_pci.c
@@ -575,7 +575,7 @@ pmac_find_bridges(void)
* some offset between bus number and domains for now when we
* assign all busses should help for now
*/
- if (pci_assign_all_busses)
+ if (pci_assign_all_buses)
pcibios_assign_bus_offset = 0x10;
#ifdef CONFIG_POWER4
@@ -643,7 +643,7 @@ static inline void grackle_set_loop_snoop(struct pci_controller *bp, int enable)
static int __init
setup_uninorth(struct pci_controller* hose, struct reg_property* addr)
{
- pci_assign_all_busses = 1;
+ pci_assign_all_buses = 1;
has_uninorth = 1;
hose->ops = &macrisc_pci_ops;
hose->cfg_addr = ioremap(addr->address + 0x800000, 0x1000);
@@ -677,7 +677,7 @@ setup_u3_agp(struct pci_controller* hose, struct reg_property* addr)
{
/* On G5, we move AGP up to high bus number so we don't need
* to reassign bus numbers for HT. If we ever have P2P bridges
- * on AGP, we'll have to move pci_assign_all_busses to the
+ * on AGP, we'll have to move pci_assign_all_buses to the
* pci_controller structure so we enable it for AGP and not for
* HT childs.
* We hard code the address because of the different size of
diff --git a/arch/ppc/syslib/m82xx_pci.c b/arch/ppc/syslib/m82xx_pci.c
index 9db58c587b4..5cce123789f 100644
--- a/arch/ppc/syslib/m82xx_pci.c
+++ b/arch/ppc/syslib/m82xx_pci.c
@@ -302,7 +302,7 @@ pq2ads_setup_pci(struct pci_controller *hose)
void __init pq2_find_bridges(void)
{
- extern int pci_assign_all_busses;
+ extern int pci_assign_all_buses;
struct pci_controller * hose;
int host_bridge;
diff --git a/arch/ppc/syslib/mpc52xx_pci.c b/arch/ppc/syslib/mpc52xx_pci.c
index 02edff8befd..4ac19080eb8 100644
--- a/arch/ppc/syslib/mpc52xx_pci.c
+++ b/arch/ppc/syslib/mpc52xx_pci.c
@@ -182,7 +182,7 @@ mpc52xx_find_bridges(void)
struct mpc52xx_pci __iomem *pci_regs;
struct pci_controller *hose;
- pci_assign_all_busses = 1;
+ pci_assign_all_buses = 1;
pci_regs = ioremap(MPC52xx_PA(MPC52xx_PCI_OFFSET), MPC52xx_PCI_SIZE);
if (!pci_regs)
diff --git a/arch/ppc64/kernel/maple_pci.c b/arch/ppc64/kernel/maple_pci.c
index 0937649f496..b901470f55c 100644
--- a/arch/ppc64/kernel/maple_pci.c
+++ b/arch/ppc64/kernel/maple_pci.c
@@ -275,7 +275,7 @@ static void __init setup_u3_agp(struct pci_controller* hose)
{
/* On G5, we move AGP up to high bus number so we don't need
* to reassign bus numbers for HT. If we ever have P2P bridges
- * on AGP, we'll have to move pci_assign_all_busses to the
+ * on AGP, we'll have to move pci_assign_all_buses to the
* pci_controller structure so we enable it for AGP and not for
* HT childs.
* We hard code the address because of the different size of
diff --git a/arch/ppc64/kernel/pmac_pci.c b/arch/ppc64/kernel/pmac_pci.c
index f139fc03419..7a81c827594 100644
--- a/arch/ppc64/kernel/pmac_pci.c
+++ b/arch/ppc64/kernel/pmac_pci.c
@@ -381,7 +381,7 @@ static void __init setup_u3_agp(struct pci_controller* hose)
{
/* On G5, we move AGP up to high bus number so we don't need
* to reassign bus numbers for HT. If we ever have P2P bridges
- * on AGP, we'll have to move pci_assign_all_busses to the
+ * on AGP, we'll have to move pci_assign_all_buses to the
* pci_controller structure so we enable it for AGP and not for
* HT childs.
* We hard code the address because of the different size of
diff --git a/include/asm-ppc/pci.h b/include/asm-ppc/pci.h
index 9dd06cd4009..643740dd727 100644
--- a/include/asm-ppc/pci.h
+++ b/include/asm-ppc/pci.h
@@ -24,9 +24,9 @@ struct pci_dev;
* Set this to 1 if you want the kernel to re-assign all PCI
* bus numbers
*/
-extern int pci_assign_all_busses;
+extern int pci_assign_all_buses;
-#define pcibios_assign_all_busses() (pci_assign_all_busses)
+#define pcibios_assign_all_busses() (pci_assign_all_buses)
#define pcibios_scan_all_fns(a, b) 0
#define PCIBIOS_MIN_IO 0x1000
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-06 22:18:33 +0000