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-rw-r--r--arch/powerpc/boot/dts/tqm8548-bigflash.dts8
-rw-r--r--arch/powerpc/boot/dts/tqm8548.dts3
2 files changed, 9 insertions, 2 deletions
diff --git a/arch/powerpc/boot/dts/tqm8548-bigflash.dts b/arch/powerpc/boot/dts/tqm8548-bigflash.dts
index 64d2d5bbcdf..4199e89b4e5 100644
--- a/arch/powerpc/boot/dts/tqm8548-bigflash.dts
+++ b/arch/powerpc/boot/dts/tqm8548-bigflash.dts
@@ -50,13 +50,14 @@
reg = <0x00000000 0x00000000>; // Filled in by U-Boot
};
- soc8548@a0000000 {
+ soc@a0000000 {
#address-cells = <1>;
#size-cells = <1>;
device_type = "soc";
ranges = <0x0 0xa0000000 0x100000>;
reg = <0xa0000000 0x1000>; // CCSRBAR
bus-frequency = <0>;
+ compatible = "fsl,mpc8548-immr", "simple-bus";
memory-controller@2000 {
compatible = "fsl,mpc8548-memory-controller";
@@ -83,6 +84,11 @@
interrupts = <43 2>;
interrupt-parent = <&mpic>;
dfsrr;
+
+ rtc@68 {
+ compatible = "dallas,ds1337";
+ reg = <0x68>;
+ };
};
i2c@3100 {
diff --git a/arch/powerpc/boot/dts/tqm8548.dts b/arch/powerpc/boot/dts/tqm8548.dts
index 2563112cabd..58ee4185454 100644
--- a/arch/powerpc/boot/dts/tqm8548.dts
+++ b/arch/powerpc/boot/dts/tqm8548.dts
@@ -50,13 +50,14 @@
reg = <0x00000000 0x00000000>; // Filled in by U-Boot
};
- soc8548@e0000000 {
+ soc@e0000000 {
#address-cells = <1>;
#size-cells = <1>;
device_type = "soc";
ranges = <0x0 0xe0000000 0x100000>;
reg = <0xe0000000 0x1000>; // CCSRBAR
bus-frequency = <0>;
+ compatible = "fsl,mpc8548-immr", "simple-bus";
memory-controller@2000 {
compatible = "fsl,mpc8548-memory-controller";