diff options
| -rw-r--r-- | arch/sparc/kernel/process.c | 2 | ||||
| -rw-r--r-- | arch/sparc64/kernel/process.c | 2 | ||||
| -rw-r--r-- | include/asm-sparc/system.h | 2 | ||||
| -rw-r--r-- | include/asm-sparc64/system.h | 2 |
4 files changed, 4 insertions, 4 deletions
diff --git a/arch/sparc/kernel/process.c b/arch/sparc/kernel/process.c index 0bd69d0b5cd..70c0dd22491 100644 --- a/arch/sparc/kernel/process.c +++ b/arch/sparc/kernel/process.c @@ -139,8 +139,6 @@ void cpu_idle(void) #endif -extern char reboot_command []; - /* XXX cli/sti -> local_irq_xxx here, check this works once SMP is fixed. */ void machine_halt(void) { diff --git a/arch/sparc64/kernel/process.c b/arch/sparc64/kernel/process.c index 2aafce7dfc0..e116e38b160 100644 --- a/arch/sparc64/kernel/process.c +++ b/arch/sparc64/kernel/process.c @@ -114,8 +114,6 @@ void cpu_idle(void) } } -extern char reboot_command []; - void machine_halt(void) { sstate_halt(); diff --git a/include/asm-sparc/system.h b/include/asm-sparc/system.h index 45e47c159a6..4e08210cd4c 100644 --- a/include/asm-sparc/system.h +++ b/include/asm-sparc/system.h @@ -44,6 +44,8 @@ extern enum sparc_cpu sparc_cpu_model; #define SUN4M_NCPUS 4 /* Architectural limit of sun4m. */ +extern char reboot_command[]; + extern struct thread_info *current_set[NR_CPUS]; extern unsigned long empty_bad_page; diff --git a/include/asm-sparc64/system.h b/include/asm-sparc64/system.h index ed91a5d8d4f..53eae091a17 100644 --- a/include/asm-sparc64/system.h +++ b/include/asm-sparc64/system.h @@ -30,6 +30,8 @@ enum sparc_cpu { #define ARCH_SUN4C_SUN4 0 #define ARCH_SUN4 0 +extern char reboot_command[]; + /* These are here in an effort to more fully work around Spitfire Errata * #51. Essentially, if a memory barrier occurs soon after a mispredicted * branch, the chip can stop executing instructions until a trap occurs. |