diff options
| -rw-r--r-- | drivers/spi/spi_bfin5xx.c | 23 |
1 files changed, 20 insertions, 3 deletions
diff --git a/drivers/spi/spi_bfin5xx.c b/drivers/spi/spi_bfin5xx.c index 3410b0c55ed..e440718b320 100644 --- a/drivers/spi/spi_bfin5xx.c +++ b/drivers/spi/spi_bfin5xx.c @@ -26,6 +26,10 @@ #include <asm/portmux.h> #include <asm/bfin5xx_spi.h> +/* reserved_mem_dcache_on and cache friends */ +#include <asm/cplbinit.h> +#include <asm/cacheflush.h> + #define DRV_NAME "bfin-spi" #define DRV_AUTHOR "Bryan Wu, Luke Yang" #define DRV_DESC "Blackfin BF5xx on-chip SPI Controller Driver" @@ -738,9 +742,10 @@ static void pump_transfers(unsigned long data) width, transfer->len); /* - * Try to map dma buffer and do a dma transfer if - * successful use different way to r/w according to - * drv_data->cur_chip->enable_dma + * Try to map dma buffer and do a dma transfer. If successful use, + * different way to r/w according to the enable_dma settings and if + * we are not doing a full duplex transfer (since the hardware does + * not support full duplex DMA transfers). */ if (!full_duplex && drv_data->cur_chip->enable_dma && drv_data->len > 6) { @@ -795,6 +800,12 @@ static void pump_transfers(unsigned long data) /* set transfer mode, and enable SPI */ dev_dbg(&drv_data->pdev->dev, "doing DMA in.\n"); + /* invalidate caches, if needed */ + if (bfin_addr_dcachable((unsigned long) drv_data->rx)) + invalidate_dcache_range((unsigned long) drv_data->rx, + (unsigned long) (drv_data->rx + + drv_data->len)); + /* clear tx reg soformer data is not shifted out */ write_TDBR(drv_data, 0xFFFF); @@ -815,6 +826,12 @@ static void pump_transfers(unsigned long data) } else if (drv_data->tx != NULL) { dev_dbg(&drv_data->pdev->dev, "doing DMA out.\n"); + /* flush caches, if needed */ + if (bfin_addr_dcachable((unsigned long) drv_data->tx)) + flush_dcache_range((unsigned long) drv_data->tx, + (unsigned long) (drv_data->tx + + drv_data->len)); + /* start dma */ dma_enable_irq(drv_data->dma_channel); dma_config = (RESTART | dma_width | DI_EN); |