diff options
| -rw-r--r-- | arch/mips/sni/pcimt_scache.c | 37 | ||||
| -rw-r--r-- | include/asm-mips/bcache.h | 1 |
2 files changed, 0 insertions, 38 deletions
diff --git a/arch/mips/sni/pcimt_scache.c b/arch/mips/sni/pcimt_scache.c deleted file mode 100644 index a59d457fa8b..00000000000 --- a/arch/mips/sni/pcimt_scache.c +++ /dev/null @@ -1,37 +0,0 @@ -/* - * arch/mips/sni/pcimt_scache.c - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * Copyright (c) 1997, 1998 by Ralf Baechle - */ -#include <linux/init.h> -#include <linux/kernel.h> -#include <asm/bcache.h> -#include <asm/sni.h> - -#define cacheconf (*(volatile unsigned int *)PCIMT_CACHECONF) -#define invspace (*(volatile unsigned int *)PCIMT_INVSPACE) - -void __init sni_pcimt_sc_init(void) -{ - unsigned int scsiz, sc_size; - - scsiz = cacheconf & 7; - if (scsiz == 0) { - printk("Second level cache is deactived.\n"); - return; - } - if (scsiz >= 6) { - printk("Invalid second level cache size configured, " - "deactivating second level cache.\n"); - cacheconf = 0; - return; - } - - sc_size = 128 << scsiz; - printk("%dkb second level cache detected, deactivating.\n", sc_size); - cacheconf = 0; -} diff --git a/include/asm-mips/bcache.h b/include/asm-mips/bcache.h index 3646a3f2ed3..0ba9d6ef76a 100644 --- a/include/asm-mips/bcache.h +++ b/include/asm-mips/bcache.h @@ -21,7 +21,6 @@ struct bcache_ops { }; extern void indy_sc_init(void); -extern void sni_pcimt_sc_init(void); #ifdef CONFIG_BOARD_SCACHE |