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-rw-r--r--arch/arm/mach-omap2/Kconfig4
-rw-r--r--arch/arm/mach-omap2/Makefile1
-rw-r--r--arch/arm/mach-omap2/board-2430sdp.c4
-rw-r--r--arch/arm/mach-omap2/board-apollon.c15
-rw-r--r--arch/arm/mach-omap2/board-h4.c14
-rw-r--r--arch/arm/mach-omap2/board-ldp.c57
-rw-r--r--arch/arm/mach-omap2/board-omap3pandora.c180
-rw-r--r--arch/arm/mach-omap2/clock34xx.c2
-rw-r--r--arch/arm/mach-omap2/clock34xx.h36
-rw-r--r--arch/arm/mach-omap2/id.c305
-rw-r--r--arch/arm/mach-omap2/irq.c39
-rw-r--r--arch/arm/mach-omap2/mux.c44
-rw-r--r--arch/arm/mach-omap2/usb-tusb6010.c6
13 files changed, 502 insertions, 205 deletions
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index 4832fcc7d04..3754b79092a 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -55,3 +55,7 @@ config MACH_OMAP_LDP
config MACH_OVERO
bool "Gumstix Overo board"
depends on ARCH_OMAP3 && ARCH_OMAP34XX
+
+config MACH_OMAP3_PANDORA
+ bool "OMAP3 Pandora"
+ depends on ARCH_OMAP3 && ARCH_OMAP34XX \ No newline at end of file
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index c69392372c9..f12c43e4932 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -32,4 +32,5 @@ obj-$(CONFIG_MACH_OMAP_APOLLON) += board-apollon.o
obj-$(CONFIG_MACH_OMAP3_BEAGLE) += board-omap3beagle.o
obj-$(CONFIG_MACH_OMAP_LDP) += board-ldp.o
obj-$(CONFIG_MACH_OVERO) += board-overo.o
+obj-$(CONFIG_MACH_OMAP3_PANDORA) += board-omap3pandora.o
diff --git a/arch/arm/mach-omap2/board-2430sdp.c b/arch/arm/mach-omap2/board-2430sdp.c
index 24688efaa44..6748de6e19a 100644
--- a/arch/arm/mach-omap2/board-2430sdp.c
+++ b/arch/arm/mach-omap2/board-2430sdp.c
@@ -168,13 +168,13 @@ static inline void __init sdp2430_init_smc91x(void)
sdp2430_smc91x_resources[0].end = cs_mem_base + 0x30f;
udelay(100);
- if (omap_request_gpio(OMAP24XX_ETHR_GPIO_IRQ) < 0) {
+ if (gpio_request(OMAP24XX_ETHR_GPIO_IRQ, "SMC91x irq") < 0) {
printk(KERN_ERR "Failed to request GPIO%d for smc91x IRQ\n",
OMAP24XX_ETHR_GPIO_IRQ);
gpmc_cs_free(eth_cs);
goto out;
}
- omap_set_gpio_direction(OMAP24XX_ETHR_GPIO_IRQ, 1);
+ gpio_direction_input(OMAP24XX_ETHR_GPIO_IRQ);
out:
clk_disable(gpmc_fck);
diff --git a/arch/arm/mach-omap2/board-apollon.c b/arch/arm/mach-omap2/board-apollon.c
index 989ad152d7f..d83035b436d 100644
--- a/arch/arm/mach-omap2/board-apollon.c
+++ b/arch/arm/mach-omap2/board-apollon.c
@@ -236,13 +236,13 @@ static inline void __init apollon_init_smc91x(void)
udelay(100);
omap_cfg_reg(W4__24XX_GPIO74);
- if (omap_request_gpio(APOLLON_ETHR_GPIO_IRQ) < 0) {
+ if (gpio_request(APOLLON_ETHR_GPIO_IRQ, "SMC91x irq") < 0) {
printk(KERN_ERR "Failed to request GPIO%d for smc91x IRQ\n",
APOLLON_ETHR_GPIO_IRQ);
gpmc_cs_free(APOLLON_ETH_CS);
goto out;
}
- omap_set_gpio_direction(APOLLON_ETHR_GPIO_IRQ, 1);
+ gpio_direction_input(APOLLON_ETHR_GPIO_IRQ);
out:
clk_disable(gpmc_fck);
@@ -327,15 +327,15 @@ static void __init apollon_sw_init(void)
/* Enter SW - Y11 */
omap_cfg_reg(Y11_242X_GPIO16);
omap_request_gpio(SW_ENTER_GPIO16);
- omap_set_gpio_direction(SW_ENTER_GPIO16, 1);
+ gpio_direction_input(SW_ENTER_GPIO16);
/* Up SW - AA12 */
omap_cfg_reg(AA12_242X_GPIO17);
omap_request_gpio(SW_UP_GPIO17);
- omap_set_gpio_direction(SW_UP_GPIO17, 1);
+ gpio_direction_input(SW_UP_GPIO17);
/* Down SW - AA8 */
omap_cfg_reg(AA8_242X_GPIO58);
omap_request_gpio(SW_DOWN_GPIO58);
- omap_set_gpio_direction(SW_DOWN_GPIO58, 1);
+ gpio_direction_input(SW_DOWN_GPIO58);
set_irq_type(OMAP_GPIO_IRQ(SW_ENTER_GPIO16), IRQ_TYPE_EDGE_RISING);
if (request_irq(OMAP_GPIO_IRQ(SW_ENTER_GPIO16), &apollon_sw_interrupt,
@@ -359,9 +359,8 @@ static void __init apollon_usb_init(void)
/* USB device */
/* DEVICE_SUSPEND */
omap_cfg_reg(P21_242X_GPIO12);
- omap_request_gpio(12);
- omap_set_gpio_direction(12, 0); /* OUT */
- omap_set_gpio_dataout(12, 0);
+ gpio_request(12, "USB suspend");
+ gpio_direction_output(12, 0);
}
static void __init omap_apollon_init(void)
diff --git a/arch/arm/mach-omap2/board-h4.c b/arch/arm/mach-omap2/board-h4.c
index 2fef2c84508..7de0506e1e2 100644
--- a/arch/arm/mach-omap2/board-h4.c
+++ b/arch/arm/mach-omap2/board-h4.c
@@ -19,6 +19,7 @@
#include <linux/delay.h>
#include <linux/workqueue.h>
#include <linux/i2c.h>
+#include <linux/i2c/at24.h>
#include <linux/input.h>
#include <linux/err.h>
#include <linux/clk.h>
@@ -392,11 +393,24 @@ static struct omap_board_config_kernel h4_config[] = {
{ OMAP_TAG_LCD, &h4_lcd_config },
};
+static struct at24_platform_data m24c01 = {
+ .byte_len = SZ_1K / 8,
+ .page_size = 16,
+};
+
static struct i2c_board_info __initdata h4_i2c_board_info[] = {
{
I2C_BOARD_INFO("isp1301_omap", 0x2d),
.irq = OMAP_GPIO_IRQ(125),
},
+ { /* EEPROM on mainboard */
+ I2C_BOARD_INFO("24c01", 0x52),
+ .platform_data = &m24c01,
+ },
+ { /* EEPROM on cpu card */
+ I2C_BOARD_INFO("24c01", 0x57),
+ .platform_data = &m24c01,
+ },
};
static void __init omap_h4_init(void)
diff --git a/arch/arm/mach-omap2/board-ldp.c b/arch/arm/mach-omap2/board-ldp.c
index 1ea59986aa7..43c7ac4b7f8 100644
--- a/arch/arm/mach-omap2/board-ldp.c
+++ b/arch/arm/mach-omap2/board-ldp.c
@@ -38,11 +38,67 @@
#include <asm/delay.h>
#include <mach/control.h>
+#define SDP3430_SMC91X_CS 3
+
+static struct resource ldp_smc911x_resources[] = {
+ [0] = {
+ .start = OMAP34XX_ETHR_START,
+ .end = OMAP34XX_ETHR_START + SZ_4K,
+ .flags = IORESOURCE_MEM,
+ },
+ [1] = {
+ .start = 0,
+ .end = 0,
+ .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
+ },
+};
+
+static struct platform_device ldp_smc911x_device = {
+ .name = "smc911x",
+ .id = -1,
+ .num_resources = ARRAY_SIZE(ldp_smc911x_resources),
+ .resource = ldp_smc911x_resources,
+};
+
+static struct platform_device *ldp_devices[] __initdata = {
+ &ldp_smc911x_device,
+};
+
+static inline void __init ldp_init_smc911x(void)
+{
+ int eth_cs;
+ unsigned long cs_mem_base;
+ int eth_gpio = 0;
+
+ eth_cs = LDP_SMC911X_CS;
+
+ if (gpmc_cs_request(eth_cs, SZ_16M, &cs_mem_base) < 0) {
+ printk(KERN_ERR "Failed to request GPMC mem for smc911x\n");
+ return;
+ }
+
+ ldp_smc911x_resources[0].start = cs_mem_base + 0x0;
+ ldp_smc911x_resources[0].end = cs_mem_base + 0xf;
+ udelay(100);
+
+ eth_gpio = LDP_SMC911X_GPIO;
+
+ ldp_smc911x_resources[1].start = OMAP_GPIO_IRQ(eth_gpio);
+
+ if (omap_request_gpio(eth_gpio) < 0) {
+ printk(KERN_ERR "Failed to request GPIO%d for smc911x IRQ\n",
+ eth_gpio);
+ return;
+ }
+ gpio_direction_input(eth_gpio);
+}
+
static void __init omap_ldp_init_irq(void)
{
omap2_init_common_hw();
omap_init_irq();
omap_gpio_init();
+ ldp_init_smc911x();
}
static struct omap_uart_config ldp_uart_config __initdata = {
@@ -64,6 +120,7 @@ static int __init omap_i2c_init(void)
static void __init omap_ldp_init(void)
{
omap_i2c_init();
+ platform_add_devices(ldp_devices, ARRAY_SIZE(ldp_devices));
omap_board_config = ldp_config;
omap_board_config_size = ARRAY_SIZE(ldp_config);
omap_serial_init();
diff --git a/arch/arm/mach-omap2/board-omap3pandora.c b/arch/arm/mach-omap2/board-omap3pandora.c
new file mode 100644
index 00000000000..7236c7be05b
--- /dev/null
+++ b/arch/arm/mach-omap2/board-omap3pandora.c
@@ -0,0 +1,180 @@
+/*
+ * board-omap3pandora.c (Pandora Handheld Console)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
+ * 02110-1301 USA
+ *
+ */
+
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/platform_device.h>
+
+#include <linux/spi/spi.h>
+#include <linux/spi/ads7846.h>
+#include <linux/i2c/twl4030.h>
+
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+
+#include <mach/board.h>
+#include <mach/common.h>
+#include <mach/gpio.h>
+#include <mach/hardware.h>
+#include <mach/mcspi.h>
+
+#define OMAP3_PANDORA_TS_GPIO 94
+
+static struct omap_uart_config omap3pandora_uart_config __initdata = {
+ .enabled_uarts = (1 << 2), /* UART3 */
+};
+
+static struct twl4030_gpio_platform_data omap3pandora_gpio_data = {
+ .gpio_base = OMAP_MAX_GPIO_LINES,
+ .irq_base = TWL4030_GPIO_IRQ_BASE,
+ .irq_end = TWL4030_GPIO_IRQ_END,
+};
+
+static struct twl4030_usb_data omap3pandora_usb_data = {
+ .usb_mode = T2_USB_MODE_ULPI,
+};
+
+static struct twl4030_platform_data omap3pandora_twldata = {
+ .irq_base = TWL4030_IRQ_BASE,
+ .irq_end = TWL4030_IRQ_END,
+ .gpio = &omap3pandora_gpio_data,
+ .usb = &omap3pandora_usb_data,
+};
+
+static struct i2c_board_info __initdata omap3pandora_i2c_boardinfo[] = {
+ {
+ I2C_BOARD_INFO("tps65950", 0x48),
+ .flags = I2C_CLIENT_WAKE,
+ .irq = INT_34XX_SYS_NIRQ,
+ .platform_data = &omap3pandora_twldata,
+ },
+};
+
+static int __init omap3pandora_i2c_init(void)
+{
+ omap_register_i2c_bus(1, 2600, omap3pandora_i2c_boardinfo,
+ ARRAY_SIZE(omap3pandora_i2c_boardinfo));
+ /* i2c2 pins are not connected */
+ omap_register_i2c_bus(3, 400, NULL, 0);
+ return 0;
+}
+
+static void __init omap3pandora_init_irq(void)
+{
+ omap2_init_common_hw();
+ omap_init_irq();
+ omap_gpio_init();
+}
+
+static void __init omap3pandora_ads7846_init(void)
+{
+ int gpio = OMAP3_PANDORA_TS_GPIO;
+ int ret;
+
+ ret = gpio_request(gpio, "ads7846_pen_down");
+ if (ret < 0) {
+ printk(KERN_ERR "Failed to request GPIO %d for "
+ "ads7846 pen down IRQ\n", gpio);
+ return;
+ }
+
+ gpio_direction_input(gpio);
+}
+
+static int ads7846_get_pendown_state(void)
+{
+ return !gpio_get_value(OMAP3_PANDORA_TS_GPIO);
+}
+
+static struct ads7846_platform_data ads7846_config = {
+ .x_max = 0x0fff,
+ .y_max = 0x0fff,
+ .x_plate_ohms = 180,
+ .pressure_max = 255,
+ .debounce_max = 10,
+ .debounce_tol = 3,
+ .debounce_rep = 1,
+ .get_pendown_state = ads7846_get_pendown_state,
+ .keep_vref_on = 1,
+};
+
+static struct omap2_mcspi_device_config ads7846_mcspi_config = {
+ .turbo_mode = 0,
+ .single_channel = 1, /* 0: slave, 1: master */
+};
+
+static struct spi_board_info omap3pandora_spi_board_info[] __initdata = {
+ {
+ .modalias = "ads7846",
+ .bus_num = 1,
+ .chip_select = 0,
+ .max_speed_hz = 1500000,
+ .controller_data = &ads7846_mcspi_config,
+ .irq = OMAP_GPIO_IRQ(OMAP3_PANDORA_TS_GPIO),
+ .platform_data = &ads7846_config,
+ }
+};
+
+static struct platform_device omap3pandora_lcd_device = {
+ .name = "pandora_lcd",
+ .id = -1,
+};
+
+static struct omap_lcd_config omap3pandora_lcd_config __initdata = {
+ .ctrl_name = "internal",
+};
+
+static struct omap_board_config_kernel omap3pandora_config[] __initdata = {
+ { OMAP_TAG_UART, &omap3pandora_uart_config },
+ { OMAP_TAG_LCD, &omap3pandora_lcd_config },
+};
+
+static struct platform_device *omap3pandora_devices[] __initdata = {
+ &omap3pandora_lcd_device,
+};
+
+static void __init omap3pandora_init(void)
+{
+ omap3pandora_i2c_init();
+ platform_add_devices(omap3pandora_devices,
+ ARRAY_SIZE(omap3pandora_devices));
+ omap_board_config = omap3pandora_config;
+ omap_board_config_size = ARRAY_SIZE(omap3pandora_config);
+ omap_serial_init();
+ spi_register_board_info(omap3pandora_spi_board_info,
+ ARRAY_SIZE(omap3pandora_spi_board_info));
+ omap3pandora_ads7846_init();
+}
+
+static void __init omap3pandora_map_io(void)
+{
+ omap2_set_globals_343x();
+ omap2_map_common_io();
+}
+
+MACHINE_START(OMAP3_PANDORA, "Pandora Handheld Console")
+ .phys_io = 0x48000000,
+ .io_pg_offst = ((0xd8000000) >> 18) & 0xfffc,
+ .boot_params = 0x80000100,
+ .map_io = omap3pandora_map_io,
+ .init_irq = omap3pandora_init_irq,
+ .init_machine = omap3pandora_init,
+ .timer = &omap_timer,
+MACHINE_END
diff --git a/arch/arm/mach-omap2/clock34xx.c b/arch/arm/mach-omap2/clock34xx.c
index 084e11082f8..31bb7010bd4 100644
--- a/arch/arm/mach-omap2/clock34xx.c
+++ b/arch/arm/mach-omap2/clock34xx.c
@@ -475,7 +475,7 @@ int __init omap2_clk_init(void)
* Update this if there are further clock changes between ES2
* and production parts
*/
- if (is_sil_rev_equal_to(OMAP3430_REV_ES1_0)) {
+ if (omap_rev() == OMAP3430_REV_ES1_0) {
/* No 3430ES1-only rates exist, so no RATE_IN_3430ES1 */
cpu_clkflg |= CLOCK_IN_OMAP3430ES1;
} else {
diff --git a/arch/arm/mach-omap2/clock34xx.h b/arch/arm/mach-omap2/clock34xx.h
index c38a8a09692..7217a0824ec 100644
--- a/arch/arm/mach-omap2/clock34xx.h
+++ b/arch/arm/mach-omap2/clock34xx.h
@@ -2280,8 +2280,8 @@ static struct clk wkup_32k_fck = {
.recalc = &followparent_recalc,
};
-static struct clk gpio1_fck = {
- .name = "gpio1_fck",
+static struct clk gpio1_dbck = {
+ .name = "gpio1_dbck",
.parent = &wkup_32k_fck,
.enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_FCLKEN),
.enable_bit = OMAP3430_EN_GPIO1_SHIFT,
@@ -2527,8 +2527,8 @@ static struct clk per_32k_alwon_fck = {
.recalc = &followparent_recalc,
};
-static struct clk gpio6_fck = {
- .name = "gpio6_fck",
+static struct clk gpio6_dbck = {
+ .name = "gpio6_dbck",
.parent = &per_32k_alwon_fck,
.enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN),
.enable_bit = OMAP3430_EN_GPIO6_SHIFT,
@@ -2537,8 +2537,8 @@ static struct clk gpio6_fck = {
.recalc = &followparent_recalc,
};
-static struct clk gpio5_fck = {
- .name = "gpio5_fck",
+static struct clk gpio5_dbck = {
+ .name = "gpio5_dbck",
.parent = &per_32k_alwon_fck,
.enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN),
.enable_bit = OMAP3430_EN_GPIO5_SHIFT,
@@ -2547,8 +2547,8 @@ static struct clk gpio5_fck = {
.recalc = &followparent_recalc,
};
-static struct clk gpio4_fck = {
- .name = "gpio4_fck",
+static struct clk gpio4_dbck = {
+ .name = "gpio4_dbck",
.parent = &per_32k_alwon_fck,
.enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN),
.enable_bit = OMAP3430_EN_GPIO4_SHIFT,
@@ -2557,8 +2557,8 @@ static struct clk gpio4_fck = {
.recalc = &followparent_recalc,
};
-static struct clk gpio3_fck = {
- .name = "gpio3_fck",
+static struct clk gpio3_dbck = {
+ .name = "gpio3_dbck",
.parent = &per_32k_alwon_fck,
.enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN),
.enable_bit = OMAP3430_EN_GPIO3_SHIFT,
@@ -2567,8 +2567,8 @@ static struct clk gpio3_fck = {
.recalc = &followparent_recalc,
};
-static struct clk gpio2_fck = {
- .name = "gpio2_fck",
+static struct clk gpio2_dbck = {
+ .name = "gpio2_dbck",
.parent = &per_32k_alwon_fck,
.enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN),
.enable_bit = OMAP3430_EN_GPIO2_SHIFT,
@@ -3170,7 +3170,7 @@ static struct clk *onchip_34xx_clks[] __initdata = {
&usim_fck,
&gpt1_fck,
&wkup_32k_fck,
- &gpio1_fck,
+ &gpio1_dbck,
&wdt2_fck,
&wkup_l4_ick,
&usim_ick,
@@ -3192,11 +3192,11 @@ static struct clk *onchip_34xx_clks[] __initdata = {
&gpt8_fck,
&gpt9_fck,
&per_32k_alwon_fck,
- &gpio6_fck,
- &gpio5_fck,
- &gpio4_fck,
- &gpio3_fck,
- &gpio2_fck,
+ &gpio6_dbck,
+ &gpio5_dbck,
+ &gpio4_dbck,
+ &gpio3_dbck,
+ &gpio2_dbck,
&wdt3_fck,
&per_l4_ick,
&gpio6_ick,
diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c
index bf45ff39a7b..b0f8e7d6279 100644
--- a/arch/arm/mach-omap2/id.c
+++ b/arch/arm/mach-omap2/id.c
@@ -22,40 +22,15 @@
#include <mach/control.h>
#include <mach/cpu.h>
-static u32 class;
-static void __iomem *tap_base;
-static u16 tap_prod_id;
-
-#define OMAP_TAP_IDCODE 0x0204
-#define OMAP_TAP_DIE_ID_0 0x0218
-#define OMAP_TAP_DIE_ID_1 0x021C
-#define OMAP_TAP_DIE_ID_2 0x0220
-#define OMAP_TAP_DIE_ID_3 0x0224
-
-/* system_rev fields for OMAP2 processors:
- * CPU id bits [31:16],
- * CPU device type [15:12], (unprg,normal,POP)
- * CPU revision [11:08]
- * CPU class bits [07:00]
- */
-
-struct omap_id {
- u16 hawkeye; /* Silicon type (Hawkeye id) */
- u8 dev; /* Device type from production_id reg */
- u32 type; /* combined type id copied to system_rev */
-};
+static struct omap_chip_id omap_chip;
+static unsigned int omap_revision;
-/* Register values to detect the OMAP version */
-static struct omap_id omap_ids[] __initdata = {
- { .hawkeye = 0xb5d9, .dev = 0x0, .type = 0x24200000 },
- { .hawkeye = 0xb5d9, .dev = 0x1, .type = 0x24201000 },
- { .hawkeye = 0xb5d9, .dev = 0x2, .type = 0x24202000 },
- { .hawkeye = 0xb5d9, .dev = 0x4, .type = 0x24220000 },
- { .hawkeye = 0xb5d9, .dev = 0x8, .type = 0x24230000 },
- { .hawkeye = 0xb68a, .dev = 0x0, .type = 0x24300000 },
-};
-static struct omap_chip_id omap_chip;
+unsigned int omap_rev(void)
+{
+ return omap_revision;
+}
+EXPORT_SYMBOL(omap_rev);
/**
* omap_chip_is - test whether currently running OMAP matches a chip type
@@ -70,135 +45,41 @@ int omap_chip_is(struct omap_chip_id oci)
}
EXPORT_SYMBOL(omap_chip_is);
-static u32 __init read_tap_reg(int reg)
-{
- unsigned int regval = 0;
- u32 cpuid;
-
- /* Reading the IDCODE register on 3430 ES1 results in a
- * data abort as the register is not exposed on the OCP
- * Hence reading the Cortex Rev
- */
- cpuid = read_cpuid(CPUID_ID);
-
- /* If the processor type is Cortex-A8 and the revision is 0x0
- * it means its Cortex r0p0 which is 3430 ES1
- */
- if ((((cpuid >> 4) & 0xFFF) == 0xC08) && ((cpuid & 0xF) == 0x0)) {
-
- if (reg == tap_prod_id) {
- regval = 0x000F00F0;
- goto out;
- }
-
- switch (reg) {
- case OMAP_TAP_IDCODE : regval = 0x0B7AE02F; break;
- /* Making DevType as 0xF in ES1 to differ from ES2 */
- case OMAP_TAP_DIE_ID_0: regval = 0x01000000; break;
- case OMAP_TAP_DIE_ID_1: regval = 0x1012d687; break;
- case OMAP_TAP_DIE_ID_2: regval = 0x00000000; break;
- case OMAP_TAP_DIE_ID_3: regval = 0x2d2c0000; break;
- }
- } else
- regval = __raw_readl(tap_base + reg);
-
-out:
- return regval;
-
-}
+/*----------------------------------------------------------------------------*/
-/*
- * _set_system_rev - set the system_rev global based on current OMAP chip type
- *
- * Set the system_rev global. This is primarily used by the cpu_is_omapxxxx()
- * macros.
- */
-static void __init _set_system_rev(u32 type, u8 rev)
-{
- u32 i, ctrl_status;
-
- /*
- * system_rev encoding is as follows
- * system_rev & 0xff000000 -> Omap Class (24xx/34xx)
- * system_rev & 0xfff00000 -> Omap Sub Class (242x/343x)
- * system_rev & 0xffff0000 -> Omap type (2420/2422/2423/2430/3430)
- * system_rev & 0x0000f000 -> Silicon revision (ES1, ES2 )
- * system_rev & 0x00000700 -> Device Type ( EMU/HS/GP/BAD )
- * system_rev & 0x000000c0 -> IDCODE revision[6:7]
- * system_rev & 0x0000003f -> sys_boot[0:5]
- */
- /* Embedding the ES revision info in type field */
- system_rev = type;
- /* Also add IDCODE revision info only two lower bits */
- system_rev |= ((rev & 0x3) << 6);
-
- /* Add in the device type and sys_boot fields (see above) */
- if (cpu_is_omap24xx()) {
- i = OMAP24XX_CONTROL_STATUS;
- } else if (cpu_is_omap343x()) {
- i = OMAP343X_CONTROL_STATUS;
- } else {
- printk(KERN_ERR "id: unknown CPU type\n");
- BUG();
- }
- ctrl_status = omap_ctrl_readl(i);
- system_rev |= (ctrl_status & (OMAP2_SYSBOOT_5_MASK |
- OMAP2_SYSBOOT_4_MASK |
- OMAP2_SYSBOOT_3_MASK |
- OMAP2_SYSBOOT_2_MASK |
- OMAP2_SYSBOOT_1_MASK |
- OMAP2_SYSBOOT_0_MASK));
- system_rev |= (ctrl_status & OMAP2_DEVICETYPE_MASK);
-}
-
-
-/*
- * _set_omap_chip - set the omap_chip global based on OMAP chip type
- *
- * Build the omap_chip bits. This variable is used by powerdomain and
- * clockdomain code to indicate whether structures are applicable for
- * the current OMAP chip type by ANDing it against a 'platform' bitfield
- * in the structure.
- */
-static void __init _set_omap_chip(void)
-{
- if (cpu_is_omap343x()) {
-
- omap_chip.oc = CHIP_IS_OMAP3430;
- if (is_sil_rev_equal_to(OMAP3430_REV_ES1_0))
- omap_chip.oc |= CHIP_IS_OMAP3430ES1;
- else if (is_sil_rev_greater_than(OMAP3430_REV_ES1_0))
- omap_chip.oc |= CHIP_IS_OMAP3430ES2;
-
- } else if (cpu_is_omap243x()) {
-
- /* Currently only supports 2430ES2.1 and 2430-all */
- omap_chip.oc |= CHIP_IS_OMAP2430;
-
- } else if (cpu_is_omap242x()) {
-
- /* Currently only supports 2420ES2.1.1 and 2420-all */
- omap_chip.oc |= CHIP_IS_OMAP2420;
+#define OMAP_TAP_IDCODE 0x0204
+#define OMAP_TAP_DIE_ID_0 0x0218
+#define OMAP_TAP_DIE_ID_1 0x021C
+#define OMAP_TAP_DIE_ID_2 0x0220
+#define OMAP_TAP_DIE_ID_3 0x0224
- } else {
+#define read_tap_reg(reg) __raw_readl(tap_base + (reg))
- /* Current CPU not supported by this code. */
- printk(KERN_WARNING "OMAP chip type code does not yet support "
- "this CPU type.\n");
- WARN_ON(1);
+struct omap_id {
+ u16 hawkeye; /* Silicon type (Hawkeye id) */
+ u8 dev; /* Device type from production_id reg */
+ u32 type; /* Combined type id copied to omap_revision */
+};
- }
+/* Register values to detect the OMAP version */
+static struct omap_id omap_ids[] __initdata = {
+ { .hawkeye = 0xb5d9, .dev = 0x0, .type = 0x24200024 },
+ { .hawkeye = 0xb5d9, .dev = 0x1, .type = 0x24201024 },
+ { .hawkeye = 0xb5d9, .dev = 0x2, .type = 0x24202024 },
+ { .hawkeye = 0xb5d9, .dev = 0x4, .type = 0x24220024 },
+ { .hawkeye = 0xb5d9, .dev = 0x8, .type = 0x24230024 },
+ { .hawkeye = 0xb68a, .dev = 0x0, .type = 0x24300024 },
+};
-}
+static void __iomem *tap_base;
+static u16 tap_prod_id;
-void __init omap2_check_revision(void)
+void __init omap24xx_check_revision(void)
{
int i, j;
- u32 idcode;
- u32 prod_id;
+ u32 idcode, prod_id;
u16 hawkeye;
- u8 dev_type;
- u8 rev;
+ u8 dev_type, rev;
idcode = read_tap_reg(OMAP_TAP_IDCODE);
prod_id = read_tap_reg(tap_prod_id);
@@ -220,18 +101,6 @@ void __init omap2_check_revision(void)
pr_debug("OMAP_TAP_PROD_ID_0: 0x%08x DEV_TYPE: %i\n",
prod_id, dev_type);
- /*
- * Detection for 34xx ES2.0 and above can be done with just
- * hawkeye and rev. See TRM 1.5.2 Device Identification.
- * Note that rev cannot be used directly as ES1.0 uses value 0.
- */
- if (hawkeye == 0xb7ae) {
- system_rev = 0x34300000 | ((1 + rev) << 12);
- pr_info("OMAP%04x ES2.%i\n", system_rev >> 16, rev);
- _set_omap_chip();
- return;
- }
-
/* Check hawkeye ids */
for (i = 0; i < ARRAY_SIZE(omap_ids); i++) {
if (hawkeye == omap_ids[i].hawkeye)
@@ -255,23 +124,115 @@ void __init omap2_check_revision(void)
j = i;
}
- _set_system_rev(omap_ids[j].type, rev);
+ pr_info("OMAP%04x", omap_rev() >> 16);
+ if ((omap_rev() >> 8) & 0x0f)
+ pr_info("ES%x", (omap_rev() >> 12) & 0xf);
+ pr_info("\n");
+}
- _set_omap_chip();
+void __init omap34xx_check_revision(void)
+{
+ u32 cpuid, idcode;
+ u16 hawkeye;
+ u8 rev;
+ char *rev_name = "ES1.0";
- pr_info("OMAP%04x", system_rev >> 16);
- if ((system_rev >> 8) & 0x0f)
- pr_info("ES%x", (system_rev >> 12) & 0xf);
- pr_info("\n");
+ /*
+ * We cannot access revision registers on ES1.0.
+ * If the processor type is Cortex-A8 and the revision is 0x0
+ * it means its Cortex r0p0 which is 3430 ES1.0.
+ */
+ cpuid = read_cpuid(CPUID_ID);
+ if ((((cpuid >> 4) & 0xfff) == 0xc08) && ((cpuid & 0xf) == 0x0)) {
+ omap_revision = OMAP3430_REV_ES1_0;
+ goto out;
+ }
+ /*
+ * Detection for 34xx ES2.0 and above can be done with just
+ * hawkeye and rev. See TRM 1.5.2 Device Identification.
+ * Note that rev does not map directly to our defined processor
+ * revision numbers as ES1.0 uses value 0.
+ */
+ idcode = read_tap_reg(OMAP_TAP_IDCODE);
+ hawkeye = (idcode >> 12) & 0xffff;
+ rev = (idcode >> 28) & 0xff;
+
+ if (hawkeye == 0xb7ae) {
+ switch (rev) {
+ case 0:
+ omap_revision = OMAP3430_REV_ES2_0;
+ rev_name = "ES2.0";
+ break;
+ case 2:
+ omap_revision = OMAP3430_REV_ES2_1;
+ rev_name = "ES2.1";
+ break;
+ case 3:
+ omap_revision = OMAP3430_REV_ES3_0;
+ rev_name = "ES3.0";
+ break;
+ default:
+ /* Use the latest known revision as default */
+ omap_revision = OMAP3430_REV_ES3_0;
+ rev_name = "Unknown revision\n";
+ }
+ }
+
+out:
+ pr_info("OMAP%04x %s\n", omap_rev() >> 16, rev_name);
}
+/*
+ * Try to detect the exact revision of the omap we're running on
+ */
+void __init omap2_check_revision(void)
+{
+ /*
+ * At this point we have an idea about the processor revision set
+ * earlier with omap2_set_globals_tap().
+ */
+ if (cpu_is_omap24xx())
+ omap24xx_check_revision();
+ else if (cpu_is_omap34xx())
+ omap34xx_check_revision();
+ else
+ pr_err("OMAP revision unknown, please fix!\n");
+
+ /*
+ * OK, now we know the exact revision. Initialize omap_chip bits
+ * for powerdowmain and clockdomain code.
+ */
+ if (cpu_is_omap243x()) {
+ /* Currently only supports 2430ES2.1 and 2430-all */
+ omap_chip.oc |= CHIP_IS_OMAP2430;
+ } else if (cpu_is_omap242x()) {
+ /* Currently only supports 2420ES2.1.1 and 2420-all */
+ omap_chip.oc |= CHIP_IS_OMAP2420;
+ } else if (cpu_is_omap343x()) {
+ omap_chip.oc = CHIP_IS_OMAP3430;
+ if (omap_rev() == OMAP3430_REV_ES1_0)
+ omap_chip.oc |= CHIP_IS_OMAP3430ES1;
+ else if (omap_rev() > OMAP3430_REV_ES1_0)
+ omap_chip.oc |= CHIP_IS_OMAP3430ES2;
+ } else {
+ pr_err("Uninitialized omap_chip, please fix!\n");
+ }
+}
+
+/*
+ * Set up things for map_io and processor detection later on. Gets called
+ * pretty much first thing from board init. For multi-omap, this gets
+ * cpu_is_omapxxxx() working accurately enough for map_io. Then we'll try to
+ * detect the exact revision later on in omap2_detect_revision() once map_io
+ * is done.
+ */
void __init omap2_set_globals_tap(struct omap_globals *omap2_globals)
{
- class = omap2_globals->class;
+ omap_revision = omap2_globals->class;
tap_base = omap2_globals->tap;
- if (class == 0x3430)
+ if (cpu_is_omap34xx())
tap_prod_id = 0x0210;
else
tap_prod_id = 0x0208;
diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c
index c40fc378a25..636e2821af7 100644
--- a/arch/arm/mach-omap2/irq.c
+++ b/arch/arm/mach-omap2/irq.c
@@ -23,6 +23,7 @@
#define INTC_REVISION 0x0000
#define INTC_SYSCONFIG 0x0010
#define INTC_SYSSTATUS 0x0014
+#define INTC_SIR 0x0040
#define INTC_CONTROL 0x0048
#define INTC_MIR_CLEAR0 0x0088
#define INTC_MIR_SET0 0x008c
@@ -60,6 +61,30 @@ static u32 intc_bank_read_reg(struct omap_irq_bank *bank, u16 reg)
return __raw_readl(bank->base_reg + reg);
}
+static int previous_irq;
+
+/*
+ * On 34xx we can get occasional spurious interrupts if the ack from
+ * an interrupt handler does not get posted before we unmask. Warn about
+ * the interrupt handlers that need to flush posted writes.
+ */
+static int omap_check_spurious(unsigned int irq)
+{
+ u32 sir, spurious;
+
+ sir = intc_bank_read_reg(&irq_banks[0], INTC_SIR);
+ spurious = sir >> 6;
+
+ if (spurious > 1) {
+ printk(KERN_WARNING "Spurious irq %i: 0x%08x, please flush "
+ "posted write for irq %i\n",
+ irq, sir, previous_irq);
+ return spurious;
+ }
+
+ return 0;
+}
+
/* XXX: FIQ and additional INTC support (only MPU at the moment) */
static void omap_ack_irq(unsigned int irq)
{
@@ -70,6 +95,20 @@ static void omap_mask_irq(unsigned int irq)
{
int offset = irq & (~(IRQ_BITS_PER_REG - 1));
+ if (cpu_is_omap34xx()) {
+ int spurious = 0;
+
+ /*
+ * INT_34XX_GPT12_IRQ is also the spurious irq. Maybe because
+ * it is the highest irq number?
+ */
+ if (irq == INT_34XX_GPT12_IRQ)
+ spurious = omap_check_spurious(irq);
+
+ if (!spurious)
+ previous_irq = irq;
+ }
+
irq &= (IRQ_BITS_PER_REG - 1);
intc_bank_write_reg(1 << irq, &irq_banks[0], INTC_MIR_SET0 + offset);
diff --git a/arch/arm/mach-omap2/mux.c b/arch/arm/mach-omap2/mux.c
index b1393673d95..dacb41f130c 100644
--- a/arch/arm/mach-omap2/mux.c
+++ b/arch/arm/mach-omap2/mux.c
@@ -203,6 +203,15 @@ MUX_CFG_24XX("AE9_2430_USB0HS_NXT", 0x13D, 0, 0, 0, 1)
MUX_CFG_24XX("AC7_2430_USB0HS_DATA7", 0x13E, 0, 0, 0, 1)
/* 2430 McBSP */
+MUX_CFG_24XX("AD6_2430_MCBSP_CLKS", 0x011E, 0, 0, 0, 1)
+
+MUX_CFG_24XX("AB2_2430_MCBSP1_CLKR", 0x011A, 0, 0, 0, 1)
+MUX_CFG_24XX("AD5_2430_MCBSP1_FSR", 0x011B, 0, 0, 0, 1)
+MUX_CFG_24XX("AA1_2430_MCBSP1_DX", 0x011C, 0, 0, 0, 1)
+MUX_CFG_24XX("AF3_2430_MCBSP1_DR", 0x011D, 0, 0, 0, 1)
+MUX_CFG_24XX("AB3_2430_MCBSP1_FSX", 0x011F, 0, 0, 0, 1)
+MUX_CFG_24XX("Y9_2430_MCBSP1_CLKX", 0x0120, 0, 0, 0, 1)
+
MUX_CFG_24XX("AC10_2430_MCBSP2_FSX", 0x012E, 1, 0, 0, 1)
MUX_CFG_24XX("AD16_2430_MCBSP2_CLX", 0x012F, 1, 0, 0, 1)
MUX_CFG_24XX("AE13_2430_MCBSP2_DX", 0x0130, 1, 0, 0, 1)
@@ -211,6 +220,31 @@ MUX_CFG_24XX("AC10_2430_MCBSP2_FSX_OFF",0x012E, 0, 0, 0, 1)
MUX_CFG_24XX("AD16_2430_MCBSP2_CLX_OFF",0x012F, 0, 0, 0, 1)
MUX_CFG_24XX("AE13_2430_MCBSP2_DX_OFF", 0x0130, 0, 0, 0, 1)
MUX_CFG_24XX("AD13_2430_MCBSP2_DR_OFF", 0x0131, 0, 0, 0, 1)
+
+MUX_CFG_24XX("AC9_2430_MCBSP3_CLKX", 0x0103, 0, 0, 0, 1)
+MUX_CFG_24XX("AE4_2430_MCBSP3_FSX", 0x0104, 0, 0, 0, 1)
+MUX_CFG_24XX("AE2_2430_MCBSP3_DR", 0x0105, 0, 0, 0, 1)
+MUX_CFG_24XX("AF4_2430_MCBSP3_DX", 0x0106, 0, 0, 0, 1)
+
+MUX_CFG_24XX("N3_2430_MCBSP4_CLKX", 0x010B, 1, 0, 0, 1)
+MUX_CFG_24XX("AD23_2430_MCBSP4_DR", 0x010C, 1, 0, 0, 1)
+MUX_CFG_24XX("AB25_2430_MCBSP4_DX", 0x010D, 1, 0, 0, 1)
+MUX_CFG_24XX("AC25_2430_MCBSP4_FSX", 0x010E, 1, 0, 0, 1)
+
+MUX_CFG_24XX("AE16_2430_MCBSP5_CLKX", 0x00ED, 1, 0, 0, 1)
+MUX_CFG_24XX("AF12_2430_MCBSP5_FSX", 0x00ED, 1, 0, 0, 1)
+MUX_CFG_24XX("K7_2430_MCBSP5_DX", 0x00EF, 1, 0, 0, 1)
+MUX_CFG_24XX("M1_2430_MCBSP5_DR", 0x00F0, 1, 0, 0, 1)
+
+/* 2430 MCSPI1 */
+MUX_CFG_24XX("Y18_2430_MCSPI1_CLK", 0x010F, 0, 0, 0, 1)
+MUX_CFG_24XX("AD15_2430_MCSPI1_SIMO", 0x0110, 0, 0, 0, 1)
+MUX_CFG_24XX("AE17_2430_MCSPI1_SOMI", 0x0111, 0, 0, 0, 1)
+MUX_CFG_24XX("U1_2430_MCSPI1_CS0", 0x0112, 0, 0, 0, 1)
+
+/* Touchscreen GPIO */
+MUX_CFG_24XX("AF19_2430_GPIO_85", 0x0113, 3, 0, 0, 1)
+
};
#define OMAP24XX_PINS_SZ ARRAY_SIZE(omap24xx_pins)
@@ -417,6 +451,14 @@ MUX_CFG_34XX("AD2_3430_USB3FS_PHY_MM3_TXDAT", 0x188,
MUX_CFG_34XX("AC1_3430_USB3FS_PHY_MM3_TXEN_N", 0x18a,
OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_OUTPUT)
+
+/* 34XX GPIO - bidirectional, unless the name has an "_OUT" suffix.
+ * No internal pullup/pulldown without "_UP" or "_DOWN" suffix.
+ */
+MUX_CFG_34XX("AH8_34XX_GPIO29", 0x5fa,
+ OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_INPUT)
+MUX_CFG_34XX("J25_34XX_GPIO170", 0x1c6,
+ OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_INPUT)
};
#define OMAP34XX_PINS_SZ ARRAY_SIZE(omap34xx_pins)
@@ -452,7 +494,7 @@ static void __init_or_module omap2_cfg_debug(const struct pin_config *cfg, u16 r
#endif
#ifdef CONFIG_ARCH_OMAP24XX
-int __init_or_module omap24xx_cfg_reg(const struct pin_config *cfg)
+static int __init_or_module omap24xx_cfg_reg(const struct pin_config *cfg)
{
static DEFINE_SPINLOCK(mux_spin_lock);
unsigned long flags;
diff --git a/arch/arm/mach-omap2/usb-tusb6010.c b/arch/arm/mach-omap2/usb-tusb6010.c
index 10ef464d6be..15e509013de 100644
--- a/arch/arm/mach-omap2/usb-tusb6010.c
+++ b/arch/arm/mach-omap2/usb-tusb6010.c
@@ -12,11 +12,11 @@
#include <linux/errno.h>
#include <linux/delay.h>
#include <linux/platform_device.h>
+#include <linux/gpio.h>
#include <linux/usb/musb.h>
#include <mach/gpmc.h>
-#include <mach/gpio.h>
#include <mach/mux.h>
@@ -292,12 +292,12 @@ tusb6010_setup_interface(struct musb_hdrc_platform_data *data,
);
/* IRQ */
- status = omap_request_gpio(irq);
+ status = gpio_request(irq, "TUSB6010 irq");
if (status < 0) {
printk(error, 3, status);
return status;
}
- omap_set_gpio_direction(irq, 1);
+ gpio_direction_input(irq);
tusb_resources[2].start = irq + IH_GPIO_BASE;
/* set up memory timings ... can speed them up later */