diff options
Diffstat (limited to 'arch/arm/mach-s5pv210/include')
| -rw-r--r-- | arch/arm/mach-s5pv210/include/mach/debug-macro.S | 42 | ||||
| -rw-r--r-- | arch/arm/mach-s5pv210/include/mach/entry-macro.S | 54 | ||||
| -rw-r--r-- | arch/arm/mach-s5pv210/include/mach/gpio.h | 129 | ||||
| -rw-r--r-- | arch/arm/mach-s5pv210/include/mach/hardware.h | 18 | ||||
| -rw-r--r-- | arch/arm/mach-s5pv210/include/mach/io.h | 26 | ||||
| -rw-r--r-- | arch/arm/mach-s5pv210/include/mach/irqs.h | 146 | ||||
| -rw-r--r-- | arch/arm/mach-s5pv210/include/mach/map.h | 65 | ||||
| -rw-r--r-- | arch/arm/mach-s5pv210/include/mach/memory.h | 23 | ||||
| -rw-r--r-- | arch/arm/mach-s5pv210/include/mach/pwm-clock.h | 69 | ||||
| -rw-r--r-- | arch/arm/mach-s5pv210/include/mach/regs-clock.h | 169 | ||||
| -rw-r--r-- | arch/arm/mach-s5pv210/include/mach/regs-irq.h | 19 | ||||
| -rw-r--r-- | arch/arm/mach-s5pv210/include/mach/system.h | 26 | ||||
| -rw-r--r-- | arch/arm/mach-s5pv210/include/mach/tick.h | 26 | ||||
| -rw-r--r-- | arch/arm/mach-s5pv210/include/mach/timex.h | 29 | ||||
| -rw-r--r-- | arch/arm/mach-s5pv210/include/mach/uncompress.h | 24 | ||||
| -rw-r--r-- | arch/arm/mach-s5pv210/include/mach/vmalloc.h | 22 |
16 files changed, 887 insertions, 0 deletions
diff --git a/arch/arm/mach-s5pv210/include/mach/debug-macro.S b/arch/arm/mach-s5pv210/include/mach/debug-macro.S new file mode 100644 index 00000000000..8aec853310a --- /dev/null +++ b/arch/arm/mach-s5pv210/include/mach/debug-macro.S @@ -0,0 +1,42 @@ +/* linux/arch/arm/mach-s5pv210/include/mach/debug-macro.S + * + * Copyright (c) 2010 Samsung Electronics Co., Ltd. + * http://www.samsung.com/ + * + * Based on arch/arm/mach-s3c6400/include/mach/debug-macro.S + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +/* pull in the relevant register and map files. */ + +#include <mach/map.h> +#include <plat/regs-serial.h> + + /* note, for the boot process to work we have to keep the UART + * virtual address aligned to an 1MiB boundary for the L1 + * mapping the head code makes. We keep the UART virtual address + * aligned and add in the offset when we load the value here. + */ + + .macro addruart, rx + mrc p15, 0, \rx, c1, c0 + tst \rx, #1 + ldreq \rx, = S3C_PA_UART + ldrne \rx, = S3C_VA_UART +#if CONFIG_DEBUG_S3C_UART != 0 + add \rx, \rx, #(0x400 * CONFIG_DEBUG_S3C_UART) +#endif + .endm + +#define fifo_full fifo_full_s5pv210 +#define fifo_level fifo_level_s5pv210 + +/* include the reset of the code which will do the work, we're only + * compiling for a single cpu processor type so the default of s3c2440 + * will be fine with us. + */ + +#include <plat/debug-macro.S> diff --git a/arch/arm/mach-s5pv210/include/mach/entry-macro.S b/arch/arm/mach-s5pv210/include/mach/entry-macro.S new file mode 100644 index 00000000000..3aa41ac59f0 --- /dev/null +++ b/arch/arm/mach-s5pv210/include/mach/entry-macro.S @@ -0,0 +1,54 @@ +/* linux/arch/arm/mach-s5pv210/include/mach/entry-macro.S + * + * Copyright (c) 2010 Samsung Electronics Co., Ltd. + * http://www.samsung.com/ + * + * Low-level IRQ helper macros for the Samsung S5PV210 + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#include <asm/hardware/vic.h> +#include <mach/map.h> +#include <plat/irqs.h> + + .macro disable_fiq + .endm + + .macro get_irqnr_preamble, base, tmp + ldr \base, =VA_VIC0 + .endm + + .macro arch_ret_to_user, tmp1, tmp2 + .endm + + .macro get_irqnr_and_base, irqnr, irqstat, base, tmp + + @ check the vic0 + mov \irqnr, # S5P_IRQ_OFFSET + 31 + ldr \irqstat, [ \base, # VIC_IRQ_STATUS ] + teq \irqstat, #0 + + @ otherwise try vic1 + addeq \tmp, \base, #(VA_VIC1 - VA_VIC0) + addeq \irqnr, \irqnr, #32 + ldreq \irqstat, [ \tmp, # VIC_IRQ_STATUS ] + teqeq \irqstat, #0 + + @ otherwise try vic2 + addeq \tmp, \base, #(VA_VIC2 - VA_VIC0) + addeq \irqnr, \irqnr, #32 + ldreq \irqstat, [ \tmp, # VIC_IRQ_STATUS ] + teqeq \irqstat, #0 + + @ otherwise try vic3 + addeq \tmp, \base, #(VA_VIC3 - VA_VIC0) + addeq \irqnr, \irqnr, #32 + ldreq \irqstat, [ \tmp, # VIC_IRQ_STATUS ] + teqeq \irqstat, #0 + + clzne \irqstat, \irqstat + subne \irqnr, \irqnr, \irqstat + .endm diff --git a/arch/arm/mach-s5pv210/include/mach/gpio.h b/arch/arm/mach-s5pv210/include/mach/gpio.h new file mode 100644 index 00000000000..533b020e21e --- /dev/null +++ b/arch/arm/mach-s5pv210/include/mach/gpio.h @@ -0,0 +1,129 @@ +/* linux/arch/arm/mach-s5pv210/include/mach/gpio.h + * + * Copyright (c) 2010 Samsung Electronics Co., Ltd. + * http://www.samsung.com/ + * + * S5PV210 - GPIO lib support + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#ifndef __ASM_ARCH_GPIO_H +#define __ASM_ARCH_GPIO_H __FILE__ + +#define gpio_get_value __gpio_get_value +#define gpio_set_value __gpio_set_value +#define gpio_cansleep __gpio_cansleep +#define gpio_to_irq __gpio_to_irq + +/* GPIO bank sizes */ +#define S5PV210_GPIO_A0_NR (8) +#define S5PV210_GPIO_A1_NR (4) +#define S5PV210_GPIO_B_NR (8) +#define S5PV210_GPIO_C0_NR (5) +#define S5PV210_GPIO_C1_NR (5) +#define S5PV210_GPIO_D0_NR (4) +#define S5PV210_GPIO_D1_NR (6) +#define S5PV210_GPIO_E0_NR (8) +#define S5PV210_GPIO_E1_NR (5) +#define S5PV210_GPIO_F0_NR (8) +#define S5PV210_GPIO_F1_NR (8) +#define S5PV210_GPIO_F2_NR (8) +#define S5PV210_GPIO_F3_NR (6) +#define S5PV210_GPIO_G0_NR (7) +#define S5PV210_GPIO_G1_NR (7) +#define S5PV210_GPIO_G2_NR (7) +#define S5PV210_GPIO_G3_NR (7) +#define S5PV210_GPIO_H0_NR (8) +#define S5PV210_GPIO_H1_NR (8) +#define S5PV210_GPIO_H2_NR (8) +#define S5PV210_GPIO_H3_NR (8) +#define S5PV210_GPIO_I_NR (7) +#define S5PV210_GPIO_J0_NR (8) +#define S5PV210_GPIO_J1_NR (6) +#define S5PV210_GPIO_J2_NR (8) +#define S5PV210_GPIO_J3_NR (8) +#define S5PV210_GPIO_J4_NR (5) + +/* GPIO bank numbers */ + +/* CONFIG_S3C_GPIO_SPACE allows the user to select extra + * space for debugging purposes so that any accidental + * change from one gpio bank to another can be caught. +*/ + +#define S5PV210_GPIO_NEXT(__gpio) \ + ((__gpio##_START) + (__gpio##_NR) + CONFIG_S3C_GPIO_SPACE + 1) + +enum s5p_gpio_number { + S5PV210_GPIO_A0_START = 0, + S5PV210_GPIO_A1_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_A0), + S5PV210_GPIO_B_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_A1), + S5PV210_GPIO_C0_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_B), + S5PV210_GPIO_C1_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_C0), + S5PV210_GPIO_D0_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_C1), + S5PV210_GPIO_D1_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_D0), + S5PV210_GPIO_E0_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_D1), + S5PV210_GPIO_E1_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_E0), + S5PV210_GPIO_F0_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_E1), + S5PV210_GPIO_F1_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_F0), + S5PV210_GPIO_F2_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_F1), + S5PV210_GPIO_F3_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_F2), + S5PV210_GPIO_G0_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_F3), + S5PV210_GPIO_G1_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_G0), + S5PV210_GPIO_G2_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_G1), + S5PV210_GPIO_G3_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_G2), + S5PV210_GPIO_H0_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_G3), + S5PV210_GPIO_H1_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_H0), + S5PV210_GPIO_H2_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_H1), + S5PV210_GPIO_H3_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_H2), + S5PV210_GPIO_I_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_H3), + S5PV210_GPIO_J0_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_I), + S5PV210_GPIO_J1_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_J0), + S5PV210_GPIO_J2_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_J1), + S5PV210_GPIO_J3_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_J2), + S5PV210_GPIO_J4_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_J3), +}; + +/* S5PV210 GPIO number definitions */ +#define S5PV210_GPA0(_nr) (S5PV210_GPIO_A0_START + (_nr)) +#define S5PV210_GPA1(_nr) (S5PV210_GPIO_A1_START + (_nr)) +#define S5PV210_GPB(_nr) (S5PV210_GPIO_B_START + (_nr)) +#define S5PV210_GPC0(_nr) (S5PV210_GPIO_C0_START + (_nr)) +#define S5PV210_GPC1(_nr) (S5PV210_GPIO_C1_START + (_nr)) +#define S5PV210_GPD0(_nr) (S5PV210_GPIO_D0_START + (_nr)) +#define S5PV210_GPD1(_nr) (S5PV210_GPIO_D1_START + (_nr)) +#define S5PV210_GPE0(_nr) (S5PV210_GPIO_E0_START + (_nr)) +#define S5PV210_GPE1(_nr) (S5PV210_GPIO_E1_START + (_nr)) +#define S5PV210_GPF0(_nr) (S5PV210_GPIO_F0_START + (_nr)) +#define S5PV210_GPF1(_nr) (S5PV210_GPIO_F1_START + (_nr)) +#define S5PV210_GPF2(_nr) (S5PV210_GPIO_F2_START + (_nr)) +#define S5PV210_GPF3(_nr) (S5PV210_GPIO_F3_START + (_nr)) +#define S5PV210_GPG0(_nr) (S5PV210_GPIO_G0_START + (_nr)) +#define S5PV210_GPG1(_nr) (S5PV210_GPIO_G1_START + (_nr)) +#define S5PV210_GPG2(_nr) (S5PV210_GPIO_G2_START + (_nr)) +#define S5PV210_GPG3(_nr) (S5PV210_GPIO_G3_START + (_nr)) +#define S5PV210_GPH0(_nr) (S5PV210_GPIO_H0_START + (_nr)) +#define S5PV210_GPH1(_nr) (S5PV210_GPIO_H1_START + (_nr)) +#define S5PV210_GPH2(_nr) (S5PV210_GPIO_H2_START + (_nr)) +#define S5PV210_GPH3(_nr) (S5PV210_GPIO_H3_START + (_nr)) +#define S5PV210_GPI(_nr) (S5PV210_GPIO_I_START + (_nr)) +#define S5PV210_GPJ0(_nr) (S5PV210_GPIO_J0_START + (_nr)) +#define S5PV210_GPJ1(_nr) (S5PV210_GPIO_J1_START + (_nr)) +#define S5PV210_GPJ2(_nr) (S5PV210_GPIO_J2_START + (_nr)) +#define S5PV210_GPJ3(_nr) (S5PV210_GPIO_J3_START + (_nr)) +#define S5PV210_GPJ4(_nr) (S5PV210_GPIO_J4_START + (_nr)) + +/* the end of the S5PV210 specific gpios */ +#define S5PV210_GPIO_END (S5PV210_GPJ4(S5PV210_GPIO_J4_NR) + 1) +#define S3C_GPIO_END S5PV210_GPIO_END + +/* define the number of gpios we need to the one after the GPJ4() range */ +#define ARCH_NR_GPIOS (S5PV210_GPJ4(S5PV210_GPIO_J4_NR) + \ + CONFIG_SAMSUNG_GPIO_EXTRA + 1) + +#include <asm-generic/gpio.h> + +#endif /* __ASM_ARCH_GPIO_H */ diff --git a/arch/arm/mach-s5pv210/include/mach/hardware.h b/arch/arm/mach-s5pv210/include/mach/hardware.h new file mode 100644 index 00000000000..fada7a392d0 --- /dev/null +++ b/arch/arm/mach-s5pv210/include/mach/hardware.h @@ -0,0 +1,18 @@ +/* linux/arch/arm/mach-s5pv210/include/mach/hardware.h + * + * Copyright (c) 2010 Samsung Electronics Co., Ltd. + * http://www.samsung.com/ + * + * S5PV210 - Hardware support + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#ifndef __ASM_ARCH_HARDWARE_H +#define __ASM_ARCH_HARDWARE_H __FILE__ + +/* currently nothing here, placeholder */ + +#endif /* __ASM_ARCH_HARDWARE_H */ diff --git a/arch/arm/mach-s5pv210/include/mach/io.h b/arch/arm/mach-s5pv210/include/mach/io.h new file mode 100644 index 00000000000..5ab9d560bc8 --- /dev/null +++ b/arch/arm/mach-s5pv210/include/mach/io.h @@ -0,0 +1,26 @@ +/* linux/arch/arm/mach-s5pv210/include/mach/io.h + * + * Copyright 2008-2010 Ben Dooks <ben-linux@fluff.org> + * + * Copyright (c) 2010 Samsung Electronics Co., Ltd. + * http://www.samsung.com/ + * + * Based on arch/arm/mach-s5p6442/include/mach/io.h + * + * Default IO routines for S5PV210 + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#ifndef __ASM_ARM_ARCH_IO_H +#define __ASM_ARM_ARCH_IO_H __FILE__ + +/* No current ISA/PCI bus support. */ +#define __io(a) __typesafe_io(a) +#define __mem_pci(a) (a) + +#define IO_SPACE_LIMIT (0xFFFFFFFF) + +#endif /* __ASM_ARM_ARCH_IO_H */ diff --git a/arch/arm/mach-s5pv210/include/mach/irqs.h b/arch/arm/mach-s5pv210/include/mach/irqs.h new file mode 100644 index 00000000000..62c5175ef29 --- /dev/null +++ b/arch/arm/mach-s5pv210/include/mach/irqs.h @@ -0,0 +1,146 @@ +/* linux/arch/arm/mach-s5pv210/include/mach/irqs.h + * + * Copyright (c) 2010 Samsung Electronics Co., Ltd. + * http://www.samsung.com/ + * + * S5PV210 - IRQ definitions + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#ifndef __ASM_ARCH_IRQS_H +#define __ASM_ARCH_IRQS_H __FILE__ + +#include <plat/irqs.h> + +/* VIC0: System, DMA, Timer */ + +#define IRQ_EINT0 S5P_IRQ_VIC0(0) +#define IRQ_EINT1 S5P_IRQ_VIC0(1) +#define IRQ_EINT2 S5P_IRQ_VIC0(2) +#define IRQ_EINT3 S5P_IRQ_VIC0(3) +#define IRQ_EINT4 S5P_IRQ_VIC0(4) +#define IRQ_EINT5 S5P_IRQ_VIC0(5) +#define IRQ_EINT6 S5P_IRQ_VIC0(6) +#define IRQ_EINT7 S5P_IRQ_VIC0(7) +#define IRQ_EINT8 S5P_IRQ_VIC0(8) +#define IRQ_EINT9 S5P_IRQ_VIC0(9) +#define IRQ_EINT10 S5P_IRQ_VIC0(10) +#define IRQ_EINT11 S5P_IRQ_VIC0(11) +#define IRQ_EINT12 S5P_IRQ_VIC0(12) +#define IRQ_EINT13 S5P_IRQ_VIC0(13) +#define IRQ_EINT14 S5P_IRQ_VIC0(14) +#define IRQ_EINT15 S5P_IRQ_VIC0(15) +#define IRQ_EINT16_31 S5P_IRQ_VIC0(16) +#define IRQ_BATF S5P_IRQ_VIC0(17) +#define IRQ_MDMA S5P_IRQ_VIC0(18) +#define IRQ_PDMA0 S5P_IRQ_VIC0(19) +#define IRQ_PDMA1 S5P_IRQ_VIC0(20) +#define IRQ_TIMER0_VIC S5P_IRQ_VIC0(21) +#define IRQ_TIMER1_VIC S5P_IRQ_VIC0(22) +#define IRQ_TIMER2_VIC S5P_IRQ_VIC0(23) +#define IRQ_TIMER3_VIC S5P_IRQ_VIC0(24) +#define IRQ_TIMER4_VIC S5P_IRQ_VIC0(25) +#define IRQ_SYSTIMER S5P_IRQ_VIC0(26) +#define IRQ_WDT S5P_IRQ_VIC0(27) +#define IRQ_RTC_ALARM S5P_IRQ_VIC0(28) +#define IRQ_RTC_TIC S5P_IRQ_VIC0(29) +#define IRQ_GPIOINT S5P_IRQ_VIC0(30) +#define IRQ_FIMC3 S5P_IRQ_VIC0(31) + +/* VIC1: ARM, Power, Memory, Connectivity, Storage */ + +#define IRQ_CORTEX0 S5P_IRQ_VIC1(0) +#define IRQ_CORTEX1 S5P_IRQ_VIC1(1) +#define IRQ_CORTEX2 S5P_IRQ_VIC1(2) +#define IRQ_CORTEX3 S5P_IRQ_VIC1(3) +#define IRQ_CORTEX4 S5P_IRQ_VIC1(4) +#define IRQ_IEMAPC S5P_IRQ_VIC1(5) +#define IRQ_IEMIEC S5P_IRQ_VIC1(6) +#define IRQ_ONENAND S5P_IRQ_VIC1(7) +#define IRQ_NFC S5P_IRQ_VIC1(8) +#define IRQ_CFC S5P_IRQ_VIC1(9) +#define IRQ_UART0 S5P_IRQ_VIC1(10) +#define IRQ_UART1 S5P_IRQ_VIC1(11) +#define IRQ_UART2 S5P_IRQ_VIC1(12) +#define IRQ_UART3 S5P_IRQ_VIC1(13) +#define IRQ_IIC S5P_IRQ_VIC1(14) +#define IRQ_SPI0 S5P_IRQ_VIC1(15) +#define IRQ_SPI1 S5P_IRQ_VIC1(16) +#define IRQ_SPI2 S5P_IRQ_VIC1(17) +#define IRQ_IRDA S5P_IRQ_VIC1(18) +#define IRQ_CAN0 S5P_IRQ_VIC1(19) +#define IRQ_CAN1 S5P_IRQ_VIC1(20) +#define IRQ_HSIRX S5P_IRQ_VIC1(21) +#define IRQ_HSITX S5P_IRQ_VIC1(22) +#define IRQ_UHOST S5P_IRQ_VIC1(23) +#define IRQ_OTG S5P_IRQ_VIC1(24) +#define IRQ_MSM S5P_IRQ_VIC1(25) +#define IRQ_HSMMC0 S5P_IRQ_VIC1(26) +#define IRQ_HSMMC1 S5P_IRQ_VIC1(27) +#define IRQ_HSMMC2 S5P_IRQ_VIC1(28) +#define IRQ_MIPICSI S5P_IRQ_VIC1(29) +#define IRQ_MIPIDSI S5P_IRQ_VIC1(30) +#define IRQ_ONENAND_AUDI S5P_IRQ_VIC1(31) + +/* VIC2: Multimedia, Audio, Security */ + +#define IRQ_LCD0 S5P_IRQ_VIC2(0) +#define IRQ_LCD1 S5P_IRQ_VIC2(1) +#define IRQ_LCD2 S5P_IRQ_VIC2(2) +#define IRQ_LCD3 S5P_IRQ_VIC2(3) +#define IRQ_ROTATOR S5P_IRQ_VIC2(4) +#define IRQ_FIMC0 S5P_IRQ_VIC2(5) +#define IRQ_FIMC1 S5P_IRQ_VIC2(6) +#define IRQ_FIMC2 S5P_IRQ_VIC2(7) +#define IRQ_JPEG S5P_IRQ_VIC2(8) +#define IRQ_2D S5P_IRQ_VIC2(9) +#define IRQ_3D S5P_IRQ_VIC2(10) +#define IRQ_MIXER S5P_IRQ_VIC2(11) +#define IRQ_HDMI S5P_IRQ_VIC2(12) +#define IRQ_IIC1 S5P_IRQ_VIC2(13) +#define IRQ_MFC S5P_IRQ_VIC2(14) +#define IRQ_TVENC S5P_IRQ_VIC2(15) +#define IRQ_I2S0 S5P_IRQ_VIC2(16) +#define IRQ_I2S1 S5P_IRQ_VIC2(17) +#define IRQ_I2S2 S5P_IRQ_VIC2(18) +#define IRQ_AC97 S5P_IRQ_VIC2(19) +#define IRQ_PCM0 S5P_IRQ_VIC2(20) +#define IRQ_PCM1 S5P_IRQ_VIC2(21) +#define IRQ_SPDIF S5P_IRQ_VIC2(22) +#define IRQ_ADC S5P_IRQ_VIC2(23) +#define IRQ_PENDN S5P_IRQ_VIC2(24) +#define IRQ_TC IRQ_PENDN +#define IRQ_KEYPAD S5P_IRQ_VIC2(25) +#define IRQ_CG S5P_IRQ_VIC2(26) +#define IRQ_SEC S5P_IRQ_VIC2(27) +#define IRQ_SECRX S5P_IRQ_VIC2(28) +#define IRQ_SECTX S5P_IRQ_VIC2(29) +#define IRQ_SDMIRQ S5P_IRQ_VIC2(30) +#define IRQ_SDMFIQ S5P_IRQ_VIC2(31) + +/* VIC3: Etc */ + +#define IRQ_IPC S5P_IRQ_VIC3(0) +#define IRQ_HOSTIF S5P_IRQ_VIC3(1) +#define IRQ_MMC3 S5P_IRQ_VIC3(2) +#define IRQ_CEC S5P_IRQ_VIC3(3) +#define IRQ_TSI S5P_IRQ_VIC3(4) +#define IRQ_MDNIE0 S5P_IRQ_VIC3(5) +#define IRQ_MDNIE1 S5P_IRQ_VIC3(6) +#define IRQ_MDNIE2 S5P_IRQ_VIC3(7) +#define IRQ_MDNIE3 S5P_IRQ_VIC3(8) +#define IRQ_VIC_END S5P_IRQ_VIC3(31) + +#define S5P_IRQ_EINT_BASE (IRQ_VIC_END + 1) + +#define S5P_EINT(x) ((x) + S5P_IRQ_EINT_BASE) +#define IRQ_EINT(x) S5P_EINT(x) + +/* Set the default NR_IRQS */ + +#define NR_IRQS (IRQ_EINT(31) + 1) + +#endif /* ASM_ARCH_IRQS_H */ diff --git a/arch/arm/mach-s5pv210/include/mach/map.h b/arch/arm/mach-s5pv210/include/mach/map.h new file mode 100644 index 00000000000..c22694c8231 --- /dev/null +++ b/arch/arm/mach-s5pv210/include/mach/map.h @@ -0,0 +1,65 @@ +/* linux/arch/arm/mach-s5pv210/include/mach/map.h + * + * Copyright (c) 2010 Samsung Electronics Co., Ltd. + * http://www.samsung.com/ + * + * S5PV210 - Memory map definitions + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#ifndef __ASM_ARCH_MAP_H +#define __ASM_ARCH_MAP_H __FILE__ + +#include <plat/map-base.h> +#include <plat/map-s5p.h> + +#define S5PV210_PA_CHIPID (0xE0000000) +#define S5P_PA_CHIPID S5PV210_PA_CHIPID + +#define S5PV210_PA_SYSCON (0xE0100000) +#define S5P_PA_SYSCON S5PV210_PA_SYSCON + +#define S5PV210_PA_GPIO (0xE0200000) +#define S5P_PA_GPIO S5PV210_PA_GPIO + +#define S5PV210_PA_IIC0 (0xE1800000) + +#define S5PV210_PA_TIMER (0xE2500000) +#define S5P_PA_TIMER S5PV210_PA_TIMER + +#define S5PV210_PA_SYSTIMER (0xE2600000) + +#define S5PV210_PA_UART (0xE2900000) + +#define S5P_PA_UART0 (S5PV210_PA_UART + 0x0) +#define S5P_PA_UART1 (S5PV210_PA_UART + 0x400) +#define S5P_PA_UART2 (S5PV210_PA_UART + 0x800) +#define S5P_PA_UART3 (S5PV210_PA_UART + 0xC00) + +#define S5P_SZ_UART SZ_256 + +#define S5PV210_PA_SROMC (0xE8000000) + +#define S5PV210_PA_VIC0 (0xF2000000) +#define S5P_PA_VIC0 S5PV210_PA_VIC0 + +#define S5PV210_PA_VIC1 (0xF2100000) +#define S5P_PA_VIC1 S5PV210_PA_VIC1 + +#define S5PV210_PA_VIC2 (0xF2200000) +#define S5P_PA_VIC2 S5PV210_PA_VIC2 + +#define S5PV210_PA_VIC3 (0xF2300000) +#define S5P_PA_VIC3 S5PV210_PA_VIC3 + +#define S5PV210_PA_SDRAM (0x20000000) +#define S5P_PA_SDRAM S5PV210_PA_SDRAM + +/* compatibiltiy defines. */ +#define S3C_PA_UART S5PV210_PA_UART +#define S3C_PA_IIC S5PV210_PA_IIC0 + +#endif /* __ASM_ARCH_MAP_H */ diff --git a/arch/arm/mach-s5pv210/include/mach/memory.h b/arch/arm/mach-s5pv210/include/mach/memory.h new file mode 100644 index 00000000000..379117e2760 --- /dev/null +++ b/arch/arm/mach-s5pv210/include/mach/memory.h @@ -0,0 +1,23 @@ +/* linux/arch/arm/mach-s5pv210/include/mach/memory.h + * + * Copyright (c) 2010 Samsung Electronics Co., Ltd. + * http://www.samsung.com/ + * + * S5PV210 - Memory definitions + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#ifndef __ASM_ARCH_MEMORY_H +#define __ASM_ARCH_MEMORY_H + +#define PHYS_OFFSET UL(0x20000000) +#define CONSISTENT_DMA_SIZE (SZ_8M + SZ_4M + SZ_2M) + +/* Maximum of 256MiB in one bank */ +#define MAX_PHYSMEM_BITS 32 +#define SECTION_SIZE_BITS 28 + +#endif /* __ASM_ARCH_MEMORY_H */ diff --git a/arch/arm/mach-s5pv210/include/mach/pwm-clock.h b/arch/arm/mach-s5pv210/include/mach/pwm-clock.h new file mode 100644 index 00000000000..69027fea987 --- /dev/null +++ b/arch/arm/mach-s5pv210/include/mach/pwm-clock.h @@ -0,0 +1,69 @@ +/* linux/arch/arm/mach-s5pv210/include/mach/pwm-clock.h + * + * Copyright 2008 Simtec Electronics + * Ben Dooks <ben@simtec.co.uk> + * http://armlinux.simtec.co.uk/ + * + * Copyright (c) 2009 Samsung Electronics Co., Ltd. + * http://www.samsung.com/ + * + * Based on arch/arm/plat-s3c24xx/include/mach/pwm-clock.h + * + * S5PV210 - pwm clock and timer support + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#ifndef __ASM_ARCH_PWMCLK_H +#define __ASM_ARCH_PWMCLK_H __FILE__ + +/** + * pwm_cfg_src_is_tclk() - return whether the given mux config is a tclk + * @cfg: The timer TCFG1 register bits shifted down to 0. + * + * Return true if the given configuration from TCFG1 is a TCLK instead + * any of the TDIV clocks. + */ +static inline int pwm_cfg_src_is_tclk(unsigned long tcfg) +{ + return tcfg == S3C2410_TCFG1_MUX_TCLK; +} + +/** + * tcfg_to_divisor() - convert tcfg1 setting to a divisor + * @tcfg1: The tcfg1 setting, shifted down. + * + * Get the divisor value for the given tcfg1 setting. We assume the + * caller has already checked to see if this is not a TCLK source. + */ +static inline unsigned long tcfg_to_divisor(unsigned long tcfg1) +{ + return 1 << (1 + tcfg1); +} + +/** + * pwm_tdiv_has_div1() - does the tdiv setting have a /1 + * + * Return true if we have a /1 in the tdiv setting. + */ +static inline unsigned int pwm_tdiv_has_div1(void) +{ + return 0; +} + +/** + * pwm_tdiv_div_bits() - calculate TCFG1 divisor value. + * @div: The divisor to calculate the bit information for. + * + * Turn a divisor into the necessary bit field for TCFG1. + */ +static inline unsigned long pwm_tdiv_div_bits(unsigned int div) +{ + return ilog2(div) - 1; +} + +#define S3C_TCFG1_MUX_TCLK S3C2410_TCFG1_MUX_TCLK + +#endif /* __ASM_ARCH_PWMCLK_H */ diff --git a/arch/arm/mach-s5pv210/include/mach/regs-clock.h b/arch/arm/mach-s5pv210/include/mach/regs-clock.h new file mode 100644 index 00000000000..e56e0e4673e --- /dev/null +++ b/arch/arm/mach-s5pv210/include/mach/regs-clock.h @@ -0,0 +1,169 @@ +/* linux/arch/arm/mach-s5pv210/include/mach/regs-clock.h + * + * Copyright (c) 2010 Samsung Electronics Co., Ltd. + * http://www.samsung.com/ + * + * S5PV210 - Clock register definitions + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#ifndef __ASM_ARCH_REGS_CLOCK_H +#define __ASM_ARCH_REGS_CLOCK_H __FILE__ + +#include <mach/map.h> + +#define S5P_CLKREG(x) (S3C_VA_SYS + (x)) + +#define S5P_APLL_LOCK S5P_CLKREG(0x00) +#define S5P_MPLL_LOCK S5P_CLKREG(0x08) +#define S5P_EPLL_LOCK S5P_CLKREG(0x10) +#define S5P_VPLL_LOCK S5P_CLKREG(0x20) + +#define S5P_APLL_CON S5P_CLKREG(0x100) +#define S5P_MPLL_CON S5P_CLKREG(0x108) +#define S5P_EPLL_CON S5P_CLKREG(0x110) +#define S5P_VPLL_CON S5P_CLKREG(0x120) + +#define S5P_CLK_SRC0 S5P_CLKREG(0x200) +#define S5P_CLK_SRC1 S5P_CLKREG(0x204) +#define S5P_CLK_SRC2 S5P_CLKREG(0x208) +#define S5P_CLK_SRC3 S5P_CLKREG(0x20C) +#define S5P_CLK_SRC4 S5P_CLKREG(0x210) +#define S5P_CLK_SRC5 S5P_CLKREG(0x214) +#define S5P_CLK_SRC6 S5P_CLKREG(0x218) + +#define S5P_CLK_SRC_MASK0 S5P_CLKREG(0x280) +#define S5P_CLK_SRC_MASK1 S5P_CLKREG(0x284) + +#define S5P_CLK_DIV0 S5P_CLKREG(0x300) +#define S5P_CLK_DIV1 S5P_CLKREG(0x304) +#define S5P_CLK_DIV2 S5P_CLKREG(0x308) +#define S5P_CLK_DIV3 S5P_CLKREG(0x30C) +#define S5P_CLK_DIV4 S5P_CLKREG(0x310) +#define S5P_CLK_DIV5 S5P_CLKREG(0x314) +#define S5P_CLK_DIV6 S5P_CLKREG(0x318) +#define S5P_CLK_DIV7 S5P_CLKREG(0x31C) + +#define S5P_CLKGATE_MAIN0 S5P_CLKREG(0x400) +#define S5P_CLKGATE_MAIN1 S5P_CLKREG(0x404) +#define S5P_CLKGATE_MAIN2 S5P_CLKREG(0x408) + +#define S5P_CLKGATE_PERI0 S5P_CLKREG(0x420) +#define S5P_CLKGATE_PERI1 S5P_CLKREG(0x424) + +#define S5P_CLKGATE_SCLK0 S5P_CLKREG(0x440) +#define S5P_CLKGATE_SCLK1 S5P_CLKREG(0x444) +#define S5P_CLKGATE_IP0 S5P_CLKREG(0x460) +#define S5P_CLKGATE_IP1 S5P_CLKREG(0x464) +#define S5P_CLKGATE_IP2 S5P_CLKREG(0x468) +#define S5P_CLKGATE_IP3 S5P_CLKREG(0x46C) +#define S5P_CLKGATE_IP4 S5P_CLKREG(0x470) + +#define S5P_CLKGATE_BLOCK S5P_CLKREG(0x480) +#define S5P_CLKGATE_BUS0 S5P_CLKREG(0x484) +#define S5P_CLKGATE_BUS1 S5P_CLKREG(0x488) +#define S5P_CLK_OUT S5P_CLKREG(0x500) + +/* CLKSRC0 */ +#define S5P_CLKSRC0_MUX200_MASK (0x1<<16) +#define S5P_CLKSRC0_MUX166_MASK (0x1<<20) +#define S5P_CLKSRC0_MUX133_MASK (0x1<<24) + +/* CLKDIV0 */ +#define S5P_CLKDIV0_APLL_SHIFT (0) +#define S5P_CLKDIV0_APLL_MASK (0x7 << S5P_CLKDIV0_APLL_SHIFT) +#define S5P_CLKDIV0_A2M_SHIFT (4) +#define S5P_CLKDIV0_A2M_MASK (0x7 << S5P_CLKDIV0_A2M_SHIFT) +#define S5P_CLKDIV0_HCLK200_SHIFT (8) +#define S5P_CLKDIV0_HCLK200_MASK (0x7 << S5P_CLKDIV0_HCLK200_SHIFT) +#define S5P_CLKDIV0_PCLK100_SHIFT (12) +#define S5P_CLKDIV0_PCLK100_MASK (0x7 << S5P_CLKDIV0_PCLK100_SHIFT) +#define S5P_CLKDIV0_HCLK166_SHIFT (16) +#define S5P_CLKDIV0_HCLK166_MASK (0xF << S5P_CLKDIV0_HCLK166_SHIFT) +#define S5P_CLKDIV0_PCLK83_SHIFT (20) +#define S5P_CLKDIV0_PCLK83_MASK (0x7 << S5P_CLKDIV0_PCLK83_SHIFT) +#define S5P_CLKDIV0_HCLK133_SHIFT (24) +#define S5P_CLKDIV0_HCLK133_MASK (0xF << S5P_CLKDIV0_HCLK133_SHIFT) +#define S5P_CLKDIV0_PCLK66_SHIFT (28) +#define S5P_CLKDIV0_PCLK66_MASK (0x7 << S5P_CLKDIV0_PCLK66_SHIFT) + +/* Registers related to power management */ +#define S5P_PWR_CFG S5P_CLKREG(0xC000) +#define S5P_EINT_WAKEUP_MASK S5P_CLKREG(0xC004) +#define S5P_WAKEUP_MASK S5P_CLKREG(0xC008) +#define S5P_PWR_MODE S5P_CLKREG(0xC00C) +#define S5P_NORMAL_CFG S5P_CLKREG(0xC010) +#define S5P_IDLE_CFG S5P_CLKREG(0xC020) +#define S5P_STOP_CFG S5P_CLKREG(0xC030) +#define S5P_STOP_MEM_CFG S5P_CLKREG(0xC034) +#define S5P_SLEEP_CFG S5P_CLKREG(0xC040) + +#define S5P_OSC_FREQ S5P_CLKREG(0xC100) +#define S5P_OSC_STABLE S5P_CLKREG(0xC104) +#define S5P_PWR_STABLE S5P_CLKREG(0xC108) +#define S5P_MTC_STABLE S5P_CLKREG(0xC110) +#define S5P_CLAMP_STABLE S5P_CLKREG(0xC114) + +#define S5P_WAKEUP_STAT S5P_CLKREG(0xC200) +#define S5P_BLK_PWR_STAT S5P_CLKREG(0xC204) + +#define S5P_OTHERS S5P_CLKREG(0xE000) +#define S5P_OM_STAT S5P_CLKREG(0xE100) +#define S5P_USB_PHY_CONTROL S5P_CLKREG(0xE80C) +#define S5P_DAC_CONTROL S5P_CLKREG(0xE810) + +#define S5P_INFORM0 S5P_CLKREG(0xF000) +#define S5P_INFORM1 S5P_CLKREG(0xF004) +#define S5P_INFORM2 S5P_CLKREG(0xF008) +#define S5P_INFORM3 S5P_CLKREG(0xF00C) +#define S5P_INFORM4 S5P_CLKREG(0xF010) +#define S5P_INFORM5 S5P_CLKREG(0xF014) +#define S5P_INFORM6 S5P_CLKREG(0xF018) +#define S5P_INFORM7 S5P_CLKREG(0xF01C) + +#define S5P_RST_STAT S5P_CLKREG(0xA000) +#define S5P_OSC_CON S5P_CLKREG(0x8000) +#define S5P_MIPI_PHY_CON0 S5P_CLKREG(0x7200) +#define S5P_MIPI_PHY_CON1 S5P_CLKREG(0x7204) +#define S5P_MIPI_CONTROL S5P_CLKREG(0xE814) + +#define S5P_IDLE_CFG_TL_MASK (3 << 30) +#define S5P_IDLE_CFG_TM_MASK (3 << 28) +#define S5P_IDLE_CFG_TL_ON (2 << 30) +#define S5P_IDLE_CFG_TM_ON (2 << 28) +#define S5P_IDLE_CFG_DIDLE (1 << 0) + +#define S5P_CFG_WFI_CLEAN (~(3 << 8)) +#define S5P_CFG_WFI_IDLE (1 << 8) +#define S5P_CFG_WFI_STOP (2 << 8) +#define S5P_CFG_WFI_SLEEP (3 << 8) + +#define S5P_OTHER_SYS_INT 24 +#define S5P_OTHER_STA_TYPE 23 +#define S5P_OTHER_SYSC_INTOFF (1 << 0) +#define STA_TYPE_EXPON 0 +#define STA_TYPE_SFR 1 + +#define S5P_PWR_STA_EXP_SCALE 0 +#define S5P_PWR_STA_CNT 4 + +#define S5P_PWR_STABLE_COUNT 85500 + +#define S5P_SLEEP_CFG_OSC_EN (1 << 0) +#define S5P_SLEEP_CFG_USBOSC_EN (1 << 1) + +/* OTHERS Resgister */ +#define S5P_OTHERS_USB_SIG_MASK (1 << 16) +#define S5P_OTHERS_MIPI_DPHY_EN (1 << 28) + +/* MIPI */ +#define S5P_MIPI_DPHY_EN (3) + +/* S5P_DAC_CONTROL */ +#define S5P_DAC_ENABLE (1) +#define S5P_DAC_DISABLE (0) + +#endif /* __ASM_ARCH_REGS_CLOCK_H */ diff --git a/arch/arm/mach-s5pv210/include/mach/regs-irq.h b/arch/arm/mach-s5pv210/include/mach/regs-irq.h new file mode 100644 index 00000000000..5c3b104a7c8 --- /dev/null +++ b/arch/arm/mach-s5pv210/include/mach/regs-irq.h @@ -0,0 +1,19 @@ +/* linux/arch/arm/mach-s5pv210/include/mach/regs-irq.h + * + * Copyright (c) 2010 Samsung Electronics Co., Ltd. + * http://www.samsung.com/ + * + * S5PV210 - IRQ register definitions + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#ifndef __ASM_ARCH_REGS_IRQ_H +#define __ASM_ARCH_REGS_IRQ_H __FILE__ + +#include <asm/hardware/vic.h> +#include <mach/map.h> + +#endif /* __ASM_ARCH_REGS_IRQ_H */ diff --git a/arch/arm/mach-s5pv210/include/mach/system.h b/arch/arm/mach-s5pv210/include/mach/system.h new file mode 100644 index 00000000000..1ca04d5025b --- /dev/null +++ b/arch/arm/mach-s5pv210/include/mach/system.h @@ -0,0 +1,26 @@ +/* linux/arch/arm/mach-s5pv210/include/mach/system.h + * + * Copyright (c) 2010 Samsung Electronics Co., Ltd. + * http://www.samsung.com/ + * + * S5PV210 - system support header + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#ifndef __ASM_ARCH_SYSTEM_H +#define __ASM_ARCH_SYSTEM_H __FILE__ + +static void arch_idle(void) +{ + /* nothing here yet */ +} + +static void arch_reset(char mode, const char *cmd) +{ + /* nothing here yet */ +} + +#endif /* __ASM_ARCH_SYSTEM_H */ diff --git a/arch/arm/mach-s5pv210/include/mach/tick.h b/arch/arm/mach-s5pv210/include/mach/tick.h new file mode 100644 index 00000000000..7993b3603cc --- /dev/null +++ b/arch/arm/mach-s5pv210/include/mach/tick.h @@ -0,0 +1,26 @@ +/* linux/arch/arm/mach-s5pv210/include/mach/tick.h + * + * Copyright (c) 2009 Samsung Electronics Co., Ltd. + * http://www.samsung.com/ + * + * Based on arch/arm/mach-s3c6400/include/mach/tick.h + * + * S5PV210 - Timer tick support definitions + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#ifndef __ASM_ARCH_TICK_H +#define __ASM_ARCH_TICK_H __FILE__ + +static inline u32 s3c24xx_ostimer_pending(void) +{ + u32 pend = __raw_readl(VA_VIC0 + VIC_RAW_STATUS); + return pend & (1 << (IRQ_TIMER4_VIC - S5P_IRQ_VIC0(0))); +} + +#define TICK_MAX (0xffffffff) + +#endif /* __ASM_ARCH_TICK_H */ diff --git a/arch/arm/mach-s5pv210/include/mach/timex.h b/arch/arm/mach-s5pv210/include/mach/timex.h new file mode 100644 index 00000000000..73dc85496a8 --- /dev/null +++ b/arch/arm/mach-s5pv210/include/mach/timex.h @@ -0,0 +1,29 @@ +/* linux/arch/arm/mach-s5pv210/include/mach/timex.h + * + * Copyright (c) 2003-2010 Simtec Electronics + * Ben Dooks <ben@simtec.co.uk> + * + * Copyright (c) 2010 Samsung Electronics Co., Ltd. + * http://www.samsung.com/ + * + * Based on arch/arm/mach-s5p6442/include/mach/timex.h + * + * S5PV210 - time parameters + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#ifndef __ASM_ARCH_TIMEX_H +#define __ASM_ARCH_TIMEX_H __FILE__ + +/* CLOCK_TICK_RATE needs to be evaluatable by the cpp, so making it + * a variable is useless. It seems as long as we make our timers an + * exact multiple of HZ, any value that makes a 1->1 correspondence + * for the time conversion functions to/from jiffies is acceptable. +*/ + +#define CLOCK_TICK_RATE 12000000 + +#endif /* __ASM_ARCH_TIMEX_H */ diff --git a/arch/arm/mach-s5pv210/include/mach/uncompress.h b/arch/arm/mach-s5pv210/include/mach/uncompress.h new file mode 100644 index 00000000000..08ff2fda1fb --- /dev/null +++ b/arch/arm/mach-s5pv210/include/mach/uncompress.h @@ -0,0 +1,24 @@ +/* linux/arch/arm/mach-s5pv210/include/mach/uncompress.h + * + * Copyright (c) 2010 Samsung Electronics Co., Ltd. + * http://www.samsung.com/ + * + * S5PV210 - uncompress code + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#ifndef __ASM_ARCH_UNCOMPRESS_H +#define __ASM_ARCH_UNCOMPRESS_H + +#include <mach/map.h> +#include <plat/uncompress.h> + +static void arch_detect_cpu(void) +{ + /* we do not need to do any cpu detection here at the moment. */ +} + +#endif /* __ASM_ARCH_UNCOMPRESS_H */ diff --git a/arch/arm/mach-s5pv210/include/mach/vmalloc.h b/arch/arm/mach-s5pv210/include/mach/vmalloc.h new file mode 100644 index 00000000000..58f515e0747 --- /dev/null +++ b/arch/arm/mach-s5pv210/include/mach/vmalloc.h @@ -0,0 +1,22 @@ +/* linux/arch/arm/mach-s5p6442/include/mach/vmalloc.h + * + * Copyright 2010 Ben Dooks <ben-linux@fluff.org> + * + * Copyright (c) 2010 Samsung Electronics Co., Ltd. + * http://www.samsung.com/ + * + * Based on arch/arm/mach-s5p6442/include/mach/vmalloc.h + * + * S5PV210 vmalloc definition + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#ifndef __ASM_ARCH_VMALLOC_H +#define __ASM_ARCH_VMALLOC_H __FILE__ + +#define VMALLOC_END (0xE0000000) + +#endif /* __ASM_ARCH_VMALLOC_H */ |