diff options
Diffstat (limited to 'arch/arm')
-rw-r--r-- | arch/arm/mach-omap2/clock34xx.c | 1 | ||||
-rw-r--r-- | arch/arm/mach-omap2/clock34xx.h | 11 | ||||
-rw-r--r-- | arch/arm/mach-omap2/powerdomains34xx.h | 1 |
3 files changed, 1 insertions, 12 deletions
diff --git a/arch/arm/mach-omap2/clock34xx.c b/arch/arm/mach-omap2/clock34xx.c index 943ac63fc6f..439a66918d3 100644 --- a/arch/arm/mach-omap2/clock34xx.c +++ b/arch/arm/mach-omap2/clock34xx.c @@ -209,7 +209,6 @@ static struct omap_clk omap34xx_clks[] = { CLK(NULL, "usbhost_120m_fck", &usbhost_120m_fck, CK_3430ES2), CLK(NULL, "usbhost_48m_fck", &usbhost_48m_fck, CK_3430ES2), CLK(NULL, "usbhost_ick", &usbhost_ick, CK_3430ES2), - CLK(NULL, "usbhost_sar_fck", &usbhost_sar_fck, CK_3430ES2), CLK(NULL, "usim_fck", &usim_fck, CK_3430ES2), CLK(NULL, "gpt1_fck", &gpt1_fck, CK_343X), CLK(NULL, "wkup_32k_fck", &wkup_32k_fck, CK_343X), diff --git a/arch/arm/mach-omap2/clock34xx.h b/arch/arm/mach-omap2/clock34xx.h index f811a097851..a2dcf574d98 100644 --- a/arch/arm/mach-omap2/clock34xx.h +++ b/arch/arm/mach-omap2/clock34xx.h @@ -2218,17 +2218,6 @@ static struct clk usbhost_ick = { .recalc = &followparent_recalc, }; -static struct clk usbhost_sar_fck = { - .name = "usbhost_sar_fck", - .ops = &clkops_omap2_dflt, - .parent = &osc_sys_ck, - .init = &omap2_init_clk_clkdm, - .enable_reg = OMAP_PRM_REGADDR(OMAP3430ES2_USBHOST_MOD, PM_PWSTCTRL), - .enable_bit = OMAP3430ES2_SAVEANDRESTORE_SHIFT, - .clkdm_name = "usbhost_clkdm", - .recalc = &followparent_recalc, -}; - /* WKUP */ static const struct clksel_rate usim_96m_rates[] = { diff --git a/arch/arm/mach-omap2/powerdomains34xx.h b/arch/arm/mach-omap2/powerdomains34xx.h index f573f710839..3a8e4fbea5f 100644 --- a/arch/arm/mach-omap2/powerdomains34xx.h +++ b/arch/arm/mach-omap2/powerdomains34xx.h @@ -312,6 +312,7 @@ static struct powerdomain usbhost_pwrdm = { .sleepdep_srcs = dss_per_usbhost_sleepdeps, .pwrsts = PWRSTS_OFF_RET_ON, .pwrsts_logic_ret = PWRDM_POWER_RET, + .flags = PWRDM_HAS_HDWR_SAR, /* for USBHOST ctrlr only */ .banks = 1, .pwrsts_mem_ret = { [0] = PWRDM_POWER_RET, /* MEMRETSTATE */ |