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-rw-r--r--arch/blackfin/mach-bf533/head.S35
1 files changed, 22 insertions, 13 deletions
diff --git a/arch/blackfin/mach-bf533/head.S b/arch/blackfin/mach-bf533/head.S
index 4db9e624090..7dd0e9c3a93 100644
--- a/arch/blackfin/mach-bf533/head.S
+++ b/arch/blackfin/mach-bf533/head.S
@@ -28,7 +28,9 @@
*/
#include <linux/linkage.h>
+#include <linux/init.h>
#include <asm/blackfin.h>
+#include <asm/trace.h>
#if CONFIG_BFIN_KERNEL_CLOCK
#include <asm/mach/mem_init.h>
#endif
@@ -45,19 +47,19 @@
#define INITIAL_STACK 0xFFB01000
-.text
+__INIT
ENTRY(__start)
-ENTRY(__stext)
/* R0: argument of command line string, passed from uboot, save it */
R7 = R0;
- /* Set the SYSCFG register */
+ /* Set the SYSCFG register:
+ * Enable Cycle Counter and Nesting Of Interrupts (3rd Bit)
+ */
R0 = 0x36;
- /*Enable Cycle Counter and Nesting Of Interrupts(3rd Bit)*/
SYSCFG = R0;
R0 = 0;
- /*Clear Out All the data and pointer Registers*/
+ /* Clear Out All the data and pointer Registers */
R1 = R0;
R2 = R0;
R3 = R0;
@@ -79,7 +81,7 @@ ENTRY(__stext)
L2 = r0;
L3 = r0;
- /* Clear Out All the DAG Registers*/
+ /* Clear Out All the DAG Registers */
B0 = r0;
B1 = r0;
B2 = r0;
@@ -95,6 +97,10 @@ ENTRY(__stext)
M2 = r0;
M3 = r0;
+ trace_buffer_start(p0,r0);
+ P0 = R1;
+ R0 = R1;
+
#if CONFIG_DEBUG_KERNEL_START
/*
@@ -265,6 +271,7 @@ ENTRY(__stext)
.LWAIT_HERE:
jump .LWAIT_HERE;
+ENDPROC(__start)
ENTRY(_real_start)
[ -- sp ] = reti;
@@ -303,7 +310,7 @@ ENTRY(_real_start)
.L_clear_zero:
W[p1++] = r0;
-/* pass the uboot arguments to the global value command line */
+ /* pass the uboot arguments to the global value command line */
R0 = R7;
call _cmdline_init;
@@ -322,7 +329,7 @@ ENTRY(_real_start)
[p1] = r1;
/*
- * load the current thread pointer and stack
+ * load the current thread pointer and stack
*/
r1.l = _init_thread_union;
r1.h = _init_thread_union;
@@ -333,9 +340,10 @@ ENTRY(_real_start)
sp = r1;
usp = sp;
fp = sp;
- call _start_kernel;
-.L_exit:
- jump.s .L_exit;
+ jump.l _start_kernel;
+ENDPROC(_real_start)
+
+__FINIT
.section .l1.text
#if CONFIG_BFIN_KERNEL_CLOCK
@@ -439,12 +447,13 @@ ENTRY(_start_dma_code)
p0.h = hi(SIC_IWR);
p0.l = lo(SIC_IWR);
- r0.l = lo(IWR_ENABLE_ALL)
- r0.h = hi(IWR_ENABLE_ALL)
+ r0.l = lo(IWR_ENABLE_ALL);
+ r0.h = hi(IWR_ENABLE_ALL);
[p0] = r0;
SSYNC;
RTS;
+ENDPROC(_start_dma_code)
#endif /* CONFIG_BFIN_KERNEL_CLOCK */
ENTRY(_bfin_reset)