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-rw-r--r--arch/blackfin/mach-common/entry.S219
-rw-r--r--arch/blackfin/mach-common/head.S52
-rw-r--r--arch/blackfin/mach-common/interrupt.S11
-rw-r--r--arch/blackfin/mach-common/ints-priority.c25
4 files changed, 233 insertions, 74 deletions
diff --git a/arch/blackfin/mach-common/entry.S b/arch/blackfin/mach-common/entry.S
index 847c172a99e..c13fa8da28c 100644
--- a/arch/blackfin/mach-common/entry.S
+++ b/arch/blackfin/mach-common/entry.S
@@ -129,6 +129,18 @@ ENTRY(_ex_icplb_miss)
#else
call __cplb_hdr;
#endif
+
+#ifdef CONFIG_DEBUG_DOUBLEFAULT
+ /* While we were processing this, did we double fault? */
+ r7 = SEQSTAT; /* reason code is in bit 5:0 */
+ r6.l = lo(SEQSTAT_EXCAUSE);
+ r6.h = hi(SEQSTAT_EXCAUSE);
+ r7 = r7 & r6;
+ r6 = 0x25;
+ CC = R7 == R6;
+ if CC JUMP _double_fault;
+#endif
+
DEBUG_HWTRACE_RESTORE(p5, r7)
RESTORE_ALL_SYS
SP = EX_SCRATCH_REG;
@@ -136,11 +148,8 @@ ENTRY(_ex_icplb_miss)
ENDPROC(_ex_icplb_miss)
ENTRY(_ex_syscall)
- (R7:6,P5:4) = [sp++];
- ASTAT = [sp++];
raise 15; /* invoked by TRAP #0, for sys call */
- sp = EX_SCRATCH_REG;
- rtx
+ jump.s _bfin_return_from_exception;
ENDPROC(_ex_syscall)
ENTRY(_ex_soft_bp)
@@ -181,8 +190,8 @@ ENTRY(_ex_single_step)
if cc jump .Lfind_priority_done;
jump.s .Lfind_priority_start;
.Lfind_priority_done:
- p4.l = _debugger_step;
- p4.h = _debugger_step;
+ p4.l = _kgdb_single_step;
+ p4.h = _kgdb_single_step;
r6 = [p4];
cc = r6 == 0;
if cc jump .Ldo_single_step;
@@ -250,6 +259,29 @@ ENTRY(_bfin_return_from_exception)
R7=LC1;
LC1=R7;
#endif
+
+#ifdef CONFIG_DEBUG_DOUBLEFAULT
+ /* While we were processing the current exception,
+ * did we cause another, and double fault?
+ */
+ r7 = SEQSTAT; /* reason code is in bit 5:0 */
+ r6.l = lo(SEQSTAT_EXCAUSE);
+ r6.h = hi(SEQSTAT_EXCAUSE);
+ r7 = r7 & r6;
+ r6 = 0x25;
+ CC = R7 == R6;
+ if CC JUMP _double_fault;
+
+ /* Did we cause a HW error? */
+ p5.l = lo(ILAT);
+ p5.h = hi(ILAT);
+ r6 = [p5];
+ r7 = 0x20; /* Did I just cause anther HW error? */
+ r7 = r7 & r1;
+ CC = R7 == R6;
+ if CC JUMP _double_fault;
+#endif
+
(R7:6,P5:4) = [sp++];
ASTAT = [sp++];
sp = EX_SCRATCH_REG;
@@ -292,6 +324,14 @@ ENTRY(_ex_trap_c)
[p4] = p5;
csync;
+#ifndef CONFIG_DEBUG_DOUBLEFAULT
+ /*
+ * Save these registers, as they are only valid in exception context
+ * (where we are now - as soon as we defer to IRQ5, they can change)
+ * DCPLB_STATUS and ICPLB_STATUS are also only valid in EVT3,
+ * but they are not very interesting, so don't save them
+ */
+
p4.l = lo(DCPLB_FAULT_ADDR);
p4.h = hi(DCPLB_FAULT_ADDR);
r7 = [p4];
@@ -304,12 +344,11 @@ ENTRY(_ex_trap_c)
p5.l = _saved_icplb_fault_addr;
[p5] = r7;
- p4.l = _excpt_saved_stuff;
- p4.h = _excpt_saved_stuff;
-
r6 = retx;
+ p4.l = _saved_retx;
+ p4.h = _saved_retx;
[p4] = r6;
-
+#endif
r6 = SYSCFG;
[p4 + 4] = r6;
BITCLR(r6, 0);
@@ -327,59 +366,56 @@ ENTRY(_ex_trap_c)
r6 = 0x3f;
sti r6;
- (R7:6,P5:4) = [sp++];
- ASTAT = [sp++];
- SP = EX_SCRATCH_REG;
raise 5;
- rtx;
+ jump.s _bfin_return_from_exception;
ENDPROC(_ex_trap_c)
/* We just realized we got an exception, while we were processing a different
* exception. This is a unrecoverable event, so crash
*/
ENTRY(_double_fault)
- /* Turn caches & protection off, to ensure we don't get any more
- * double exceptions
- */
-
- P4.L = LO(IMEM_CONTROL);
- P4.H = HI(IMEM_CONTROL);
-
- R5 = [P4]; /* Control Register*/
- BITCLR(R5,ENICPLB_P);
- SSYNC; /* SSYNC required before writing to IMEM_CONTROL. */
- .align 8;
- [P4] = R5;
- SSYNC;
-
- P4.L = LO(DMEM_CONTROL);
- P4.H = HI(DMEM_CONTROL);
- R5 = [P4];
- BITCLR(R5,ENDCPLB_P);
- SSYNC; /* SSYNC required before writing to DMEM_CONTROL. */
- .align 8;
- [P4] = R5;
- SSYNC;
-
- /* Fix up the stack */
- (R7:6,P5:4) = [sp++];
- ASTAT = [sp++];
- SP = EX_SCRATCH_REG;
-
- /* We should be out of the exception stack, and back down into
- * kernel or user space stack
- */
- SAVE_ALL_SYS
+ /* Turn caches & protection off, to ensure we don't get any more
+ * double exceptions
+ */
+
+ P4.L = LO(IMEM_CONTROL);
+ P4.H = HI(IMEM_CONTROL);
+
+ R5 = [P4]; /* Control Register*/
+ BITCLR(R5,ENICPLB_P);
+ SSYNC; /* SSYNC required before writing to IMEM_CONTROL. */
+ .align 8;
+ [P4] = R5;
+ SSYNC;
+
+ P4.L = LO(DMEM_CONTROL);
+ P4.H = HI(DMEM_CONTROL);
+ R5 = [P4];
+ BITCLR(R5,ENDCPLB_P);
+ SSYNC; /* SSYNC required before writing to DMEM_CONTROL. */
+ .align 8;
+ [P4] = R5;
+ SSYNC;
+
+ /* Fix up the stack */
+ (R7:6,P5:4) = [sp++];
+ ASTAT = [sp++];
+ SP = EX_SCRATCH_REG;
+
+ /* We should be out of the exception stack, and back down into
+ * kernel or user space stack
+ */
+ SAVE_ALL_SYS
/* The dumping functions expect the return address in the RETI
* slot. */
r6 = retx;
[sp + PT_PC] = r6;
- r0 = sp; /* stack frame pt_regs pointer argument ==> r0 */
- SP += -12;
- call _double_fault_c;
- SP += 12;
+ r0 = sp; /* stack frame pt_regs pointer argument ==> r0 */
+ SP += -12;
+ call _double_fault_c;
+ SP += 12;
.L_double_fault_panic:
JUMP .L_double_fault_panic
@@ -388,8 +424,8 @@ ENDPROC(_double_fault)
ENTRY(_exception_to_level5)
SAVE_ALL_SYS
- p4.l = _excpt_saved_stuff;
- p4.h = _excpt_saved_stuff;
+ p4.l = _saved_retx;
+ p4.h = _saved_retx;
r6 = [p4];
[sp + PT_PC] = r6;
@@ -420,6 +456,17 @@ ENTRY(_exception_to_level5)
call _trap_c;
SP += 12;
+#ifdef CONFIG_DEBUG_DOUBLEFAULT
+ /* Grab ILAT */
+ p2.l = lo(ILAT);
+ p2.h = hi(ILAT);
+ r0 = [p2];
+ r1 = 0x20; /* Did I just cause anther HW error? */
+ r0 = r0 & r1;
+ CC = R0 == R1;
+ if CC JUMP _double_fault;
+#endif
+
call _ret_from_exception;
RESTORE_ALL_SYS
rti;
@@ -436,7 +483,48 @@ ENTRY(_trap) /* Exception: 4th entry into system event table(supervisor mode)*/
/* Try to deal with syscalls quickly. */
[--sp] = ASTAT;
[--sp] = (R7:6,P5:4);
+
+#if ANOMALY_05000283 || ANOMALY_05000315
+ cc = r7 == r7;
+ p5.h = HI(CHIPID);
+ p5.l = LO(CHIPID);
+ if cc jump 1f;
+ r7.l = W[p5];
+1:
+#endif
+
+#ifdef CONFIG_DEBUG_DOUBLEFAULT
+ /*
+ * Save these registers, as they are only valid in exception context
+ * (where we are now - as soon as we defer to IRQ5, they can change)
+ * DCPLB_STATUS and ICPLB_STATUS are also only valid in EVT3,
+ * but they are not very interesting, so don't save them
+ */
+
+ p4.l = lo(DCPLB_FAULT_ADDR);
+ p4.h = hi(DCPLB_FAULT_ADDR);
+ r7 = [p4];
+ p5.h = _saved_dcplb_fault_addr;
+ p5.l = _saved_dcplb_fault_addr;
+ [p5] = r7;
+
+ r7 = [p4 + (ICPLB_FAULT_ADDR - DCPLB_FAULT_ADDR)];
+ p5.h = _saved_icplb_fault_addr;
+ p5.l = _saved_icplb_fault_addr;
+ [p5] = r7;
+
+ p4.l = _saved_retx;
+ p4.h = _saved_retx;
+ r6 = retx;
+ [p4] = r6;
+
r7 = SEQSTAT; /* reason code is in bit 5:0 */
+ p4.l = _saved_seqstat;
+ p4.h = _saved_seqstat;
+ [p4] = r7;
+#else
+ r7 = SEQSTAT; /* reason code is in bit 5:0 */
+#endif
r6.l = lo(SEQSTAT_EXCAUSE);
r6.h = hi(SEQSTAT_EXCAUSE);
r7 = r7 & r6;
@@ -616,6 +704,9 @@ ENTRY(_system_call)
rts;
ENDPROC(_system_call)
+/* Do not mark as ENTRY() to avoid error in assembler ...
+ * this symbol need not be global anyways, so ...
+ */
_sys_trace:
call _syscall_trace;
@@ -941,6 +1032,15 @@ ENTRY(_early_trap)
SAVE_ALL_SYS
trace_buffer_stop(p0,r0);
+#if ANOMALY_05000283 || ANOMALY_05000315
+ cc = r5 == r5;
+ p4.h = HI(CHIPID);
+ p4.l = LO(CHIPID);
+ if cc jump 1f;
+ r5.l = W[p4];
+1:
+#endif
+
/* Turn caches off, to ensure we don't get double exceptions */
P4.L = LO(IMEM_CONTROL);
@@ -992,7 +1092,12 @@ ENTRY(_ex_table)
*/
.long _ex_syscall /* 0x00 - User Defined - Linux Syscall */
.long _ex_soft_bp /* 0x01 - User Defined - Software breakpoint */
+#ifdef CONFIG_KGDB
+ .long _ex_trap_c /* 0x02 - User Defined - KGDB initial connection
+ and break signal trap */
+#else
.long _ex_replaceable /* 0x02 - User Defined */
+#endif
.long _ex_trap_c /* 0x03 - User Defined - userspace stack overflow */
.long _ex_trap_c /* 0x04 - User Defined - dump trace buffer */
.long _ex_replaceable /* 0x05 - User Defined */
@@ -1432,15 +1537,7 @@ ENTRY(_sys_call_table)
.rept NR_syscalls-(.-_sys_call_table)/4
.long _sys_ni_syscall
.endr
-
- /*
- * Used to save the real RETX, IMASK and SYSCFG when temporarily
- * storing safe values across the transition from exception to IRQ5.
- */
-_excpt_saved_stuff:
- .long 0;
- .long 0;
- .long 0;
+END(_sys_call_table)
_exception_stack:
.rept 1024
diff --git a/arch/blackfin/mach-common/head.S b/arch/blackfin/mach-common/head.S
index 191b4e974c4..3069df58072 100644
--- a/arch/blackfin/mach-common/head.S
+++ b/arch/blackfin/mach-common/head.S
@@ -68,6 +68,16 @@ ENTRY(__start)
M2 = r0;
M3 = r0;
+ /*
+ * Clear ITEST_COMMAND and DTEST_COMMAND registers,
+ * Leaving these as non-zero can confuse the emulator
+ */
+ p0.L = LO(DTEST_COMMAND);
+ p0.H = HI(DTEST_COMMAND);
+ [p0] = R0;
+ [p0 + (ITEST_COMMAND - DTEST_COMMAND)] = R0;
+ CSYNC;
+
trace_buffer_init(p0,r0);
P0 = R1;
R0 = R1;
@@ -90,12 +100,46 @@ ENTRY(__start)
[p0] = R0;
SSYNC;
- /* Save RETX, in case of doublefault */
- p0.l = ___retx;
- p0.h = ___retx;
+ /* in case of double faults, save a few things */
+ p0.l = _init_retx;
+ p0.h = _init_retx;
R0 = RETX;
[P0] = R0;
+#ifdef CONFIG_DEBUG_DOUBLEFAULT
+ /* Only save these if we are storing them,
+ * This happens here, since L1 gets clobbered
+ * below
+ */
+ p0.l = _saved_retx;
+ p0.h = _saved_retx;
+ p1.l = _init_saved_retx;
+ p1.h = _init_saved_retx;
+ r0 = [p0];
+ [p1] = r0;
+
+ p0.l = _saved_dcplb_fault_addr;
+ p0.h = _saved_dcplb_fault_addr;
+ p1.l = _init_saved_dcplb_fault_addr;
+ p1.h = _init_saved_dcplb_fault_addr;
+ r0 = [p0];
+ [p1] = r0;
+
+ p0.l = _saved_icplb_fault_addr;
+ p0.h = _saved_icplb_fault_addr;
+ p1.l = _init_saved_icplb_fault_addr;
+ p1.h = _init_saved_icplb_fault_addr;
+ r0 = [p0];
+ [p1] = r0;
+
+ p0.l = _saved_seqstat;
+ p0.h = _saved_seqstat;
+ p1.l = _init_saved_seqstat;
+ p1.h = _init_saved_seqstat;
+ r0 = [p0];
+ [p1] = r0;
+#endif
+
/* Initialize stack pointer */
sp.l = lo(INITIAL_STACK);
sp.h = hi(INITIAL_STACK);
@@ -107,7 +151,7 @@ ENTRY(__start)
#endif
/* Put The Code for PLL Programming and SDRAM Programming in L1 ISRAM */
- call _bf53x_relocate_l1_mem;
+ call _bfin_relocate_l1_mem;
#ifdef CONFIG_BFIN_KERNEL_CLOCK
call _start_dma_code;
#endif
diff --git a/arch/blackfin/mach-common/interrupt.S b/arch/blackfin/mach-common/interrupt.S
index b27e59d3240..4a2ec7a9675 100644
--- a/arch/blackfin/mach-common/interrupt.S
+++ b/arch/blackfin/mach-common/interrupt.S
@@ -143,7 +143,7 @@ ENTRY(_evt_ivhw)
fp = 0;
#endif
-#if ANOMALY_05000283
+#if ANOMALY_05000283 || ANOMALY_05000315
cc = r7 == r7;
p5.h = HI(CHIPID);
p5.l = LO(CHIPID);
@@ -179,7 +179,16 @@ ENTRY(_evt_ivhw)
call _trap_c;
SP += 12;
+#ifdef EBIU_ERRMST
+ /* make sure EBIU_ERRMST is clear */
+ p0.l = LO(EBIU_ERRMST);
+ p0.h = HI(EBIU_ERRMST);
+ r0.l = (CORE_ERROR | CORE_MERROR);
+ w[p0] = r0.l;
+#endif
+
call _ret_from_exception;
+
.Lcommon_restore_all_sys:
RESTORE_ALL_SYS
rti;
diff --git a/arch/blackfin/mach-common/ints-priority.c b/arch/blackfin/mach-common/ints-priority.c
index 5fa536727c6..34e8a726ffd 100644
--- a/arch/blackfin/mach-common/ints-priority.c
+++ b/arch/blackfin/mach-common/ints-priority.c
@@ -243,12 +243,14 @@ int bfin_internal_set_wake(unsigned int irq, unsigned int state)
#endif
static struct irq_chip bfin_core_irqchip = {
+ .name = "CORE",
.ack = bfin_ack_noop,
.mask = bfin_core_mask_irq,
.unmask = bfin_core_unmask_irq,
};
static struct irq_chip bfin_internal_irqchip = {
+ .name = "INTN",
.ack = bfin_ack_noop,
.mask = bfin_internal_mask_irq,
.unmask = bfin_internal_unmask_irq,
@@ -278,6 +280,7 @@ static void bfin_generic_error_unmask_irq(unsigned int irq)
}
static struct irq_chip bfin_generic_error_irqchip = {
+ .name = "ERROR",
.ack = bfin_ack_noop,
.mask_ack = bfin_generic_error_mask_irq,
.mask = bfin_generic_error_mask_irq,
@@ -361,6 +364,14 @@ static void bfin_demux_error_irq(unsigned int int_err_irq,
}
#endif /* BF537_GENERIC_ERROR_INT_DEMUX */
+static inline void bfin_set_irq_handler(unsigned irq, irq_flow_handler_t handle)
+{
+ struct irq_desc *desc = irq_desc + irq;
+ /* May not call generic set_irq_handler() due to spinlock
+ recursion. */
+ desc->handle_irq = handle;
+}
+
#if !defined(CONFIG_BF54x)
static unsigned short gpio_enabled[gpio_bank(MAX_BLACKFIN_GPIOS)];
@@ -473,9 +484,9 @@ static int bfin_gpio_irq_type(unsigned int irq, unsigned int type)
SSYNC();
if (type & (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING))
- set_irq_handler(irq, handle_edge_irq);
+ bfin_set_irq_handler(irq, handle_edge_irq);
else
- set_irq_handler(irq, handle_level_irq);
+ bfin_set_irq_handler(irq, handle_level_irq);
return 0;
}
@@ -495,6 +506,7 @@ int bfin_gpio_set_wake(unsigned int irq, unsigned int state)
#endif
static struct irq_chip bfin_gpio_irqchip = {
+ .name = "GPIO",
.ack = bfin_gpio_ack_irq,
.mask = bfin_gpio_mask_irq,
.mask_ack = bfin_gpio_mask_ack_irq,
@@ -804,10 +816,10 @@ static int bfin_gpio_irq_type(unsigned int irq, unsigned int type)
if (type & (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING)) {
pint[bank]->edge_set = pintbit;
- set_irq_handler(irq, handle_edge_irq);
+ bfin_set_irq_handler(irq, handle_edge_irq);
} else {
pint[bank]->edge_clear = pintbit;
- set_irq_handler(irq, handle_level_irq);
+ bfin_set_irq_handler(irq, handle_level_irq);
}
SSYNC();
@@ -884,6 +896,7 @@ void bfin_pm_restore(void)
#endif
static struct irq_chip bfin_gpio_irqchip = {
+ .name = "GPIO",
.ack = bfin_gpio_ack_irq,
.mask = bfin_gpio_mask_irq,
.mask_ack = bfin_gpio_mask_ack_irq,
@@ -1136,8 +1149,4 @@ void do_irq(int vec, struct pt_regs *fp)
vec = ivg->irqno;
}
asm_do_IRQ(vec, fp);
-
-#ifdef CONFIG_KGDB
- kgdb_process_breakpoint();
-#endif
}
generated by cgit v1.2.3 (git 2.25.1) at 2024-08-14 11:49:05 +0000