diff options
Diffstat (limited to 'arch/i386/mm')
-rw-r--r-- | arch/i386/mm/fault.c | 5 | ||||
-rw-r--r-- | arch/i386/mm/init.c | 3 | ||||
-rw-r--r-- | arch/i386/mm/pageattr.c | 30 |
3 files changed, 25 insertions, 13 deletions
diff --git a/arch/i386/mm/fault.c b/arch/i386/mm/fault.c index 29d7d61543a..1ecb3e43b52 100644 --- a/arch/i386/mm/fault.c +++ b/arch/i386/mm/fault.c @@ -458,6 +458,11 @@ bad_area: bad_area_nosemaphore: /* User mode accesses just cause a SIGSEGV */ if (error_code & 4) { + /* + * It's possible to have interrupts off here. + */ + local_irq_enable(); + /* * Valid to do another page fault here because this one came * from user space. diff --git a/arch/i386/mm/init.c b/arch/i386/mm/init.c index b22ce8d6b1b..7135946d366 100644 --- a/arch/i386/mm/init.c +++ b/arch/i386/mm/init.c @@ -799,6 +799,7 @@ void mark_rodata_ro(void) unsigned long start = PFN_ALIGN(_text); unsigned long size = PFN_ALIGN(_etext) - start; +#ifndef CONFIG_KPROBES #ifdef CONFIG_HOTPLUG_CPU /* It must still be possible to apply SMP alternatives. */ if (num_possible_cpus() <= 1) @@ -808,7 +809,7 @@ void mark_rodata_ro(void) size >> PAGE_SHIFT, PAGE_KERNEL_RX); printk("Write protecting the kernel text: %luk\n", size >> 10); } - +#endif start += size; size = (unsigned long)__end_rodata - start; change_page_attr(virt_to_page(start), diff --git a/arch/i386/mm/pageattr.c b/arch/i386/mm/pageattr.c index 47bd477c8ec..2eb14a73be9 100644 --- a/arch/i386/mm/pageattr.c +++ b/arch/i386/mm/pageattr.c @@ -68,14 +68,23 @@ static struct page *split_large_page(unsigned long address, pgprot_t prot, return base; } -static void flush_kernel_map(void *arg) +static void cache_flush_page(struct page *p) { - unsigned long adr = (unsigned long)arg; + unsigned long adr = (unsigned long)page_address(p); + int i; + for (i = 0; i < PAGE_SIZE; i += boot_cpu_data.x86_clflush_size) + asm volatile("clflush (%0)" :: "r" (adr + i)); +} + +static void flush_kernel_map(void *arg) +{ + struct list_head *lh = (struct list_head *)arg; + struct page *p; - if (adr && cpu_has_clflush) { - int i; - for (i = 0; i < PAGE_SIZE; i += boot_cpu_data.x86_clflush_size) - asm volatile("clflush (%0)" :: "r" (adr + i)); + /* High level code is not ready for clflush yet */ + if (0 && cpu_has_clflush) { + list_for_each_entry (p, lh, lru) + cache_flush_page(p); } else if (boot_cpu_data.x86_model >= 4) wbinvd(); @@ -181,9 +190,9 @@ __change_page_attr(struct page *page, pgprot_t prot) return 0; } -static inline void flush_map(void *adr) +static inline void flush_map(struct list_head *l) { - on_each_cpu(flush_kernel_map, adr, 1, 1); + on_each_cpu(flush_kernel_map, l, 1, 1); } /* @@ -225,11 +234,8 @@ void global_flush_tlb(void) spin_lock_irq(&cpa_lock); list_replace_init(&df_list, &l); spin_unlock_irq(&cpa_lock); - if (!cpu_has_clflush) - flush_map(NULL); + flush_map(&l); list_for_each_entry_safe(pg, next, &l, lru) { - if (cpu_has_clflush) - flush_map(page_address(pg)); __free_page(pg); } } |