diff options
Diffstat (limited to 'arch/mips/kernel')
| -rw-r--r-- | arch/mips/kernel/cpu-probe.c | 21 | ||||
| -rw-r--r-- | arch/mips/kernel/irq-msc01.c | 6 | ||||
| -rw-r--r-- | arch/mips/kernel/irq_cpu.c | 3 | ||||
| -rw-r--r-- | arch/mips/kernel/linux32.c | 6 | ||||
| -rw-r--r-- | arch/mips/kernel/setup.c | 3 | ||||
| -rw-r--r-- | arch/mips/kernel/smp-up.c | 14 | ||||
| -rw-r--r-- | arch/mips/kernel/smp.c | 2 | ||||
| -rw-r--r-- | arch/mips/kernel/traps.c | 3 |
8 files changed, 24 insertions, 34 deletions
diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c index 1bdbcad3bb7..b13b8eb3059 100644 --- a/arch/mips/kernel/cpu-probe.c +++ b/arch/mips/kernel/cpu-probe.c @@ -183,13 +183,7 @@ void __init check_wait(void) case CPU_TX49XX: cpu_wait = r4k_wait_irqoff; break; - case CPU_AU1000: - case CPU_AU1100: - case CPU_AU1500: - case CPU_AU1550: - case CPU_AU1200: - case CPU_AU1210: - case CPU_AU1250: + case CPU_ALCHEMY: cpu_wait = au1k_wait; break; case CPU_20KC: @@ -783,37 +777,30 @@ static inline void cpu_probe_alchemy(struct cpuinfo_mips *c, unsigned int cpu) switch (c->processor_id & 0xff00) { case PRID_IMP_AU1_REV1: case PRID_IMP_AU1_REV2: + c->cputype = CPU_ALCHEMY; switch ((c->processor_id >> 24) & 0xff) { case 0: - c->cputype = CPU_AU1000; __cpu_name[cpu] = "Au1000"; break; case 1: - c->cputype = CPU_AU1500; __cpu_name[cpu] = "Au1500"; break; case 2: - c->cputype = CPU_AU1100; __cpu_name[cpu] = "Au1100"; break; case 3: - c->cputype = CPU_AU1550; __cpu_name[cpu] = "Au1550"; break; case 4: - c->cputype = CPU_AU1200; __cpu_name[cpu] = "Au1200"; - if ((c->processor_id & 0xff) == 2) { - c->cputype = CPU_AU1250; + if ((c->processor_id & 0xff) == 2) __cpu_name[cpu] = "Au1250"; - } break; case 5: - c->cputype = CPU_AU1210; __cpu_name[cpu] = "Au1210"; break; default: - panic("Unknown Au Core!"); + __cpu_name[cpu] = "Au1xxx"; break; } break; diff --git a/arch/mips/kernel/irq-msc01.c b/arch/mips/kernel/irq-msc01.c index 963c16d266a..6a8cd28133d 100644 --- a/arch/mips/kernel/irq-msc01.c +++ b/arch/mips/kernel/irq-msc01.c @@ -140,14 +140,16 @@ void __init init_msc_irqs(unsigned long icubase, unsigned int irqbase, msc_irqma switch (imp->im_type) { case MSC01_IRQ_EDGE: - set_irq_chip(irqbase+n, &msc_edgeirq_type); + set_irq_chip_and_handler_name(irqbase + n, + &msc_edgeirq_type, handle_edge_irq, "edge"); if (cpu_has_veic) MSCIC_WRITE(MSC01_IC_SUP+n*8, MSC01_IC_SUP_EDGE_BIT); else MSCIC_WRITE(MSC01_IC_SUP+n*8, MSC01_IC_SUP_EDGE_BIT | imp->im_lvl); break; case MSC01_IRQ_LEVEL: - set_irq_chip(irqbase+n, &msc_levelirq_type); + set_irq_chip_and_handler_name(irqbase+n, + &msc_levelirq_type, handle_level_irq, "level"); if (cpu_has_veic) MSCIC_WRITE(MSC01_IC_SUP+n*8, 0); else diff --git a/arch/mips/kernel/irq_cpu.c b/arch/mips/kernel/irq_cpu.c index 0ee2567b780..55c8a3ca507 100644 --- a/arch/mips/kernel/irq_cpu.c +++ b/arch/mips/kernel/irq_cpu.c @@ -112,7 +112,8 @@ void __init mips_cpu_irq_init(void) */ if (cpu_has_mipsmt) for (i = irq_base; i < irq_base + 2; i++) - set_irq_chip(i, &mips_mt_cpu_irq_controller); + set_irq_chip_and_handler(i, &mips_mt_cpu_irq_controller, + handle_percpu_irq); for (i = irq_base + 2; i < irq_base + 8; i++) set_irq_chip_and_handler(i, &mips_cpu_irq_controller, diff --git a/arch/mips/kernel/linux32.c b/arch/mips/kernel/linux32.c index 2a472713de8..6242bc68add 100644 --- a/arch/mips/kernel/linux32.c +++ b/arch/mips/kernel/linux32.c @@ -133,9 +133,9 @@ SYSCALL_DEFINE4(32_ftruncate64, unsigned long, fd, unsigned long, __dummy, return sys_ftruncate(fd, merge_64(a2, a3)); } -SYSCALL_DEFINE5(32_llseek, unsigned long, fd, unsigned long, offset_high, - unsigned long, offset_low, loff_t __user *, result, - unsigned long, origin) +SYSCALL_DEFINE5(32_llseek, unsigned int, fd, unsigned int, offset_high, + unsigned int, offset_low, loff_t __user *, result, + unsigned int, origin) { return sys_llseek(fd, offset_high, offset_low, result, origin); } diff --git a/arch/mips/kernel/setup.c b/arch/mips/kernel/setup.c index 4430a1f8fdf..2950b97253b 100644 --- a/arch/mips/kernel/setup.c +++ b/arch/mips/kernel/setup.c @@ -277,7 +277,8 @@ static void __init bootmem_init(void) * not selected. Once that done we can determine the low bound * of usable memory. */ - reserved_end = max(init_initrd(), PFN_UP(__pa_symbol(&_end))); + reserved_end = max(init_initrd(), + (unsigned long) PFN_UP(__pa_symbol(&_end))); /* * max_low_pfn is not a number of pages. The number of pages diff --git a/arch/mips/kernel/smp-up.c b/arch/mips/kernel/smp-up.c index ead6c30eeb1..878e3733bbb 100644 --- a/arch/mips/kernel/smp-up.c +++ b/arch/mips/kernel/smp-up.c @@ -13,7 +13,7 @@ /* * Send inter-processor interrupt */ -void up_send_ipi_single(int cpu, unsigned int action) +static void up_send_ipi_single(int cpu, unsigned int action) { panic(KERN_ERR "%s called", __func__); } @@ -27,31 +27,31 @@ static inline void up_send_ipi_mask(cpumask_t mask, unsigned int action) * After we've done initial boot, this function is called to allow the * board code to clean up state, if needed */ -void __cpuinit up_init_secondary(void) +static void __cpuinit up_init_secondary(void) { } -void __cpuinit up_smp_finish(void) +static void __cpuinit up_smp_finish(void) { } /* Hook for after all CPUs are online */ -void up_cpus_done(void) +static void up_cpus_done(void) { } /* * Firmware CPU startup hook */ -void __cpuinit up_boot_secondary(int cpu, struct task_struct *idle) +static void __cpuinit up_boot_secondary(int cpu, struct task_struct *idle) { } -void __init up_smp_setup(void) +static void __init up_smp_setup(void) { } -void __init up_prepare_cpus(unsigned int max_cpus) +static void __init up_prepare_cpus(unsigned int max_cpus) { } diff --git a/arch/mips/kernel/smp.c b/arch/mips/kernel/smp.c index 3da94704f81..c937506a03a 100644 --- a/arch/mips/kernel/smp.c +++ b/arch/mips/kernel/smp.c @@ -44,7 +44,7 @@ #include <asm/mipsmtregs.h> #endif /* CONFIG_MIPS_MT_SMTC */ -volatile cpumask_t cpu_callin_map; /* Bitmask of started secondaries */ +static volatile cpumask_t cpu_callin_map; /* Bitmask of started secondaries */ int __cpu_number_map[NR_CPUS]; /* Map physical to logical */ int __cpu_logical_map[NR_CPUS]; /* Map logical to physical */ diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c index 29fadaccecd..e83da174b53 100644 --- a/arch/mips/kernel/traps.c +++ b/arch/mips/kernel/traps.c @@ -1277,8 +1277,7 @@ static void *set_vi_srs_handler(int n, vi_handler_t addr, int srs) u32 *w; unsigned char *b; - if (!cpu_has_veic && !cpu_has_vint) - BUG(); + BUG_ON(!cpu_has_veic && !cpu_has_vint); if (addr == NULL) { handler = (unsigned long) do_default_vi; |