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-rw-r--r--arch/mips/mips-boards/generic/Makefile29
-rw-r--r--arch/mips/mips-boards/generic/amon.c80
-rw-r--r--arch/mips/mips-boards/generic/cmdline.c59
-rw-r--r--arch/mips/mips-boards/generic/console.c47
-rw-r--r--arch/mips/mips-boards/generic/display.c64
-rw-r--r--arch/mips/mips-boards/generic/gdb_hook.c133
-rw-r--r--arch/mips/mips-boards/generic/init.c424
-rw-r--r--arch/mips/mips-boards/generic/memory.c177
-rw-r--r--arch/mips/mips-boards/generic/pci.c243
-rw-r--r--arch/mips/mips-boards/generic/reset.c56
-rw-r--r--arch/mips/mips-boards/generic/time.c163
11 files changed, 0 insertions, 1475 deletions
diff --git a/arch/mips/mips-boards/generic/Makefile b/arch/mips/mips-boards/generic/Makefile
deleted file mode 100644
index f7f87fc09d1..00000000000
--- a/arch/mips/mips-boards/generic/Makefile
+++ /dev/null
@@ -1,29 +0,0 @@
-#
-# Carsten Langgaard, carstenl@mips.com
-# Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved.
-#
-# This program is free software; you can distribute it and/or modify it
-# under the terms of the GNU General Public License (Version 2) as
-# published by the Free Software Foundation.
-#
-# This program is distributed in the hope it will be useful, but WITHOUT
-# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
-# for more details.
-#
-# You should have received a copy of the GNU General Public License along
-# with this program; if not, write to the Free Software Foundation, Inc.,
-# 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
-#
-# Makefile for the MIPS boards generic routines under Linux.
-#
-
-obj-y := reset.o display.o init.o memory.o \
- cmdline.o time.o
-obj-y += amon.o
-
-obj-$(CONFIG_EARLY_PRINTK) += console.o
-obj-$(CONFIG_PCI) += pci.o
-obj-$(CONFIG_KGDB) += gdb_hook.o
-
-EXTRA_CFLAGS += -Werror
diff --git a/arch/mips/mips-boards/generic/amon.c b/arch/mips/mips-boards/generic/amon.c
deleted file mode 100644
index 96236bf3383..00000000000
--- a/arch/mips/mips-boards/generic/amon.c
+++ /dev/null
@@ -1,80 +0,0 @@
-/*
- * Copyright (C) 2007 MIPS Technologies, Inc.
- * All rights reserved.
-
- * This program is free software; you can distribute it and/or modify it
- * under the terms of the GNU General Public License (Version 2) as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
- * for more details.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
- *
- * Arbitrary Monitor interface
- */
-
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/smp.h>
-
-#include <asm-mips/addrspace.h>
-#include <asm-mips/mips-boards/launch.h>
-#include <asm-mips/mipsmtregs.h>
-
-int amon_cpu_avail(int cpu)
-{
- struct cpulaunch *launch = (struct cpulaunch *)CKSEG0ADDR(CPULAUNCH);
-
- if (cpu < 0 || cpu >= NCPULAUNCH) {
- pr_debug("avail: cpu%d is out of range\n", cpu);
- return 0;
- }
-
- launch += cpu;
- if (!(launch->flags & LAUNCH_FREADY)) {
- pr_debug("avail: cpu%d is not ready\n", cpu);
- return 0;
- }
- if (launch->flags & (LAUNCH_FGO|LAUNCH_FGONE)) {
- pr_debug("avail: too late.. cpu%d is already gone\n", cpu);
- return 0;
- }
-
- return 1;
-}
-
-void amon_cpu_start(int cpu,
- unsigned long pc, unsigned long sp,
- unsigned long gp, unsigned long a0)
-{
- volatile struct cpulaunch *launch =
- (struct cpulaunch *)CKSEG0ADDR(CPULAUNCH);
-
- if (!amon_cpu_avail(cpu))
- return;
- if (cpu == smp_processor_id()) {
- pr_debug("launch: I am cpu%d!\n", cpu);
- return;
- }
- launch += cpu;
-
- pr_debug("launch: starting cpu%d\n", cpu);
-
- launch->pc = pc;
- launch->gp = gp;
- launch->sp = sp;
- launch->a0 = a0;
-
- /* Make sure target sees parameters before the go bit */
- smp_mb();
-
- launch->flags |= LAUNCH_FGO;
- while ((launch->flags & LAUNCH_FGONE) == 0)
- ;
- pr_debug("launch: cpu%d gone!\n", cpu);
-}
diff --git a/arch/mips/mips-boards/generic/cmdline.c b/arch/mips/mips-boards/generic/cmdline.c
deleted file mode 100644
index 1871c30ed2e..00000000000
--- a/arch/mips/mips-boards/generic/cmdline.c
+++ /dev/null
@@ -1,59 +0,0 @@
-/*
- * Carsten Langgaard, carstenl@mips.com
- * Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved.
- *
- * This program is free software; you can distribute it and/or modify it
- * under the terms of the GNU General Public License (Version 2) as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
- * for more details.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
- *
- * Kernel command line creation using the prom monitor (YAMON) argc/argv.
- */
-#include <linux/init.h>
-#include <linux/string.h>
-
-#include <asm/bootinfo.h>
-
-extern int prom_argc;
-extern int *_prom_argv;
-
-/*
- * YAMON (32-bit PROM) pass arguments and environment as 32-bit pointer.
- * This macro take care of sign extension.
- */
-#define prom_argv(index) ((char *)(long)_prom_argv[(index)])
-
-char * __init prom_getcmdline(void)
-{
- return &(arcs_cmdline[0]);
-}
-
-
-void __init prom_init_cmdline(void)
-{
- char *cp;
- int actr;
-
- actr = 1; /* Always ignore argv[0] */
-
- cp = &(arcs_cmdline[0]);
- while(actr < prom_argc) {
- strcpy(cp, prom_argv(actr));
- cp += strlen(prom_argv(actr));
- *cp++ = ' ';
- actr++;
- }
- if (cp != &(arcs_cmdline[0])) {
- /* get rid of trailing space */
- --cp;
- *cp = '\0';
- }
-}
diff --git a/arch/mips/mips-boards/generic/console.c b/arch/mips/mips-boards/generic/console.c
deleted file mode 100644
index 43bcfb4f816..00000000000
--- a/arch/mips/mips-boards/generic/console.c
+++ /dev/null
@@ -1,47 +0,0 @@
-/*
- * Carsten Langgaard, carstenl@mips.com
- * Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved.
- *
- * This program is free software; you can distribute it and/or modify it
- * under the terms of the GNU General Public License (Version 2) as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
- * for more details.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
- *
- * Putting things on the screen/serial line using YAMONs facilities.
- */
-#include <linux/console.h>
-#include <linux/init.h>
-#include <linux/serial_reg.h>
-#include <asm/io.h>
-
-
-#define PORT(offset) (0x3f8 + (offset))
-
-
-static inline unsigned int serial_in(int offset)
-{
- return inb(PORT(offset));
-}
-
-static inline void serial_out(int offset, int value)
-{
- outb(value, PORT(offset));
-}
-
-int prom_putchar(char c)
-{
- while ((serial_in(UART_LSR) & UART_LSR_THRE) == 0)
- ;
-
- serial_out(UART_TX, c);
-
- return 1;
-}
diff --git a/arch/mips/mips-boards/generic/display.c b/arch/mips/mips-boards/generic/display.c
deleted file mode 100644
index 7c8828fcb0a..00000000000
--- a/arch/mips/mips-boards/generic/display.c
+++ /dev/null
@@ -1,64 +0,0 @@
-/*
- * Carsten Langgaard, carstenl@mips.com
- * Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved.
- *
- * This program is free software; you can distribute it and/or modify it
- * under the terms of the GNU General Public License (Version 2) as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
- * for more details.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
- *
- * Display routines for display messages in MIPS boards ascii display.
- */
-
-#include <linux/compiler.h>
-#include <linux/timer.h>
-#include <asm/io.h>
-#include <asm/mips-boards/generic.h>
-#include <asm/mips-boards/prom.h>
-
-extern const char display_string[];
-static unsigned int display_count;
-static unsigned int max_display_count;
-
-void mips_display_message(const char *str)
-{
- static unsigned int __iomem *display = NULL;
- int i;
-
- if (unlikely(display == NULL))
- display = ioremap(ASCII_DISPLAY_POS_BASE, 16*sizeof(int));
-
- for (i = 0; i <= 14; i=i+2) {
- if (*str)
- __raw_writel(*str++, display + i);
- else
- __raw_writel(' ', display + i);
- }
-}
-
-static void scroll_display_message(unsigned long data);
-static DEFINE_TIMER(mips_scroll_timer, scroll_display_message, HZ, 0);
-
-static void scroll_display_message(unsigned long data)
-{
- mips_display_message(&display_string[display_count++]);
- if (display_count == max_display_count)
- display_count = 0;
-
- mod_timer(&mips_scroll_timer, jiffies + HZ);
-}
-
-void mips_scroll_message(void)
-{
- del_timer_sync(&mips_scroll_timer);
- max_display_count = strlen(display_string) + 1 - 8;
- mod_timer(&mips_scroll_timer, jiffies + 1);
-}
diff --git a/arch/mips/mips-boards/generic/gdb_hook.c b/arch/mips/mips-boards/generic/gdb_hook.c
deleted file mode 100644
index 6a1854de457..00000000000
--- a/arch/mips/mips-boards/generic/gdb_hook.c
+++ /dev/null
@@ -1,133 +0,0 @@
-/*
- * Carsten Langgaard, carstenl@mips.com
- * Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved.
- *
- * This program is free software; you can distribute it and/or modify it
- * under the terms of the GNU General Public License (Version 2) as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
- * for more details.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
- *
- * This is the interface to the remote debugger stub.
- */
-#include <linux/types.h>
-#include <linux/serial.h>
-#include <linux/serialP.h>
-#include <linux/serial_reg.h>
-
-#include <asm/serial.h>
-#include <asm/io.h>
-
-static struct serial_state rs_table[] = {
- SERIAL_PORT_DFNS /* Defined in serial.h */
-};
-
-static struct async_struct kdb_port_info = {0};
-
-int (*generic_putDebugChar)(char);
-char (*generic_getDebugChar)(void);
-
-static __inline__ unsigned int serial_in(struct async_struct *info, int offset)
-{
- return inb(info->port + offset);
-}
-
-static __inline__ void serial_out(struct async_struct *info, int offset,
- int value)
-{
- outb(value, info->port+offset);
-}
-
-int rs_kgdb_hook(int tty_no, int speed) {
- int t;
- struct serial_state *ser = &rs_table[tty_no];
-
- kdb_port_info.state = ser;
- kdb_port_info.magic = SERIAL_MAGIC;
- kdb_port_info.port = ser->port;
- kdb_port_info.flags = ser->flags;
-
- /*
- * Clear all interrupts
- */
- serial_in(&kdb_port_info, UART_LSR);
- serial_in(&kdb_port_info, UART_RX);
- serial_in(&kdb_port_info, UART_IIR);
- serial_in(&kdb_port_info, UART_MSR);
-
- /*
- * Now, initialize the UART
- */
- serial_out(&kdb_port_info, UART_LCR, UART_LCR_WLEN8); /* reset DLAB */
- if (kdb_port_info.flags & ASYNC_FOURPORT) {
- kdb_port_info.MCR = UART_MCR_DTR | UART_MCR_RTS;
- t = UART_MCR_DTR | UART_MCR_OUT1;
- } else {
- kdb_port_info.MCR
- = UART_MCR_DTR | UART_MCR_RTS | UART_MCR_OUT2;
- t = UART_MCR_DTR | UART_MCR_RTS;
- }
-
- kdb_port_info.MCR = t; /* no interrupts, please */
- serial_out(&kdb_port_info, UART_MCR, kdb_port_info.MCR);
-
- /*
- * and set the speed of the serial port
- */
- if (speed == 0)
- speed = 9600;
-
- t = kdb_port_info.state->baud_base / speed;
- /* set DLAB */
- serial_out(&kdb_port_info, UART_LCR, UART_LCR_WLEN8 | UART_LCR_DLAB);
- serial_out(&kdb_port_info, UART_DLL, t & 0xff);/* LS of divisor */
- serial_out(&kdb_port_info, UART_DLM, t >> 8); /* MS of divisor */
- /* reset DLAB */
- serial_out(&kdb_port_info, UART_LCR, UART_LCR_WLEN8);
-
- return speed;
-}
-
-int putDebugChar(char c)
-{
- return generic_putDebugChar(c);
-}
-
-char getDebugChar(void)
-{
- return generic_getDebugChar();
-}
-
-int rs_putDebugChar(char c)
-{
-
- if (!kdb_port_info.state) { /* need to init device first */
- return 0;
- }
-
- while ((serial_in(&kdb_port_info, UART_LSR) & UART_LSR_THRE) == 0)
- ;
-
- serial_out(&kdb_port_info, UART_TX, c);
-
- return 1;
-}
-
-char rs_getDebugChar(void)
-{
- if (!kdb_port_info.state) { /* need to init device first */
- return 0;
- }
-
- while (!(serial_in(&kdb_port_info, UART_LSR) & 1))
- ;
-
- return serial_in(&kdb_port_info, UART_RX);
-}
diff --git a/arch/mips/mips-boards/generic/init.c b/arch/mips/mips-boards/generic/init.c
deleted file mode 100644
index c0653021a17..00000000000
--- a/arch/mips/mips-boards/generic/init.c
+++ /dev/null
@@ -1,424 +0,0 @@
-/*
- * Copyright (C) 1999, 2000, 2004, 2005 MIPS Technologies, Inc.
- * All rights reserved.
- * Authors: Carsten Langgaard <carstenl@mips.com>
- * Maciej W. Rozycki <macro@mips.com>
- *
- * This program is free software; you can distribute it and/or modify it
- * under the terms of the GNU General Public License (Version 2) as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
- * for more details.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
- *
- * PROM library initialisation code.
- */
-#include <linux/init.h>
-#include <linux/string.h>
-#include <linux/kernel.h>
-
-#include <asm/bootinfo.h>
-#include <asm/gt64120.h>
-#include <asm/io.h>
-#include <asm/system.h>
-#include <asm/cacheflush.h>
-#include <asm/traps.h>
-
-#include <asm/mips-boards/prom.h>
-#include <asm/mips-boards/generic.h>
-#include <asm/mips-boards/bonito64.h>
-#include <asm/mips-boards/msc01_pci.h>
-
-#include <asm/mips-boards/malta.h>
-
-#ifdef CONFIG_KGDB
-extern int rs_kgdb_hook(int, int);
-extern int rs_putDebugChar(char);
-extern char rs_getDebugChar(void);
-extern int saa9730_kgdb_hook(int);
-extern int saa9730_putDebugChar(char);
-extern char saa9730_getDebugChar(void);
-#endif
-
-int prom_argc;
-int *_prom_argv, *_prom_envp;
-
-/*
- * YAMON (32-bit PROM) pass arguments and environment as 32-bit pointer.
- * This macro take care of sign extension, if running in 64-bit mode.
- */
-#define prom_envp(index) ((char *)(long)_prom_envp[(index)])
-
-int init_debug = 0;
-
-int mips_revision_corid;
-int mips_revision_sconid;
-
-/* Bonito64 system controller register base. */
-unsigned long _pcictrl_bonito;
-unsigned long _pcictrl_bonito_pcicfg;
-
-/* GT64120 system controller register base */
-unsigned long _pcictrl_gt64120;
-
-/* MIPS System controller register base */
-unsigned long _pcictrl_msc;
-
-char *prom_getenv(char *envname)
-{
- /*
- * Return a pointer to the given environment variable.
- * In 64-bit mode: we're using 64-bit pointers, but all pointers
- * in the PROM structures are only 32-bit, so we need some
- * workarounds, if we are running in 64-bit mode.
- */
- int i, index=0;
-
- i = strlen(envname);
-
- while (prom_envp(index)) {
- if(strncmp(envname, prom_envp(index), i) == 0) {
- return(prom_envp(index+1));
- }
- index += 2;
- }
-
- return NULL;
-}
-
-static inline unsigned char str2hexnum(unsigned char c)
-{
- if (c >= '0' && c <= '9')
- return c - '0';
- if (c >= 'a' && c <= 'f')
- return c - 'a' + 10;
- return 0; /* foo */
-}
-
-static inline void str2eaddr(unsigned char *ea, unsigned char *str)
-{
- int i;
-
- for (i = 0; i < 6; i++) {
- unsigned char num;
-
- if((*str == '.') || (*str == ':'))
- str++;
- num = str2hexnum(*str++) << 4;
- num |= (str2hexnum(*str++));
- ea[i] = num;
- }
-}
-
-int get_ethernet_addr(char *ethernet_addr)
-{
- char *ethaddr_str;
-
- ethaddr_str = prom_getenv("ethaddr");
- if (!ethaddr_str) {
- printk("ethaddr not set in boot prom\n");
- return -1;
- }
- str2eaddr(ethernet_addr, ethaddr_str);
-
- if (init_debug > 1) {
- int i;
- printk("get_ethernet_addr: ");
- for (i=0; i<5; i++)
- printk("%02x:", (unsigned char)*(ethernet_addr+i));
- printk("%02x\n", *(ethernet_addr+i));
- }
-
- return 0;
-}
-
-#ifdef CONFIG_SERIAL_8250_CONSOLE
-static void __init console_config(void)
-{
- char console_string[40];
- int baud = 0;
- char parity = '\0', bits = '\0', flow = '\0';
- char *s;
-
- if ((strstr(prom_getcmdline(), "console=")) == NULL) {
- s = prom_getenv("modetty0");
- if (s) {
- while (*s >= '0' && *s <= '9')
- baud = baud*10 + *s++ - '0';
- if (*s == ',') s++;
- if (*s) parity = *s++;
- if (*s == ',') s++;
- if (*s) bits = *s++;
- if (*s == ',') s++;
- if (*s == 'h') flow = 'r';
- }
- if (baud == 0)
- baud = 38400;
- if (parity != 'n' && parity != 'o' && parity != 'e')
- parity = 'n';
- if (bits != '7' && bits != '8')
- bits = '8';
- if (flow == '\0')
- flow = 'r';
- sprintf(console_string, " console=ttyS0,%d%c%c%c", baud, parity, bits, flow);
- strcat(prom_getcmdline(), console_string);
- pr_info("Config serial console:%s\n", console_string);
- }
-}
-#endif
-
-#ifdef CONFIG_KGDB
-void __init kgdb_config(void)
-{
- extern int (*generic_putDebugChar)(char);
- extern char (*generic_getDebugChar)(void);
- char *argptr;
- int line, speed;
-
- argptr = prom_getcmdline();
- if ((argptr = strstr(argptr, "kgdb=ttyS")) != NULL) {
- argptr += strlen("kgdb=ttyS");
- if (*argptr != '0' && *argptr != '1')
- printk("KGDB: Unknown serial line /dev/ttyS%c, "
- "falling back to /dev/ttyS1\n", *argptr);
- line = *argptr == '0' ? 0 : 1;
- printk("KGDB: Using serial line /dev/ttyS%d for session\n", line);
-
- speed = 0;
- if (*++argptr == ',')
- {
- int c;
- while ((c = *++argptr) && ('0' <= c && c <= '9'))
- speed = speed * 10 + c - '0';
- }
- {
- speed = rs_kgdb_hook(line, speed);
- generic_putDebugChar = rs_putDebugChar;
- generic_getDebugChar = rs_getDebugChar;
- }
-
- pr_info("KGDB: Using serial line /dev/ttyS%d at %d for "
- "session, please connect your debugger\n",
- line ? 1 : 0, speed);
-
- {
- char *s;
- for (s = "Please connect GDB to this port\r\n"; *s; )
- generic_putDebugChar(*s++);
- }
-
- /* Breakpoint is invoked after interrupts are initialised */
- }
-}
-#endif
-
-static void __init mips_nmi_setup(void)
-{
- void *base;
- extern char except_vec_nmi;
-
- base = cpu_has_veic ?
- (void *)(CAC_BASE + 0xa80) :
- (void *)(CAC_BASE + 0x380);
- memcpy(base, &except_vec_nmi, 0x80);
- flush_icache_range((unsigned long)base, (unsigned long)base + 0x80);
-}
-
-static void __init mips_ejtag_setup(void)
-{
- void *base;
- extern char except_vec_ejtag_debug;
-
- base = cpu_has_veic ?
- (void *)(CAC_BASE + 0xa00) :
- (void *)(CAC_BASE + 0x300);
- memcpy(base, &except_vec_ejtag_debug, 0x80);
- flush_icache_range((unsigned long)base, (unsigned long)base + 0x80);
-}
-
-extern struct plat_smp_ops msmtc_smp_ops;
-
-void __init prom_init(void)
-{
- prom_argc = fw_arg0;
- _prom_argv = (int *) fw_arg1;
- _prom_envp = (int *) fw_arg2;
-
- mips_display_message("LINUX");
-
- /*
- * early setup of _pcictrl_bonito so that we can determine
- * the system controller on a CORE_EMUL board
- */
- _pcictrl_bonito = (unsigned long)ioremap(BONITO_REG_BASE, BONITO_REG_SIZE);
-
- mips_revision_corid = MIPS_REVISION_CORID;
-
- if (mips_revision_corid == MIPS_REVISION_CORID_CORE_EMUL) {
- if (BONITO_PCIDID == 0x0001df53 ||
- BONITO_PCIDID == 0x0003df53)
- mips_revision_corid = MIPS_REVISION_CORID_CORE_EMUL_BON;
- else
- mips_revision_corid = MIPS_REVISION_CORID_CORE_EMUL_MSC;
- }
-
- mips_revision_sconid = MIPS_REVISION_SCONID;
- if (mips_revision_sconid == MIPS_REVISION_SCON_OTHER) {
- switch (mips_revision_corid) {
- case MIPS_REVISION_CORID_QED_RM5261:
- case MIPS_REVISION_CORID_CORE_LV:
- case MIPS_REVISION_CORID_CORE_FPGA:
- case MIPS_REVISION_CORID_CORE_FPGAR2:
- mips_revision_sconid = MIPS_REVISION_SCON_GT64120;
- break;
- case MIPS_REVISION_CORID_CORE_EMUL_BON:
- case MIPS_REVISION_CORID_BONITO64:
- case MIPS_REVISION_CORID_CORE_20K:
- mips_revision_sconid = MIPS_REVISION_SCON_BONITO;
- break;
- case MIPS_REVISION_CORID_CORE_MSC:
- case MIPS_REVISION_CORID_CORE_FPGA2:
- case MIPS_REVISION_CORID_CORE_24K:
- /*
- * SOCit/ROCit support is essentially identical
- * but make an attempt to distinguish them
- */
- mips_revision_sconid = MIPS_REVISION_SCON_SOCIT;
- break;
- case MIPS_REVISION_CORID_CORE_FPGA3:
- case MIPS_REVISION_CORID_CORE_FPGA4:
- case MIPS_REVISION_CORID_CORE_FPGA5:
- case MIPS_REVISION_CORID_CORE_EMUL_MSC:
- default:
- /* See above */
- mips_revision_sconid = MIPS_REVISION_SCON_ROCIT;
- break;
- }
- }
-
- switch (mips_revision_sconid) {
- u32 start, map, mask, data;
-
- case MIPS_REVISION_SCON_GT64120:
- /*
- * Setup the North bridge to do Master byte-lane swapping
- * when running in bigendian.
- */
- _pcictrl_gt64120 = (unsigned long)ioremap(MIPS_GT_BASE, 0x2000);
-
-#ifdef CONFIG_CPU_LITTLE_ENDIAN
- GT_WRITE(GT_PCI0_CMD_OFS, GT_PCI0_CMD_MBYTESWAP_BIT |
- GT_PCI0_CMD_SBYTESWAP_BIT);
-#else
- GT_WRITE(GT_PCI0_CMD_OFS, 0);
-#endif
- /* Fix up PCI I/O mapping if necessary (for Atlas). */
- start = GT_READ(GT_PCI0IOLD_OFS);
- map = GT_READ(GT_PCI0IOREMAP_OFS);
- if ((start & map) != 0) {
- map &= ~start;
- GT_WRITE(GT_PCI0IOREMAP_OFS, map);
- }
-
- set_io_port_base(MALTA_GT_PORT_BASE);
- break;
-
- case MIPS_REVISION_SCON_BONITO:
- _pcictrl_bonito_pcicfg = (unsigned long)ioremap(BONITO_PCICFG_BASE, BONITO_PCICFG_SIZE);
-
- /*
- * Disable Bonito IOBC.
- */
- BONITO_PCIMEMBASECFG = BONITO_PCIMEMBASECFG &
- ~(BONITO_PCIMEMBASECFG_MEMBASE0_CACHED |
- BONITO_PCIMEMBASECFG_MEMBASE1_CACHED);
-
- /*
- * Setup the North bridge to do Master byte-lane swapping
- * when running in bigendian.
- */
-#ifdef CONFIG_CPU_LITTLE_ENDIAN
- BONITO_BONGENCFG = BONITO_BONGENCFG &
- ~(BONITO_BONGENCFG_MSTRBYTESWAP |
- BONITO_BONGENCFG_BYTESWAP);
-#else
- BONITO_BONGENCFG = BONITO_BONGENCFG |
- BONITO_BONGENCFG_MSTRBYTESWAP |
- BONITO_BONGENCFG_BYTESWAP;
-#endif
-
- set_io_port_base(MALTA_BONITO_PORT_BASE);
- break;
-
- case MIPS_REVISION_SCON_SOCIT:
- case MIPS_REVISION_SCON_ROCIT:
- _pcictrl_msc = (unsigned long)ioremap(MIPS_MSC01_PCI_REG_BASE, 0x2000);
- mips_pci_controller:
- mb();
- MSC_READ(MSC01_PCI_CFG, data);
- MSC_WRITE(MSC01_PCI_CFG, data & ~MSC01_PCI_CFG_EN_BIT);
- wmb();
-
- /* Fix up lane swapping. */
-#ifdef CONFIG_CPU_LITTLE_ENDIAN
- MSC_WRITE(MSC01_PCI_SWAP, MSC01_PCI_SWAP_NOSWAP);
-#else
- MSC_WRITE(MSC01_PCI_SWAP,
- MSC01_PCI_SWAP_BYTESWAP << MSC01_PCI_SWAP_IO_SHF |
- MSC01_PCI_SWAP_BYTESWAP << MSC01_PCI_SWAP_MEM_SHF |
- MSC01_PCI_SWAP_BYTESWAP << MSC01_PCI_SWAP_BAR0_SHF);
-#endif
- /* Fix up target memory mapping. */
- MSC_READ(MSC01_PCI_BAR0, mask);
- MSC_WRITE(MSC01_PCI_P2SCMSKL, mask & MSC01_PCI_BAR0_SIZE_MSK);
-
- /* Don't handle target retries indefinitely. */
- if ((data & MSC01_PCI_CFG_MAXRTRY_MSK) ==
- MSC01_PCI_CFG_MAXRTRY_MSK)
- data = (data & ~(MSC01_PCI_CFG_MAXRTRY_MSK <<
- MSC01_PCI_CFG_MAXRTRY_SHF)) |
- ((MSC01_PCI_CFG_MAXRTRY_MSK - 1) <<
- MSC01_PCI_CFG_MAXRTRY_SHF);
-
- wmb();
- MSC_WRITE(MSC01_PCI_CFG, data);
- mb();
-
- set_io_port_base(MALTA_MSC_PORT_BASE);
- break;
-
- case MIPS_REVISION_SCON_SOCITSC:
- case MIPS_REVISION_SCON_SOCITSCP:
- _pcictrl_msc = (unsigned long)ioremap(MIPS_SOCITSC_PCI_REG_BASE, 0x2000);
- goto mips_pci_controller;
-
- default:
- /* Unknown system controller */
- mips_display_message("SC Error");
- while (1); /* We die here... */
- }
- board_nmi_handler_setup = mips_nmi_setup;
- board_ejtag_handler_setup = mips_ejtag_setup;
-
- pr_info("\nLINUX started...\n");
- prom_init_cmdline();
- prom_meminit();
-#ifdef CONFIG_SERIAL_8250_CONSOLE
- console_config();
-#endif
-#ifdef CONFIG_MIPS_CMP
- register_smp_ops(&cmp_smp_ops);
-#endif
-#ifdef CONFIG_MIPS_MT_SMP
- register_smp_ops(&vsmp_smp_ops);
-#endif
-#ifdef CONFIG_MIPS_MT_SMTC
- register_smp_ops(&msmtc_smp_ops);
-#endif
-}
diff --git a/arch/mips/mips-boards/generic/memory.c b/arch/mips/mips-boards/generic/memory.c
deleted file mode 100644
index 61888ff72c8..00000000000
--- a/arch/mips/mips-boards/generic/memory.c
+++ /dev/null
@@ -1,177 +0,0 @@
-/*
- * Carsten Langgaard, carstenl@mips.com
- * Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved.
- *
- * This program is free software; you can distribute it and/or modify it
- * under the terms of the GNU General Public License (Version 2) as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
- * for more details.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
- *
- * PROM library functions for acquiring/using memory descriptors given to
- * us from the YAMON.
- */
-#include <linux/init.h>
-#include <linux/mm.h>
-#include <linux/bootmem.h>
-#include <linux/pfn.h>
-#include <linux/string.h>
-
-#include <asm/bootinfo.h>
-#include <asm/page.h>
-#include <asm/sections.h>
-
-#include <asm/mips-boards/prom.h>
-
-/*#define DEBUG*/
-
-enum yamon_memtypes {
- yamon_dontuse,
- yamon_prom,
- yamon_free,
-};
-static struct prom_pmemblock mdesc[PROM_MAX_PMEMBLOCKS];
-
-#ifdef DEBUG
-static char *mtypes[3] = {
- "Dont use memory",
- "YAMON PROM memory",
- "Free memmory",
-};
-#endif
-
-/* determined physical memory size, not overridden by command line args */
-unsigned long physical_memsize = 0L;
-
-static struct prom_pmemblock * __init prom_getmdesc(void)
-{
- char *memsize_str;
- unsigned int memsize;
- char cmdline[CL_SIZE], *ptr;
-
- /* otherwise look in the environment */
- memsize_str = prom_getenv("memsize");
- if (!memsize_str) {
- printk(KERN_WARNING
- "memsize not set in boot prom, set to default (32Mb)\n");
- physical_memsize = 0x02000000;
- } else {
-#ifdef DEBUG
- pr_debug("prom_memsize = %s\n", memsize_str);
-#endif
- physical_memsize = simple_strtol(memsize_str, NULL, 0);
- }
-
-#ifdef CONFIG_CPU_BIG_ENDIAN
- /* SOC-it swaps, or perhaps doesn't swap, when DMA'ing the last
- word of physical memory */
- physical_memsize -= PAGE_SIZE;
-#endif
-
- /* Check the command line for a memsize directive that overrides
- the physical/default amount */
- strcpy(cmdline, arcs_cmdline);
- ptr = strstr(cmdline, "memsize=");
- if (ptr && (ptr != cmdline) && (*(ptr - 1) != ' '))
- ptr = strstr(ptr, " memsize=");
-
- if (ptr)
- memsize = memparse(ptr + 8, &ptr);
- else
- memsize = physical_memsize;
-
- memset(mdesc, 0, sizeof(mdesc));
-
- mdesc[0].type = yamon_dontuse;
- mdesc[0].base = 0x00000000;
- mdesc[0].size = 0x00001000;
-
- mdesc[1].type = yamon_prom;
- mdesc[1].base = 0x00001000;
- mdesc[1].size = 0x000ef000;
-
- /*
- * The area 0x000f0000-0x000fffff is allocated for BIOS memory by the
- * south bridge and PCI access always forwarded to the ISA Bus and
- * BIOSCS# is always generated.
- * This mean that this area can't be used as DMA memory for PCI
- * devices.
- */
- mdesc[2].type = yamon_dontuse;
- mdesc[2].base = 0x000f0000;
- mdesc[2].size = 0x00010000;
-
- mdesc[3].type = yamon_dontuse;
- mdesc[3].base = 0x00100000;
- mdesc[3].size = CPHYSADDR(PFN_ALIGN((unsigned long)&_end)) - mdesc[3].base;
-
- mdesc[4].type = yamon_free;
- mdesc[4].base = CPHYSADDR(PFN_ALIGN(&_end));
- mdesc[4].size = memsize - mdesc[4].base;
-
- return &mdesc[0];
-}
-
-static int __init prom_memtype_classify(unsigned int type)
-{
- switch (type) {
- case yamon_free:
- return BOOT_MEM_RAM;
- case yamon_prom:
- return BOOT_MEM_ROM_DATA;
- default:
- return BOOT_MEM_RESERVED;
- }
-}
-
-void __init prom_meminit(void)
-{
- struct prom_pmemblock *p;
-
-#ifdef DEBUG
- pr_debug("YAMON MEMORY DESCRIPTOR dump:\n");
- p = prom_getmdesc();
- while (p->size) {
- int i = 0;
- pr_debug("[%d,%p]: base<%08lx> size<%08lx> type<%s>\n",
- i, p, p->base, p->size, mtypes[p->type]);
- p++;
- i++;
- }
-#endif
- p = prom_getmdesc();
-
- while (p->size) {
- long type;
- unsigned long base, size;
-
- type = prom_memtype_classify(p->type);
- base = p->base;
- size = p->size;
-
- add_memory_region(base, size, type);
- p++;
- }
-}
-
-void __init prom_free_prom_memory(void)
-{
- unsigned long addr;
- int i;
-
- for (i = 0; i < boot_mem_map.nr_map; i++) {
- if (boot_mem_map.map[i].type != BOOT_MEM_ROM_DATA)
- continue;
-
- addr = boot_mem_map.map[i].addr;
- free_init_pages("prom memory",
- addr, addr + boot_mem_map.map[i].size);
- }
-}
diff --git a/arch/mips/mips-boards/generic/pci.c b/arch/mips/mips-boards/generic/pci.c
deleted file mode 100644
index b9743190609..00000000000
--- a/arch/mips/mips-boards/generic/pci.c
+++ /dev/null
@@ -1,243 +0,0 @@
-/*
- * Copyright (C) 1999, 2000, 2004, 2005 MIPS Technologies, Inc.
- * All rights reserved.
- * Authors: Carsten Langgaard <carstenl@mips.com>
- * Maciej W. Rozycki <macro@mips.com>
- *
- * Copyright (C) 2004 by Ralf Baechle (ralf@linux-mips.org)
- *
- * This program is free software; you can distribute it and/or modify it
- * under the terms of the GNU General Public License (Version 2) as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
- * for more details.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
- *
- * MIPS boards specific PCI support.
- */
-#include <linux/types.h>
-#include <linux/pci.h>
-#include <linux/kernel.h>
-#include <linux/init.h>
-
-#include <asm/gt64120.h>
-
-#include <asm/mips-boards/generic.h>
-#include <asm/mips-boards/bonito64.h>
-#include <asm/mips-boards/msc01_pci.h>
-
-static struct resource bonito64_mem_resource = {
- .name = "Bonito PCI MEM",
- .flags = IORESOURCE_MEM,
-};
-
-static struct resource bonito64_io_resource = {
- .name = "Bonito PCI I/O",
- .start = 0x00000000UL,
- .end = 0x000fffffUL,
- .flags = IORESOURCE_IO,
-};
-
-static struct resource gt64120_mem_resource = {
- .name = "GT-64120 PCI MEM",
- .flags = IORESOURCE_MEM,
-};
-
-static struct resource gt64120_io_resource = {
- .name = "GT-64120 PCI I/O",
- .flags = IORESOURCE_IO,
-};
-
-static struct resource msc_mem_resource = {
- .name = "MSC PCI MEM",
- .flags = IORESOURCE_MEM,
-};
-
-static struct resource msc_io_resource = {
- .name = "MSC PCI I/O",
- .flags = IORESOURCE_IO,
-};
-
-extern struct pci_ops bonito64_pci_ops;
-extern struct pci_ops gt64xxx_pci0_ops;
-extern struct pci_ops msc_pci_ops;
-
-static struct pci_controller bonito64_controller = {
- .pci_ops = &bonito64_pci_ops,
- .io_resource = &bonito64_io_resource,
- .mem_resource = &bonito64_mem_resource,
- .io_offset = 0x00000000UL,
-};
-
-static struct pci_controller gt64120_controller = {
- .pci_ops = &gt64xxx_pci0_ops,
- .io_resource = &gt64120_io_resource,
- .mem_resource = &gt64120_mem_resource,
-};
-
-static struct pci_controller msc_controller = {
- .pci_ops = &msc_pci_ops,
- .io_resource = &msc_io_resource,
- .mem_resource = &msc_mem_resource,
-};
-
-void __init mips_pcibios_init(void)
-{
- struct pci_controller *controller;
- resource_size_t start, end, map, start1, end1, map1, map2, map3, mask;
-
- switch (mips_revision_sconid) {
- case MIPS_REVISION_SCON_GT64120:
- /*
- * Due to a bug in the Galileo system controller, we need
- * to setup the PCI BAR for the Galileo internal registers.
- * This should be done in the bios/bootprom and will be
- * fixed in a later revision of YAMON (the MIPS boards
- * boot prom).
- */
- GT_WRITE(GT_PCI0_CFGADDR_OFS,
- (0 << GT_PCI0_CFGADDR_BUSNUM_SHF) | /* Local bus */
- (0 << GT_PCI0_CFGADDR_DEVNUM_SHF) | /* GT64120 dev */
- (0 << GT_PCI0_CFGADDR_FUNCTNUM_SHF) | /* Function 0*/
- ((0x20/4) << GT_PCI0_CFGADDR_REGNUM_SHF) | /* BAR 4*/
- GT_PCI0_CFGADDR_CONFIGEN_BIT);
-
- /* Perform the write */
- GT_WRITE(GT_PCI0_CFGDATA_OFS, CPHYSADDR(MIPS_GT_BASE));
-
- /* Set up resource ranges from the controller's registers. */
- start = GT_READ(GT_PCI0M0LD_OFS);
- end = GT_READ(GT_PCI0M0HD_OFS);
- map = GT_READ(GT_PCI0M0REMAP_OFS);
- end = (end & GT_PCI_HD_MSK) | (start & ~GT_PCI_HD_MSK);
- start1 = GT_READ(GT_PCI0M1LD_OFS);
- end1 = GT_READ(GT_PCI0M1HD_OFS);
- map1 = GT_READ(GT_PCI0M1REMAP_OFS);
- end1 = (end1 & GT_PCI_HD_MSK) | (start1 & ~GT_PCI_HD_MSK);
- /* Cannot support multiple windows, use the wider. */
- if (end1 - start1 > end - start) {
- start = start1;
- end = end1;
- map = map1;
- }
- mask = ~(start ^ end);
- /* We don't support remapping with a discontiguous mask. */
- BUG_ON((start & GT_PCI_HD_MSK) != (map & GT_PCI_HD_MSK) &&
- mask != ~((mask & -mask) - 1));
- gt64120_mem_resource.start = start;
- gt64120_mem_resource.end = end;
- gt64120_controller.mem_offset = (start & mask) - (map & mask);
- /* Addresses are 36-bit, so do shifts in the destinations. */
- gt64120_mem_resource.start <<= GT_PCI_DCRM_SHF;
- gt64120_mem_resource.end <<= GT_PCI_DCRM_SHF;
- gt64120_mem_resource.end |= (1 << GT_PCI_DCRM_SHF) - 1;
- gt64120_controller.mem_offset <<= GT_PCI_DCRM_SHF;
-
- start = GT_READ(GT_PCI0IOLD_OFS);
- end = GT_READ(GT_PCI0IOHD_OFS);
- map = GT_READ(GT_PCI0IOREMAP_OFS);
- end = (end & GT_PCI_HD_MSK) | (start & ~GT_PCI_HD_MSK);
- mask = ~(start ^ end);
- /* We don't support remapping with a discontiguous mask. */
- BUG_ON((start & GT_PCI_HD_MSK) != (map & GT_PCI_HD_MSK) &&
- mask != ~((mask & -mask) - 1));
- gt64120_io_resource.start = map & mask;
- gt64120_io_resource.end = (map & mask) | ~mask;
- gt64120_controller.io_offset = 0;
- /* Addresses are 36-bit, so do shifts in the destinations. */
- gt64120_io_resource.start <<= GT_PCI_DCRM_SHF;
- gt64120_io_resource.end <<= GT_PCI_DCRM_SHF;
- gt64120_io_resource.end |= (1 << GT_PCI_DCRM_SHF) - 1;
-
- controller = &gt64120_controller;
- break;
-
- case MIPS_REVISION_SCON_BONITO:
- /* Set up resource ranges from the controller's registers. */
- map = BONITO_PCIMAP;
- map1 = (BONITO_PCIMAP & BONITO_PCIMAP_PCIMAP_LO0) >>
- BONITO_PCIMAP_PCIMAP_LO0_SHIFT;
- map2 = (BONITO_PCIMAP & BONITO_PCIMAP_PCIMAP_LO1) >>
- BONITO_PCIMAP_PCIMAP_LO1_SHIFT;
- map3 = (BONITO_PCIMAP & BONITO_PCIMAP_PCIMAP_LO2) >>
- BONITO_PCIMAP_PCIMAP_LO2_SHIFT;
- /* Combine as many adjacent windows as possible. */
- map = map1;
- start = BONITO_PCILO0_BASE;
- end = 1;
- if (map3 == map2 + 1) {
- map = map2;
- start = BONITO_PCILO1_BASE;
- end++;
- }
- if (map2 == map1 + 1) {
- map = map1;
- start = BONITO_PCILO0_BASE;
- end++;
- }
- bonito64_mem_resource.start = start;
- bonito64_mem_resource.end = start +
- BONITO_PCIMAP_WINBASE(end) - 1;
- bonito64_controller.mem_offset = start -
- BONITO_PCIMAP_WINBASE(map);
-
- controller = &bonito64_controller;
- break;
-
- case MIPS_REVISION_SCON_SOCIT:
- case MIPS_REVISION_SCON_ROCIT:
- case MIPS_REVISION_SCON_SOCITSC:
- case MIPS_REVISION_SCON_SOCITSCP:
- /* Set up resource ranges from the controller's registers. */
- MSC_READ(MSC01_PCI_SC2PMBASL, start);
- MSC_READ(MSC01_PCI_SC2PMMSKL, mask);
- MSC_READ(MSC01_PCI_SC2PMMAPL, map);
- msc_mem_resource.start = start & mask;
- msc_mem_resource.end = (start & mask) | ~mask;
- msc_controller.mem_offset = (start & mask) - (map & mask);
-
- MSC_READ(MSC01_PCI_SC2PIOBASL, start);
- MSC_READ(MSC01_PCI_SC2PIOMSKL, mask);
- MSC_READ(MSC01_PCI_SC2PIOMAPL, map);
- msc_io_resource.start = map & mask;
- msc_io_resource.end = (map & mask) | ~mask;
- msc_controller.io_offset = 0;
- ioport_resource.end = ~mask;
-
- /* If ranges overlap I/O takes precedence. */
- start = start & mask;
- end = start | ~mask;
- if ((start >= msc_mem_resource.start &&
- start <= msc_mem_resource.end) ||
- (end >= msc_mem_resource.start &&
- end <= msc_mem_resource.end)) {
- /* Use the larger space. */
- start = max(start, msc_mem_resource.start);
- end = min(end, msc_mem_resource.end);
- if (start - msc_mem_resource.start >=
- msc_mem_resource.end - end)
- msc_mem_resource.end = start - 1;
- else
- msc_mem_resource.start = end + 1;
- }
-
- controller = &msc_controller;
- break;
- default:
- return;
- }
-
- if (controller->io_resource->start < 0x00001000UL) /* FIXME */
- controller->io_resource->start = 0x00001000UL;
-
- iomem_resource.end &= 0xfffffffffULL; /* 64 GB */
- ioport_resource.end = controller->io_resource->end;
-
- register_pci_controller(controller);
-}
diff --git a/arch/mips/mips-boards/generic/reset.c b/arch/mips/mips-boards/generic/reset.c
deleted file mode 100644
index 42dee4da37b..00000000000
--- a/arch/mips/mips-boards/generic/reset.c
+++ /dev/null
@@ -1,56 +0,0 @@
-/*
- * Carsten Langgaard, carstenl@mips.com
- * Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved.
- *
- * ########################################################################
- *
- * This program is free software; you can distribute it and/or modify it
- * under the terms of the GNU General Public License (Version 2) as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
- * for more details.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
- *
- * ########################################################################
- *
- * Reset the MIPS boards.
- *
- */
-#include <linux/pm.h>
-
-#include <asm/io.h>
-#include <asm/reboot.h>
-#include <asm/mips-boards/generic.h>
-
-static void mips_machine_restart(char *command);
-static void mips_machine_halt(void);
-
-static void mips_machine_restart(char *command)
-{
- unsigned int __iomem *softres_reg =
- ioremap(SOFTRES_REG, sizeof(unsigned int));
-
- __raw_writel(GORESET, softres_reg);
-}
-
-static void mips_machine_halt(void)
-{
- unsigned int __iomem *softres_reg =
- ioremap(SOFTRES_REG, sizeof(unsigned int));
-
- __raw_writel(GORESET, softres_reg);
-}
-
-
-void mips_reboot_setup(void)
-{
- _machine_restart = mips_machine_restart;
- _machine_halt = mips_machine_halt;
- pm_power_off = mips_machine_halt;
-}
diff --git a/arch/mips/mips-boards/generic/time.c b/arch/mips/mips-boards/generic/time.c
deleted file mode 100644
index 0b97d47691f..00000000000
--- a/arch/mips/mips-boards/generic/time.c
+++ /dev/null
@@ -1,163 +0,0 @@
-/*
- * Carsten Langgaard, carstenl@mips.com
- * Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved.
- *
- * This program is free software; you can distribute it and/or modify it
- * under the terms of the GNU General Public License (Version 2) as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
- * for more details.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
- *
- * Setting up the clock on the MIPS boards.
- */
-
-#include <linux/types.h>
-#include <linux/init.h>
-#include <linux/kernel_stat.h>
-#include <linux/sched.h>
-#include <linux/spinlock.h>
-#include <linux/interrupt.h>
-#include <linux/time.h>
-#include <linux/timex.h>
-#include <linux/mc146818rtc.h>
-
-#include <asm/mipsregs.h>
-#include <asm/mipsmtregs.h>
-#include <asm/hardirq.h>
-#include <asm/i8253.h>
-#include <asm/irq.h>
-#include <asm/div64.h>
-#include <asm/cpu.h>
-#include <asm/time.h>
-#include <asm/mc146818-time.h>
-#include <asm/msc01_ic.h>
-
-#include <asm/mips-boards/generic.h>
-#include <asm/mips-boards/prom.h>
-
-#include <asm/mips-boards/maltaint.h>
-
-unsigned long cpu_khz;
-
-static int mips_cpu_timer_irq;
-static int mips_cpu_perf_irq;
-extern int cp0_perfcount_irq;
-
-static void mips_timer_dispatch(void)
-{
- do_IRQ(mips_cpu_timer_irq);
-}
-
-static void mips_perf_dispatch(void)
-{
- do_IRQ(mips_cpu_perf_irq);
-}
-
-/*
- * Estimate CPU frequency. Sets mips_hpt_frequency as a side-effect
- */
-static unsigned int __init estimate_cpu_frequency(void)
-{
- unsigned int prid = read_c0_prid() & 0xffff00;
- unsigned int count;
-
- unsigned long flags;
- unsigned int start;
-
- local_irq_save(flags);
-
- /* Start counter exactly on falling edge of update flag */
- while (CMOS_READ(RTC_REG_A) & RTC_UIP);
- while (!(CMOS_READ(RTC_REG_A) & RTC_UIP));
-
- /* Start r4k counter. */
- start = read_c0_count();
-
- /* Read counter exactly on falling edge of update flag */
- while (CMOS_READ(RTC_REG_A) & RTC_UIP);
- while (!(CMOS_READ(RTC_REG_A) & RTC_UIP));
-
- count = read_c0_count() - start;
-
- /* restore interrupts */
- local_irq_restore(flags);
-
- mips_hpt_frequency = count;
- if ((prid != (PRID_COMP_MIPS | PRID_IMP_20KC)) &&
- (prid != (PRID_COMP_MIPS | PRID_IMP_25KF)))
- count *= 2;
-
- count += 5000; /* round */
- count -= count%10000;
-
- return count;
-}
-
-unsigned long read_persistent_clock(void)
-{
- return mc146818_get_cmos_time();
-}
-
-static void __init plat_perf_setup(void)
-{
-#ifdef MSC01E_INT_BASE
- if (cpu_has_veic) {
- set_vi_handler(MSC01E_INT_PERFCTR, mips_perf_dispatch);
- mips_cpu_perf_irq = MSC01E_INT_BASE + MSC01E_INT_PERFCTR;
- } else
-#endif
- if (cp0_perfcount_irq >= 0) {
- if (cpu_has_vint)
- set_vi_handler(cp0_perfcount_irq, mips_perf_dispatch);
- mips_cpu_perf_irq = MIPS_CPU_IRQ_BASE + cp0_perfcount_irq;
-#ifdef CONFIG_SMP
- set_irq_handler(mips_cpu_perf_irq, handle_percpu_irq);
-#endif
- }
-}
-
-unsigned int __cpuinit get_c0_compare_int(void)
-{
-#ifdef MSC01E_INT_BASE
- if (cpu_has_veic) {
- set_vi_handler(MSC01E_INT_CPUCTR, mips_timer_dispatch);
- mips_cpu_timer_irq = MSC01E_INT_BASE + MSC01E_INT_CPUCTR;
- } else
-#endif
- {
- if (cpu_has_vint)
- set_vi_handler(cp0_compare_irq, mips_timer_dispatch);
- mips_cpu_timer_irq = MIPS_CPU_IRQ_BASE + cp0_compare_irq;
- }
-
- return mips_cpu_timer_irq;
-}
-
-void __init plat_time_init(void)
-{
- unsigned int est_freq;
-
- /* Set Data mode - binary. */
- CMOS_WRITE(CMOS_READ(RTC_CONTROL) | RTC_DM_BINARY, RTC_CONTROL);
-
- est_freq = estimate_cpu_frequency();
-
- printk("CPU frequency %d.%02d MHz\n", est_freq/1000000,
- (est_freq%1000000)*100/1000000);
-
- cpu_khz = est_freq / 1000;
-
- mips_scroll_message();
-#ifdef CONFIG_I8253 /* Only Malta has a PIT */
- setup_pit_timer();
-#endif
-
- plat_perf_setup();
-}