diff options
Diffstat (limited to 'arch/mips/mm')
-rw-r--r-- | arch/mips/mm/c-r3k.c | 2 | ||||
-rw-r--r-- | arch/mips/mm/c-r4k.c | 2 | ||||
-rw-r--r-- | arch/mips/mm/c-sb1.c | 2 | ||||
-rw-r--r-- | arch/mips/mm/c-tx39.c | 2 | ||||
-rw-r--r-- | arch/mips/mm/cache.c | 90 |
5 files changed, 44 insertions, 54 deletions
diff --git a/arch/mips/mm/c-r3k.c b/arch/mips/mm/c-r3k.c index 03492a5c21f..27f4fa25e8c 100644 --- a/arch/mips/mm/c-r3k.c +++ b/arch/mips/mm/c-r3k.c @@ -319,7 +319,7 @@ static void r3k_dma_cache_wback_inv(unsigned long start, unsigned long size) r3k_flush_dcache_range(start, start + size); } -void __init ld_mmu_r23000(void) +void __init r3k_cache_init(void) { extern void build_clear_page(void); extern void build_copy_page(void); diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c index aa87ae55217..31f080b5f44 100644 --- a/arch/mips/mm/c-r4k.c +++ b/arch/mips/mm/c-r4k.c @@ -1221,7 +1221,7 @@ static inline void coherency_setup(void) } } -void __init ld_mmu_r4xx0(void) +void __init r4k_cache_init(void) { extern void build_clear_page(void); extern void build_copy_page(void); diff --git a/arch/mips/mm/c-sb1.c b/arch/mips/mm/c-sb1.c index d183dbced68..70d1ab30f7a 100644 --- a/arch/mips/mm/c-sb1.c +++ b/arch/mips/mm/c-sb1.c @@ -496,7 +496,7 @@ static __init void probe_cache_sizes(void) * memory management function pointers, as well as initialize * the caches and tlbs */ -void ld_mmu_sb1(void) +void sb1_cache_init(void) { extern char except_vec2_sb1; extern char handle_vec2_sb1; diff --git a/arch/mips/mm/c-tx39.c b/arch/mips/mm/c-tx39.c index c3ba81dab31..0a97a9434eb 100644 --- a/arch/mips/mm/c-tx39.c +++ b/arch/mips/mm/c-tx39.c @@ -410,7 +410,7 @@ static __init void tx39_probe_cache(void) } } -void __init ld_mmu_tx39(void) +void __init tx39_cache_init(void) { extern void build_clear_page(void); extern void build_copy_page(void); diff --git a/arch/mips/mm/cache.c b/arch/mips/mm/cache.c index 172293b5839..611b48dde73 100644 --- a/arch/mips/mm/cache.c +++ b/arch/mips/mm/cache.c @@ -104,58 +104,48 @@ void __update_cache(struct vm_area_struct *vma, unsigned long address, } } -extern void ld_mmu_r23000(void); -extern void ld_mmu_r4xx0(void); -extern void ld_mmu_tx39(void); -extern void ld_mmu_r6000(void); -extern void ld_mmu_tfp(void); -extern void ld_mmu_andes(void); -extern void ld_mmu_sb1(void); +#define __weak __attribute__((weak)) + +static char cache_panic[] __initdata = "Yeee, unsupported cache architecture."; void __init cpu_cache_init(void) { - if (cpu_has_4ktlb) { -#if defined(CONFIG_CPU_R4X00) || defined(CONFIG_CPU_VR41XX) || \ - defined(CONFIG_CPU_R4300) || defined(CONFIG_CPU_R5000) || \ - defined(CONFIG_CPU_NEVADA) || defined(CONFIG_CPU_R5432) || \ - defined(CONFIG_CPU_R5500) || defined(CONFIG_CPU_MIPS32_R1) || \ - defined(CONFIG_CPU_MIPS64_R1) || defined(CONFIG_CPU_TX49XX) || \ - defined(CONFIG_CPU_RM7000) || defined(CONFIG_CPU_RM9000) - ld_mmu_r4xx0(); -#endif - } else switch (current_cpu_data.cputype) { -#ifdef CONFIG_CPU_R3000 - case CPU_R2000: - case CPU_R3000: - case CPU_R3000A: - case CPU_R3081E: - ld_mmu_r23000(); - break; -#endif -#ifdef CONFIG_CPU_TX39XX - case CPU_TX3912: - case CPU_TX3922: - case CPU_TX3927: - ld_mmu_tx39(); - break; -#endif -#ifdef CONFIG_CPU_R10000 - case CPU_R10000: - case CPU_R12000: - ld_mmu_r4xx0(); - break; -#endif -#ifdef CONFIG_CPU_SB1 - case CPU_SB1: - ld_mmu_sb1(); - break; -#endif - - case CPU_R8000: - panic("R8000 is unsupported"); - break; - - default: - panic("Yeee, unsupported cache architecture."); + if (cpu_has_3k_cache) { + extern void __weak r3k_cache_init(void); + + r3k_cache_init(); + return; + } + if (cpu_has_6k_cache) { + extern void __weak r6k_cache_init(void); + + r6k_cache_init(); + return; } + if (cpu_has_4k_cache) { + extern void __weak r4k_cache_init(void); + + r4k_cache_init(); + return; + } + if (cpu_has_8k_cache) { + extern void __weak r8k_cache_init(void); + + r8k_cache_init(); + return; + } + if (cpu_has_tx39_cache) { + extern void __weak tx39_cache_init(void); + + tx39_cache_init(); + return; + } + if (cpu_has_sb1_cache) { + extern void __weak sb1_cache_init(void); + + sb1_cache_init(); + return; + } + + panic(cache_panic); } |