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Diffstat (limited to 'arch/mips/qemu')
-rw-r--r--arch/mips/qemu/q-firmware.c2
-rw-r--r--arch/mips/qemu/q-irq.c4
-rw-r--r--arch/mips/qemu/q-setup.c10
-rw-r--r--arch/mips/qemu/q-smp.c6
4 files changed, 11 insertions, 11 deletions
diff --git a/arch/mips/qemu/q-firmware.c b/arch/mips/qemu/q-firmware.c
index fb2a8673a6b..c2239b41758 100644
--- a/arch/mips/qemu/q-firmware.c
+++ b/arch/mips/qemu/q-firmware.c
@@ -10,7 +10,7 @@ void __init prom_init(void)
cmdline = (int *) (CKSEG0 + (0x10 << 20) - 260);
if (*cmdline == 0x12345678) {
if (*(char *)(cmdline + 1))
- strcpy (arcs_cmdline, (char *)(cmdline + 1));
+ strcpy(arcs_cmdline, (char *)(cmdline + 1));
add_memory_region(0x0<<20, cmdline[-1], BOOT_MEM_RAM);
} else {
add_memory_region(0x0<<20, 0x10<<20, BOOT_MEM_RAM);
diff --git a/arch/mips/qemu/q-irq.c b/arch/mips/qemu/q-irq.c
index 89891e984b3..4681757460a 100644
--- a/arch/mips/qemu/q-irq.c
+++ b/arch/mips/qemu/q-irq.c
@@ -2,6 +2,7 @@
#include <linux/linkage.h>
#include <asm/i8259.h>
+#include <asm/irq_cpu.h>
#include <asm/mipsregs.h>
#include <asm/qemu.h>
#include <asm/system.h>
@@ -12,7 +13,7 @@ asmlinkage void plat_irq_dispatch(void)
unsigned int pending = read_c0_status() & read_c0_cause();
if (pending & 0x8000) {
- ll_timer_interrupt(Q_COUNT_COMPARE_IRQ);
+ do_IRQ(Q_COUNT_COMPARE_IRQ);
return;
}
if (pending & 0x0400) {
@@ -29,6 +30,7 @@ void __init arch_init_irq(void)
{
mips_hpt_frequency = QEMU_C0_COUNTER_CLOCK; /* 100MHz */
+ mips_cpu_irq_init();
init_i8259_irqs();
set_c0_status(0x8400);
}
diff --git a/arch/mips/qemu/q-setup.c b/arch/mips/qemu/q-setup.c
index 841394336f0..23d34c1917c 100644
--- a/arch/mips/qemu/q-setup.c
+++ b/arch/mips/qemu/q-setup.c
@@ -1,4 +1,6 @@
#include <linux/init.h>
+
+#include <asm/i8253.h>
#include <asm/io.h>
#include <asm/time.h>
@@ -11,13 +13,9 @@ const char *get_system_type(void)
return "Qemu";
}
-void __init plat_timer_setup(struct irqaction *irq)
+void __init plat_time_init(void)
{
- /* set the clock to 100 Hz */
- outb_p(0x34,0x43); /* binary, mode 2, LSB/MSB, ch 0 */
- outb_p(LATCH & 0xff , 0x40); /* LSB */
- outb(LATCH >> 8 , 0x40); /* MSB */
- setup_irq(0, irq);
+ setup_pit_timer();
}
void __init plat_mem_setup(void)
diff --git a/arch/mips/qemu/q-smp.c b/arch/mips/qemu/q-smp.c
index 786bbfa214d..4b0178d0df0 100644
--- a/arch/mips/qemu/q-smp.c
+++ b/arch/mips/qemu/q-smp.c
@@ -22,11 +22,11 @@ void core_send_ipi(int cpu, unsigned int action)
* After we've done initial boot, this function is called to allow the
* board code to clean up state, if needed
*/
-void prom_init_secondary(void)
+void __cpuinit prom_init_secondary(void)
{
}
-void prom_smp_finish(void)
+void __cpuinit prom_smp_finish(void)
{
}
@@ -43,7 +43,7 @@ void __init prom_prepare_cpus(unsigned int max_cpus)
/*
* Firmware CPU startup hook
*/
-void prom_boot_secondary(int cpu, struct task_struct *idle)
+void __cpuinit prom_boot_secondary(int cpu, struct task_struct *idle)
{
}