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Diffstat (limited to 'arch/mips/sibyte/swarm/rtc_m41t81.c')
-rw-r--r--arch/mips/sibyte/swarm/rtc_m41t81.c47
1 files changed, 24 insertions, 23 deletions
diff --git a/arch/mips/sibyte/swarm/rtc_m41t81.c b/arch/mips/sibyte/swarm/rtc_m41t81.c
index a686bb716ec..5b4fc26c1b3 100644
--- a/arch/mips/sibyte/swarm/rtc_m41t81.c
+++ b/arch/mips/sibyte/swarm/rtc_m41t81.c
@@ -82,59 +82,60 @@
#define M41T81REG_SQW 0x13 /* square wave register */
#define M41T81_CCR_ADDRESS 0x68
-#define SMB_CSR(reg) ((u8 *) (IOADDR(A_SMB_REGISTER(1, reg))))
+
+#define SMB_CSR(reg) IOADDR(A_SMB_REGISTER(1, reg))
static int m41t81_read(uint8_t addr)
{
- while (bus_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY)
+ while (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY)
;
- bus_writeq(addr & 0xff, SMB_CSR(R_SMB_CMD));
- bus_writeq((V_SMB_ADDR(M41T81_CCR_ADDRESS) | V_SMB_TT_WR1BYTE),
- SMB_CSR(R_SMB_START));
+ __raw_writeq(addr & 0xff, SMB_CSR(R_SMB_CMD));
+ __raw_writeq(V_SMB_ADDR(M41T81_CCR_ADDRESS) | V_SMB_TT_WR1BYTE,
+ SMB_CSR(R_SMB_START));
- while (bus_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY)
+ while (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY)
;
- bus_writeq((V_SMB_ADDR(M41T81_CCR_ADDRESS) | V_SMB_TT_RD1BYTE),
- SMB_CSR(R_SMB_START));
+ __raw_writeq(V_SMB_ADDR(M41T81_CCR_ADDRESS) | V_SMB_TT_RD1BYTE,
+ SMB_CSR(R_SMB_START));
- while (bus_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY)
+ while (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY)
;
- if (bus_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_ERROR) {
+ if (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_ERROR) {
/* Clear error bit by writing a 1 */
- bus_writeq(M_SMB_ERROR, SMB_CSR(R_SMB_STATUS));
+ __raw_writeq(M_SMB_ERROR, SMB_CSR(R_SMB_STATUS));
return -1;
}
- return (bus_readq(SMB_CSR(R_SMB_DATA)) & 0xff);
+ return (__raw_readq(SMB_CSR(R_SMB_DATA)) & 0xff);
}
static int m41t81_write(uint8_t addr, int b)
{
- while (bus_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY)
+ while (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY)
;
- bus_writeq((addr & 0xFF), SMB_CSR(R_SMB_CMD));
- bus_writeq((b & 0xff), SMB_CSR(R_SMB_DATA));
- bus_writeq(V_SMB_ADDR(M41T81_CCR_ADDRESS) | V_SMB_TT_WR2BYTE,
- SMB_CSR(R_SMB_START));
+ __raw_writeq(addr & 0xff, SMB_CSR(R_SMB_CMD));
+ __raw_writeq(b & 0xff, SMB_CSR(R_SMB_DATA));
+ __raw_writeq(V_SMB_ADDR(M41T81_CCR_ADDRESS) | V_SMB_TT_WR2BYTE,
+ SMB_CSR(R_SMB_START));
- while (bus_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY)
+ while (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY)
;
- if (bus_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_ERROR) {
+ if (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_ERROR) {
/* Clear error bit by writing a 1 */
- bus_writeq(M_SMB_ERROR, SMB_CSR(R_SMB_STATUS));
+ __raw_writeq(M_SMB_ERROR, SMB_CSR(R_SMB_STATUS));
return -1;
}
/* read the same byte again to make sure it is written */
- bus_writeq(V_SMB_ADDR(M41T81_CCR_ADDRESS) | V_SMB_TT_RD1BYTE,
- SMB_CSR(R_SMB_START));
+ __raw_writeq(V_SMB_ADDR(M41T81_CCR_ADDRESS) | V_SMB_TT_RD1BYTE,
+ SMB_CSR(R_SMB_START));
- while (bus_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY)
+ while (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY)
;
return 0;