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-rw-r--r--arch/mips/sni/a20r.c6
-rw-r--r--arch/mips/sni/pcimt.c5
-rw-r--r--arch/mips/sni/pcit.c27
-rw-r--r--arch/mips/sni/reset.c2
-rw-r--r--arch/mips/sni/rm200.c11
-rw-r--r--arch/mips/sni/setup.c8
-rw-r--r--arch/mips/sni/sniprom.c8
-rw-r--r--arch/mips/sni/time.c27
8 files changed, 50 insertions, 44 deletions
diff --git a/arch/mips/sni/a20r.c b/arch/mips/sni/a20r.c
index acc9ba76c1a..b7460759997 100644
--- a/arch/mips/sni/a20r.c
+++ b/arch/mips/sni/a20r.c
@@ -127,7 +127,7 @@ static u32 a20r_ack_hwint(void)
{
u32 status = read_c0_status();
- write_c0_status (status | 0x00010000);
+ write_c0_status(status | 0x00010000);
asm volatile(
" .set push \n"
" .set noat \n"
@@ -195,7 +195,7 @@ static void a20r_hwint(void)
u32 cause, status;
int irq;
- clear_c0_status (IE_IRQ0);
+ clear_c0_status(IE_IRQ0);
status = a20r_ack_hwint();
cause = read_c0_cause();
@@ -213,7 +213,7 @@ void __init sni_a20r_irq_init(void)
set_irq_chip(i, &a20r_irq_type);
sni_hwint = a20r_hwint;
change_c0_status(ST0_IM, IE_IRQ0);
- setup_irq (SNI_A20R_IRQ_BASE + 3, &sni_isa_irq);
+ setup_irq(SNI_A20R_IRQ_BASE + 3, &sni_isa_irq);
}
void sni_a20r_init(void)
diff --git a/arch/mips/sni/pcimt.c b/arch/mips/sni/pcimt.c
index 44b1ae62aa4..39bb15f1f2a 100644
--- a/arch/mips/sni/pcimt.c
+++ b/arch/mips/sni/pcimt.c
@@ -284,9 +284,9 @@ static void sni_pcimt_hwint(void)
u32 pending = read_c0_cause() & read_c0_status();
if (pending & C_IRQ5)
- do_IRQ (MIPS_CPU_IRQ_BASE + 7);
+ do_IRQ(MIPS_CPU_IRQ_BASE + 7);
else if (pending & C_IRQ4)
- do_IRQ (MIPS_CPU_IRQ_BASE + 6);
+ do_IRQ(MIPS_CPU_IRQ_BASE + 6);
else if (pending & C_IRQ3)
pcimt_hwint3();
else if (pending & C_IRQ1)
@@ -313,7 +313,6 @@ void __init sni_pcimt_init(void)
{
sni_pcimt_detect();
sni_pcimt_sc_init();
- board_time_init = sni_cpu_time_init;
ioport_resource.end = sni_io_resource.end;
#ifdef CONFIG_PCI
PCIBIOS_MIN_IO = 0x9000;
diff --git a/arch/mips/sni/pcit.c b/arch/mips/sni/pcit.c
index 2480c478dcb..416f397c768 100644
--- a/arch/mips/sni/pcit.c
+++ b/arch/mips/sni/pcit.c
@@ -188,8 +188,8 @@ static void pcit_hwint1(void)
irq = ffs((pending >> 16) & 0x7f);
if (likely(irq > 0))
- do_IRQ (irq + SNI_PCIT_INT_START - 1);
- set_c0_status (IE_IRQ1);
+ do_IRQ(irq + SNI_PCIT_INT_START - 1);
+ set_c0_status(IE_IRQ1);
}
static void pcit_hwint0(void)
@@ -201,8 +201,8 @@ static void pcit_hwint0(void)
irq = ffs((pending >> 16) & 0x3f);
if (likely(irq > 0))
- do_IRQ (irq + SNI_PCIT_INT_START - 1);
- set_c0_status (IE_IRQ0);
+ do_IRQ(irq + SNI_PCIT_INT_START - 1);
+ set_c0_status(IE_IRQ0);
}
static void sni_pcit_hwint(void)
@@ -212,11 +212,11 @@ static void sni_pcit_hwint(void)
if (pending & C_IRQ1)
pcit_hwint1();
else if (pending & C_IRQ2)
- do_IRQ (MIPS_CPU_IRQ_BASE + 4);
+ do_IRQ(MIPS_CPU_IRQ_BASE + 4);
else if (pending & C_IRQ3)
- do_IRQ (MIPS_CPU_IRQ_BASE + 5);
+ do_IRQ(MIPS_CPU_IRQ_BASE + 5);
else if (pending & C_IRQ5)
- do_IRQ (MIPS_CPU_IRQ_BASE + 7);
+ do_IRQ(MIPS_CPU_IRQ_BASE + 7);
}
static void sni_pcit_hwint_cplus(void)
@@ -226,13 +226,13 @@ static void sni_pcit_hwint_cplus(void)
if (pending & C_IRQ0)
pcit_hwint0();
else if (pending & C_IRQ1)
- do_IRQ (MIPS_CPU_IRQ_BASE + 3);
+ do_IRQ(MIPS_CPU_IRQ_BASE + 3);
else if (pending & C_IRQ2)
- do_IRQ (MIPS_CPU_IRQ_BASE + 4);
+ do_IRQ(MIPS_CPU_IRQ_BASE + 4);
else if (pending & C_IRQ3)
- do_IRQ (MIPS_CPU_IRQ_BASE + 5);
+ do_IRQ(MIPS_CPU_IRQ_BASE + 5);
else if (pending & C_IRQ5)
- do_IRQ (MIPS_CPU_IRQ_BASE + 7);
+ do_IRQ(MIPS_CPU_IRQ_BASE + 7);
}
void __init sni_pcit_irq_init(void)
@@ -245,7 +245,7 @@ void __init sni_pcit_irq_init(void)
*(volatile u32 *)SNI_PCIT_INT_REG = 0;
sni_hwint = sni_pcit_hwint;
change_c0_status(ST0_IM, IE_IRQ1);
- setup_irq (SNI_PCIT_INT_START + 6, &sni_isa_irq);
+ setup_irq(SNI_PCIT_INT_START + 6, &sni_isa_irq);
}
void __init sni_pcit_cplus_irq_init(void)
@@ -258,12 +258,11 @@ void __init sni_pcit_cplus_irq_init(void)
*(volatile u32 *)SNI_PCIT_INT_REG = 0x40000000;
sni_hwint = sni_pcit_hwint_cplus;
change_c0_status(ST0_IM, IE_IRQ0);
- setup_irq (MIPS_CPU_IRQ_BASE + 3, &sni_isa_irq);
+ setup_irq(MIPS_CPU_IRQ_BASE + 3, &sni_isa_irq);
}
void __init sni_pcit_init(void)
{
- board_time_init = sni_cpu_time_init;
ioport_resource.end = sni_io_resource.end;
#ifdef CONFIG_PCI
PCIBIOS_MIN_IO = 0x9000;
diff --git a/arch/mips/sni/reset.c b/arch/mips/sni/reset.c
index 38b6a97a31b..79f8d70f48c 100644
--- a/arch/mips/sni/reset.c
+++ b/arch/mips/sni/reset.c
@@ -35,7 +35,7 @@ void sni_machine_restart(char *command)
kb_wait();
for (j = 0; j < 100000 ; j++)
/* nothing */;
- outb_p(0xfe,0x64); /* pulse reset low */
+ outb_p(0xfe, 0x64); /* pulse reset low */
}
}
}
diff --git a/arch/mips/sni/rm200.c b/arch/mips/sni/rm200.c
index 28a11d8605c..67b061eef6c 100644
--- a/arch/mips/sni/rm200.c
+++ b/arch/mips/sni/rm200.c
@@ -162,16 +162,16 @@ static void sni_rm200_hwint(void)
int irq;
if (pending & C_IRQ5)
- do_IRQ (MIPS_CPU_IRQ_BASE + 7);
+ do_IRQ(MIPS_CPU_IRQ_BASE + 7);
else if (pending & C_IRQ0) {
- clear_c0_status (IE_IRQ0);
+ clear_c0_status(IE_IRQ0);
mask = *(volatile u8 *)SNI_RM200_INT_ENA_REG ^ 0x1f;
stat = *(volatile u8 *)SNI_RM200_INT_STAT_REG ^ 0x14;
irq = ffs(stat & mask & 0x1f);
if (likely(irq > 0))
- do_IRQ (irq + SNI_RM200_INT_START - 1);
- set_c0_status (IE_IRQ0);
+ do_IRQ(irq + SNI_RM200_INT_START - 1);
+ set_c0_status(IE_IRQ0);
}
}
@@ -187,12 +187,11 @@ void __init sni_rm200_irq_init(void)
set_irq_chip(i, &rm200_irq_type);
sni_hwint = sni_rm200_hwint;
change_c0_status(ST0_IM, IE_IRQ0);
- setup_irq (SNI_RM200_INT_START + 0, &sni_isa_irq);
+ setup_irq(SNI_RM200_INT_START + 0, &sni_isa_irq);
}
void __init sni_rm200_init(void)
{
set_io_port_base(SNI_PORT_BASE + 0x02000000);
ioport_resource.end += 0x02000000;
- board_time_init = sni_cpu_time_init;
}
diff --git a/arch/mips/sni/setup.c b/arch/mips/sni/setup.c
index 6edbb3051c8..e8b26bdee24 100644
--- a/arch/mips/sni/setup.c
+++ b/arch/mips/sni/setup.c
@@ -15,7 +15,7 @@
#include <linux/screen_info.h>
#ifdef CONFIG_ARC
-#include <asm/arc/types.h>
+#include <asm/fw/arc/types.h>
#include <asm/sgialib.h>
#endif
@@ -106,11 +106,11 @@ static void __devinit quirk_cirrus_ram_size(struct pci_dev *dev)
* need to do it here, otherwise we get screen corruption
* on older Cirrus chips
*/
- pci_read_config_word (dev, PCI_COMMAND, &cmd);
+ pci_read_config_word(dev, PCI_COMMAND, &cmd);
if ((cmd & (PCI_COMMAND_IO|PCI_COMMAND_MEMORY))
== (PCI_COMMAND_IO|PCI_COMMAND_MEMORY)) {
- vga_wseq (NULL, CL_SEQR6, 0x12); /* unlock all extension registers */
- vga_wseq (NULL, CL_SEQRF, 0x18);
+ vga_wseq(NULL, CL_SEQR6, 0x12); /* unlock all extension registers */
+ vga_wseq(NULL, CL_SEQRF, 0x18);
}
}
diff --git a/arch/mips/sni/sniprom.c b/arch/mips/sni/sniprom.c
index db544a6e23f..eff4b89d7b7 100644
--- a/arch/mips/sni/sniprom.c
+++ b/arch/mips/sni/sniprom.c
@@ -45,7 +45,7 @@ void prom_putchar(char c)
static char *(*__prom_getenv)(char *) = (char *(*)(char *))PROM_ENTRY(PROM_GETENV);
static void (*__prom_get_memconf)(void *) = (void (*)(void *))PROM_ENTRY(PROM_GET_MEMCONF);
-char *prom_getenv (char *s)
+char *prom_getenv(char *s)
{
return __prom_getenv(s);
}
@@ -131,9 +131,9 @@ static void __init sni_console_setup(void)
int port;
static char options[8];
- cdev = prom_getenv ("console_dev");
+ cdev = prom_getenv("console_dev");
if (strncmp (cdev, "tty", 3) == 0) {
- ctype = prom_getenv ("console");
+ ctype = prom_getenv("console");
switch (*ctype) {
default:
case 'l':
@@ -233,7 +233,7 @@ void __init prom_init(void)
systype = "RM300-Exx";
break;
}
- pr_debug("Found SNI brdtype %02x name %s\n", sni_brd_type,systype);
+ pr_debug("Found SNI brdtype %02x name %s\n", sni_brd_type, systype);
#ifdef DEBUG
sni_idprom_dump();
diff --git a/arch/mips/sni/time.c b/arch/mips/sni/time.c
index 20028fc7757..b80877349d3 100644
--- a/arch/mips/sni/time.c
+++ b/arch/mips/sni/time.c
@@ -2,8 +2,10 @@
#include <linux/interrupt.h>
#include <linux/time.h>
+#include <asm/i8253.h>
#include <asm/sni.h>
#include <asm/time.h>
+#include <asm-generic/rtc.h>
#define SNI_CLOCK_TICK_RATE 3686400
#define SNI_COUNTER2_DIV 64
@@ -42,23 +44,23 @@ static __init unsigned long dosample(void)
volatile u8 msb, lsb;
/* Start the counter. */
- outb_p (0x34, 0x43);
+ outb_p(0x34, 0x43);
outb_p(SNI_8254_TCSAMP_COUNTER & 0xff, 0x40);
- outb (SNI_8254_TCSAMP_COUNTER >> 8, 0x40);
+ outb(SNI_8254_TCSAMP_COUNTER >> 8, 0x40);
/* Get initial counter invariant */
ct0 = read_c0_count();
/* Latch and spin until top byte of counter0 is zero */
do {
- outb (0x00, 0x43);
- lsb = inb (0x40);
- msb = inb (0x40);
+ outb(0x00, 0x43);
+ lsb = inb(0x40);
+ msb = inb(0x40);
ct1 = read_c0_count();
} while (msb);
/* Stop the counter. */
- outb (0x38, 0x43);
+ outb(0x38, 0x43);
/*
* Return the difference, this is how far the r4k counter increments
* for every 1/HZ seconds. We round off the nearest 1 MHz of master
@@ -71,7 +73,7 @@ static __init unsigned long dosample(void)
/*
* Here we need to calibrate the cycle counter to at least be close.
*/
-__init void sni_cpu_time_init(void)
+void __init plat_time_init(void)
{
unsigned long r4k_ticks[3];
unsigned long r4k_tick;
@@ -115,6 +117,8 @@ __init void sni_cpu_time_init(void)
(int) (r4k_tick % (500000 / HZ)));
mips_hpt_frequency = r4k_tick * HZ;
+
+ setup_pit_timer();
}
/*
@@ -133,7 +137,7 @@ void __init plat_timer_setup(struct irqaction *irq)
case SNI_BRD_10NEW:
case SNI_BRD_TOWER_OASIC:
case SNI_BRD_MINITOWER:
- sni_a20r_timer_setup (irq);
+ sni_a20r_timer_setup(irq);
break;
case SNI_BRD_PCI_TOWER:
@@ -142,7 +146,12 @@ void __init plat_timer_setup(struct irqaction *irq)
case SNI_BRD_PCI_DESKTOP:
case SNI_BRD_PCI_TOWER_CPLUS:
case SNI_BRD_PCI_MTOWER_CPLUS:
- sni_cpu_timer_setup (irq);
+ sni_cpu_timer_setup(irq);
break;
}
}
+
+unsigned long read_persistent_clock(void)
+{
+ return -1;
+}
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-11 07:47:45 +0000