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-rw-r--r--arch/mips/Kconfig10
-rw-r--r--arch/mips/Makefile1
-rw-r--r--arch/mips/configs/bigsur_defconfig1
-rw-r--r--arch/mips/configs/cobalt_defconfig1
-rw-r--r--arch/mips/configs/ddb5476_defconfig1
-rw-r--r--arch/mips/configs/ddb5477_defconfig1
-rw-r--r--arch/mips/configs/ev64120_defconfig1
-rw-r--r--arch/mips/configs/ev96100_defconfig1
-rw-r--r--arch/mips/configs/ip22_defconfig1
-rw-r--r--arch/mips/configs/ip27_defconfig1
-rw-r--r--arch/mips/configs/ip32_defconfig1
-rw-r--r--arch/mips/configs/it8172_defconfig1
-rw-r--r--arch/mips/configs/ivr_defconfig1
-rw-r--r--arch/mips/configs/jaguar-atx_defconfig1
-rw-r--r--arch/mips/configs/lasat200_defconfig1
-rw-r--r--arch/mips/configs/malta_defconfig10
-rw-r--r--arch/mips/configs/ocelot_3_defconfig1
-rw-r--r--arch/mips/configs/ocelot_c_defconfig1
-rw-r--r--arch/mips/configs/ocelot_defconfig1
-rw-r--r--arch/mips/configs/ocelot_g_defconfig1
-rw-r--r--arch/mips/configs/pnx8550-v2pci_defconfig1
-rw-r--r--arch/mips/configs/rbhma4500_defconfig1
-rw-r--r--arch/mips/configs/rm200_defconfig1
-rw-r--r--arch/mips/configs/sb1250-swarm_defconfig1
-rw-r--r--arch/mips/configs/yosemite_defconfig1
-rw-r--r--arch/mips/defconfig1
-rw-r--r--arch/mips/kernel/Makefile3
-rw-r--r--arch/mips/kernel/cpu-probe.c39
-rw-r--r--arch/mips/kernel/ioctl32.c50
-rw-r--r--arch/mips/kernel/process.c12
-rw-r--r--arch/mips/kernel/ptrace.c22
-rw-r--r--arch/mips/kernel/ptrace32.c44
-rw-r--r--arch/mips/kernel/reset.c6
-rw-r--r--arch/mips/kernel/signal32.c2
-rw-r--r--arch/mips/kernel/smp_mt.c7
-rw-r--r--arch/mips/kernel/syscall.c3
-rw-r--r--arch/mips/kernel/sysirix.c1
-rw-r--r--arch/mips/kernel/time.c32
-rw-r--r--arch/mips/kernel/traps.c2
-rw-r--r--arch/mips/kernel/vpe.c11
-rw-r--r--arch/mips/lib/iomap.c2
-rw-r--r--arch/mips/math-emu/dp_fint.c2
-rw-r--r--arch/mips/math-emu/dp_flong.c2
-rw-r--r--arch/mips/math-emu/sp_fint.c2
-rw-r--r--arch/mips/math-emu/sp_flong.c2
-rw-r--r--arch/mips/mips-boards/generic/time.c33
-rw-r--r--arch/mips/mm/c-r4k.c4
-rw-r--r--arch/mips/oprofile/common.c3
-rw-r--r--arch/mips/oprofile/op_impl.h4
-rw-r--r--arch/mips/oprofile/op_model_mipsxx.c22
-rw-r--r--arch/mips/pci/fixup-capcella.c2
-rw-r--r--arch/mips/pci/fixup-mpc30x.c2
-rw-r--r--arch/mips/pci/fixup-tb0219.c2
-rw-r--r--arch/mips/pci/fixup-tb0226.c2
-rw-r--r--arch/mips/pci/fixup-tb0287.c2
-rw-r--r--arch/mips/pci/ops-vr41xx.c2
-rw-r--r--arch/mips/pci/pci-vr41xx.c2
-rw-r--r--arch/mips/pci/pci-vr41xx.h2
-rw-r--r--arch/mips/pmc-sierra/yosemite/smp.c4
-rw-r--r--arch/mips/sgi-ip27/ip27-berr.c1
-rw-r--r--arch/mips/sgi-ip27/ip27-smp.c4
-rw-r--r--arch/mips/sibyte/cfe/smp.c2
-rw-r--r--arch/mips/vr41xx/casio-e55/setup.c2
-rw-r--r--arch/mips/vr41xx/common/bcu.c4
-rw-r--r--arch/mips/vr41xx/common/cmu.c4
-rw-r--r--arch/mips/vr41xx/common/icu.c4
-rw-r--r--arch/mips/vr41xx/common/init.c2
-rw-r--r--arch/mips/vr41xx/common/int-handler.S2
-rw-r--r--arch/mips/vr41xx/common/irq.c2
-rw-r--r--arch/mips/vr41xx/common/pmu.c2
-rw-r--r--arch/mips/vr41xx/common/type.c2
-rw-r--r--arch/mips/vr41xx/common/vrc4173.c4
-rw-r--r--arch/mips/vr41xx/ibm-workpad/setup.c2
73 files changed, 186 insertions, 225 deletions
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index b50be449d3f..c3e852e9953 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -1471,7 +1471,7 @@ config SB1_PASS_2_1_WORKAROUNDS
config 64BIT_PHYS_ADDR
bool "Support for 64-bit physical address space"
- depends on (CPU_R4X00 || CPU_R5000 || CPU_RM7000 || CPU_RM9000 || CPU_R10000 || CPU_SB1 || CPU_MIPS32_R1 || CPU_MIPS64_R1) && 32BIT
+ depends on (CPU_R4X00 || CPU_R5000 || CPU_RM7000 || CPU_RM9000 || CPU_R10000 || CPU_SB1 || CPU_MIPS32 || CPU_MIPS64) && 32BIT
config CPU_ADVANCED
bool "Override CPU Options"
@@ -1492,14 +1492,6 @@ config CPU_HAS_LLSC
for better performance, N if you don't know. You must say Y here
for multiprocessor machines.
-config CPU_HAS_LLDSCD
- bool "lld/scd Instructions available" if CPU_ADVANCED
- default y if !CPU_ADVANCED && !CPU_R3000 && !CPU_VR41XX && !CPU_TX39XX && !CPU_MIPS32_R1
- help
- Say Y here if your CPU has the lld and scd instructions, the 64-bit
- equivalents of ll and sc. Say Y here for better performance, N if
- you don't know. You must say Y here for multiprocessor machines.
-
config CPU_HAS_WB
bool "Writeback Buffer available" if CPU_ADVANCED
default y if !CPU_ADVANCED && CPU_R3000 && MACH_DECSTATION
diff --git a/arch/mips/Makefile b/arch/mips/Makefile
index e14ba5e01a3..2a9f2ef27b2 100644
--- a/arch/mips/Makefile
+++ b/arch/mips/Makefile
@@ -93,7 +93,6 @@ endif
#
cflags-y += -I $(TOPDIR)/include/asm/gcc
cflags-y += -G 0 -mno-abicalls -fno-pic -pipe
-cflags-y += $(call cc-option, -finline-limit=100000)
LDFLAGS_vmlinux += -G 0 -static -n -nostdlib
MODFLAGS += -mlong-calls
diff --git a/arch/mips/configs/bigsur_defconfig b/arch/mips/configs/bigsur_defconfig
index 069f9d14983..6fd35377981 100644
--- a/arch/mips/configs/bigsur_defconfig
+++ b/arch/mips/configs/bigsur_defconfig
@@ -130,7 +130,6 @@ CONFIG_PAGE_SIZE_4KB=y
# CONFIG_SIBYTE_DMA_PAGEOPS is not set
# CONFIG_MIPS_MT is not set
CONFIG_CPU_HAS_LLSC=y
-CONFIG_CPU_HAS_LLDSCD=y
CONFIG_CPU_HAS_SYNC=y
CONFIG_GENERIC_HARDIRQS=y
CONFIG_GENERIC_IRQ_PROBE=y
diff --git a/arch/mips/configs/cobalt_defconfig b/arch/mips/configs/cobalt_defconfig
index 216f4023a81..1d3ee18ea8b 100644
--- a/arch/mips/configs/cobalt_defconfig
+++ b/arch/mips/configs/cobalt_defconfig
@@ -115,7 +115,6 @@ CONFIG_PAGE_SIZE_4KB=y
# CONFIG_MIPS_MT is not set
# CONFIG_CPU_ADVANCED is not set
CONFIG_CPU_HAS_LLSC=y
-CONFIG_CPU_HAS_LLDSCD=y
CONFIG_CPU_HAS_SYNC=y
CONFIG_GENERIC_HARDIRQS=y
CONFIG_GENERIC_IRQ_PROBE=y
diff --git a/arch/mips/configs/ddb5476_defconfig b/arch/mips/configs/ddb5476_defconfig
index bea00a9e926..a81e2de6947 100644
--- a/arch/mips/configs/ddb5476_defconfig
+++ b/arch/mips/configs/ddb5476_defconfig
@@ -116,7 +116,6 @@ CONFIG_PAGE_SIZE_4KB=y
# CONFIG_MIPS_MT is not set
# CONFIG_CPU_ADVANCED is not set
CONFIG_CPU_HAS_LLSC=y
-CONFIG_CPU_HAS_LLDSCD=y
CONFIG_CPU_HAS_SYNC=y
CONFIG_GENERIC_HARDIRQS=y
CONFIG_GENERIC_IRQ_PROBE=y
diff --git a/arch/mips/configs/ddb5477_defconfig b/arch/mips/configs/ddb5477_defconfig
index 61f7171ca7e..f1c27c2fb03 100644
--- a/arch/mips/configs/ddb5477_defconfig
+++ b/arch/mips/configs/ddb5477_defconfig
@@ -116,7 +116,6 @@ CONFIG_PAGE_SIZE_4KB=y
# CONFIG_MIPS_MT is not set
# CONFIG_CPU_ADVANCED is not set
CONFIG_CPU_HAS_LLSC=y
-CONFIG_CPU_HAS_LLDSCD=y
CONFIG_CPU_HAS_SYNC=y
CONFIG_GENERIC_HARDIRQS=y
CONFIG_GENERIC_IRQ_PROBE=y
diff --git a/arch/mips/configs/ev64120_defconfig b/arch/mips/configs/ev64120_defconfig
index 14e3815f11e..aa24d85ea94 100644
--- a/arch/mips/configs/ev64120_defconfig
+++ b/arch/mips/configs/ev64120_defconfig
@@ -118,7 +118,6 @@ CONFIG_PAGE_SIZE_4KB=y
# CONFIG_64BIT_PHYS_ADDR is not set
# CONFIG_CPU_ADVANCED is not set
CONFIG_CPU_HAS_LLSC=y
-CONFIG_CPU_HAS_LLDSCD=y
CONFIG_CPU_HAS_SYNC=y
CONFIG_GENERIC_HARDIRQS=y
CONFIG_GENERIC_IRQ_PROBE=y
diff --git a/arch/mips/configs/ev96100_defconfig b/arch/mips/configs/ev96100_defconfig
index 510819581d8..eeed0e5ad26 100644
--- a/arch/mips/configs/ev96100_defconfig
+++ b/arch/mips/configs/ev96100_defconfig
@@ -121,7 +121,6 @@ CONFIG_CPU_HAS_PREFETCH=y
# CONFIG_64BIT_PHYS_ADDR is not set
# CONFIG_CPU_ADVANCED is not set
CONFIG_CPU_HAS_LLSC=y
-CONFIG_CPU_HAS_LLDSCD=y
CONFIG_CPU_HAS_SYNC=y
CONFIG_GENERIC_HARDIRQS=y
CONFIG_GENERIC_IRQ_PROBE=y
diff --git a/arch/mips/configs/ip22_defconfig b/arch/mips/configs/ip22_defconfig
index 67979e3e606..e56351abf87 100644
--- a/arch/mips/configs/ip22_defconfig
+++ b/arch/mips/configs/ip22_defconfig
@@ -123,7 +123,6 @@ CONFIG_IP22_CPU_SCACHE=y
# CONFIG_64BIT_PHYS_ADDR is not set
# CONFIG_CPU_ADVANCED is not set
CONFIG_CPU_HAS_LLSC=y
-CONFIG_CPU_HAS_LLDSCD=y
CONFIG_CPU_HAS_SYNC=y
CONFIG_GENERIC_HARDIRQS=y
CONFIG_GENERIC_IRQ_PROBE=y
diff --git a/arch/mips/configs/ip27_defconfig b/arch/mips/configs/ip27_defconfig
index 03af44d1d84..e17d3adff02 100644
--- a/arch/mips/configs/ip27_defconfig
+++ b/arch/mips/configs/ip27_defconfig
@@ -119,7 +119,6 @@ CONFIG_PAGE_SIZE_4KB=y
CONFIG_CPU_HAS_PREFETCH=y
# CONFIG_MIPS_MT is not set
CONFIG_CPU_HAS_LLSC=y
-CONFIG_CPU_HAS_LLDSCD=y
CONFIG_CPU_HAS_SYNC=y
CONFIG_GENERIC_HARDIRQS=y
CONFIG_GENERIC_IRQ_PROBE=y
diff --git a/arch/mips/configs/ip32_defconfig b/arch/mips/configs/ip32_defconfig
index cba2a49cceb..967e7acd8e1 100644
--- a/arch/mips/configs/ip32_defconfig
+++ b/arch/mips/configs/ip32_defconfig
@@ -121,7 +121,6 @@ CONFIG_R5000_CPU_SCACHE=y
CONFIG_RM7000_CPU_SCACHE=y
# CONFIG_MIPS_MT is not set
CONFIG_CPU_HAS_LLSC=y
-CONFIG_CPU_HAS_LLDSCD=y
CONFIG_CPU_HAS_SYNC=y
CONFIG_GENERIC_HARDIRQS=y
CONFIG_GENERIC_IRQ_PROBE=y
diff --git a/arch/mips/configs/it8172_defconfig b/arch/mips/configs/it8172_defconfig
index e7ee1679af9..b5fa9639db6 100644
--- a/arch/mips/configs/it8172_defconfig
+++ b/arch/mips/configs/it8172_defconfig
@@ -117,7 +117,6 @@ CONFIG_PAGE_SIZE_4KB=y
# CONFIG_MIPS_MT is not set
# CONFIG_CPU_ADVANCED is not set
CONFIG_CPU_HAS_LLSC=y
-CONFIG_CPU_HAS_LLDSCD=y
CONFIG_CPU_HAS_SYNC=y
CONFIG_GENERIC_HARDIRQS=y
CONFIG_GENERIC_IRQ_PROBE=y
diff --git a/arch/mips/configs/ivr_defconfig b/arch/mips/configs/ivr_defconfig
index 138c8a60a4d..71386938d47 100644
--- a/arch/mips/configs/ivr_defconfig
+++ b/arch/mips/configs/ivr_defconfig
@@ -114,7 +114,6 @@ CONFIG_PAGE_SIZE_4KB=y
# CONFIG_MIPS_MT is not set
# CONFIG_CPU_ADVANCED is not set
CONFIG_CPU_HAS_LLSC=y
-CONFIG_CPU_HAS_LLDSCD=y
CONFIG_CPU_HAS_SYNC=y
CONFIG_GENERIC_HARDIRQS=y
CONFIG_GENERIC_IRQ_PROBE=y
diff --git a/arch/mips/configs/jaguar-atx_defconfig b/arch/mips/configs/jaguar-atx_defconfig
index 6238e0d6a43..14fb4688670 100644
--- a/arch/mips/configs/jaguar-atx_defconfig
+++ b/arch/mips/configs/jaguar-atx_defconfig
@@ -124,7 +124,6 @@ CONFIG_CPU_HAS_PREFETCH=y
# CONFIG_64BIT_PHYS_ADDR is not set
# CONFIG_CPU_ADVANCED is not set
CONFIG_CPU_HAS_LLSC=y
-CONFIG_CPU_HAS_LLDSCD=y
CONFIG_CPU_HAS_SYNC=y
CONFIG_GENERIC_HARDIRQS=y
CONFIG_GENERIC_IRQ_PROBE=y
diff --git a/arch/mips/configs/lasat200_defconfig b/arch/mips/configs/lasat200_defconfig
index a7ad99b12fe..6c5df76d48d 100644
--- a/arch/mips/configs/lasat200_defconfig
+++ b/arch/mips/configs/lasat200_defconfig
@@ -121,7 +121,6 @@ CONFIG_R5000_CPU_SCACHE=y
# CONFIG_64BIT_PHYS_ADDR is not set
# CONFIG_CPU_ADVANCED is not set
CONFIG_CPU_HAS_LLSC=y
-CONFIG_CPU_HAS_LLDSCD=y
CONFIG_CPU_HAS_SYNC=y
CONFIG_GENERIC_HARDIRQS=y
CONFIG_GENERIC_IRQ_PROBE=y
diff --git a/arch/mips/configs/malta_defconfig b/arch/mips/configs/malta_defconfig
index d1c44216f1c..da0677a03c1 100644
--- a/arch/mips/configs/malta_defconfig
+++ b/arch/mips/configs/malta_defconfig
@@ -1,7 +1,7 @@
#
# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.15-rc2
-# Thu Nov 24 01:06:35 2005
+# Linux kernel version: 2.6.15-rc5
+# Fri Dec 23 02:21:03 2005
#
CONFIG_MIPS=y
@@ -87,8 +87,8 @@ CONFIG_HAVE_STD_PC_SERIAL_PORT=y
#
# CPU selection
#
-CONFIG_CPU_MIPS32_R1=y
-# CONFIG_CPU_MIPS32_R2 is not set
+# CONFIG_CPU_MIPS32_R1 is not set
+CONFIG_CPU_MIPS32_R2=y
# CONFIG_CPU_MIPS64_R1 is not set
# CONFIG_CPU_MIPS64_R2 is not set
# CONFIG_CPU_R3000 is not set
@@ -112,7 +112,7 @@ CONFIG_SYS_HAS_CPU_MIPS64_R1=y
CONFIG_SYS_HAS_CPU_NEVADA=y
CONFIG_SYS_HAS_CPU_RM7000=y
CONFIG_CPU_MIPS32=y
-CONFIG_CPU_MIPSR1=y
+CONFIG_CPU_MIPSR2=y
CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
CONFIG_SYS_SUPPORTS_64BIT_KERNEL=y
CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
diff --git a/arch/mips/configs/ocelot_3_defconfig b/arch/mips/configs/ocelot_3_defconfig
index 9081ea5a9db..7ad8718c1b6 100644
--- a/arch/mips/configs/ocelot_3_defconfig
+++ b/arch/mips/configs/ocelot_3_defconfig
@@ -122,7 +122,6 @@ CONFIG_CPU_HAS_PREFETCH=y
# CONFIG_64BIT_PHYS_ADDR is not set
# CONFIG_CPU_ADVANCED is not set
CONFIG_CPU_HAS_LLSC=y
-CONFIG_CPU_HAS_LLDSCD=y
CONFIG_CPU_HAS_SYNC=y
CONFIG_GENERIC_HARDIRQS=y
CONFIG_GENERIC_IRQ_PROBE=y
diff --git a/arch/mips/configs/ocelot_c_defconfig b/arch/mips/configs/ocelot_c_defconfig
index 570fc4d1816..e8d6bb3551a 100644
--- a/arch/mips/configs/ocelot_c_defconfig
+++ b/arch/mips/configs/ocelot_c_defconfig
@@ -118,7 +118,6 @@ CONFIG_RM7000_CPU_SCACHE=y
CONFIG_CPU_HAS_PREFETCH=y
# CONFIG_MIPS_MT is not set
CONFIG_CPU_HAS_LLSC=y
-CONFIG_CPU_HAS_LLDSCD=y
CONFIG_CPU_HAS_SYNC=y
CONFIG_GENERIC_HARDIRQS=y
CONFIG_GENERIC_IRQ_PROBE=y
diff --git a/arch/mips/configs/ocelot_defconfig b/arch/mips/configs/ocelot_defconfig
index 6634ab24715..f3787b68bdd 100644
--- a/arch/mips/configs/ocelot_defconfig
+++ b/arch/mips/configs/ocelot_defconfig
@@ -123,7 +123,6 @@ CONFIG_CPU_HAS_PREFETCH=y
# CONFIG_64BIT_PHYS_ADDR is not set
# CONFIG_CPU_ADVANCED is not set
CONFIG_CPU_HAS_LLSC=y
-CONFIG_CPU_HAS_LLDSCD=y
CONFIG_CPU_HAS_SYNC=y
CONFIG_GENERIC_HARDIRQS=y
CONFIG_GENERIC_IRQ_PROBE=y
diff --git a/arch/mips/configs/ocelot_g_defconfig b/arch/mips/configs/ocelot_g_defconfig
index 4c396e1e2f0..b6126ad4d06 100644
--- a/arch/mips/configs/ocelot_g_defconfig
+++ b/arch/mips/configs/ocelot_g_defconfig
@@ -121,7 +121,6 @@ CONFIG_RM7000_CPU_SCACHE=y
CONFIG_CPU_HAS_PREFETCH=y
# CONFIG_MIPS_MT is not set
CONFIG_CPU_HAS_LLSC=y
-CONFIG_CPU_HAS_LLDSCD=y
CONFIG_CPU_HAS_SYNC=y
CONFIG_GENERIC_HARDIRQS=y
CONFIG_GENERIC_IRQ_PROBE=y
diff --git a/arch/mips/configs/pnx8550-v2pci_defconfig b/arch/mips/configs/pnx8550-v2pci_defconfig
index d9a0d2fdba4..4c650e70813 100644
--- a/arch/mips/configs/pnx8550-v2pci_defconfig
+++ b/arch/mips/configs/pnx8550-v2pci_defconfig
@@ -116,7 +116,6 @@ CONFIG_CPU_HAS_PREFETCH=y
# CONFIG_64BIT_PHYS_ADDR is not set
CONFIG_CPU_ADVANCED=y
CONFIG_CPU_HAS_LLSC=y
-# CONFIG_CPU_HAS_LLDSCD is not set
# CONFIG_CPU_HAS_WB is not set
CONFIG_CPU_HAS_SYNC=y
CONFIG_GENERIC_HARDIRQS=y
diff --git a/arch/mips/configs/rbhma4500_defconfig b/arch/mips/configs/rbhma4500_defconfig
index 1cc14502358..9aaa43024ae 100644
--- a/arch/mips/configs/rbhma4500_defconfig
+++ b/arch/mips/configs/rbhma4500_defconfig
@@ -124,7 +124,6 @@ CONFIG_PAGE_SIZE_4KB=y
# CONFIG_MIPS_MT is not set
CONFIG_CPU_ADVANCED=y
CONFIG_CPU_HAS_LLSC=y
-CONFIG_CPU_HAS_LLDSCD=y
CONFIG_CPU_HAS_WB=y
CONFIG_CPU_HAS_SYNC=y
CONFIG_GENERIC_HARDIRQS=y
diff --git a/arch/mips/configs/rm200_defconfig b/arch/mips/configs/rm200_defconfig
index 30975b305ae..abf61095931 100644
--- a/arch/mips/configs/rm200_defconfig
+++ b/arch/mips/configs/rm200_defconfig
@@ -124,7 +124,6 @@ CONFIG_PAGE_SIZE_4KB=y
# CONFIG_64BIT_PHYS_ADDR is not set
# CONFIG_CPU_ADVANCED is not set
CONFIG_CPU_HAS_LLSC=y
-CONFIG_CPU_HAS_LLDSCD=y
CONFIG_CPU_HAS_SYNC=y
CONFIG_GENERIC_HARDIRQS=y
CONFIG_GENERIC_IRQ_PROBE=y
diff --git a/arch/mips/configs/sb1250-swarm_defconfig b/arch/mips/configs/sb1250-swarm_defconfig
index 63f1be18e9b..52048c90607 100644
--- a/arch/mips/configs/sb1250-swarm_defconfig
+++ b/arch/mips/configs/sb1250-swarm_defconfig
@@ -133,7 +133,6 @@ CONFIG_CPU_HAS_PREFETCH=y
# CONFIG_MIPS_MT is not set
CONFIG_SB1_PASS_1_WORKAROUNDS=y
CONFIG_CPU_HAS_LLSC=y
-CONFIG_CPU_HAS_LLDSCD=y
CONFIG_CPU_HAS_SYNC=y
CONFIG_GENERIC_HARDIRQS=y
CONFIG_GENERIC_IRQ_PROBE=y
diff --git a/arch/mips/configs/yosemite_defconfig b/arch/mips/configs/yosemite_defconfig
index d51d5d16297..468c2e443d7 100644
--- a/arch/mips/configs/yosemite_defconfig
+++ b/arch/mips/configs/yosemite_defconfig
@@ -118,7 +118,6 @@ CONFIG_CPU_HAS_PREFETCH=y
# CONFIG_64BIT_PHYS_ADDR is not set
# CONFIG_CPU_ADVANCED is not set
CONFIG_CPU_HAS_LLSC=y
-CONFIG_CPU_HAS_LLDSCD=y
CONFIG_CPU_HAS_SYNC=y
CONFIG_GENERIC_HARDIRQS=y
CONFIG_GENERIC_IRQ_PROBE=y
diff --git a/arch/mips/defconfig b/arch/mips/defconfig
index 2a1b844da43..4f125e9e8e0 100644
--- a/arch/mips/defconfig
+++ b/arch/mips/defconfig
@@ -123,7 +123,6 @@ CONFIG_IP22_CPU_SCACHE=y
# CONFIG_64BIT_PHYS_ADDR is not set
# CONFIG_CPU_ADVANCED is not set
CONFIG_CPU_HAS_LLSC=y
-CONFIG_CPU_HAS_LLDSCD=y
CONFIG_CPU_HAS_SYNC=y
CONFIG_GENERIC_HARDIRQS=y
CONFIG_GENERIC_IRQ_PROBE=y
diff --git a/arch/mips/kernel/Makefile b/arch/mips/kernel/Makefile
index 72f2126ad19..f36c4f20ee8 100644
--- a/arch/mips/kernel/Makefile
+++ b/arch/mips/kernel/Makefile
@@ -50,7 +50,7 @@ obj-$(CONFIG_MIPS_BOARDS_GEN) += irq-msc01.o
obj-$(CONFIG_32BIT) += scall32-o32.o
obj-$(CONFIG_64BIT) += scall64-64.o
obj-$(CONFIG_BINFMT_IRIX) += binfmt_irix.o
-obj-$(CONFIG_MIPS32_COMPAT) += ioctl32.o linux32.o signal32.o
+obj-$(CONFIG_MIPS32_COMPAT) += linux32.o signal32.o
obj-$(CONFIG_MIPS32_N32) += binfmt_elfn32.o scall64-n32.o signal_n32.o
obj-$(CONFIG_MIPS32_O32) += binfmt_elfo32.o scall64-o32.o ptrace32.o
@@ -60,6 +60,5 @@ obj-$(CONFIG_PROC_FS) += proc.o
obj-$(CONFIG_64BIT) += cpu-bugs64.o
CFLAGS_cpu-bugs64.o = $(shell if $(CC) $(CFLAGS) -Wa,-mdaddi -c -o /dev/null -xc /dev/null >/dev/null 2>&1; then echo "-DHAVE_AS_SET_DADDI"; fi)
-CFLAGS_ioctl32.o += -Ifs/
EXTRA_AFLAGS := $(CFLAGS)
diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c
index 5e1b08b00a3..fac48ad27b3 100644
--- a/arch/mips/kernel/cpu-probe.c
+++ b/arch/mips/kernel/cpu-probe.c
@@ -435,6 +435,9 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c)
}
}
+static char unknown_isa[] __initdata = KERN_ERR \
+ "Unsupported ISA type, c0.config0: %d.";
+
static inline unsigned int decode_config0(struct cpuinfo_mips *c)
{
unsigned int config0;
@@ -447,16 +450,37 @@ static inline unsigned int decode_config0(struct cpuinfo_mips *c)
isa = (config0 & MIPS_CONF_AT) >> 13;
switch (isa) {
case 0:
- c->isa_level = MIPS_CPU_ISA_M32;
+ switch ((config0 >> 10) & 7) {
+ case 0:
+ c->isa_level = MIPS_CPU_ISA_M32R1;
+ break;
+ case 1:
+ c->isa_level = MIPS_CPU_ISA_M32R2;
+ break;
+ default:
+ goto unknown;
+ }
break;
case 2:
- c->isa_level = MIPS_CPU_ISA_M64;
+ switch ((config0 >> 10) & 7) {
+ case 0:
+ c->isa_level = MIPS_CPU_ISA_M64R1;
+ break;
+ case 1:
+ c->isa_level = MIPS_CPU_ISA_M64R2;
+ break;
+ default:
+ goto unknown;
+ }
break;
default:
- panic("Unsupported ISA type, cp0.config0.at: %d.", isa);
+ goto unknown;
}
return config0 & MIPS_CONF_M;
+
+unknown:
+ panic(unknown_isa, config0);
}
static inline unsigned int decode_config1(struct cpuinfo_mips *c)
@@ -568,7 +592,6 @@ static inline void cpu_probe_mips(struct cpuinfo_mips *c)
break;
case PRID_IMP_34K:
c->cputype = CPU_34K;
- c->isa_level = MIPS_CPU_ISA_M32;
break;
}
}
@@ -647,7 +670,7 @@ static inline void cpu_probe_philips(struct cpuinfo_mips *c)
switch (c->processor_id & 0xff00) {
case PRID_IMP_PR4450:
c->cputype = CPU_PR4450;
- c->isa_level = MIPS_CPU_ISA_M32;
+ c->isa_level = MIPS_CPU_ISA_M32R1;
break;
default:
panic("Unknown Philips Core!"); /* REVISIT: die? */
@@ -690,8 +713,10 @@ __init void cpu_probe(void)
if (c->options & MIPS_CPU_FPU) {
c->fpu_id = cpu_get_fpu_id();
- if (c->isa_level == MIPS_CPU_ISA_M32 ||
- c->isa_level == MIPS_CPU_ISA_M64) {
+ if (c->isa_level == MIPS_CPU_ISA_M32R1 ||
+ c->isa_level == MIPS_CPU_ISA_M32R2 ||
+ c->isa_level == MIPS_CPU_ISA_M64R1 ||
+ c->isa_level == MIPS_CPU_ISA_M64R2) {
if (c->fpu_id & MIPS_FPIR_3D)
c->ases |= MIPS_ASE_MIPS3D;
}
diff --git a/arch/mips/kernel/ioctl32.c b/arch/mips/kernel/ioctl32.c
deleted file mode 100644
index 9ea1fc74886..00000000000
--- a/arch/mips/kernel/ioctl32.c
+++ /dev/null
@@ -1,50 +0,0 @@
-/*
- * ioctl32.c: Conversion between 32bit and 64bit native ioctls.
- *
- * Copyright (C) 2000 Silicon Graphics, Inc.
- * Written by Ulf Carlsson (ulfc@engr.sgi.com)
- * Copyright (C) 2000, 2004 Ralf Baechle
- * Copyright (C) 2002, 2003 Maciej W. Rozycki
- */
-#define INCLUDES
-#include "compat_ioctl.c"
-
-#include <linux/config.h>
-#include <linux/types.h>
-#include <linux/compat.h>
-#include <linux/ioctl32.h>
-#include <linux/syscalls.h>
-
-#ifdef CONFIG_SIBYTE_TBPROF
-#include <asm/sibyte/trace_prof.h>
-#endif
-
-#define A(__x) ((unsigned long)(__x))
-
-long sys_ioctl(unsigned int fd, unsigned int cmd, unsigned long arg);
-
-#define CODE
-#include "compat_ioctl.c"
-
-#define COMPATIBLE_IOCTL(cmd) HANDLE_IOCTL((cmd),sys_ioctl)
-#define HANDLE_IOCTL(cmd,handler) { (cmd), (ioctl_trans_handler_t)(handler), NULL },
-#define IOCTL_TABLE_START \
- struct ioctl_trans ioctl_start[] = {
-#define IOCTL_TABLE_END \
- };
-
-IOCTL_TABLE_START
-
-#include <linux/compat_ioctl.h>
-#define DECLARES
-#include "compat_ioctl.c"
-
-/*HANDLE_IOCTL(RTC_IRQP_READ, w_long)
-COMPATIBLE_IOCTL(RTC_IRQP_SET)
-HANDLE_IOCTL(RTC_EPOCH_READ, w_long)
-COMPATIBLE_IOCTL(RTC_EPOCH_SET)
-*/
-
-IOCTL_TABLE_END
-
-int ioctl_table_size = ARRAY_SIZE(ioctl_start);
diff --git a/arch/mips/kernel/process.c b/arch/mips/kernel/process.c
index dd725779d91..fa98f10d013 100644
--- a/arch/mips/kernel/process.c
+++ b/arch/mips/kernel/process.c
@@ -140,12 +140,12 @@ void flush_thread(void)
int copy_thread(int nr, unsigned long clone_flags, unsigned long usp,
unsigned long unused, struct task_struct *p, struct pt_regs *regs)
{
- struct thread_info *ti = p->thread_info;
+ struct thread_info *ti = task_thread_info(p);
struct pt_regs *childregs;
long childksp;
p->set_child_tid = p->clear_child_tid = NULL;
- childksp = (unsigned long)ti + THREAD_SIZE - 32;
+ childksp = (unsigned long)task_stack_page(p) + THREAD_SIZE - 32;
preempt_disable();
@@ -205,7 +205,7 @@ int dump_fpu(struct pt_regs *regs, elf_fpregset_t *r)
return 1;
}
-void dump_regs(elf_greg_t *gp, struct pt_regs *regs)
+void elf_dump_regs(elf_greg_t *gp, struct pt_regs *regs)
{
int i;
@@ -229,9 +229,7 @@ void dump_regs(elf_greg_t *gp, struct pt_regs *regs)
int dump_task_regs (struct task_struct *tsk, elf_gregset_t *regs)
{
- struct thread_info *ti = tsk->thread_info;
- long ksp = (unsigned long)ti + THREAD_SIZE - 32;
- dump_regs(&(*regs)[0], (struct pt_regs *) ksp - 1);
+ elf_dump_regs(*regs, task_pt_regs(tsk));
return 1;
}
@@ -409,7 +407,7 @@ unsigned long get_wchan(struct task_struct *p)
if (!p || p == current || p->state == TASK_RUNNING)
return 0;
- stack_page = (unsigned long)p->thread_info;
+ stack_page = (unsigned long)task_stack_page(p);
if (!stack_page || !mips_frame_info_initialized)
return 0;
diff --git a/arch/mips/kernel/ptrace.c b/arch/mips/kernel/ptrace.c
index 510da5fda56..f838b36cc76 100644
--- a/arch/mips/kernel/ptrace.c
+++ b/arch/mips/kernel/ptrace.c
@@ -64,8 +64,7 @@ int ptrace_getregs (struct task_struct *child, __s64 __user *data)
if (!access_ok(VERIFY_WRITE, data, 38 * 8))
return -EIO;
- regs = (struct pt_regs *) ((unsigned long) child->thread_info +
- THREAD_SIZE - 32 - sizeof(struct pt_regs));
+ regs = task_pt_regs(child);
for (i = 0; i < 32; i++)
__put_user (regs->regs[i], data + i);
@@ -92,8 +91,7 @@ int ptrace_setregs (struct task_struct *child, __s64 __user *data)
if (!access_ok(VERIFY_READ, data, 38 * 8))
return -EIO;
- regs = (struct pt_regs *) ((unsigned long) child->thread_info +
- THREAD_SIZE - 32 - sizeof(struct pt_regs));
+ regs = task_pt_regs(child);
for (i = 0; i < 32; i++)
__get_user (regs->regs[i], data + i);
@@ -198,8 +196,7 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
struct pt_regs *regs;
unsigned long tmp = 0;
- regs = (struct pt_regs *) ((unsigned long) child->thread_info +
- THREAD_SIZE - 32 - sizeof(struct pt_regs));
+ regs = task_pt_regs(child);
ret = 0; /* Default return value. */
switch (addr) {
@@ -280,12 +277,8 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
ret = -EIO;
goto out;
}
- if (child->thread.dsp.used_dsp) {
- dregs = __get_dsp_regs(child);
- tmp = (unsigned long) (dregs[addr - DSP_BASE]);
- } else {
- tmp = -1; /* DSP registers yet used */
- }
+ dregs = __get_dsp_regs(child);
+ tmp = (unsigned long) (dregs[addr - DSP_BASE]);
break;
}
case DSP_CONTROL:
@@ -318,8 +311,7 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
case PTRACE_POKEUSR: {
struct pt_regs *regs;
ret = 0;
- regs = (struct pt_regs *) ((unsigned long) child->thread_info +
- THREAD_SIZE - 32 - sizeof(struct pt_regs));
+ regs = task_pt_regs(child);
switch (addr) {
case 0 ... 31:
@@ -446,7 +438,7 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
break;
case PTRACE_GET_THREAD_AREA:
- ret = put_user(child->thread_info->tp_value,
+ ret = put_user(task_thread_info(child)->tp_value,
(unsigned long __user *) data);
break;
diff --git a/arch/mips/kernel/ptrace32.c b/arch/mips/kernel/ptrace32.c
index 9a9b0497213..0c82b25d8c6 100644
--- a/arch/mips/kernel/ptrace32.c
+++ b/arch/mips/kernel/ptrace32.c
@@ -57,30 +57,16 @@ asmlinkage int sys32_ptrace(int request, int pid, int addr, int data)
(unsigned long) data);
#endif
lock_kernel();
- ret = -EPERM;
if (request == PTRACE_TRACEME) {
- /* are we already being traced? */
- if (current->ptrace & PT_PTRACED)
- goto out;
- if ((ret = security_ptrace(current->parent, current)))
- goto out;
- /* set the ptrace bit in the process flags. */
- current->ptrace |= PT_PTRACED;
- ret = 0;
+ ret = ptrace_traceme();
goto out;
}
- ret = -ESRCH;
- read_lock(&tasklist_lock);
- child = find_task_by_pid(pid);
- if (child)
- get_task_struct(child);
- read_unlock(&tasklist_lock);
- if (!child)
- goto out;
- ret = -EPERM;
- if (pid == 1) /* you may not mess with init */
- goto out_tsk;
+ child = ptrace_get_task_struct(pid);
+ if (IS_ERR(child)) {
+ ret = PTR_ERR(child);
+ goto out;
+ }
if (request == PTRACE_ATTACH) {
ret = ptrace_attach(child);
@@ -140,8 +126,7 @@ asmlinkage int sys32_ptrace(int request, int pid, int addr, int data)
struct pt_regs *regs;
unsigned int tmp;
- regs = (struct pt_regs *) ((unsigned long) child->thread_info +
- THREAD_SIZE - 32 - sizeof(struct pt_regs));
+ regs = task_pt_regs(child);
ret = 0; /* Default return value. */
switch (addr) {
@@ -215,12 +200,8 @@ asmlinkage int sys32_ptrace(int request, int pid, int addr, int data)
ret = -EIO;
goto out_tsk;
}
- if (child->thread.dsp.used_dsp) {
- dspreg_t *dregs = __get_dsp_regs(child);
- tmp = (unsigned long) (dregs[addr - DSP_BASE]);
- } else {
- tmp = -1; /* DSP registers yet used */
- }
+ dspreg_t *dregs = __get_dsp_regs(child);
+ tmp = (unsigned long) (dregs[addr - DSP_BASE]);
break;
case DSP_CONTROL:
if (!cpu_has_dsp) {
@@ -277,8 +258,7 @@ asmlinkage int sys32_ptrace(int request, int pid, int addr, int data)
case PTRACE_POKEUSR: {
struct pt_regs *regs;
ret = 0;
- regs = (struct pt_regs *) ((unsigned long) child->thread_info +
- THREAD_SIZE - 32 - sizeof(struct pt_regs));
+ regs = task_pt_regs(child);
switch (addr) {
case 0 ... 31:
@@ -395,7 +375,7 @@ asmlinkage int sys32_ptrace(int request, int pid, int addr, int data)
break;
case PTRACE_GET_THREAD_AREA:
- ret = put_user(child->thread_info->tp_value,
+ ret = put_user(task_thread_info(child)->tp_value,
(unsigned int __user *) (unsigned long) data);
break;
@@ -409,7 +389,7 @@ asmlinkage int sys32_ptrace(int request, int pid, int addr, int data)
break;
case PTRACE_GET_THREAD_AREA_3264:
- ret = put_user(child->thread_info->tp_value,
+ ret = put_user(task_thread_info(child)->tp_value,
(unsigned long __user *) (unsigned long) data);
break;
diff --git a/arch/mips/kernel/reset.c b/arch/mips/kernel/reset.c
index ae2ba67b7ef..5e37df3111a 100644
--- a/arch/mips/kernel/reset.c
+++ b/arch/mips/kernel/reset.c
@@ -12,6 +12,9 @@
#include <linux/reboot.h>
#include <asm/reboot.h>
+void (*pm_power_off)(void);
+EXPORT_SYMBOL(pm_power_off);
+
/*
* Urgs ... Too many MIPS machines to handle this in a generic way.
* So handle all using function pointers to machine specific
@@ -33,6 +36,9 @@ void machine_halt(void)
void machine_power_off(void)
{
+ if (pm_power_off)
+ pm_power_off();
+
_machine_power_off();
}
diff --git a/arch/mips/kernel/signal32.c b/arch/mips/kernel/signal32.c
index c856dbc52ab..98b185bbc94 100644
--- a/arch/mips/kernel/signal32.c
+++ b/arch/mips/kernel/signal32.c
@@ -588,7 +588,7 @@ static inline int setup_sigcontext32(struct pt_regs *regs,
err |= __put_user(regs->hi, &sc->sc_mdhi);
err |= __put_user(regs->lo, &sc->sc_mdlo);
if (cpu_has_dsp) {
- err |= __put_user(rddsp(DSP_MASK), &sc->sc_hi1);
+ err |= __put_user(rddsp(DSP_MASK), &sc->sc_dsp);
err |= __put_user(mfhi1(), &sc->sc_hi1);
err |= __put_user(mflo1(), &sc->sc_lo1);
err |= __put_user(mfhi2(), &sc->sc_hi2);
diff --git a/arch/mips/kernel/smp_mt.c b/arch/mips/kernel/smp_mt.c
index d429544ba4b..794a1c3de2a 100644
--- a/arch/mips/kernel/smp_mt.c
+++ b/arch/mips/kernel/smp_mt.c
@@ -287,6 +287,7 @@ void prom_prepare_cpus(unsigned int max_cpus)
*/
void prom_boot_secondary(int cpu, struct task_struct *idle)
{
+ struct thread_info *gp = task_thread_info(idle);
dvpe();
set_c0_mvpcontrol(MVPCONTROL_VPC);
@@ -307,11 +308,9 @@ void prom_boot_secondary(int cpu, struct task_struct *idle)
write_tc_gpr_sp( __KSTK_TOS(idle));
/* global pointer */
- write_tc_gpr_gp((unsigned long)idle->thread_info);
+ write_tc_gpr_gp((unsigned long)gp);
- flush_icache_range((unsigned long)idle->thread_info,
- (unsigned long)idle->thread_info +
- sizeof(struct thread_info));
+ flush_icache_range((unsigned long)gp, (unsigned long)(gp + 1));
/* finally out of configuration and into chaos */
clear_c0_mvpcontrol(MVPCONTROL_VPC);
diff --git a/arch/mips/kernel/syscall.c b/arch/mips/kernel/syscall.c
index ee98eeb65e8..332358430ff 100644
--- a/arch/mips/kernel/syscall.c
+++ b/arch/mips/kernel/syscall.c
@@ -9,6 +9,7 @@
*/
#include <linux/config.h>
#include <linux/a.out.h>
+#include <linux/capability.h>
#include <linux/errno.h>
#include <linux/linkage.h>
#include <linux/mm.h>
@@ -262,7 +263,7 @@ asmlinkage int sys_olduname(struct oldold_utsname * name)
void sys_set_thread_area(unsigned long addr)
{
- struct thread_info *ti = current->thread_info;
+ struct thread_info *ti = task_thread_info(current);
ti->tp_value = addr;
diff --git a/arch/mips/kernel/sysirix.c b/arch/mips/kernel/sysirix.c
index 52924f8ce23..0fc3730a294 100644
--- a/arch/mips/kernel/sysirix.c
+++ b/arch/mips/kernel/sysirix.c
@@ -8,6 +8,7 @@
#include <linux/kernel.h>
#include <linux/sched.h>
#include <linux/binfmts.h>
+#include <linux/capability.h>
#include <linux/highuid.h>
#include <linux/pagemap.h>
#include <linux/mm.h>
diff --git a/arch/mips/kernel/time.c b/arch/mips/kernel/time.c
index 787ed541d44..7050b4ffffc 100644
--- a/arch/mips/kernel/time.c
+++ b/arch/mips/kernel/time.c
@@ -507,14 +507,38 @@ irqreturn_t timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
return IRQ_HANDLED;
}
+int null_perf_irq(struct pt_regs *regs)
+{
+ return 0;
+}
+
+int (*perf_irq)(struct pt_regs *regs) = null_perf_irq;
+
+EXPORT_SYMBOL(null_perf_irq);
+EXPORT_SYMBOL(perf_irq);
+
asmlinkage void ll_timer_interrupt(int irq, struct pt_regs *regs)
{
+ int r2 = cpu_has_mips_r2;
+
irq_enter();
kstat_this_cpu.irqs[irq]++;
+ /*
+ * Suckage alert:
+ * Before R2 of the architecture there was no way to see if a
+ * performance counter interrupt was pending, so we have to run the
+ * performance counter interrupt handler anyway.
+ */
+ if (!r2 || (read_c0_cause() & (1 << 26)))
+ if (perf_irq(regs))
+ goto out;
+
/* we keep interrupt disabled all the time */
- timer_interrupt(irq, NULL, regs);
+ if (!r2 || (read_c0_cause() & (1 << 30)))
+ timer_interrupt(irq, NULL, regs);
+out:
irq_exit();
}
@@ -628,9 +652,9 @@ void __init time_init(void)
mips_hpt_init = c0_hpt_init;
}
- if ((current_cpu_data.isa_level == MIPS_CPU_ISA_M32) ||
- (current_cpu_data.isa_level == MIPS_CPU_ISA_I) ||
- (current_cpu_data.isa_level == MIPS_CPU_ISA_II))
+ if (cpu_has_mips32r1 || cpu_has_mips32r2 ||
+ (current_cpu_data.isa_level == MIPS_CPU_ISA_I) ||
+ (current_cpu_data.isa_level == MIPS_CPU_ISA_II))
/*
* We need to calibrate the counter but we don't have
* 64-bit division.
diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c
index 7058893d5ad..59a187956de 100644
--- a/arch/mips/kernel/traps.c
+++ b/arch/mips/kernel/traps.c
@@ -519,7 +519,7 @@ static inline int simulate_llsc(struct pt_regs *regs)
*/
static inline int simulate_rdhwr(struct pt_regs *regs)
{
- struct thread_info *ti = current->thread_info;
+ struct thread_info *ti = task_thread_info(current);
unsigned int opcode;
if (unlikely(get_insn_opcode(regs, &opcode)))
diff --git a/arch/mips/kernel/vpe.c b/arch/mips/kernel/vpe.c
index 06be405be39..ae83b755cf4 100644
--- a/arch/mips/kernel/vpe.c
+++ b/arch/mips/kernel/vpe.c
@@ -99,9 +99,9 @@ struct vpe {
/* elfloader stuff */
void *load_addr;
- u32 len;
+ unsigned long len;
char *pbuffer;
- u32 plen;
+ unsigned long plen;
unsigned long __start;
@@ -253,11 +253,11 @@ void dump_mtregs(void)
}
/* Find some VPE program space */
-static void *alloc_progmem(u32 len)
+static void *alloc_progmem(unsigned long len)
{
#ifdef CONFIG_MIPS_VPE_LOADER_TOM
/* this means you must tell linux to use less memory than you physically have */
- return (void *)((max_pfn * PAGE_SIZE) + KSEG0);
+ return pfn_to_kaddr(max_pfn);
#else
// simple grab some mem for now
return kmalloc(len, GFP_KERNEL);
@@ -1171,7 +1171,8 @@ static int __init vpe_module_init(void)
return -ENODEV;
}
- if ((major = register_chrdev(0, module_name, &vpe_fops) < 0)) {
+ major = register_chrdev(0, module_name, &vpe_fops);
+ if (major < 0) {
printk("VPE loader: unable to register character device\n");
return major;
}
diff --git a/arch/mips/lib/iomap.c b/arch/mips/lib/iomap.c
index b5d5fa83376..7e2ced715cf 100644
--- a/arch/mips/lib/iomap.c
+++ b/arch/mips/lib/iomap.c
@@ -3,7 +3,7 @@
*
* This code is based on lib/iomap.c, by Linus Torvalds.
*
- * Copyright (C) 2004-2005 Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
+ * Copyright (C) 2004-2005 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
diff --git a/arch/mips/math-emu/dp_fint.c b/arch/mips/math-emu/dp_fint.c
index 0065deaee24..a1962eb460f 100644
--- a/arch/mips/math-emu/dp_fint.c
+++ b/arch/mips/math-emu/dp_fint.c
@@ -33,8 +33,6 @@ ieee754dp ieee754dp_fint(int x)
CLEARCX;
- xc = ( 0 ? xc : xc );
-
if (x == 0)
return ieee754dp_zero(0);
if (x == 1 || x == -1)
diff --git a/arch/mips/math-emu/dp_flong.c b/arch/mips/math-emu/dp_flong.c
index cb105b1dd86..eae90a866aa 100644
--- a/arch/mips/math-emu/dp_flong.c
+++ b/arch/mips/math-emu/dp_flong.c
@@ -33,8 +33,6 @@ ieee754dp ieee754dp_flong(s64 x)
CLEARCX;
- xc = ( 0 ? xc : xc );
-
if (x == 0)
return ieee754dp_zero(0);
if (x == 1 || x == -1)
diff --git a/arch/mips/math-emu/sp_fint.c b/arch/mips/math-emu/sp_fint.c
index 42d9ed4b9a9..7aac13afb09 100644
--- a/arch/mips/math-emu/sp_fint.c
+++ b/arch/mips/math-emu/sp_fint.c
@@ -33,8 +33,6 @@ ieee754sp ieee754sp_fint(int x)
CLEARCX;
- xc = ( 0 ? xc : xc );
-
if (x == 0)
return ieee754sp_zero(0);
if (x == 1 || x == -1)
diff --git a/arch/mips/math-emu/sp_flong.c b/arch/mips/math-emu/sp_flong.c
index 1e26795ccec..3d6c1d11c17 100644
--- a/arch/mips/math-emu/sp_flong.c
+++ b/arch/mips/math-emu/sp_flong.c
@@ -33,8 +33,6 @@ ieee754sp ieee754sp_flong(s64 x)
CLEARCX;
- xc = ( 0 ? xc : xc );
-
if (x == 0)
return ieee754sp_zero(0);
if (x == 1 || x == -1)
diff --git a/arch/mips/mips-boards/generic/time.c b/arch/mips/mips-boards/generic/time.c
index 72a12d931cb..93f3bf2c2b2 100644
--- a/arch/mips/mips-boards/generic/time.c
+++ b/arch/mips/mips-boards/generic/time.c
@@ -75,20 +75,31 @@ static void mips_timer_dispatch (struct pt_regs *regs)
do_IRQ (mips_cpu_timer_irq, regs);
}
+extern int null_perf_irq(struct pt_regs *regs);
+
+extern int (*perf_irq)(struct pt_regs *regs);
+
irqreturn_t mips_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
{
-#ifdef CONFIG_SMP
+ int r2 = cpu_has_mips_r2;
int cpu = smp_processor_id();
if (cpu == 0) {
/*
- * CPU 0 handles the global timer interrupt job and process accounting
- * resets count/compare registers to trigger next timer int.
+ * CPU 0 handles the global timer interrupt job and process
+ * accounting resets count/compare registers to trigger next
+ * timer int.
*/
- (void) timer_interrupt(irq, dev_id, regs);
+ if (!r2 || (read_c0_cause() & (1 << 26)))
+ if (perf_irq(regs))
+ goto out;
+
+ /* we keep interrupt disabled all the time */
+ if (!r2 || (read_c0_cause() & (1 << 30)))
+ timer_interrupt(irq, NULL, regs);
+
scroll_display_message();
- }
- else {
+ } else {
/* Everyone else needs to reset the timer int here as
ll_local_timer_interrupt doesn't */
/*
@@ -103,16 +114,8 @@ irqreturn_t mips_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
local_timer_interrupt (irq, dev_id, regs);
}
+out:
return IRQ_HANDLED;
-#else
- irqreturn_t r;
-
- r = timer_interrupt(irq, dev_id, regs);
-
- scroll_display_message();
-
- return r;
-#endif
}
/*
diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c
index 38223b44d96..422b55fab07 100644
--- a/arch/mips/mm/c-r4k.c
+++ b/arch/mips/mm/c-r4k.c
@@ -1183,8 +1183,8 @@ static void __init setup_scache(void)
if (!sc_present)
return;
- if ((c->isa_level == MIPS_CPU_ISA_M32 ||
- c->isa_level == MIPS_CPU_ISA_M64) &&
+ if ((c->isa_level == MIPS_CPU_ISA_M32R1 ||
+ c->isa_level == MIPS_CPU_ISA_M64R1) &&
!(c->scache.flags & MIPS_CACHE_NOT_PRESENT))
panic("Dunno how to handle MIPS32 / MIPS64 second level cache");
diff --git a/arch/mips/oprofile/common.c b/arch/mips/oprofile/common.c
index dd2cc42f1b6..53f9889b30e 100644
--- a/arch/mips/oprofile/common.c
+++ b/arch/mips/oprofile/common.c
@@ -75,7 +75,10 @@ int __init oprofile_arch_init(struct oprofile_operations *ops)
int res;
switch (current_cpu_data.cputype) {
+ case CPU_5KC:
+ case CPU_20KC:
case CPU_24K:
+ case CPU_25KF:
lmodel = &op_model_mipsxx;
break;
diff --git a/arch/mips/oprofile/op_impl.h b/arch/mips/oprofile/op_impl.h
index f0121557047..5cfce7d87a4 100644
--- a/arch/mips/oprofile/op_impl.h
+++ b/arch/mips/oprofile/op_impl.h
@@ -12,8 +12,8 @@
struct pt_regs;
-extern void null_perf_irq(struct pt_regs *regs);
-extern void (*perf_irq)(struct pt_regs *regs);
+extern int null_perf_irq(struct pt_regs *regs);
+extern int (*perf_irq)(struct pt_regs *regs);
/* Per-counter configuration as set via oprofilefs. */
struct op_counter_config {
diff --git a/arch/mips/oprofile/op_model_mipsxx.c b/arch/mips/oprofile/op_model_mipsxx.c
index d36b64dfcb2..1d1eee407fa 100644
--- a/arch/mips/oprofile/op_model_mipsxx.c
+++ b/arch/mips/oprofile/op_model_mipsxx.c
@@ -114,11 +114,12 @@ static void mipsxx_cpu_stop(void *args)
}
}
-static void mipsxx_perfcount_handler(struct pt_regs *regs)
+static int mipsxx_perfcount_handler(struct pt_regs *regs)
{
unsigned int counters = op_model_mipsxx.num_counters;
unsigned int control;
unsigned int counter;
+ int handled = 0;
switch (counters) {
#define HANDLE_COUNTER(n) \
@@ -129,12 +130,15 @@ static void mipsxx_perfcount_handler(struct pt_regs *regs)
(counter & M_COUNTER_OVERFLOW)) { \
oprofile_add_sample(regs, n); \
write_c0_perfcntr ## n(reg.counter[n]); \
+ handled = 1; \
}
HANDLE_COUNTER(3)
HANDLE_COUNTER(2)
HANDLE_COUNTER(1)
HANDLE_COUNTER(0)
}
+
+ return handled;
}
#define M_CONFIG1_PC (1 << 4)
@@ -176,17 +180,31 @@ static int __init mipsxx_init(void)
int counters;
counters = n_counters();
- if (counters == 0)
+ if (counters == 0) {
+ printk(KERN_ERR "Oprofile: CPU has no performance counters\n");
return -ENODEV;
+ }
reset_counters(counters);
op_model_mipsxx.num_counters = counters;
switch (current_cpu_data.cputype) {
+ case CPU_20KC:
+ op_model_mipsxx.cpu_type = "mips/20K";
+ break;
+
case CPU_24K:
op_model_mipsxx.cpu_type = "mips/24K";
break;
+ case CPU_25KF:
+ op_model_mipsxx.cpu_type = "mips/25K";
+ break;
+
+ case CPU_5KC:
+ op_model_mipsxx.cpu_type = "mips/5K";
+ break;
+
default:
printk(KERN_ERR "Profiling unsupported for this CPU\n");
diff --git a/arch/mips/pci/fixup-capcella.c b/arch/mips/pci/fixup-capcella.c
index f2fc82c1c7c..1e530751936 100644
--- a/arch/mips/pci/fixup-capcella.c
+++ b/arch/mips/pci/fixup-capcella.c
@@ -1,7 +1,7 @@
/*
* fixup-cappcela.c, The ZAO Networks Capcella specific PCI fixups.
*
- * Copyright (C) 2002,2004 Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
+ * Copyright (C) 2002,2004 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
diff --git a/arch/mips/pci/fixup-mpc30x.c b/arch/mips/pci/fixup-mpc30x.c
index 4975846da75..b67ddaa4712 100644
--- a/arch/mips/pci/fixup-mpc30x.c
+++ b/arch/mips/pci/fixup-mpc30x.c
@@ -1,7 +1,7 @@
/*
* fixup-mpc30x.c, The Victor MP-C303/304 specific PCI fixups.
*
- * Copyright (C) 2002,2004 Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
+ * Copyright (C) 2002,2004 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
diff --git a/arch/mips/pci/fixup-tb0219.c b/arch/mips/pci/fixup-tb0219.c
index bc55b06e190..734f2b71e16 100644
--- a/arch/mips/pci/fixup-tb0219.c
+++ b/arch/mips/pci/fixup-tb0219.c
@@ -2,7 +2,7 @@
* fixup-tb0219.c, The TANBAC TB0219 specific PCI fixups.
*
* Copyright (C) 2003 Megasolution Inc. <matsu@megasolution.jp>
- * Copyright (C) 2004 Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
+ * Copyright (C) 2004 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
diff --git a/arch/mips/pci/fixup-tb0226.c b/arch/mips/pci/fixup-tb0226.c
index b5d42b12de1..c9e7cb4361a 100644
--- a/arch/mips/pci/fixup-tb0226.c
+++ b/arch/mips/pci/fixup-tb0226.c
@@ -1,7 +1,7 @@
/*
* fixup-tb0226.c, The TANBAC TB0226 specific PCI fixups.
*
- * Copyright (C) 2002-2005 Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
+ * Copyright (C) 2002-2005 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
diff --git a/arch/mips/pci/fixup-tb0287.c b/arch/mips/pci/fixup-tb0287.c
index 8436d7f1fdb..fbe6bcb2819 100644
--- a/arch/mips/pci/fixup-tb0287.c
+++ b/arch/mips/pci/fixup-tb0287.c
@@ -1,7 +1,7 @@
/*
* fixup-tb0287.c, The TANBAC TB0287 specific PCI fixups.
*
- * Copyright (C) 2005 Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
+ * Copyright (C) 2005 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
diff --git a/arch/mips/pci/ops-vr41xx.c b/arch/mips/pci/ops-vr41xx.c
index 430429b22ae..900c6b32576 100644
--- a/arch/mips/pci/ops-vr41xx.c
+++ b/arch/mips/pci/ops-vr41xx.c
@@ -3,7 +3,7 @@
*
* Copyright (C) 2001-2003 MontaVista Software Inc.
* Author: Yoichi Yuasa <yyuasa@mvista.com or source@mvista.com>
- * Copyright (C) 2004-2005 Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
+ * Copyright (C) 2004-2005 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
diff --git a/arch/mips/pci/pci-vr41xx.c b/arch/mips/pci/pci-vr41xx.c
index 91df4da7ddb..9885fa40360 100644
--- a/arch/mips/pci/pci-vr41xx.c
+++ b/arch/mips/pci/pci-vr41xx.c
@@ -3,7 +3,7 @@
*
* Copyright (C) 2001-2003 MontaVista Software Inc.
* Author: Yoichi Yuasa <yyuasa@mvista.com or source@mvista.com>
- * Copyright (C) 2004-2005 Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
+ * Copyright (C) 2004-2005 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
* Copyright (C) 2004 by Ralf Baechle (ralf@linux-mips.org)
*
* This program is free software; you can redistribute it and/or modify
diff --git a/arch/mips/pci/pci-vr41xx.h b/arch/mips/pci/pci-vr41xx.h
index e087ec55641..8a35e32b837 100644
--- a/arch/mips/pci/pci-vr41xx.h
+++ b/arch/mips/pci/pci-vr41xx.h
@@ -3,7 +3,7 @@
*
* Copyright (C) 2002 MontaVista Software Inc.
* Author: Yoichi Yuasa <yyuasa@mvista.com or source@mvista.com>
- * Copyright (C) 2004-2005 Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
+ * Copyright (C) 2004-2005 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
diff --git a/arch/mips/pmc-sierra/yosemite/smp.c b/arch/mips/pmc-sierra/yosemite/smp.c
index 0527170d6ad..f17f575f58f 100644
--- a/arch/mips/pmc-sierra/yosemite/smp.c
+++ b/arch/mips/pmc-sierra/yosemite/smp.c
@@ -93,8 +93,8 @@ void __init prom_prepare_cpus(unsigned int max_cpus)
*/
void prom_boot_secondary(int cpu, struct task_struct *idle)
{
- unsigned long gp = (unsigned long) idle->thread_info;
- unsigned long sp = gp + THREAD_SIZE - 32;
+ unsigned long gp = (unsigned long) task_thread_info(idle);
+ unsigned long sp = __KSTK_TOP(idle);
secondary_sp = sp;
secondary_gp = gp;
diff --git a/arch/mips/sgi-ip27/ip27-berr.c b/arch/mips/sgi-ip27/ip27-berr.c
index 07631a97670..ce907eda221 100644
--- a/arch/mips/sgi-ip27/ip27-berr.c
+++ b/arch/mips/sgi-ip27/ip27-berr.c
@@ -11,6 +11,7 @@
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/signal.h> /* for SIGBUS */
+#include <linux/sched.h> /* schow_regs(), force_sig() */
#include <asm/module.h>
#include <asm/sn/addrs.h>
diff --git a/arch/mips/sgi-ip27/ip27-smp.c b/arch/mips/sgi-ip27/ip27-smp.c
index 3a8291b7d26..dbef3f6b565 100644
--- a/arch/mips/sgi-ip27/ip27-smp.c
+++ b/arch/mips/sgi-ip27/ip27-smp.c
@@ -168,8 +168,8 @@ void __init prom_prepare_cpus(unsigned int max_cpus)
*/
void __init prom_boot_secondary(int cpu, struct task_struct *idle)
{
- unsigned long gp = (unsigned long) idle->thread_info;
- unsigned long sp = gp + THREAD_SIZE - 32;
+ unsigned long gp = (unsigned long)task_thread_info(idle);
+ unsigned long sp = __KSTK_TOS(idle);
LAUNCH_SLAVE(cputonasid(cpu),cputoslice(cpu),
(launch_proc_t)MAPPED_KERN_RW_TO_K0(smp_bootstrap),
diff --git a/arch/mips/sibyte/cfe/smp.c b/arch/mips/sibyte/cfe/smp.c
index e8485124b8f..4477af3d807 100644
--- a/arch/mips/sibyte/cfe/smp.c
+++ b/arch/mips/sibyte/cfe/smp.c
@@ -60,7 +60,7 @@ void prom_boot_secondary(int cpu, struct task_struct *idle)
retval = cfe_cpu_start(cpu_logical_map(cpu), &smp_bootstrap,
__KSTK_TOS(idle),
- (unsigned long)idle->thread_info, 0);
+ (unsigned long)task_thread_info(idle), 0);
if (retval != 0)
printk("cfe_start_cpu(%i) returned %i\n" , cpu, retval);
}
diff --git a/arch/mips/vr41xx/casio-e55/setup.c b/arch/mips/vr41xx/casio-e55/setup.c
index d29201acc4f..814900915c2 100644
--- a/arch/mips/vr41xx/casio-e55/setup.c
+++ b/arch/mips/vr41xx/casio-e55/setup.c
@@ -1,7 +1,7 @@
/*
* setup.c, Setup for the CASIO CASSIOPEIA E-11/15/55/65.
*
- * Copyright (C) 2002-2005 Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
+ * Copyright (C) 2002-2005 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
diff --git a/arch/mips/vr41xx/common/bcu.c b/arch/mips/vr41xx/common/bcu.c
index cdfa4273a1c..de0c1b35f11 100644
--- a/arch/mips/vr41xx/common/bcu.c
+++ b/arch/mips/vr41xx/common/bcu.c
@@ -3,7 +3,7 @@
*
* Copyright (C) 2002 MontaVista Software Inc.
* Author: Yoichi Yuasa <yyuasa@mvista.com, or source@mvista.com>
- * Copyright (C) 2003-2005 Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
+ * Copyright (C) 2003-2005 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -25,7 +25,7 @@
* - New creation, NEC VR4122 and VR4131 are supported.
* - Added support for NEC VR4111 and VR4121.
*
- * Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
+ * Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
* - Added support for NEC VR4133.
*/
#include <linux/kernel.h>
diff --git a/arch/mips/vr41xx/common/cmu.c b/arch/mips/vr41xx/common/cmu.c
index d758e432961..657c5133c93 100644
--- a/arch/mips/vr41xx/common/cmu.c
+++ b/arch/mips/vr41xx/common/cmu.c
@@ -3,7 +3,7 @@
*
* Copyright (C) 2001-2002 MontaVista Software Inc.
* Author: Yoichi Yuasa <yyuasa@mvista.com or source@mvista.com>
- * Copuright (C) 2003-2005 Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
+ * Copuright (C) 2003-2005 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -25,7 +25,7 @@
* - New creation, NEC VR4122 and VR4131 are supported.
* - Added support for NEC VR4111 and VR4121.
*
- * Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
+ * Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
* - Added support for NEC VR4133.
*/
#include <linux/init.h>
diff --git a/arch/mips/vr41xx/common/icu.c b/arch/mips/vr41xx/common/icu.c
index 0b73c5ab3c0..07ae19cf0c2 100644
--- a/arch/mips/vr41xx/common/icu.c
+++ b/arch/mips/vr41xx/common/icu.c
@@ -3,7 +3,7 @@
*
* Copyright (C) 2001-2002 MontaVista Software Inc.
* Author: Yoichi Yuasa <yyuasa@mvista.com or source@mvista.com>
- * Copyright (C) 2003-2005 Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
+ * Copyright (C) 2003-2005 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -25,7 +25,7 @@
* - New creation, NEC VR4122 and VR4131 are supported.
* - Added support for NEC VR4111 and VR4121.
*
- * Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
+ * Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
* - Coped with INTASSIGN of NEC VR4133.
*/
#include <linux/errno.h>
diff --git a/arch/mips/vr41xx/common/init.c b/arch/mips/vr41xx/common/init.c
index 578f6496ffd..707bd0933ee 100644
--- a/arch/mips/vr41xx/common/init.c
+++ b/arch/mips/vr41xx/common/init.c
@@ -1,7 +1,7 @@
/*
* init.c, Common initialization routines for NEC VR4100 series.
*
- * Copyright (C) 2003-2005 Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
+ * Copyright (C) 2003-2005 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
diff --git a/arch/mips/vr41xx/common/int-handler.S b/arch/mips/vr41xx/common/int-handler.S
index 272c13aee4f..2b6043f16d0 100644
--- a/arch/mips/vr41xx/common/int-handler.S
+++ b/arch/mips/vr41xx/common/int-handler.S
@@ -35,7 +35,7 @@
* MontaVista Software Inc. <yyuasa@mvista.com> or <source@mvista.com>
* - New creation, NEC VR4100 series are supported.
*
- * Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
+ * Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
* - Coped with INTASSIGN of NEC VR4133.
*/
#include <asm/asm.h>
diff --git a/arch/mips/vr41xx/common/irq.c b/arch/mips/vr41xx/common/irq.c
index 43b214d3943..61aa264275f 100644
--- a/arch/mips/vr41xx/common/irq.c
+++ b/arch/mips/vr41xx/common/irq.c
@@ -1,7 +1,7 @@
/*
* Interrupt handing routines for NEC VR4100 series.
*
- * Copyright (C) 2005 Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
+ * Copyright (C) 2005 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
diff --git a/arch/mips/vr41xx/common/pmu.c b/arch/mips/vr41xx/common/pmu.c
index 53166f3598b..02bf4f7d06b 100644
--- a/arch/mips/vr41xx/common/pmu.c
+++ b/arch/mips/vr41xx/common/pmu.c
@@ -1,7 +1,7 @@
/*
* pmu.c, Power Management Unit routines for NEC VR4100 series.
*
- * Copyright (C) 2003-2005 Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
+ * Copyright (C) 2003-2005 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
diff --git a/arch/mips/vr41xx/common/type.c b/arch/mips/vr41xx/common/type.c
index bcb5f71b502..e0c1ac5e988 100644
--- a/arch/mips/vr41xx/common/type.c
+++ b/arch/mips/vr41xx/common/type.c
@@ -1,7 +1,7 @@
/*
* type.c, System type for NEC VR4100 series.
*
- * Copyright (C) 2005 Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
+ * Copyright (C) 2005 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
diff --git a/arch/mips/vr41xx/common/vrc4173.c b/arch/mips/vr41xx/common/vrc4173.c
index 462a9af30ee..3e31f8193d2 100644
--- a/arch/mips/vr41xx/common/vrc4173.c
+++ b/arch/mips/vr41xx/common/vrc4173.c
@@ -3,7 +3,7 @@
*
* Copyright (C) 2001-2003 MontaVista Software Inc.
* Author: Yoichi Yuasa <yyuasa@mvista.com, or source@mvista.com>
- * Copyright (C) 2004 Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
+ * Copyright (C) 2004 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
* Copyright (C) 2005 Ralf Baechle (ralf@linux-mips.org)
*
* This program is free software; you can redistribute it and/or modify
@@ -561,7 +561,7 @@ static int __devinit vrc4173_init(void)
{
int err;
- err = pci_module_init(&vrc4173_driver);
+ err = pci_register_driver(&vrc4173_driver);
if (err < 0)
return err;
diff --git a/arch/mips/vr41xx/ibm-workpad/setup.c b/arch/mips/vr41xx/ibm-workpad/setup.c
index e4b34ad6ea6..50fe8af4c52 100644
--- a/arch/mips/vr41xx/ibm-workpad/setup.c
+++ b/arch/mips/vr41xx/ibm-workpad/setup.c
@@ -1,7 +1,7 @@
/*
* setup.c, Setup for the IBM WorkPad z50.
*
- * Copyright (C) 2002-2005 Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
+ * Copyright (C) 2002-2005 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by