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-rw-r--r--arch/mips/dec/time.c4
-rw-r--r--arch/mips/jmr3927/rbhma3100/setup.c4
-rw-r--r--arch/mips/kernel/time.c42
-rw-r--r--arch/mips/sgi-ip27/ip27-timer.c4
-rw-r--r--arch/mips/sibyte/bcm1480/time.c4
-rw-r--r--arch/mips/sibyte/sb1250/time.c8
6 files changed, 28 insertions, 38 deletions
diff --git a/arch/mips/dec/time.c b/arch/mips/dec/time.c
index 69e424e9ab6..8b7e0c17ac3 100644
--- a/arch/mips/dec/time.c
+++ b/arch/mips/dec/time.c
@@ -151,7 +151,7 @@ static void dec_timer_ack(void)
CMOS_READ(RTC_REG_C); /* Ack the RTC interrupt. */
}
-static unsigned int dec_ioasic_hpt_read(void)
+static cycle_t dec_ioasic_hpt_read(void)
{
/*
* The free-running counter is 32-bit which is good for about
@@ -171,7 +171,7 @@ void __init dec_time_init(void)
if (!cpu_has_counter && IOASIC)
/* For pre-R4k systems we use the I/O ASIC's counter. */
- mips_hpt_read = dec_ioasic_hpt_read;
+ clocksource_mips.read = dec_ioasic_hpt_read;
/* Set up the rate of periodic DS1287 interrupts. */
CMOS_WRITE(RTC_REF_CLCK_32KHZ | (16 - __ffs(HZ)), RTC_REG_A);
diff --git a/arch/mips/jmr3927/rbhma3100/setup.c b/arch/mips/jmr3927/rbhma3100/setup.c
index 16e5dfe7aa8..138f25efe38 100644
--- a/arch/mips/jmr3927/rbhma3100/setup.c
+++ b/arch/mips/jmr3927/rbhma3100/setup.c
@@ -170,7 +170,7 @@ static void jmr3927_machine_power_off(void)
while (1);
}
-static unsigned int jmr3927_hpt_read(void)
+static cycle_t jmr3927_hpt_read(void)
{
/* We assume this function is called xtime_lock held. */
return jiffies * (JMR3927_TIMER_CLK / HZ) + jmr3927_tmrptr->trr;
@@ -182,7 +182,7 @@ extern void rtc_ds1742_init(unsigned long base);
#endif
static void __init jmr3927_time_init(void)
{
- mips_hpt_read = jmr3927_hpt_read;
+ clocksource_mips.read = jmr3927_hpt_read;
mips_hpt_frequency = JMR3927_TIMER_CLK;
#ifdef USE_RTC_DS1742
if (jmr3927_have_nvram()) {
diff --git a/arch/mips/kernel/time.c b/arch/mips/kernel/time.c
index 111d1baa3b2..11aab6d6bfe 100644
--- a/arch/mips/kernel/time.c
+++ b/arch/mips/kernel/time.c
@@ -11,7 +11,6 @@
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
-#include <linux/clocksource.h>
#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/init.h>
@@ -83,7 +82,7 @@ static void null_timer_ack(void) { /* nothing */ }
/*
* Null high precision timer functions for systems lacking one.
*/
-static unsigned int null_hpt_read(void)
+static cycle_t null_hpt_read(void)
{
return 0;
}
@@ -112,7 +111,7 @@ static void c0_timer_ack(void)
/*
* High precision timer functions for a R4k-compatible timer.
*/
-static unsigned int c0_hpt_read(void)
+static cycle_t c0_hpt_read(void)
{
return read_c0_count();
}
@@ -126,8 +125,6 @@ static void __init c0_hpt_timer_init(void)
int (*mips_timer_state)(void);
void (*mips_timer_ack)(void);
-unsigned int (*mips_hpt_read)(void);
-unsigned int mips_hpt_mask = 0xffffffff;
/* last time when xtime and rtc are sync'ed up */
static long last_rtc_update;
@@ -269,8 +266,7 @@ static struct irqaction timer_irqaction = {
static unsigned int __init calibrate_hpt(void)
{
- u64 frequency;
- u32 hpt_start, hpt_end, hpt_count, hz;
+ cycle_t frequency, hpt_start, hpt_end, hpt_count, hz;
const int loops = HZ / 10;
int log_2_loops = 0;
@@ -296,28 +292,23 @@ static unsigned int __init calibrate_hpt(void)
* during the calculated number of periods between timer
* interrupts.
*/
- hpt_start = mips_hpt_read();
+ hpt_start = clocksource_mips.read();
do {
while (mips_timer_state());
while (!mips_timer_state());
} while (--i);
- hpt_end = mips_hpt_read();
+ hpt_end = clocksource_mips.read();
- hpt_count = (hpt_end - hpt_start) & mips_hpt_mask;
+ hpt_count = (hpt_end - hpt_start) & clocksource_mips.mask;
hz = HZ;
- frequency = (u64)hpt_count * (u64)hz;
+ frequency = hpt_count * hz;
return frequency >> log_2_loops;
}
-static cycle_t read_mips_hpt(void)
-{
- return (cycle_t)mips_hpt_read();
-}
-
-static struct clocksource clocksource_mips = {
+struct clocksource clocksource_mips = {
.name = "MIPS",
- .read = read_mips_hpt,
+ .mask = 0xffffffff,
.is_continuous = 1,
};
@@ -326,7 +317,7 @@ static void __init init_mips_clocksource(void)
u64 temp;
u32 shift;
- if (!mips_hpt_frequency || mips_hpt_read == null_hpt_read)
+ if (!mips_hpt_frequency || clocksource_mips.read == null_hpt_read)
return;
/* Calclate a somewhat reasonable rating value */
@@ -340,7 +331,6 @@ static void __init init_mips_clocksource(void)
}
clocksource_mips.shift = shift;
clocksource_mips.mult = (u32)temp;
- clocksource_mips.mask = mips_hpt_mask;
clocksource_register(&clocksource_mips);
}
@@ -360,19 +350,19 @@ void __init time_init(void)
-xtime.tv_sec, -xtime.tv_nsec);
/* Choose appropriate high precision timer routines. */
- if (!cpu_has_counter && !mips_hpt_read)
+ if (!cpu_has_counter && !clocksource_mips.read)
/* No high precision timer -- sorry. */
- mips_hpt_read = null_hpt_read;
+ clocksource_mips.read = null_hpt_read;
else if (!mips_hpt_frequency && !mips_timer_state) {
/* A high precision timer of unknown frequency. */
- if (!mips_hpt_read)
+ if (!clocksource_mips.read)
/* No external high precision timer -- use R4k. */
- mips_hpt_read = c0_hpt_read;
+ clocksource_mips.read = c0_hpt_read;
} else {
/* We know counter frequency. Or we can get it. */
- if (!mips_hpt_read) {
+ if (!clocksource_mips.read) {
/* No external high precision timer -- use R4k. */
- mips_hpt_read = c0_hpt_read;
+ clocksource_mips.read = c0_hpt_read;
if (!mips_timer_state) {
/* No external timer interrupt -- use R4k. */
diff --git a/arch/mips/sgi-ip27/ip27-timer.c b/arch/mips/sgi-ip27/ip27-timer.c
index e5441c3a0b0..7d361726bbf 100644
--- a/arch/mips/sgi-ip27/ip27-timer.c
+++ b/arch/mips/sgi-ip27/ip27-timer.c
@@ -223,14 +223,14 @@ void __init plat_timer_setup(struct irqaction *irq)
setup_irq(irqno, &rt_irqaction);
}
-static unsigned int ip27_hpt_read(void)
+static cycle_t ip27_hpt_read(void)
{
return REMOTE_HUB_L(cputonasid(0), PI_RT_COUNT);
}
void __init ip27_time_init(void)
{
- mips_hpt_read = ip27_hpt_read;
+ clocksource_mips.read = ip27_hpt_read;
mips_hpt_frequency = CYCLES_PER_SEC;
xtime.tv_sec = get_m48t35_time();
xtime.tv_nsec = 0;
diff --git a/arch/mips/sibyte/bcm1480/time.c b/arch/mips/sibyte/bcm1480/time.c
index 03d5822d3a7..6f3f71bf424 100644
--- a/arch/mips/sibyte/bcm1480/time.c
+++ b/arch/mips/sibyte/bcm1480/time.c
@@ -117,7 +117,7 @@ void bcm1480_timer_interrupt(void)
}
}
-static unsigned int bcm1480_hpt_read(void)
+static cycle_t bcm1480_hpt_read(void)
{
/* We assume this function is called xtime_lock held. */
unsigned long count =
@@ -127,6 +127,6 @@ static unsigned int bcm1480_hpt_read(void)
void __init bcm1480_hpt_setup(void)
{
- mips_hpt_read = bcm1480_hpt_read;
+ clocksource_mips.read = bcm1480_hpt_read;
mips_hpt_frequency = BCM1480_HPT_VALUE;
}
diff --git a/arch/mips/sibyte/sb1250/time.c b/arch/mips/sibyte/sb1250/time.c
index bcb74f2c194..2efffe15ff2 100644
--- a/arch/mips/sibyte/sb1250/time.c
+++ b/arch/mips/sibyte/sb1250/time.c
@@ -51,7 +51,7 @@
extern int sb1250_steal_irq(int irq);
-static unsigned int sb1250_hpt_read(void);
+static cycle_t sb1250_hpt_read(void);
void __init sb1250_hpt_setup(void)
{
@@ -66,8 +66,8 @@ void __init sb1250_hpt_setup(void)
IOADDR(A_SCD_TIMER_REGISTER(SB1250_HPT_NUM, R_SCD_TIMER_CFG)));
mips_hpt_frequency = V_SCD_TIMER_FREQ;
- mips_hpt_read = sb1250_hpt_read;
- mips_hpt_mask = M_SCD_TIMER_INIT;
+ clocksource_mips.read = sb1250_hpt_read;
+ clocksource_mips.mask = M_SCD_TIMER_INIT;
}
}
@@ -143,7 +143,7 @@ void sb1250_timer_interrupt(void)
* The HPT is free running from SB1250_HPT_VALUE down to 0 then starts over
* again.
*/
-static unsigned int sb1250_hpt_read(void)
+static cycle_t sb1250_hpt_read(void)
{
unsigned int count;
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-10 13:31:14 +0000