aboutsummaryrefslogtreecommitdiff
path: root/arch/powerpc/boot/dts
diff options
context:
space:
mode:
Diffstat (limited to 'arch/powerpc/boot/dts')
-rw-r--r--arch/powerpc/boot/dts/mpc8541cds.dts36
-rw-r--r--arch/powerpc/boot/dts/mpc8555cds.dts36
2 files changed, 72 insertions, 0 deletions
diff --git a/arch/powerpc/boot/dts/mpc8541cds.dts b/arch/powerpc/boot/dts/mpc8541cds.dts
index 6633e07d9f4..f3f4d79deb6 100644
--- a/arch/powerpc/boot/dts/mpc8541cds.dts
+++ b/arch/powerpc/boot/dts/mpc8541cds.dts
@@ -145,6 +145,42 @@
device_type = "open-pic";
big-endian;
};
+
+ cpm@919c0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "fsl,mpc8541-cpm", "fsl,cpm2";
+ reg = <919c0 30>;
+ ranges;
+
+ muram@80000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 80000 10000>;
+
+ data@0 {
+ compatible = "fsl,cpm-muram-data";
+ reg = <0 2000 9000 1000>;
+ };
+ };
+
+ brg@919f0 {
+ compatible = "fsl,mpc8541-brg",
+ "fsl,cpm2-brg",
+ "fsl,cpm-brg";
+ reg = <919f0 10 915f0 10>;
+ };
+
+ cpmpic: pic@90c00 {
+ interrupt-controller;
+ #address-cells = <0>;
+ #interrupt-cells = <2>;
+ interrupts = <2e 2>;
+ interrupt-parent = <&mpic>;
+ reg = <90c00 80>;
+ compatible = "fsl,mpc8541-cpm-pic", "fsl,cpm2-pic";
+ };
+ };
};
pci1: pci@e0008000 {
diff --git a/arch/powerpc/boot/dts/mpc8555cds.dts b/arch/powerpc/boot/dts/mpc8555cds.dts
index 99199295147..57029cca32b 100644
--- a/arch/powerpc/boot/dts/mpc8555cds.dts
+++ b/arch/powerpc/boot/dts/mpc8555cds.dts
@@ -145,6 +145,42 @@
device_type = "open-pic";
big-endian;
};
+
+ cpm@919c0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "fsl,mpc8555-cpm", "fsl,cpm2";
+ reg = <919c0 30>;
+ ranges;
+
+ muram@80000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 80000 10000>;
+
+ data@0 {
+ compatible = "fsl,cpm-muram-data";
+ reg = <0 2000 9000 1000>;
+ };
+ };
+
+ brg@919f0 {
+ compatible = "fsl,mpc8555-brg",
+ "fsl,cpm2-brg",
+ "fsl,cpm-brg";
+ reg = <919f0 10 915f0 10>;
+ };
+
+ cpmpic: pic@90c00 {
+ interrupt-controller;
+ #address-cells = <0>;
+ #interrupt-cells = <2>;
+ interrupts = <2e 2>;
+ interrupt-parent = <&mpic>;
+ reg = <90c00 80>;
+ compatible = "fsl,mpc8555-cpm-pic", "fsl,cpm2-pic";
+ };
+ };
};
pci1: pci@e0008000 {