diff options
Diffstat (limited to 'arch/powerpc/boot')
28 files changed, 2094 insertions, 34 deletions
diff --git a/arch/powerpc/boot/.gitignore b/arch/powerpc/boot/.gitignore index b160322a87a..5ef2bdf8d18 100644 --- a/arch/powerpc/boot/.gitignore +++ b/arch/powerpc/boot/.gitignore @@ -31,6 +31,7 @@ zImage.*lds zImage.miboot zImage.pmac zImage.pseries +zImage.redboot* zImage.sandpoint zImage.vmode zconf.h diff --git a/arch/powerpc/boot/Makefile b/arch/powerpc/boot/Makefile index d1e625c073b..1e20aca48f4 100644 --- a/arch/powerpc/boot/Makefile +++ b/arch/powerpc/boot/Makefile @@ -57,12 +57,12 @@ src-wlib := string.S crt0.S stdio.c main.c \ 4xx.c ebony.c mv64x60.c mpsc.c mv64x60_i2c.c cuboot.c bamboo.c \ cpm-serial.c stdlib.c mpc52xx-psc.c planetcore.c uartlite.c \ fsl-soc.c mpc8xx.c pq2.c -src-plat := of.c cuboot-52xx.c cuboot-83xx.c cuboot-85xx.c holly.c \ +src-plat := of.c cuboot-52xx.c cuboot-824x.c cuboot-83xx.c cuboot-85xx.c holly.c \ cuboot-ebony.c treeboot-ebony.c prpmc2800.c \ ps3-head.S ps3-hvcall.S ps3.c treeboot-bamboo.c cuboot-8xx.c \ cuboot-pq2.c cuboot-sequoia.c treeboot-walnut.c cuboot-bamboo.c \ fixed-head.S ep88xc.c cuboot-hpc2.c ep405.c cuboot-taishan.c \ - cuboot-katmai.c cuboot-rainier.c + cuboot-katmai.c cuboot-rainier.c redboot-8xx.c ep8248e.c src-boot := $(src-wlib) $(src-plat) empty.c src-boot := $(addprefix $(obj)/, $(src-boot)) @@ -195,7 +195,9 @@ image-$(CONFIG_PPC_8xx) += cuImage.8xx image-$(CONFIG_PPC_EP88XC) += zImage.ep88xc image-$(CONFIG_EP405) += zImage.ep405 image-$(CONFIG_8260) += cuImage.pq2 +image-$(CONFIG_EP8248E) += zImage.ep8248e image-$(CONFIG_PPC_MPC52xx) += cuImage.52xx +image-$(CONFIG_STORCENTER) += cuImage.824x image-$(CONFIG_PPC_83xx) += cuImage.83xx image-$(CONFIG_PPC_85xx) += cuImage.85xx image-$(CONFIG_MPC7448HPC2) += cuImage.hpc2 @@ -208,6 +210,10 @@ image-$(CONFIG_TAISHAN) += cuImage.taishan image-$(CONFIG_KATMAI) += cuImage.katmai endif +ifneq ($(CONFIG_REDBOOT),"") +image-$(CONFIG_PPC_8xx) += zImage.redboot-8xx +endif + # For 32-bit powermacs, build the COFF and miboot images # as well as the ELF images. ifeq ($(CONFIG_PPC32),y) diff --git a/arch/powerpc/boot/cuboot-824x.c b/arch/powerpc/boot/cuboot-824x.c new file mode 100644 index 00000000000..ced90c53de4 --- /dev/null +++ b/arch/powerpc/boot/cuboot-824x.c @@ -0,0 +1,53 @@ +/* + * Old U-boot compatibility for 824x + * + * Copyright (c) 2007 Freescale Semiconductor, Inc. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + */ + +#include "ops.h" +#include "stdio.h" +#include "cuboot.h" + +#define TARGET_824x +#include "ppcboot.h" + +static bd_t bd; + + +static void platform_fixups(void) +{ + void *soc; + + dt_fixup_memory(bd.bi_memstart, bd.bi_memsize); + dt_fixup_mac_addresses(bd.bi_enetaddr); + dt_fixup_cpu_clocks(bd.bi_intfreq, bd.bi_busfreq / 4, bd.bi_busfreq); + + soc = find_node_by_devtype(NULL, "soc"); + if (soc) { + void *serial = NULL; + + setprop(soc, "bus-frequency", &bd.bi_busfreq, + sizeof(bd.bi_busfreq)); + + while ((serial = find_node_by_devtype(serial, "serial"))) { + if (get_parent(serial) != soc) + continue; + + setprop(serial, "clock-frequency", &bd.bi_busfreq, + sizeof(bd.bi_busfreq)); + } + } +} + +void platform_init(unsigned long r3, unsigned long r4, unsigned long r5, + unsigned long r6, unsigned long r7) +{ + CUBOOT_INIT(); + fdt_init(_dtb_start); + serial_console_init(); + platform_ops.fixups = platform_fixups; +} diff --git a/arch/powerpc/boot/cuboot-83xx.c b/arch/powerpc/boot/cuboot-83xx.c index acd860ed739..61af1c1e825 100644 --- a/arch/powerpc/boot/cuboot-83xx.c +++ b/arch/powerpc/boot/cuboot-83xx.c @@ -24,7 +24,8 @@ static void platform_fixups(void) void *soc; dt_fixup_memory(bd.bi_memstart, bd.bi_memsize); - dt_fixup_mac_addresses(bd.bi_enetaddr, bd.bi_enet1addr); + dt_fixup_mac_address_by_alias("ethernet0", bd.bi_enetaddr); + dt_fixup_mac_address_by_alias("ethernet1", bd.bi_enet1addr); dt_fixup_cpu_clocks(bd.bi_intfreq, bd.bi_busfreq / 4, bd.bi_busfreq); /* Unfortunately, the specific model number is encoded in the diff --git a/arch/powerpc/boot/cuboot-85xx.c b/arch/powerpc/boot/cuboot-85xx.c index 943779ed19b..6776a1a29f1 100644 --- a/arch/powerpc/boot/cuboot-85xx.c +++ b/arch/powerpc/boot/cuboot-85xx.c @@ -24,8 +24,9 @@ static void platform_fixups(void) void *soc; dt_fixup_memory(bd.bi_memstart, bd.bi_memsize); - dt_fixup_mac_addresses(bd.bi_enetaddr, bd.bi_enet1addr, - bd.bi_enet2addr); + dt_fixup_mac_address_by_alias("ethernet0", bd.bi_enetaddr); + dt_fixup_mac_address_by_alias("ethernet1", bd.bi_enet1addr); + dt_fixup_mac_address_by_alias("ethernet2", bd.bi_enet2addr); dt_fixup_cpu_clocks(bd.bi_intfreq, bd.bi_busfreq / 8, bd.bi_busfreq); /* Unfortunately, the specific model number is encoded in the diff --git a/arch/powerpc/boot/devtree.c b/arch/powerpc/boot/devtree.c index e5dfe449731..60f561e307a 100644 --- a/arch/powerpc/boot/devtree.c +++ b/arch/powerpc/boot/devtree.c @@ -88,6 +88,20 @@ void dt_fixup_clock(const char *path, u32 freq) } } +void dt_fixup_mac_address_by_alias(const char *alias, const u8 *addr) +{ + void *devp = find_node_by_alias(alias); + + if (devp) { + printf("%s: local-mac-address <-" + " %02x:%02x:%02x:%02x:%02x:%02x\n\r", alias, + addr[0], addr[1], addr[2], + addr[3], addr[4], addr[5]); + + setprop(devp, "local-mac-address", addr, 6); + } +} + void dt_fixup_mac_address(u32 index, const u8 *addr) { void *devp = find_node_by_prop_value(NULL, "linux,network-index", diff --git a/arch/powerpc/boot/dts/adder875-redboot.dts b/arch/powerpc/boot/dts/adder875-redboot.dts new file mode 100644 index 00000000000..930bfb3894e --- /dev/null +++ b/arch/powerpc/boot/dts/adder875-redboot.dts @@ -0,0 +1,184 @@ +/* + * Device Tree Source for MPC885 ADS running RedBoot + * + * Copyright 2006 MontaVista Software, Inc. + * Copyright 2007 Freescale Semiconductor, Inc. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ + +/dts-v1/; +/ { + model = "Analogue & Micro Adder MPC875"; + compatible = "analogue-and-micro,adder875"; + #address-cells = <1>; + #size-cells = <1>; + + aliases { + console = &console; + ethernet0 = ð0; + ethernet1 = ð1; + }; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + PowerPC,875@0 { + device_type = "cpu"; + reg = <0>; + d-cache-line-size = <16>; + i-cache-line-size = <16>; + d-cache-size = <8192>; + i-cache-size = <8192>; + timebase-frequency = <0>; + bus-frequency = <0>; + clock-frequency = <0>; + interrupts = <15 2>; // decrementer interrupt + interrupt-parent = <&PIC>; + }; + }; + + memory { + device_type = "memory"; + reg = <0 0x01000000>; + }; + + localbus@fa200100 { + compatible = "fsl,mpc885-localbus", "fsl,pq1-localbus", + "simple-bus"; + #address-cells = <2>; + #size-cells = <1>; + reg = <0xfa200100 0x40>; + + ranges = < + 0 0 0xfe000000 0x00800000 + 2 0 0xfa100000 0x00008000 + >; + + flash@0,0 { + compatible = "cfi-flash"; + reg = <0 0 0x800000>; + bank-width = <2>; + device-width = <2>; + }; + }; + + soc@fa200000 { + compatible = "fsl,mpc875-immr", "fsl,pq1-soc", "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0xfa200000 0x00004000>; + + // Temporary until code stops depending on it. + device_type = "soc"; + + // Temporary until get_immrbase() is fixed. + reg = <0xfa200000 0x4000>; + + mdio@e00 { + compatible = "fsl,mpc875-fec-mdio", "fsl,pq1-fec-mdio"; + reg = <0xe00 0x188>; + #address-cells = <1>; + #size-cells = <0>; + + PHY0: ethernet-phy@0 { + reg = <0>; + device_type = "ethernet-phy"; + }; + + PHY1: ethernet-phy@1 { + reg = <1>; + device_type = "ethernet-phy"; + }; + }; + + eth0: ethernet@e00 { + device_type = "network"; + compatible = "fsl,mpc875-fec-enet", + "fsl,pq1-fec-enet"; + reg = <0xe00 0x188>; + local-mac-address = [ 00 00 00 00 00 00 ]; + interrupts = <3 1>; + interrupt-parent = <&PIC>; + phy-handle = <&PHY0>; + linux,network-index = <0>; + }; + + eth1: ethernet@1e00 { + device_type = "network"; + compatible = "fsl,mpc875-fec-enet", + "fsl,pq1-fec-enet"; + reg = <0x1e00 0x188>; + local-mac-address = [ 00 00 00 00 00 00 ]; + interrupts = <7 1>; + interrupt-parent = <&PIC>; + phy-handle = <&PHY1>; + linux,network-index = <1>; + }; + + PIC: interrupt-controller@0 { + interrupt-controller; + #interrupt-cells = <2>; + reg = <0 0x24>; + compatible = "fsl,mpc875-pic", "fsl,pq1-pic"; + }; + + cpm@9c0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "fsl,mpc875-cpm", "fsl,cpm1", "simple-bus"; + interrupts = <0>; // cpm error interrupt + interrupt-parent = <&CPM_PIC>; + reg = <0x9c0 0x40>; + ranges; + + muram { + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x2000 0x2000>; + + data@0 { + compatible = "fsl,cpm-muram-data"; + reg = <0 0x1c00>; + }; + }; + + brg@9f0 { + compatible = "fsl,mpc875-brg", + "fsl,cpm1-brg", + "fsl,cpm-brg"; + reg = <0x9f0 0x10>; + }; + + CPM_PIC: interrupt-controller@930 { + interrupt-controller; + #interrupt-cells = <1>; + interrupts = <5 2 0 2>; + interrupt-parent = <&PIC>; + reg = <0x930 0x20>; + compatible = "fsl,mpc875-cpm-pic", + "fsl,cpm1-pic"; + }; + + console: serial@a80 { + device_type = "serial"; + compatible = "fsl,mpc875-smc-uart", + "fsl,cpm1-smc-uart"; + reg = <0xa80 0x10 0x3e80 0x40>; + interrupts = <4>; + interrupt-parent = <&CPM_PIC>; + fsl,cpm-brg = <1>; + fsl,cpm-command = <0x0090>; + current-speed = <115200>; + }; + }; + }; + + chosen { + linux,stdout-path = &console; + }; +}; diff --git a/arch/powerpc/boot/dts/adder875-uboot.dts b/arch/powerpc/boot/dts/adder875-uboot.dts new file mode 100644 index 00000000000..0197242dacf --- /dev/null +++ b/arch/powerpc/boot/dts/adder875-uboot.dts @@ -0,0 +1,183 @@ +/* + * Device Tree Source for MPC885 ADS running U-Boot + * + * Copyright 2006 MontaVista Software, Inc. + * Copyright 2007 Freescale Semiconductor, Inc. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ + +/dts-v1/; +/ { + model = "Analogue & Micro Adder MPC875"; + compatible = "analogue-and-micro,adder875"; + #address-cells = <1>; + #size-cells = <1>; + + aliases { + console = &console; + ethernet0 = ð0; + ethernet1 = ð1; + }; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + PowerPC,875@0 { + device_type = "cpu"; + reg = <0>; + d-cache-line-size = <16>; + i-cache-line-size = <16>; + d-cache-size = <8192>; + i-cache-size = <8192>; + timebase-frequency = <0>; + bus-frequency = <0>; + clock-frequency = <0>; + interrupts = <15 2>; // decrementer interrupt + interrupt-parent = <&PIC>; + }; + }; + + memory { + device_type = "memory"; + reg = <0 0x01000000>; + }; + + localbus@ff000100 { + compatible = "fsl,mpc885-localbus", "fsl,pq1-localbus", + "simple-bus"; + #address-cells = <2>; + #size-cells = <1>; + reg = <0xff000100 0x40>; + + ranges = < + 0 0 0xfe000000 0x01000000 + >; + + flash@0,0 { + compatible = "cfi-flash"; + reg = <0 0 0x800000>; + bank-width = <2>; + device-width = <2>; + }; + }; + + soc@ff000000 { + compatible = "fsl,mpc875-immr", "fsl,pq1-soc", "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0xff000000 0x00004000>; + + // Temporary until code stops depending on it. + device_type = "soc"; + + // Temporary until get_immrbase() is fixed. + reg = <0xff000000 0x4000>; + + mdio@e00 { + compatible = "fsl,mpc875-fec-mdio", "fsl,pq1-fec-mdio"; + reg = <0xe00 0x188>; + #address-cells = <1>; + #size-cells = <0>; + + PHY0: ethernet-phy@0 { + reg = <0>; + device_type = "ethernet-phy"; + }; + + PHY1: ethernet-phy@1 { + reg = <1>; + device_type = "ethernet-phy"; + }; + }; + + eth0: ethernet@e00 { + device_type = "network"; + compatible = "fsl,mpc875-fec-enet", + "fsl,pq1-fec-enet"; + reg = <0xe00 0x188>; + local-mac-address = [ 00 00 00 00 00 00 ]; + interrupts = <3 1>; + interrupt-parent = <&PIC>; + phy-handle = <&PHY0>; + linux,network-index = <0>; + }; + + eth1: ethernet@1e00 { + device_type = "network"; + compatible = "fsl,mpc875-fec-enet", + "fsl,pq1-fec-enet"; + reg = <0x1e00 0x188>; + local-mac-address = [ 00 00 00 00 00 00 ]; + interrupts = <7 1>; + interrupt-parent = <&PIC>; + phy-handle = <&PHY1>; + linux,network-index = <1>; + }; + + PIC: interrupt-controller@0 { + interrupt-controller; + #interrupt-cells = <2>; + reg = <0 0x24>; + compatible = "fsl,mpc875-pic", "fsl,pq1-pic"; + }; + + cpm@9c0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "fsl,mpc875-cpm", "fsl,cpm1", "simple-bus"; + interrupts = <0>; // cpm error interrupt + interrupt-parent = <&CPM_PIC>; + reg = <0x9c0 0x40>; + ranges; + + muram { + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x2000 0x2000>; + + data@0 { + compatible = "fsl,cpm-muram-data"; + reg = <0 0x1c00>; + }; + }; + + brg@9f0 { + compatible = "fsl,mpc875-brg", + "fsl,cpm1-brg", + "fsl,cpm-brg"; + reg = <0x9f0 0x10>; + }; + + CPM_PIC: interrupt-controller@930 { + interrupt-controller; + #interrupt-cells = <1>; + interrupts = <5 2 0 2>; + interrupt-parent = <&PIC>; + reg = <0x930 0x20>; + compatible = "fsl,mpc875-cpm-pic", + "fsl,cpm1-pic"; + }; + + console: serial@a80 { + device_type = "serial"; + compatible = "fsl,mpc875-smc-uart", + "fsl,cpm1-smc-uart"; + reg = <0xa80 0x10 0x3e80 0x40>; + interrupts = <4>; + interrupt-parent = <&CPM_PIC>; + fsl,cpm-brg = <1>; + fsl,cpm-command = <0x0090>; + current-speed = <115200>; + }; + }; + }; + + chosen { + linux,stdout-path = &console; + }; +}; diff --git a/arch/powerpc/boot/dts/ep8248e.dts b/arch/powerpc/boot/dts/ep8248e.dts new file mode 100644 index 00000000000..5d2fb76a72c --- /dev/null +++ b/arch/powerpc/boot/dts/ep8248e.dts @@ -0,0 +1,207 @@ +/* + * Device Tree for the Embedded Planet EP8248E board running PlanetCore. + * + * Copyright 2007 Freescale Semiconductor Inc. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ + +/dts-v1/; +/ { + model = "EP8248E"; + compatible = "fsl,ep8248e"; + #address-cells = <1>; + #size-cells = <1>; + + aliases { + planetcore-SMC1 = &smc1; + planetcore-SCC1 = &scc1; + ethernet0 = ð0; + ethernet1 = ð1; + serial0 = &smc1; + serial1 = &scc1; + }; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + PowerPC,8248@0 { + device_type = "cpu"; + reg = <0>; + d-cache-line-size = <32>; + i-cache-line-size = <32>; + d-cache-size = <16384>; + i-cache-size = <16384>; + timebase-frequency = <0>; + clock-frequency = <0>; + }; + }; + + localbus@f0010100 { + compatible = "fsl,mpc8248-localbus", + "fsl,pq2-localbus", + "simple-bus"; + #address-cells = <2>; + #size-cells = <1>; + reg = <0xf0010100 0x40>; + + ranges = <0 0 0xfc000000 0x04000000 + 1 0 0xfa000000 0x00008000>; + + flash@0,3800000 { + compatible = "cfi-flash"; + reg = <0 0x3800000 0x800000>; + bank-width = <4>; + device-width = <2>; + }; + + bcsr@1,0 { + #address-cells = <2>; + #size-cells = <1>; + reg = <1 0 0x10>; + compatible = "fsl,ep8248e-bcsr"; + ranges; + + mdio { + device_type = "mdio"; + compatible = "fsl,ep8248e-mdio-bitbang"; + #address-cells = <1>; + #size-cells = <0>; + reg = <1 8 1>; + + PHY0: ethernet-phy@0 { + interrupt-parent = <&PIC>; + reg = <0>; + device_type = "ethernet-phy"; + }; + + PHY1: ethernet-phy@1 { + interrupt-parent = <&PIC>; + reg = <1>; + device_type = "ethernet-phy"; + }; + }; + }; + }; + + memory { + device_type = "memory"; + reg = <0 0>; + }; + + soc@f0000000 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "fsl,mpc8248-immr", "fsl,pq2-soc", "simple-bus"; + ranges = <0x00000000 0xf0000000 0x00053000>; + + // Temporary until code stops depending on it. + device_type = "soc"; + + // Temporary -- will go away once kernel uses ranges for get_immrbase(). + reg = <0xf0000000 0x00053000>; + + cpm@119c0 { + #address-cells = <1>; + #size-cells = <1>; + #interrupt-cells = <2>; + compatible = "fsl,mpc8248-cpm", "fsl,cpm2", + "simple-bus"; + reg = <0x119c0 0x30>; + ranges; + + muram { + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0 0x10000>; + + data@0 { + compatible = "fsl,cpm-muram-data"; + reg = <0 0x1100 0x1140 + 0xec0 0x9800 0x800>; + }; + }; + + brg@119f0 { + compatible = "fsl,mpc8248-brg", + "fsl,cpm2-brg", + "fsl,cpm-brg"; + reg = <0x119f0 0x10 0x115f0 0x10>; + }; + + /* Monitor port/SMC1 */ + smc1: serial@11a80 { + device_type = "serial"; + compatible = "fsl,mpc8248-smc-uart", + "fsl,cpm2-smc-uart"; + reg = <0x11a80 0x20 0x1100 0x40>; + interrupts = <4 8>; + interrupt-parent = <&PIC>; + fsl,cpm-brg = <7>; + fsl,cpm-command = <0x1d000000>; + linux,planetcore-label = "SMC1"; + }; + + /* "Serial" port/SCC1 */ + scc1: serial@11a00 { + device_type = "serial"; + compatible = "fsl,mpc8248-scc-uart", + "fsl,cpm2-scc-uart"; + reg = <0x11a00 0x20 0x8000 0x100>; + interrupts = <40 8>; + interrupt-parent = <&PIC>; + fsl,cpm-brg = <1>; + fsl,cpm-command = <0x00800000>; + linux,planetcore-label = "SCC1"; + }; + + eth0: ethernet@11300 { + device_type = "network"; + compatible = "fsl,mpc8248-fcc-enet", + "fsl,cpm2-fcc-enet"; + reg = <0x11300 0x20 0x8400 0x100 0x11390 1>; + local-mac-address = [ 00 00 00 00 00 00 ]; + interrupts = <32 8>; + interrupt-parent = <&PIC>; + phy-handle = <&PHY0>; + linux,network-index = <0>; + fsl,cpm-command = <0x12000300>; + }; + + eth1: ethernet@11320 { + device_type = "network"; + compatible = "fsl,mpc8248-fcc-enet", + "fsl,cpm2-fcc-enet"; + reg = <0x11320 0x20 0x8500 0x100 0x113b0 1>; + local-mac-address = [ 00 00 00 00 00 00 ]; + interrupts = <33 8>; + interrupt-parent = <&PIC>; + phy-handle = <&PHY1>; + linux,network-index = <1>; + fsl,cpm-command = <0x16200300>; + }; + + usb@11b60 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,mpc8248-usb", + "fsl,cpm2-usb"; + reg = <0x11b60 0x18 0x8b00 0x100>; + interrupt-parent = <&PIC>; + interrupts = <11 8>; + fsl,cpm-command = <0x2e600000>; + }; + }; + + PIC: interrupt-controller@10c00 { + #interrupt-cells = <2>; + interrupt-controller; + reg = <0x10c00 0x80>; + compatible = "fsl,mpc8248-pic", "fsl,pq2-pic"; + }; + }; +}; diff --git a/arch/powerpc/boot/dts/mpc8313erdb.dts b/arch/powerpc/boot/dts/mpc8313erdb.dts index c5b6665a820..9bcf2c92541 100644 --- a/arch/powerpc/boot/dts/mpc8313erdb.dts +++ b/arch/powerpc/boot/dts/mpc8313erdb.dts @@ -45,10 +45,58 @@ reg = <00000000 08000000>; // 128MB at 0 }; + localbus@e0005000 { + #address-cells = <2>; + #size-cells = <1>; + compatible = "fsl,mpc8313-elbc", "fsl,elbc", "simple-bus"; + reg = <e0005000 1000>; + interrupts = <d#77 8>; + interrupt-parent = <&ipic>; + + // CS0 and CS1 are swapped when + // booting from nand, but the + // addresses are the same. + ranges = <0 0 fe000000 00800000 + 1 0 e2800000 00008000 + 2 0 f0000000 00020000 + 3 0 fa000000 00008000>; + + flash@0,0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "cfi-flash"; + reg = <0 0 800000>; + bank-width = <2>; + device-width = <1>; + }; + + nand@1,0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "fsl,mpc8313-fcm-nand", + "fsl,elbc-fcm-nand"; + reg = <1 0 2000>; + + u-boot@0 { + reg = <0 100000>; + read-only; + }; + + kernel@100000 { + reg = <100000 300000>; + }; + + fs@400000 { + reg = <400000 1c00000>; + }; + }; + }; + soc8313@e0000000 { #address-cells = <1>; #size-cells = <1>; device_type = "soc"; + compatible = "simple-bus"; ranges = <0 e0000000 00100000>; reg = <e0000000 00000200>; bus-frequency = <0>; @@ -92,7 +140,6 @@ /* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */ usb@23000 { - device_type = "usb"; compatible = "fsl-usb2-dr"; reg = <23000 1000>; #address-cells = <1>; diff --git a/arch/powerpc/boot/dts/mpc832x_mds.dts b/arch/powerpc/boot/dts/mpc832x_mds.dts index 26ac467b10e..690252456d3 100644 --- a/arch/powerpc/boot/dts/mpc832x_mds.dts +++ b/arch/powerpc/boot/dts/mpc832x_mds.dts @@ -7,6 +7,18 @@ * under the terms of the GNU General Public License as published by the * Free Software Foundation; either version 2 of the License, or (at your * option) any later version. + + * To enable external serial I/O on a Freescale MPC 8323 SYS/MDS board, do + * this: + * + * 1) On chip U61, lift (disconnect) pins 21 (TXD) and 22 (RXD) from the board. + * 2) Solder a wire from U61-21 to P19A-23. P19 is a grid of pins on the board + * next to the serial ports. + * 3) Solder a wire from U61-22 to P19K-22. + * + * Note that there's a typo in the schematic. The board labels the last column + * of pins "P19K", but in the schematic, that column is called "P19J". So if + * you're going by the schematic, the pin is called "P19J-K22". */ / { @@ -169,6 +181,23 @@ 1 1e 1 0 1 0 /* TX_EN */ 1 1f 2 0 1 0>;/* CRS */ }; + pio5: ucc_pin@05 { + pio-map = < + /* + * open has + * port pin dir drain sel irq + */ + 2 0 1 0 2 0 /* TxD5 */ + 2 8 2 0 2 0 /* RxD5 */ + + 2 1d 2 0 0 0 /* CTS5 */ + 2 1f 1 0 2 0 /* RTS5 */ + + 2 18 2 0 0 0 /* CD */ + + >; + }; + }; }; @@ -176,6 +205,7 @@ #address-cells = <1>; #size-cells = <1>; device_type = "qe"; + compatible = "fsl,qe"; model = "QE"; ranges = <0 e0100000 00100000>; reg = <e0100000 480>; @@ -210,7 +240,6 @@ }; usb@6c0 { - device_type = "usb"; compatible = "qe_udc"; reg = <6c0 40 8B00 100>; interrupts = <b>; @@ -250,6 +279,26 @@ pio-handle = < &pio4 >; }; + ucc@2400 { + device_type = "serial"; + compatible = "ucc_uart"; + model = "UCC"; + device-id = <5>; /* The UCC number, 1-7*/ + port-number = <0>; /* Which ttyQEx device */ + soft-uart; /* We need Soft-UART */ + reg = <2400 200>; + interrupts = <28>; /* From Table 18-12 */ + interrupt-parent = < &qeic >; + /* + * For Soft-UART, we need to set TX to 1X, which + * means specifying separate clock sources. + */ + rx-clock-name = "brg5"; + tx-clock-name = "brg6"; + pio-handle = < &pio5 >; + }; + + mdio@2320 { #address-cells = <1>; #size-cells = <0>; diff --git a/arch/powerpc/boot/dts/mpc8349emitx.dts b/arch/powerpc/boot/dts/mpc8349emitx.dts index e354f263424..04b8da4deb6 100644 --- a/arch/powerpc/boot/dts/mpc8349emitx.dts +++ b/arch/powerpc/boot/dts/mpc8349emitx.dts @@ -91,7 +91,6 @@ }; usb@22000 { - device_type = "usb"; compatible = "fsl-usb2-mph"; reg = <22000 1000>; #address-cells = <1>; @@ -103,7 +102,6 @@ }; usb@23000 { - device_type = "usb"; compatible = "fsl-usb2-dr"; reg = <23000 1000>; #address-cells = <1>; @@ -127,14 +125,6 @@ reg = <1c>; device_type = "ethernet-phy"; }; - - /* Vitesse 7385 */ - phy1f: ethernet-phy@1f { - interrupt-parent = < &ipic >; - interrupts = <12 8>; - reg = <1f>; - device_type = "ethernet-phy"; - }; }; enet0: ethernet@24000 { @@ -159,7 +149,8 @@ local-mac-address = [ 00 00 00 00 00 00 ]; interrupts = <23 8 24 8 25 8>; interrupt-parent = < &ipic >; - phy-handle = < &phy1f >; + /* Vitesse 7385 isn't on the MDIO bus */ + fixed-link = <1 1 d#1000 0 0>; linux,network-index = <1>; }; @@ -253,6 +244,21 @@ device_type = "pci"; }; + localbus@e0005000 { + #address-cells = <2>; + #size-cells = <1>; + compatible = "fsl,mpc8349e-localbus", + "fsl,pq2pro-localbus"; + reg = <e0005000 d8>; + ranges = <3 0 f0000000 210>; - + pata@3,0 { + compatible = "fsl,mpc8349emitx-pata", "ata-generic"; + reg = <3 0 10 3 20c 4>; + reg-shift = <1>; + pio-mode = <6>; + interrupts = <17 8>; + interrupt-parent = <&ipic>; + }; + }; }; diff --git a/arch/powerpc/boot/dts/mpc8349emitxgp.dts b/arch/powerpc/boot/dts/mpc8349emitxgp.dts index ebdf0b75008..a06ff92cf0b 100644 --- a/arch/powerpc/boot/dts/mpc8349emitxgp.dts +++ b/arch/powerpc/boot/dts/mpc8349emitxgp.dts @@ -89,7 +89,6 @@ }; usb@23000 { - device_type = "usb"; compatible = "fsl-usb2-dr"; reg = <23000 1000>; #address-cells = <1>; diff --git a/arch/powerpc/boot/dts/mpc834x_mds.dts b/arch/powerpc/boot/dts/mpc834x_mds.dts index 0ba13ebcea6..4120e92fcec 100644 --- a/arch/powerpc/boot/dts/mpc834x_mds.dts +++ b/arch/powerpc/boot/dts/mpc834x_mds.dts @@ -104,7 +104,6 @@ /* phy type (ULPI or SERIAL) are only types supportted for MPH */ /* port = 0 or 1 */ usb@22000 { - device_type = "usb"; compatible = "fsl-usb2-mph"; reg = <22000 1000>; #address-cells = <1>; @@ -116,7 +115,6 @@ }; /* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */ usb@23000 { - device_type = "usb"; compatible = "fsl-usb2-dr"; reg = <23000 1000>; #address-cells = <1>; diff --git a/arch/powerpc/boot/dts/mpc836x_mds.dts b/arch/powerpc/boot/dts/mpc836x_mds.dts index fd841b2fddd..2181d2cdbff 100644 --- a/arch/powerpc/boot/dts/mpc836x_mds.dts +++ b/arch/powerpc/boot/dts/mpc836x_mds.dts @@ -241,7 +241,6 @@ }; usb@6c0 { - device_type = "usb"; compatible = "qe_udc"; reg = <6c0 40 8B00 100>; interrupts = <b>; diff --git a/arch/powerpc/boot/dts/mpc8377_mds.dts b/arch/powerpc/boot/dts/mpc8377_mds.dts new file mode 100644 index 00000000000..98b46065f45 --- /dev/null +++ b/arch/powerpc/boot/dts/mpc8377_mds.dts @@ -0,0 +1,279 @@ +/* + * MPC8377E MDS Device Tree Source + * + * Copyright 2007 Freescale Semiconductor Inc. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ + +/dts-v1/; + +/ { + model = "fsl,mpc8377emds"; + compatible = "fsl,mpc8377emds","fsl,mpc837xmds"; + #address-cells = <1>; + #size-cells = <1>; + + aliases { + ethernet0 = &enet0; + ethernet1 = &enet1; + serial0 = &serial0; + serial1 = &serial1; + pci0 = &pci0; + }; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + PowerPC,8377@0 { + device_type = "cpu"; + reg = <0>; + d-cache-line-size = <0x20>; + i-cache-line-size = <0x20>; + d-cache-size = <0x8000>; // L1, 32K + i-cache-size = <0x8000>; // L1, 32K + timebase-frequency = <0>; + bus-frequency = <0>; + clock-frequency = <0>; + }; + }; + + memory { + device_type = "memory"; + reg = <0x00000000 0x20000000>; // 512MB at 0 + }; + + soc@e0000000 { + #address-cells = <1>; + #size-cells = <1>; + device_type = "soc"; + ranges = <0x0 0xe0000000 0x00100000>; + reg = <0xe0000000 0x00000200>; + bus-frequency = <0>; + + wdt@200 { + compatible = "mpc83xx_wdt"; + reg = <0x200 0x100>; + }; + + i2c@3000 { + #address-cells = <1>; + #size-cells = <0>; + cell-index = <0>; + compatible = "fsl-i2c"; + reg = <0x3000 0x100>; + interrupts = <0xe 0x8>; + interrupt-parent = < &ipic >; + dfsrr; + }; + + i2c@3100 { + #address-cells = <1>; + #size-cells = <0>; + cell-index = <1>; + compatible = "fsl-i2c"; + reg = <0x3100 0x100>; + interrupts = <0xf 0x8>; + interrupt-parent = < &ipic >; + dfsrr; + }; + + spi@7000 { + compatible = "fsl_spi"; + reg = <0x7000 0x1000>; + interrupts = <0x10 0x8>; + interrupt-parent = < &ipic >; + mode = "cpu"; + }; + + /* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */ + usb@23000 { + compatible = "fsl-usb2-dr"; + reg = <0x23000 0x1000>; + #address-cells = <1>; + #size-cells = <0>; + interrupt-parent = < &ipic >; + interrupts = <0x26 0x8>; + phy_type = "utmi_wide"; + }; + + mdio@24520 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,gianfar-mdio"; + reg = <0x24520 0x20>; + phy2: ethernet-phy@2 { + interrupt-parent = < &ipic >; + interrupts = <0x11 0x8>; + reg = <2>; + device_type = "ethernet-phy"; + }; + phy3: ethernet-phy@3 { + interrupt-parent = < &ipic >; + interrupts = <0x12 0x8>; + reg = <3>; + device_type = "ethernet-phy"; + }; + }; + + enet0: ethernet@24000 { + cell-index = <0>; + device_type = "network"; + model = "eTSEC"; + compatible = "gianfar"; + reg = <0x24000 0x1000>; + local-mac-address = [ 00 00 00 00 00 00 ]; + interrupts = <0x20 0x8 0x21 0x8 0x22 0x8>; + phy-connection-type = "mii"; + interrupt-parent = < &ipic >; + phy-handle = < &phy2 >; + }; + + enet1: ethernet@25000 { + cell-index = <1>; + device_type = "network"; + model = "eTSEC"; + compatible = "gianfar"; + reg = <0x25000 0x1000>; + local-mac-address = [ 00 00 00 00 00 00 ]; + interrupts = <0x23 0x8 0x24 0x8 0x25 0x8>; + phy-connection-type = "mii"; + interrupt-parent = < &ipic >; + phy-handle = < &phy3 >; + }; + + serial0: serial@4500 { + cell-index = <0>; + device_type = "serial"; + compatible = "ns16550"; + reg = <0x4500 0x100>; + clock-frequency = <0>; + interrupts = <0x9 0x8>; + interrupt-parent = < &ipic >; + }; + + serial1: serial@4600 { + cell-index = <1>; + device_type = "serial"; + compatible = "ns16550"; + reg = <0x4600 0x100>; + clock-frequency = <0>; + interrupts = <0xa 0x8>; + interrupt-parent = < &ipic >; + }; + + crypto@30000 { + model = "SEC3"; + compatible = "talitos"; + reg = <0x30000 0x10000>; + interrupts = <0xb 0x8>; + interrupt-parent = < &ipic >; + /* Rev. 3.0 geometry */ + num-channels = <4>; + channel-fifo-len = <0x18>; + exec-units-mask = <0x000001fe>; + descriptor-types-mask = <0x03ab0ebf>; + }; + + sdhc@2e000 { + model = "eSDHC"; + compatible = "fsl,esdhc"; + reg = <0x2e000 0x1000>; + interrupts = <0x2a 0x8>; + interrupt-parent = < &ipic >; + }; + + sata@18000 { + compatible = "fsl,mpc8379-sata"; + reg = <0x18000 0x1000>; + interrupts = <0x2c 0x8>; + interrupt-parent = < &ipic >; + }; + + sata@19000 { + compatible = "fsl,mpc8379-sata"; + reg = <0x19000 0x1000>; + interrupts = <0x2d 0x8>; + interrupt-parent = < &ipic >; + }; + + /* IPIC + * interrupts cell = <intr #, sense> + * sense values match linux IORESOURCE_IRQ_* defines: + * sense == 8: Level, low assertion + * sense == 2: Edge, high-to-low change + */ + ipic: pic@700 { + compatible = "fsl,ipic"; + interrupt-controller; + #address-cells = <0>; + #interrupt-cells = <2>; + reg = <0x700 0x100>; + }; + }; + + pci0: pci@e0008500 { + cell-index = <0>; + interrupt-map-mask = <0xf800 0x0 0x0 0x7>; + interrupt-map = < + + /* IDSEL 0x11 */ + 0x8800 0x0 0x0 0x1 &ipic 0x14 0x8 + 0x8800 0x0 0x0 0x2 &ipic 0x15 0x8 + 0x8800 0x0 0x0 0x3 &ipic 0x16 0x8 + 0x8800 0x0 0x0 0x4 &ipic 0x17 0x8 + + /* IDSEL 0x12 */ + 0x9000 0x0 0x0 0x1 &ipic 0x16 0x8 + 0x9000 0x0 0x0 0x2 &ipic 0x17 0x8 + 0x9000 0x0 0x0 0x3 &ipic 0x14 0x8 + 0x9000 0x0 0x0 0x4 &ipic 0x15 0x8 + + /* IDSEL 0x13 */ + 0x9800 0x0 0x0 0x1 &ipic 0x17 0x8 + 0x9800 0x0 0x0 0x2 &ipic 0x14 0x8 + 0x9800 0x0 0x0 0x3 &ipic 0x15 0x8 + 0x9800 0x0 0x0 0x4 &ipic 0x16 0x8 + + /* IDSEL 0x15 */ + 0xa800 0x0 0x0 0x1 &ipic 0x14 0x8 + 0xa800 0x0 0x0 0x2 &ipic 0x15 0x8 + 0xa800 0x0 0x0 0x3 &ipic 0x16 0x8 + 0xa800 0x0 0x0 0x4 &ipic 0x17 0x8 + + /* IDSEL 0x16 */ + 0xb000 0x0 0x0 0x1 &ipic 0x17 0x8 + 0xb000 0x0 0x0 0x2 &ipic 0x14 0x8 + 0xb000 0x0 0x0 0x3 &ipic 0x15 0x8 + 0xb000 0x0 0x0 0x4 &ipic 0x16 0x8 + + /* IDSEL 0x17 */ + 0xb800 0x0 0x0 0x1 &ipic 0x16 0x8 + 0xb800 0x0 0x0 0x2 &ipic 0x17 0x8 + 0xb800 0x0 0x0 0x3 &ipic 0x14 0x8 + 0xb800 0x0 0x0 0x4 &ipic 0x15 0x8 + + /* IDSEL 0x18 */ + 0xc000 0x0 0x0 0x1 &ipic 0x15 0x8 + 0xc000 0x0 0x0 0x2 &ipic 0x16 0x8 + 0xc000 0x0 0x0 0x3 &ipic 0x17 0x8 + 0xc000 0x0 0x0 0x4 &ipic 0x14 0x8>; + interrupt-parent = < &ipic >; + interrupts = <0x42 0x8>; + bus-range = <0 0>; + ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000 + 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000 + 0x01000000 0x0 0x00000000 0xe0300000 0x0 0x00100000>; + clock-frequency = <0>; + #interrupt-cells = <1>; + #size-cells = <2>; + #address-cells = <3>; + reg = <0xe0008500 0x100>; + compatible = "fsl,mpc8349-pci"; + device_type = "pci"; + }; +}; diff --git a/arch/powerpc/boot/dts/mpc8378_mds.dts b/arch/powerpc/boot/dts/mpc8378_mds.dts new file mode 100644 index 00000000000..c117a6a3a8e --- /dev/null +++ b/arch/powerpc/boot/dts/mpc8378_mds.dts @@ -0,0 +1,265 @@ +/* + * MPC8378E MDS Device Tree Source + * + * Copyright 2007 Freescale Semiconductor Inc. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ + +/dts-v1/; + +/ { + model = "fsl,mpc8378emds"; + compatible = "fsl,mpc8378emds","fsl,mpc837xmds"; + #address-cells = <1>; + #size-cells = <1>; + + aliases { + ethernet0 = &enet0; + ethernet1 = &enet1; + serial0 = &serial0; + serial1 = &serial1; + pci0 = &pci0; + }; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + PowerPC,8378@0 { + device_type = "cpu"; + reg = <0>; + d-cache-line-size = <0x20>; + i-cache-line-size = <0x20>; + d-cache-size = <0x8000>; // L1, 32K + i-cache-size = <0x8000>; // L1, 32K + timebase-frequency = <0>; + bus-frequency = <0>; + clock-frequency = <0>; + }; + }; + + memory { + device_type = "memory"; + reg = <0x00000000 0x20000000>; // 512MB at 0 + }; + + soc@e0000000 { + #address-cells = <1>; + #size-cells = <1>; + device_type = "soc"; + ranges = <0x0 0xe0000000 0x00100000>; + reg = <0xe0000000 0x00000200>; + bus-frequency = <0>; + + wdt@200 { + compatible = "mpc83xx_wdt"; + reg = <0x200 0x100>; + }; + + i2c@3000 { + #address-cells = <1>; + #size-cells = <0>; + cell-index = <0>; + compatible = "fsl-i2c"; + reg = <0x3000 0x100>; + interrupts = <0xe 0x8>; + interrupt-parent = < &ipic >; + dfsrr; + }; + + i2c@3100 { + #address-cells = <1>; + #size-cells = <0>; + cell-index = <1>; + compatible = "fsl-i2c"; + reg = <0x3100 0x100>; + interrupts = <0xf 0x8>; + interrupt-parent = < &ipic >; + dfsrr; + }; + + spi@7000 { + compatible = "fsl_spi"; + reg = <0x7000 0x1000>; + interrupts = <0x10 0x8>; + interrupt-parent = < &ipic >; + mode = "cpu"; + }; + + /* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */ + usb@23000 { + compatible = "fsl-usb2-dr"; + reg = <0x23000 0x1000>; + #address-cells = <1>; + #size-cells = <0>; + interrupt-parent = < &ipic >; + interrupts = <0x26 0x8>; + phy_type = "utmi_wide"; + }; + + mdio@24520 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,gianfar-mdio"; + reg = <0x24520 0x20>; + phy2: ethernet-phy@2 { + interrupt-parent = < &ipic >; + interrupts = <0x11 0x8>; + reg = <2>; + device_type = "ethernet-phy"; + }; + phy3: ethernet-phy@3 { + interrupt-parent = < &ipic >; + interrupts = <0x12 0x8>; + reg = <3>; + device_type = "ethernet-phy"; + }; + }; + + enet0: ethernet@24000 { + cell-index = <0>; + device_type = "network"; + model = "eTSEC"; + compatible = "gianfar"; + reg = <0x24000 0x1000>; + local-mac-address = [ 00 00 00 00 00 00 ]; + interrupts = <0x20 0x8 0x21 0x8 0x22 0x8>; + phy-connection-type = "mii"; + interrupt-parent = < &ipic >; + phy-handle = < &phy2 >; + }; + + enet1: ethernet@25000 { + cell-index = <1>; + device_type = "network"; + model = "eTSEC"; + compatible = "gianfar"; + reg = <0x25000 0x1000>; + local-mac-address = [ 00 00 00 00 00 00 ]; + interrupts = <0x23 0x8 0x24 0x8 0x25 0x8>; + phy-connection-type = "mii"; + interrupt-parent = < &ipic >; + phy-handle = < &phy3 >; + }; + + serial0: serial@4500 { + cell-index = <0>; + device_type = "serial"; + compatible = "ns16550"; + reg = <0x4500 0x100>; + clock-frequency = <0>; + interrupts = <0x9 0x8>; + interrupt-parent = < &ipic >; + }; + + serial1: serial@4600 { + cell-index = <1>; + device_type = "serial"; + compatible = "ns16550"; + reg = <0x4600 0x100>; + clock-frequency = <0>; + interrupts = <0xa 0x8>; + interrupt-parent = < &ipic >; + }; + + crypto@30000 { + model = "SEC3"; + compatible = "talitos"; + reg = <0x30000 0x10000>; + interrupts = <0xb 0x8>; + interrupt-parent = < &ipic >; + /* Rev. 3.0 geometry */ + num-channels = <4>; + channel-fifo-len = <0x18>; + exec-units-mask = <0x000001fe>; + descriptor-types-mask = <0x03ab0ebf>; + }; + + sdhc@2e000 { + model = "eSDHC"; + compatible = "fsl,esdhc"; + reg = <0x2e000 0x1000>; + interrupts = <0x2a 0x8>; + interrupt-parent = < &ipic >; + }; + + /* IPIC + * interrupts cell = <intr #, sense> + * sense values match linux IORESOURCE_IRQ_* defines: + * sense == 8: Level, low assertion + * sense == 2: Edge, high-to-low change + */ + ipic: pic@700 { + compatible = "fsl,ipic"; + interrupt-controller; + #address-cells = <0>; + #interrupt-cells = <2>; + reg = <0x700 0x100>; + }; + }; + + pci0: pci@e0008500 { + cell-index = <0>; + interrupt-map-mask = <0xf800 0x0 0x0 0x7>; + interrupt-map = < + + /* IDSEL 0x11 */ + 0x8800 0x0 0x0 0x1 &ipic 0x14 0x8 + 0x8800 0x0 0x0 0x2 &ipic 0x15 0x8 + 0x8800 0x0 0x0 0x3 &ipic 0x16 0x8 + 0x8800 0x0 0x0 0x4 &ipic 0x17 0x8 + + /* IDSEL 0x12 */ + 0x9000 0x0 0x0 0x1 &ipic 0x16 0x8 + 0x9000 0x0 0x0 0x2 &ipic 0x17 0x8 + 0x9000 0x0 0x0 0x3 &ipic 0x14 0x8 + 0x9000 0x0 0x0 0x4 &ipic 0x15 0x8 + + /* IDSEL 0x13 */ + 0x9800 0x0 0x0 0x1 &ipic 0x17 0x8 + 0x9800 0x0 0x0 0x2 &ipic 0x14 0x8 + 0x9800 0x0 0x0 0x3 &ipic 0x15 0x8 + 0x9800 0x0 0x0 0x4 &ipic 0x16 0x8 + + /* IDSEL 0x15 */ + 0xa800 0x0 0x0 0x1 &ipic 0x14 0x8 + 0xa800 0x0 0x0 0x2 &ipic 0x15 0x8 + 0xa800 0x0 0x0 0x3 &ipic 0x16 0x8 + 0xa800 0x0 0x0 0x4 &ipic 0x17 0x8 + + /* IDSEL 0x16 */ + 0xb000 0x0 0x0 0x1 &ipic 0x17 0x8 + 0xb000 0x0 0x0 0x2 &ipic 0x14 0x8 + 0xb000 0x0 0x0 0x3 &ipic 0x15 0x8 + 0xb000 0x0 0x0 0x4 &ipic 0x16 0x8 + + /* IDSEL 0x17 */ + 0xb800 0x0 0x0 0x1 &ipic 0x16 0x8 + 0xb800 0x0 0x0 0x2 &ipic 0x17 0x8 + 0xb800 0x0 0x0 0x3 &ipic 0x14 0x8 + 0xb800 0x0 0x0 0x4 &ipic 0x15 0x8 + + /* IDSEL 0x18 */ + 0xc000 0x0 0x0 0x1 &ipic 0x15 0x8 + 0xc000 0x0 0x0 0x2 &ipic 0x16 0x8 + 0xc000 0x0 0x0 0x3 &ipic 0x17 0x8 + 0xc000 0x0 0x0 0x4 &ipic 0x14 0x8>; + interrupt-parent = < &ipic >; + interrupts = <0x42 0x8>; + bus-range = <0 0>; + ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000 + 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000 + 0x01000000 0x0 0x00000000 0xe0300000 0x0 0x00100000>; + clock-frequency = <0>; + #interrupt-cells = <1>; + #size-cells = <2>; + #address-cells = <3>; + reg = <0xe0008500 0x100>; + compatible = "fsl,mpc8349-pci"; + device_type = "pci"; + }; +}; diff --git a/arch/powerpc/boot/dts/mpc8379_mds.dts b/arch/powerpc/boot/dts/mpc8379_mds.dts new file mode 100644 index 00000000000..fc3ba79fb68 --- /dev/null +++ b/arch/powerpc/boot/dts/mpc8379_mds.dts @@ -0,0 +1,293 @@ +/* + * MPC8379E MDS Device Tree Source + * + * Copyright 2007 Freescale Semiconductor Inc. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ + +/dts-v1/; + +/ { + model = "fsl,mpc8379emds"; + compatible = "fsl,mpc8379emds","fsl,mpc837xmds"; + #address-cells = <1>; + #size-cells = <1>; + + aliases { + ethernet0 = &enet0; + ethernet1 = &enet1; + serial0 = &serial0; + serial1 = &serial1; + pci0 = &pci0; + }; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + PowerPC,8379@0 { + device_type = "cpu"; + reg = <0>; + d-cache-line-size = <0x20>; + i-cache-line-size = <0x20>; + d-cache-size = <0x8000>; // L1, 32K + i-cache-size = <0x8000>; // L1, 32K + timebase-frequency = <0>; + bus-frequency = <0>; + clock-frequency = <0>; + }; + }; + + memory { + device_type = "memory"; + reg = <0x00000000 0x20000000>; // 512MB at 0 + }; + + soc@e0000000 { + #address-cells = <1>; + #size-cells = <1>; + device_type = "soc"; + ranges = <0x0 0xe0000000 0x00100000>; + reg = <0xe0000000 0x00000200>; + bus-frequency = <0>; + + wdt@200 { + compatible = "mpc83xx_wdt"; + reg = <0x200 0x100>; + }; + + i2c@3000 { + #address-cells = <1>; + #size-cells = <0>; + cell-index = <0>; + compatible = "fsl-i2c"; + reg = <0x3000 0x100>; + interrupts = <0xe 0x8>; + interrupt-parent = < &ipic >; + dfsrr; + }; + + i2c@3100 { + #address-cells = <1>; + #size-cells = <0>; + cell-index = <1>; + compatible = "fsl-i2c"; + reg = <0x3100 0x100>; + interrupts = <0xf 0x8>; + interrupt-parent = < &ipic >; + dfsrr; + }; + + spi@7000 { + compatible = "fsl_spi"; + reg = <0x7000 0x1000>; + interrupts = <0x10 0x8>; + interrupt-parent = < &ipic >; + mode = "cpu"; + }; + + /* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */ + usb@23000 { + compatible = "fsl-usb2-dr"; + reg = <0x23000 0x1000>; + #address-cells = <1>; + #size-cells = <0>; + interrupt-parent = < &ipic >; + interrupts = <0x26 0x8>; + phy_type = "utmi_wide"; + }; + + mdio@24520 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,gianfar-mdio"; + reg = <0x24520 0x20>; + phy2: ethernet-phy@2 { + interrupt-parent = < &ipic >; + interrupts = <0x11 0x8>; + reg = <2>; + device_type = "ethernet-phy"; + }; + phy3: ethernet-phy@3 { + interrupt-parent = < &ipic >; + interrupts = <0x12 0x8>; + reg = <3>; + device_type = "ethernet-phy"; + }; + }; + + enet0: ethernet@24000 { + cell-index = <0>; + device_type = "network"; + model = "eTSEC"; + compatible = "gianfar"; + reg = <0x24000 0x1000>; + local-mac-address = [ 00 00 00 00 00 00 ]; + interrupts = <0x20 0x8 0x21 0x8 0x22 0x8>; + phy-connection-type = "mii"; + interrupt-parent = < &ipic >; + phy-handle = < &phy2 >; + }; + + enet1: ethernet@25000 { + cell-index = <1>; + device_type = "network"; + model = "eTSEC"; + compatible = "gianfar"; + reg = <0x25000 0x1000>; + local-mac-address = [ 00 00 00 00 00 00 ]; + interrupts = <0x23 0x8 0x24 0x8 0x25 0x8>; + phy-connection-type = "mii"; + interrupt-parent = < &ipic >; + phy-handle = < &phy3 >; + }; + + serial0: serial@4500 { + cell-index = <0>; + device_type = "serial"; + compatible = "ns16550"; + reg = <0x4500 0x100>; + clock-frequency = <0>; + interrupts = <0x9 0x8>; + interrupt-parent = < &ipic >; + }; + + serial1: serial@4600 { + cell-index = <1>; + device_type = "serial"; + compatible = "ns16550"; + reg = <0x4600 0x100>; + clock-frequency = <0>; + interrupts = <0xa 0x8>; + interrupt-parent = < &ipic >; + }; + + crypto@30000 { + model = "SEC3"; + compatible = "talitos"; + reg = <0x30000 0x10000>; + interrupts = <0xb 0x8>; + interrupt-parent = < &ipic >; + /* Rev. 3.0 geometry */ + num-channels = <4>; + channel-fifo-len = <0x18>; + exec-units-mask = <0x000001fe>; + descriptor-types-mask = <0x03ab0ebf>; + }; + + sdhc@2e000 { + model = "eSDHC"; + compatible = "fsl,esdhc"; + reg = <0x2e000 0x1000>; + interrupts = <0x2a 0x8>; + interrupt-parent = < &ipic >; + }; + + sata@18000 { + compatible = "fsl,mpc8379-sata"; + reg = <0x18000 0x1000>; + interrupts = <0x2c 0x8>; + interrupt-parent = < &ipic >; + }; + + sata@19000 { + compatible = "fsl,mpc8379-sata"; + reg = <0x19000 0x1000>; + interrupts = <0x2d 0x8>; + interrupt-parent = < &ipic >; + }; + + sata@1a000 { + compatible = "fsl,mpc8379-sata"; + reg = <0x1a000 0x1000>; + interrupts = <0x2e 0x8>; + interrupt-parent = < &ipic >; + }; + + sata@1b000 { + compatible = "fsl,mpc8379-sata"; + reg = <0x1b000 0x1000>; + interrupts = <0x2f 0x8>; + interrupt-parent = < &ipic >; + }; + + /* IPIC + * interrupts cell = <intr #, sense> + * sense values match linux IORESOURCE_IRQ_* defines: + * sense == 8: Level, low assertion + * sense == 2: Edge, high-to-low change + */ + ipic: pic@700 { + compatible = "fsl,ipic"; + interrupt-controller; + #address-cells = <0>; + #interrupt-cells = <2>; + reg = <0x700 0x100>; + }; + }; + + pci0: pci@e0008500 { + cell-index = <0>; + interrupt-map-mask = <0xf800 0x0 0x0 0x7>; + interrupt-map = < + + /* IDSEL 0x11 */ + 0x8800 0x0 0x0 0x1 &ipic 0x14 0x8 + 0x8800 0x0 0x0 0x2 &ipic 0x15 0x8 + 0x8800 0x0 0x0 0x3 &ipic 0x16 0x8 + 0x8800 0x0 0x0 0x4 &ipic 0x17 0x8 + + /* IDSEL 0x12 */ + 0x9000 0x0 0x0 0x1 &ipic 0x16 0x8 + 0x9000 0x0 0x0 0x2 &ipic 0x17 0x8 + 0x9000 0x0 0x0 0x3 &ipic 0x14 0x8 + 0x9000 0x0 0x0 0x4 &ipic 0x15 0x8 + + /* IDSEL 0x13 */ + 0x9800 0x0 0x0 0x1 &ipic 0x17 0x8 + 0x9800 0x0 0x0 0x2 &ipic 0x14 0x8 + 0x9800 0x0 0x0 0x3 &ipic 0x15 0x8 + 0x9800 0x0 0x0 0x4 &ipic 0x16 0x8 + + /* IDSEL 0x15 */ + 0xa800 0x0 0x0 0x1 &ipic 0x14 0x8 + 0xa800 0x0 0x0 0x2 &ipic 0x15 0x8 + 0xa800 0x0 0x0 0x3 &ipic 0x16 0x8 + 0xa800 0x0 0x0 0x4 &ipic 0x17 0x8 + + /* IDSEL 0x16 */ + 0xb000 0x0 0x0 0x1 &ipic 0x17 0x8 + 0xb000 0x0 0x0 0x2 &ipic 0x14 0x8 + 0xb000 0x0 0x0 0x3 &ipic 0x15 0x8 + 0xb000 0x0 0x0 0x4 &ipic 0x16 0x8 + + /* IDSEL 0x17 */ + 0xb800 0x0 0x0 0x1 &ipic 0x16 0x8 + 0xb800 0x0 0x0 0x2 &ipic 0x17 0x8 + 0xb800 0x0 0x0 0x3 &ipic 0x14 0x8 + 0xb800 0x0 0x0 0x4 &ipic 0x15 0x8 + + /* IDSEL 0x18 */ + 0xc000 0x0 0x0 0x1 &ipic 0x15 0x8 + 0xc000 0x0 0x0 0x2 &ipic 0x16 0x8 + 0xc000 0x0 0x0 0x3 &ipic 0x17 0x8 + 0xc000 0x0 0x0 0x4 &ipic 0x14 0x8>; + interrupt-parent = < &ipic >; + interrupts = <0x42 0x8>; + bus-range = <0 0>; + ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000 + 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000 + 0x01000000 0x0 0x00000000 0xe0300000 0x0 0x00100000>; + clock-frequency = <0>; + #interrupt-cells = <1>; + #size-cells = <2>; + #address-cells = <3>; + reg = <0xe0008500 0x100>; + compatible = "fsl,mpc8349-pci"; + device_type = "pci"; + }; +}; diff --git a/arch/powerpc/boot/dts/mpc8544ds.dts b/arch/powerpc/boot/dts/mpc8544ds.dts index 54b3bdf7fc9..688af9d0638 100644 --- a/arch/powerpc/boot/dts/mpc8544ds.dts +++ b/arch/powerpc/boot/dts/mpc8544ds.dts @@ -304,9 +304,9 @@ interrupt-map = < // IDSEL 0x1c USB e000 0 0 1 &i8259 c 2 - e100 0 0 1 &i8259 9 2 - e200 0 0 1 &i8259 a 2 - e300 0 0 1 &i8259 b 2 + e100 0 0 2 &i8259 9 2 + e200 0 0 3 &i8259 a 2 + e300 0 0 4 &i8259 b 2 // IDSEL 0x1d Audio e800 0 0 1 &i8259 6 2 diff --git a/arch/powerpc/boot/dts/mpc8572ds.dts b/arch/powerpc/boot/dts/mpc8572ds.dts index 233e0d5a8b9..813c259abbe 100644 --- a/arch/powerpc/boot/dts/mpc8572ds.dts +++ b/arch/powerpc/boot/dts/mpc8572ds.dts @@ -334,9 +334,9 @@ // IDSEL 0x1c USB e000 0 0 1 &i8259 c 2 - e100 0 0 1 &i8259 9 2 - e200 0 0 1 &i8259 a 2 - e300 0 0 1 &i8259 b 2 + e100 0 0 2 &i8259 9 2 + e200 0 0 3 &i8259 a 2 + e300 0 0 4 &i8259 b 2 // IDSEL 0x1d Audio e800 0 0 1 &i8259 6 2 @@ -481,6 +481,7 @@ clock-frequency = <1fca055>; interrupt-parent = <&mpic>; interrupts = <1b 2>; + interrupt-map-mask = <f800 0 0 7>; interrupt-map = < /* IDSEL 0x0 */ 0000 0 0 1 &mpic 0 1 diff --git a/arch/powerpc/boot/dts/mpc8610_hpcd.dts b/arch/powerpc/boot/dts/mpc8610_hpcd.dts index 01040a752c8..d98715cbda2 100644 --- a/arch/powerpc/boot/dts/mpc8610_hpcd.dts +++ b/arch/powerpc/boot/dts/mpc8610_hpcd.dts @@ -1,7 +1,7 @@ /* * MPC8610 HPCD Device Tree Source * - * Copyright 2007 Freescale Semiconductor Inc. + * Copyright 2007-2008 Freescale Semiconductor Inc. * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License Version 2 as published @@ -49,6 +49,7 @@ #size-cells = <1>; #interrupt-cells = <2>; device_type = "soc"; + compatible = "fsl,mpc8610-immr", "simple-bus"; ranges = <0 e0000000 00100000>; reg = <e0000000 1000>; bus-frequency = <0>; @@ -62,6 +63,13 @@ interrupts = <2b 2>; interrupt-parent = <&mpic>; dfsrr; + + cs4270:codec@4f { + compatible = "cirrus,cs4270"; + reg = <4f>; + /* MCLK source is a stand-alone oscillator */ + clock-frequency = <bb8000>; + }; }; i2c@3100 { @@ -111,6 +119,109 @@ reg = <e0000 1000>; fsl,has-rstcr; }; + + i2s@16000 { + compatible = "fsl,mpc8610-ssi"; + cell-index = <0>; + reg = <16000 100>; + interrupt-parent = <&mpic>; + interrupts = <3e 2>; + fsl,mode = "i2s-slave"; + codec-handle = <&cs4270>; + }; + + ssi@16100 { + compatible = "fsl,mpc8610-ssi"; + cell-index = <1>; + reg = <16100 100>; + interrupt-parent = <&mpic>; + interrupts = <3f 2>; + }; + + dma@21300 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "fsl,mpc8610-dma", "fsl,eloplus-dma"; + cell-index = <0>; + reg = <21300 4>; /* DMA general status register */ + ranges = <0 21100 200>; + + dma-channel@0 { + compatible = "fsl,mpc8610-dma-channel", + "fsl,eloplus-dma-channel"; + cell-index = <0>; + reg = <0 80>; + interrupt-parent = <&mpic>; + interrupts = <14 2>; + }; + dma-channel@1 { + compatible = "fsl,mpc8610-dma-channel", + "fsl,eloplus-dma-channel"; + cell-index = <1>; + reg = <80 80>; + interrupt-parent = <&mpic>; + interrupts = <15 2>; + }; + dma-channel@2 { + compatible = "fsl,mpc8610-dma-channel", + "fsl,eloplus-dma-channel"; + cell-index = <2>; + reg = <100 80>; + interrupt-parent = <&mpic>; + interrupts = <16 2>; + }; + dma-channel@3 { + compatible = "fsl,mpc8610-dma-channel", + "fsl,eloplus-dma-channel"; + cell-index = <3>; + reg = <180 80>; + interrupt-parent = <&mpic>; + interrupts = <17 2>; + }; + }; + + dma@c300 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "fsl,mpc8610-dma", "fsl,mpc8540-dma"; + cell-index = <1>; + reg = <c300 4>; /* DMA general status register */ + ranges = <0 c100 200>; + + dma-channel@0 { + compatible = "fsl,mpc8610-dma-channel", + "fsl,mpc8540-dma-channel"; + cell-index = <0>; + reg = <0 80>; + interrupt-parent = <&mpic>; + interrupts = <3c 2>; + }; + dma-channel@1 { + compatible = "fsl,mpc8610-dma-channel", + "fsl,mpc8540-dma-channel"; + cell-index = <1>; + reg = <80 80>; + interrupt-parent = <&mpic>; + interrupts = <3d 2>; + }; + dma-channel@2 { + compatible = "fsl,mpc8610-dma-channel", + "fsl,mpc8540-dma-channel"; + cell-index = <2>; + reg = <100 80>; + interrupt-parent = <&mpic>; + interrupts = <3e 2>; + }; + dma-channel@3 { + compatible = "fsl,mpc8610-dma-channel", + "fsl,mpc8540-dma-channel"; + cell-index = <3>; + reg = <180 80>; + interrupt-parent = <&mpic>; + interrupts = <3f 2>; + }; + }; + }; pci0: pci@e0008000 { diff --git a/arch/powerpc/boot/dts/mpc8641_hpcn.dts b/arch/powerpc/boot/dts/mpc8641_hpcn.dts index 86fc2280c16..556a9cac079 100644 --- a/arch/powerpc/boot/dts/mpc8641_hpcn.dts +++ b/arch/powerpc/boot/dts/mpc8641_hpcn.dts @@ -60,10 +60,52 @@ reg = <00000000 40000000>; // 1G at 0x0 }; + localbus@f8005000 { + #address-cells = <2>; + #size-cells = <1>; + compatible = "fsl,mpc8641-localbus", "simple-bus"; + reg = <f8005000 1000>; + interrupts = <13 2>; + interrupt-parent = <&mpic>; + + ranges = <0 0 ff800000 00800000 + 1 0 fe000000 01000000 + 2 0 f8200000 00100000 + 3 0 f8100000 00100000>; + + flash@0,0 { + compatible = "cfi-flash"; + reg = <0 0 00800000>; + bank-width = <2>; + device-width = <2>; + #address-cells = <1>; + #size-cells = <1>; + partition@0 { + label = "kernel"; + reg = <00000000 00300000>; + }; + partition@300000 { + label = "firmware b"; + reg = <00300000 00100000>; + read-only; + }; + partition@400000 { + label = "fs"; + reg = <00400000 00300000>; + }; + partition@700000 { + label = "firmware a"; + reg = <00700000 00100000>; + read-only; + }; + }; + }; + soc8641@f8000000 { #address-cells = <1>; #size-cells = <1>; device_type = "soc"; + compatible = "simple-bus"; ranges = <00000000 f8000000 00100000>; reg = <f8000000 00001000>; // CCSRBAR bus-frequency = <0>; @@ -326,9 +368,9 @@ // IDSEL 0x1c USB e000 0 0 1 &i8259 c 2 - e100 0 0 1 &i8259 9 2 - e200 0 0 1 &i8259 a 2 - e300 0 0 1 &i8259 b 2 + e100 0 0 2 &i8259 9 2 + e200 0 0 3 &i8259 a 2 + e300 0 0 4 &i8259 b 2 // IDSEL 0x1d Audio e800 0 0 1 &i8259 6 2 diff --git a/arch/powerpc/boot/dts/storcenter.dts b/arch/powerpc/boot/dts/storcenter.dts new file mode 100644 index 00000000000..6aa1d695e64 --- /dev/null +++ b/arch/powerpc/boot/dts/storcenter.dts @@ -0,0 +1,138 @@ +/* + * Device Tree Source for IOMEGA StorCenter + * + * Copyright 2007 Oyvind Repvik + * Copyright 2007 Jon Loeliger + * + * Based on the Kurobox DTS by G. Liakhovetski <g.liakhovetski@gmx.de> + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +/ { + model = "StorCenter"; + compatible = "storcenter"; + #address-cells = <1>; + #size-cells = <1>; + + aliases { + serial0 = &serial0; + serial1 = &serial1; + pci0 = &pci0; + }; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + PowerPC,8241@0 { + device_type = "cpu"; + reg = <0>; + clock-frequency = <d# 200000000>; /* Hz */ + timebase-frequency = <d# 25000000>; /* Hz */ + bus-frequency = <0>; /* from bootwrapper */ + i-cache-line-size = <d# 32>; /* bytes */ + d-cache-line-size = <d# 32>; /* bytes */ + i-cache-size = <4000>; + d-cache-size = <4000>; + }; + }; + + memory { + device_type = "memory"; + reg = <00000000 04000000>; /* 64MB @ 0x0 */ + }; + + soc@fc000000 { + #address-cells = <1>; + #size-cells = <1>; + device_type = "soc"; + compatible = "fsl,mpc8241", "mpc10x"; + store-gathering = <0>; /* 0 == off, !0 == on */ + ranges = <0 fc000000 100000>; + reg = <fc000000 100000>; /* EUMB */ + bus-frequency = <0>; /* fixed by loader */ + + i2c@3000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl-i2c"; + reg = <3000 100>; + interrupts = <5 2>; + interrupt-parent = <&mpic>; + + rtc@68 { + compatible = "dallas,ds1337"; + reg = <68>; + }; + }; + + serial0: serial@4500 { + cell-index = <0>; + device_type = "serial"; + compatible = "ns16550"; + reg = <4500 20>; + clock-frequency = <d# 97553800>; /* Hz */ + current-speed = <d# 115200>; + interrupts = <9 2>; + interrupt-parent = <&mpic>; + }; + + serial1: serial@4600 { + cell-index = <1>; + device_type = "serial"; + compatible = "ns16550"; + reg = <4600 20>; + clock-frequency = <d# 97553800>; /* Hz */ + current-speed = <d# 9600>; + interrupts = <a 2>; + interrupt-parent = <&mpic>; + }; + + mpic: interrupt-controller@40000 { + #interrupt-cells = <2>; + device_type = "open-pic"; + compatible = "chrp,open-pic"; + interrupt-controller; + reg = <40000 40000>; + }; + + }; + + pci0: pci@fe800000 { + #address-cells = <3>; + #size-cells = <2>; + #interrupt-cells = <1>; + device_type = "pci"; + compatible = "mpc10x-pci"; + reg = <fe800000 1000>; + ranges = <01000000 0 0 fe000000 0 00c00000 + 02000000 0 80000000 80000000 0 70000000>; + bus-range = <0 ff>; + clock-frequency = <d# 97553800>; /* Hz */ + interrupt-parent = <&mpic>; + interrupt-map-mask = <f800 0 0 7>; + interrupt-map = < + /* IDSEL 13 - IDE */ + 6800 0 0 1 &mpic 0 1 + 6800 0 0 2 &mpic 0 1 + 6800 0 0 3 &mpic 0 1 + /* IDSEL 14 - USB */ + 7000 0 0 1 &mpic 0 1 + 7000 0 0 2 &mpic 0 1 + 7000 0 0 3 &mpic 0 1 + 7000 0 0 4 &mpic 0 1 + /* IDSEL 15 - ETH */ + 7800 0 0 1 &mpic 0 1 + 7800 0 0 2 &mpic 0 1 + 7800 0 0 3 &mpic 0 1 + 7800 0 0 4 &mpic 0 1 + >; + }; + + chosen { + linux,stdout-path = "/soc/serial@4500"; + }; +}; diff --git a/arch/powerpc/boot/ep8248e.c b/arch/powerpc/boot/ep8248e.c new file mode 100644 index 00000000000..f57d14d0272 --- /dev/null +++ b/arch/powerpc/boot/ep8248e.c @@ -0,0 +1,55 @@ +/* + * Embedded Planet EP8248E with PlanetCore firmware + * + * Author: Scott Wood <scottwood@freescale.com> + * + * Copyright (c) 2007 Freescale Semiconductor, Inc. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + */ + +#include "ops.h" +#include "stdio.h" +#include "planetcore.h" +#include "pq2.h" + +static char *table; +static u64 mem_size; + +#include <io.h> + +static void platform_fixups(void) +{ + u64 val; + + dt_fixup_memory(0, mem_size); + planetcore_set_mac_addrs(table); + + if (!planetcore_get_decimal(table, PLANETCORE_KEY_CRYSTAL_HZ, &val)) { + printf("No PlanetCore crystal frequency key.\r\n"); + return; + } + + pq2_fixup_clocks(val); +} + +void platform_init(unsigned long r3, unsigned long r4, unsigned long r5, + unsigned long r6, unsigned long r7) +{ + table = (char *)r3; + planetcore_prepare_table(table); + + if (!planetcore_get_decimal(table, PLANETCORE_KEY_MB_RAM, &mem_size)) + return; + + mem_size *= 1024 * 1024; + simple_alloc_init(_end, mem_size - (unsigned long)_end, 32, 64); + + fdt_init(_dtb_start); + + planetcore_set_stdout_path(table); + serial_console_init(); + platform_ops.fixups = platform_fixups; +} diff --git a/arch/powerpc/boot/ops.h b/arch/powerpc/boot/ops.h index 6036a98e646..5872ef1779a 100644 --- a/arch/powerpc/boot/ops.h +++ b/arch/powerpc/boot/ops.h @@ -159,9 +159,23 @@ static inline void *find_node_by_devtype(const void *prev, return find_node_by_prop_value_str(prev, "device_type", type); } +static inline void *find_node_by_alias(const char *alias) +{ + void *devp = finddevice("/aliases"); + + if (devp) { + char path[MAX_PATH_LEN]; + if (getprop(devp, alias, path, MAX_PATH_LEN) > 0) + return finddevice(path); + } + + return NULL; +} + void dt_fixup_memory(u64 start, u64 size); void dt_fixup_cpu_clocks(u32 cpufreq, u32 tbfreq, u32 busfreq); void dt_fixup_clock(const char *path, u32 freq); +void dt_fixup_mac_address_by_alias(const char *alias, const u8 *addr); void dt_fixup_mac_address(u32 index, const u8 *addr); void __dt_fixup_mac_addresses(u32 startindex, ...); #define dt_fixup_mac_addresses(...) \ diff --git a/arch/powerpc/boot/redboot-8xx.c b/arch/powerpc/boot/redboot-8xx.c new file mode 100644 index 00000000000..f7945adc800 --- /dev/null +++ b/arch/powerpc/boot/redboot-8xx.c @@ -0,0 +1,58 @@ +/* + * RedBoot firmware support + * + * Author: Scott Wood <scottwood@freescale.com> + * + * Copyright (c) 2007 Freescale Semiconductor, Inc. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + */ + +#include "ops.h" +#include "stdio.h" +#include "redboot.h" +#include "fsl-soc.h" +#include "io.h" + +static bd_t bd; +BSS_STACK(4096); + +#define MHZ(x) ((x + 500000) / 1000000) + +static void platform_fixups(void) +{ + void *node; + + dt_fixup_memory(bd.bi_memstart, bd.bi_memsize); + dt_fixup_mac_addresses(bd.bi_enetaddr); + dt_fixup_cpu_clocks(bd.bi_intfreq, bd.bi_busfreq / 16, bd.bi_busfreq); + + node = finddevice("/soc/cpm/brg"); + if (node) { + printf("BRG clock-frequency <- 0x%x (%dMHz)\r\n", + bd.bi_busfreq, MHZ(bd.bi_busfreq)); + setprop(node, "clock-frequency", &bd.bi_busfreq, 4); + } +} + +void platform_init(unsigned long r3, unsigned long r4, unsigned long r5, + unsigned long r6, unsigned long r7) +{ + memcpy(&bd, (char *)r3, sizeof(bd)); + + if (bd.bi_tag != 0x42444944) + return; + + simple_alloc_init(_end, + bd.bi_memstart + bd.bi_memsize - (unsigned long)_end, + 32, 64); + + fdt_init(_dtb_start); + serial_console_init(); + platform_ops.fixups = platform_fixups; + + loader_info.cmdline = (char *)bd.bi_cmdline; + loader_info.cmdline_len = strlen((char *)bd.bi_cmdline); +} diff --git a/arch/powerpc/boot/redboot.h b/arch/powerpc/boot/redboot.h new file mode 100644 index 00000000000..ace0b7fed8e --- /dev/null +++ b/arch/powerpc/boot/redboot.h @@ -0,0 +1,56 @@ +#ifndef _PPC_REDBOOT_H +#define _PPC_REDBOOT_H + +//========================================================================= +// include/asm-ppc/redboot.h +// Copyright (c) 2002, 2003 Gary Thomas (<gary@mlbassoc.com> +// Copyright (c) 1997 Dan Malek (dmalek@jlc.net) + +// +// Board specific details, as provided by RedBoot +// + +/* A Board Information structure that is given to a program when + * RedBoot starts it up. Note: not all fields make sense for all + * architectures and it's up to the platform specific code to fill + * in the details. + */ +typedef struct bd_info { + unsigned int bi_tag; /* Should be 0x42444944 "BDID" */ + unsigned int bi_size; /* Size of this structure */ + unsigned int bi_revision; /* revision of this structure */ + unsigned int bi_bdate; /* bootstrap date, i.e. 0x19971106 */ + unsigned int bi_memstart; /* Memory start address */ + unsigned int bi_memsize; /* Memory (end) size in bytes */ + unsigned int bi_intfreq; /* Internal Freq, in Hz */ + unsigned int bi_busfreq; /* Bus Freq, in Hz */ + unsigned int bi_cpmfreq; /* CPM Freq, in Hz */ + unsigned int bi_brgfreq; /* BRG Freq, in Hz */ + unsigned int bi_vco; /* VCO Out from PLL */ + unsigned int bi_pci_freq; /* PCI Freq, in Hz */ + unsigned int bi_baudrate; /* Default console baud rate */ + unsigned int bi_immr; /* IMMR when called from boot rom */ + unsigned char bi_enetaddr[6]; + unsigned int bi_flashbase; /* Physical address of FLASH memory */ + unsigned int bi_flashsize; /* Length of FLASH memory */ + int bi_flashwidth; /* Width (8,16,32,64) */ + unsigned char *bi_cmdline; /* Pointer to command line */ + unsigned char bi_esa[3][6]; /* Ethernet station addresses */ + unsigned int bi_ramdisk_begin, bi_ramdisk_end; + struct { /* Information about [main] video screen */ + short x_res; /* Horizontal resolution in pixels */ + short y_res; /* Vertical resolution in pixels */ + short bpp; /* Bits/pixel */ + short mode; /* Type of pixels (packed, indexed) */ + unsigned long fb; /* Pointer to frame buffer (pixel) memory */ + } bi_video; + void (*bi_cputc)(char); /* Write a character to the RedBoot console */ + char (*bi_cgetc)(void); /* Read a character from the RedBoot console */ + int (*bi_ctstc)(void); /* Test for input on the RedBoot console */ +} bd_t; + +#define BI_REV 0x0102 /* Version 1.02 */ + +#define bi_pci_busfreq bi_pci_freq +#define bi_immr_base bi_immr +#endif diff --git a/arch/powerpc/boot/wrapper b/arch/powerpc/boot/wrapper index 154df055aad..763a0c46f44 100755 --- a/arch/powerpc/boot/wrapper +++ b/arch/powerpc/boot/wrapper @@ -168,7 +168,7 @@ ps3) ksection=.kernel:vmlinux.bin isection=.kernel:initrd ;; -ep88xc|ep405) +ep88xc|ep405|redboot*|ep8248e) platformo="$object/fixed-head.o $object/$platform.o" binary=y ;; |