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-rw-r--r--arch/powerpc/mm/hash_native_64.c7
-rw-r--r--arch/powerpc/mm/hash_utils_64.c5
-rw-r--r--arch/powerpc/mm/lmb.c2
-rw-r--r--arch/powerpc/mm/pgtable_32.c5
4 files changed, 15 insertions, 4 deletions
diff --git a/arch/powerpc/mm/hash_native_64.c b/arch/powerpc/mm/hash_native_64.c
index d96bcfe4c6f..33654d1b1b4 100644
--- a/arch/powerpc/mm/hash_native_64.c
+++ b/arch/powerpc/mm/hash_native_64.c
@@ -403,12 +403,17 @@ static void native_hpte_clear(void)
*/
hpte_v = hptep->v;
+ /*
+ * Call __tlbie() here rather than tlbie() since we
+ * already hold the native_tlbie_lock.
+ */
if (hpte_v & HPTE_V_VALID) {
hptep->v = 0;
- tlbie(slot2va(hpte_v, slot), MMU_PAGE_4K, 0);
+ __tlbie(slot2va(hpte_v, slot), MMU_PAGE_4K);
}
}
+ asm volatile("eieio; tlbsync; ptesync":::"memory");
spin_unlock(&native_tlbie_lock);
local_irq_restore(flags);
}
diff --git a/arch/powerpc/mm/hash_utils_64.c b/arch/powerpc/mm/hash_utils_64.c
index 95b4cd6b65e..7d9ce9a4821 100644
--- a/arch/powerpc/mm/hash_utils_64.c
+++ b/arch/powerpc/mm/hash_utils_64.c
@@ -88,6 +88,7 @@ static unsigned long _SDR1;
struct mmu_psize_def mmu_psize_defs[MMU_PAGE_COUNT];
hpte_t *htab_address;
+unsigned long htab_size_bytes;
unsigned long htab_hash_mask;
int mmu_linear_psize = MMU_PAGE_4K;
int mmu_virtual_psize = MMU_PAGE_4K;
@@ -168,7 +169,7 @@ int htab_bolt_mapping(unsigned long vstart, unsigned long vend,
#ifdef CONFIG_PPC_ISERIES
if (_machine == PLATFORM_ISERIES_LPAR)
ret = iSeries_hpte_insert(hpteg, va,
- virt_to_abs(paddr),
+ __pa(vaddr),
tmp_mode,
HPTE_V_BOLTED,
psize);
@@ -399,7 +400,7 @@ void create_section_mapping(unsigned long start, unsigned long end)
void __init htab_initialize(void)
{
- unsigned long table, htab_size_bytes;
+ unsigned long table;
unsigned long pteg_count;
unsigned long mode_rw;
unsigned long base = 0, size = 0;
diff --git a/arch/powerpc/mm/lmb.c b/arch/powerpc/mm/lmb.c
index 874cd103ce6..417d5851855 100644
--- a/arch/powerpc/mm/lmb.c
+++ b/arch/powerpc/mm/lmb.c
@@ -232,7 +232,7 @@ unsigned long __init lmb_alloc_base(unsigned long size, unsigned long align,
alloc = __lmb_alloc_base(size, align, max_addr);
- if (alloc < 0)
+ if (alloc == 0)
panic("ERROR: Failed to allocate 0x%lx bytes below 0x%lx.\n",
size, max_addr);
diff --git a/arch/powerpc/mm/pgtable_32.c b/arch/powerpc/mm/pgtable_32.c
index f4e5ac12261..d296eb6b454 100644
--- a/arch/powerpc/mm/pgtable_32.c
+++ b/arch/powerpc/mm/pgtable_32.c
@@ -37,6 +37,7 @@
unsigned long ioremap_base;
unsigned long ioremap_bot;
+EXPORT_SYMBOL(ioremap_bot); /* aka VMALLOC_END */
int io_bat_index;
#if defined(CONFIG_6xx) || defined(CONFIG_POWER3)
@@ -153,6 +154,7 @@ ioremap64(unsigned long long addr, unsigned long size)
{
return __ioremap(addr, size, _PAGE_NO_CACHE);
}
+EXPORT_SYMBOL(ioremap64);
void __iomem *
ioremap(phys_addr_t addr, unsigned long size)
@@ -162,6 +164,7 @@ ioremap(phys_addr_t addr, unsigned long size)
return ioremap64(addr64, size);
}
#endif /* CONFIG_PHYS_64BIT */
+EXPORT_SYMBOL(ioremap);
void __iomem *
__ioremap(phys_addr_t addr, unsigned long size, unsigned long flags)
@@ -247,6 +250,7 @@ __ioremap(phys_addr_t addr, unsigned long size, unsigned long flags)
out:
return (void __iomem *) (v + ((unsigned long)addr & ~PAGE_MASK));
}
+EXPORT_SYMBOL(__ioremap);
void iounmap(volatile void __iomem *addr)
{
@@ -259,6 +263,7 @@ void iounmap(volatile void __iomem *addr)
if (addr > high_memory && (unsigned long) addr < ioremap_bot)
vunmap((void *) (PAGE_MASK & (unsigned long)addr));
}
+EXPORT_SYMBOL(iounmap);
void __iomem *ioport_map(unsigned long port, unsigned int len)
{