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-rw-r--r--arch/powerpc/oprofile/common.c2
-rw-r--r--arch/powerpc/oprofile/op_model_7450.c10
-rw-r--r--arch/powerpc/oprofile/op_model_fsl_booke.c81
-rw-r--r--arch/powerpc/oprofile/op_model_power4.c10
-rw-r--r--arch/powerpc/oprofile/op_model_rs64.c10
5 files changed, 98 insertions, 15 deletions
diff --git a/arch/powerpc/oprofile/common.c b/arch/powerpc/oprofile/common.c
index b6d82390b6a..fbd62eacfdf 100644
--- a/arch/powerpc/oprofile/common.c
+++ b/arch/powerpc/oprofile/common.c
@@ -149,6 +149,8 @@ int __init oprofile_arch_init(struct oprofile_operations *ops)
#ifdef CONFIG_PPC64
#ifdef CONFIG_PPC_CELL_NATIVE
case PPC_OPROFILE_CELL:
+ if (firmware_has_feature(FW_FEATURE_LPAR))
+ return -ENODEV;
model = &op_model_cell;
break;
#endif
diff --git a/arch/powerpc/oprofile/op_model_7450.c b/arch/powerpc/oprofile/op_model_7450.c
index f481c0ed5e6..5d1bbaf35cc 100644
--- a/arch/powerpc/oprofile/op_model_7450.c
+++ b/arch/powerpc/oprofile/op_model_7450.c
@@ -137,9 +137,9 @@ static void fsl7450_start(struct op_counter_config *ctr)
for (i = 0; i < NUM_CTRS; ++i) {
if (ctr[i].enabled)
- ctr_write(i, reset_value[i]);
+ classic_ctr_write(i, reset_value[i]);
else
- ctr_write(i, 0);
+ classic_ctr_write(i, 0);
}
/* Clear the freeze bit, and enable the interrupt.
@@ -179,13 +179,13 @@ static void fsl7450_handle_interrupt(struct pt_regs *regs,
is_kernel = is_kernel_addr(pc);
for (i = 0; i < NUM_CTRS; ++i) {
- val = ctr_read(i);
+ val = classic_ctr_read(i);
if (val < 0) {
if (oprofile_running && ctr[i].enabled) {
oprofile_add_ext_sample(pc, regs, i, is_kernel);
- ctr_write(i, reset_value[i]);
+ classic_ctr_write(i, reset_value[i]);
} else {
- ctr_write(i, 0);
+ classic_ctr_write(i, 0);
}
}
}
diff --git a/arch/powerpc/oprofile/op_model_fsl_booke.c b/arch/powerpc/oprofile/op_model_fsl_booke.c
index 0b3c31f5209..2267eb8c661 100644
--- a/arch/powerpc/oprofile/op_model_fsl_booke.c
+++ b/arch/powerpc/oprofile/op_model_fsl_booke.c
@@ -32,6 +32,87 @@ static unsigned long reset_value[OP_MAX_COUNTER];
static int num_counters;
static int oprofile_running;
+static inline u32 get_pmlca(int ctr)
+{
+ u32 pmlca;
+
+ switch (ctr) {
+ case 0:
+ pmlca = mfpmr(PMRN_PMLCA0);
+ break;
+ case 1:
+ pmlca = mfpmr(PMRN_PMLCA1);
+ break;
+ case 2:
+ pmlca = mfpmr(PMRN_PMLCA2);
+ break;
+ case 3:
+ pmlca = mfpmr(PMRN_PMLCA3);
+ break;
+ default:
+ panic("Bad ctr number\n");
+ }
+
+ return pmlca;
+}
+
+static inline void set_pmlca(int ctr, u32 pmlca)
+{
+ switch (ctr) {
+ case 0:
+ mtpmr(PMRN_PMLCA0, pmlca);
+ break;
+ case 1:
+ mtpmr(PMRN_PMLCA1, pmlca);
+ break;
+ case 2:
+ mtpmr(PMRN_PMLCA2, pmlca);
+ break;
+ case 3:
+ mtpmr(PMRN_PMLCA3, pmlca);
+ break;
+ default:
+ panic("Bad ctr number\n");
+ }
+}
+
+static inline unsigned int ctr_read(unsigned int i)
+{
+ switch(i) {
+ case 0:
+ return mfpmr(PMRN_PMC0);
+ case 1:
+ return mfpmr(PMRN_PMC1);
+ case 2:
+ return mfpmr(PMRN_PMC2);
+ case 3:
+ return mfpmr(PMRN_PMC3);
+ default:
+ return 0;
+ }
+}
+
+static inline void ctr_write(unsigned int i, unsigned int val)
+{
+ switch(i) {
+ case 0:
+ mtpmr(PMRN_PMC0, val);
+ break;
+ case 1:
+ mtpmr(PMRN_PMC1, val);
+ break;
+ case 2:
+ mtpmr(PMRN_PMC2, val);
+ break;
+ case 3:
+ mtpmr(PMRN_PMC3, val);
+ break;
+ default:
+ break;
+ }
+}
+
+
static void init_pmc_stop(int ctr)
{
u32 pmlca = (PMLCA_FC | PMLCA_FCS | PMLCA_FCU |
diff --git a/arch/powerpc/oprofile/op_model_power4.c b/arch/powerpc/oprofile/op_model_power4.c
index 356709d515b..fe597a154d4 100644
--- a/arch/powerpc/oprofile/op_model_power4.c
+++ b/arch/powerpc/oprofile/op_model_power4.c
@@ -121,9 +121,9 @@ static void power4_start(struct op_counter_config *ctr)
for (i = 0; i < cur_cpu_spec->num_pmcs; ++i) {
if (ctr[i].enabled) {
- ctr_write(i, reset_value[i]);
+ classic_ctr_write(i, reset_value[i]);
} else {
- ctr_write(i, 0);
+ classic_ctr_write(i, 0);
}
}
@@ -254,13 +254,13 @@ static void power4_handle_interrupt(struct pt_regs *regs,
mtmsrd(mfmsr() | MSR_PMM);
for (i = 0; i < cur_cpu_spec->num_pmcs; ++i) {
- val = ctr_read(i);
+ val = classic_ctr_read(i);
if (val < 0) {
if (oprofile_running && ctr[i].enabled) {
oprofile_add_ext_sample(pc, regs, i, is_kernel);
- ctr_write(i, reset_value[i]);
+ classic_ctr_write(i, reset_value[i]);
} else {
- ctr_write(i, 0);
+ classic_ctr_write(i, 0);
}
}
}
diff --git a/arch/powerpc/oprofile/op_model_rs64.c b/arch/powerpc/oprofile/op_model_rs64.c
index 19c5ee089bc..c731acbfb2a 100644
--- a/arch/powerpc/oprofile/op_model_rs64.c
+++ b/arch/powerpc/oprofile/op_model_rs64.c
@@ -137,10 +137,10 @@ static void rs64_start(struct op_counter_config *ctr)
for (i = 0; i < num_counters; ++i) {
if (ctr[i].enabled) {
- ctr_write(i, reset_value[i]);
+ classic_ctr_write(i, reset_value[i]);
ctrl_write(i, ctr[i].event);
} else {
- ctr_write(i, 0);
+ classic_ctr_write(i, 0);
}
}
@@ -186,13 +186,13 @@ static void rs64_handle_interrupt(struct pt_regs *regs,
mtmsrd(mfmsr() | MSR_PMM);
for (i = 0; i < num_counters; ++i) {
- val = ctr_read(i);
+ val = classic_ctr_read(i);
if (val < 0) {
if (ctr[i].enabled) {
oprofile_add_ext_sample(pc, regs, i, is_kernel);
- ctr_write(i, reset_value[i]);
+ classic_ctr_write(i, reset_value[i]);
} else {
- ctr_write(i, 0);
+ classic_ctr_write(i, 0);
}
}
}
generated by cgit v1.2.3 (git 2.25.1) at 2024-12-12 11:59:09 +0000