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-rw-r--r--arch/powerpc/sysdev/Makefile4
-rw-r--r--arch/powerpc/sysdev/commproc.h12
-rw-r--r--arch/powerpc/sysdev/cpm1.c (renamed from arch/powerpc/sysdev/commproc.c)42
-rw-r--r--arch/powerpc/sysdev/cpm2.c (renamed from arch/powerpc/sysdev/cpm2_common.c)3
-rw-r--r--arch/powerpc/sysdev/fsl_soc.c99
-rw-r--r--arch/powerpc/sysdev/ipic.c6
-rw-r--r--arch/powerpc/sysdev/micropatch.c2
-rw-r--r--arch/powerpc/sysdev/mpc8xx_pic.c1
-rw-r--r--arch/powerpc/sysdev/qe_lib/qe.c63
9 files changed, 128 insertions, 104 deletions
diff --git a/arch/powerpc/sysdev/Makefile b/arch/powerpc/sysdev/Makefile
index 702916bf28f..15f3e8527d7 100644
--- a/arch/powerpc/sysdev/Makefile
+++ b/arch/powerpc/sysdev/Makefile
@@ -37,8 +37,8 @@ endif
# Temporary hack until we have migrated to asm-powerpc
ifeq ($(ARCH),powerpc)
obj-$(CONFIG_CPM) += cpm_common.o
-obj-$(CONFIG_CPM2) += cpm2_common.o cpm2_pic.o
+obj-$(CONFIG_CPM2) += cpm2.o cpm2_pic.o
obj-$(CONFIG_PPC_DCR) += dcr.o
-obj-$(CONFIG_8xx) += mpc8xx_pic.o commproc.o
+obj-$(CONFIG_8xx) += mpc8xx_pic.o cpm1.o
obj-$(CONFIG_UCODE_PATCH) += micropatch.o
endif
diff --git a/arch/powerpc/sysdev/commproc.h b/arch/powerpc/sysdev/commproc.h
deleted file mode 100644
index 9155ba46727..00000000000
--- a/arch/powerpc/sysdev/commproc.h
+++ /dev/null
@@ -1,12 +0,0 @@
-#ifndef _POWERPC_SYSDEV_COMMPROC_H
-#define _POWERPC_SYSDEV_COMMPROC_H
-
-extern void cpm_reset(void);
-extern void mpc8xx_restart(char *cmd);
-extern void mpc8xx_calibrate_decr(void);
-extern int mpc8xx_set_rtc_time(struct rtc_time *tm);
-extern void mpc8xx_get_rtc_time(struct rtc_time *tm);
-extern void m8xx_pic_init(void);
-extern unsigned int mpc8xx_get_irq(void);
-
-#endif
diff --git a/arch/powerpc/sysdev/commproc.c b/arch/powerpc/sysdev/cpm1.c
index 621bc6c1d40..df8bd2b6479 100644
--- a/arch/powerpc/sysdev/commproc.c
+++ b/arch/powerpc/sysdev/cpm1.c
@@ -30,11 +30,10 @@
#include <linux/interrupt.h>
#include <linux/irq.h>
#include <linux/module.h>
-#include <asm/mpc8xx.h>
#include <asm/page.h>
#include <asm/pgtable.h>
#include <asm/8xx_immap.h>
-#include <asm/commproc.h>
+#include <asm/cpm1.h>
#include <asm/io.h>
#include <asm/tlbflush.h>
#include <asm/rheap.h>
@@ -48,8 +47,6 @@
#ifndef CONFIG_PPC_CPM_NEW_BINDING
static void m8xx_cpm_dpinit(void);
#endif
-static uint host_buffer; /* One page of host buffer */
-static uint host_end; /* end + 1 */
cpm8xx_t __iomem *cpmp; /* Pointer to comm processor space */
immap_t __iomem *mpc8xx_immr;
static cpic8xx_t __iomem *cpic_reg;
@@ -268,41 +265,6 @@ out:
}
EXPORT_SYMBOL(cpm_command);
-/* We used to do this earlier, but have to postpone as long as possible
- * to ensure the kernel VM is now running.
- */
-static void
-alloc_host_memory(void)
-{
- dma_addr_t physaddr;
-
- /* Set the host page for allocation.
- */
- host_buffer = (uint)dma_alloc_coherent(NULL, PAGE_SIZE, &physaddr,
- GFP_KERNEL);
- host_end = host_buffer + PAGE_SIZE;
-}
-
-/* We also own one page of host buffer space for the allocation of
- * UART "fifos" and the like.
- */
-uint
-m8xx_cpm_hostalloc(uint size)
-{
- uint retloc;
-
- if (host_buffer == 0)
- alloc_host_memory();
-
- if ((host_buffer + size) >= host_end)
- return(0);
-
- retloc = host_buffer;
- host_buffer += size;
-
- return(retloc);
-}
-
/* Set a baud rate generator. This needs lots of work. There are
* four BRGs, any of which can be wired to any channel.
* The internal baud rate clock is the system clock divided by 16.
@@ -328,7 +290,7 @@ cpm_setbrg(uint brg, uint rate)
out_be32(bp, (((BRG_UART_CLK / rate) - 1) << 1) | CPM_BRG_EN);
else
out_be32(bp, (((BRG_UART_CLK_DIV16 / rate) - 1) << 1) |
- CPM_BRG_EN | CPM_BRG_DIV16);
+ CPM_BRG_EN | CPM_BRG_DIV16);
}
#ifndef CONFIG_PPC_CPM_NEW_BINDING
diff --git a/arch/powerpc/sysdev/cpm2_common.c b/arch/powerpc/sysdev/cpm2.c
index f7188e2ba66..7be71123212 100644
--- a/arch/powerpc/sysdev/cpm2_common.c
+++ b/arch/powerpc/sysdev/cpm2.c
@@ -153,8 +153,7 @@ cpm2_fastbrg(uint brg, uint rate, int div16)
if (brg < 4) {
bp = cpm2_map_size(im_brgc1, 16);
- }
- else {
+ } else {
bp = cpm2_map_size(im_brgc5, 16);
brg -= 4;
}
diff --git a/arch/powerpc/sysdev/fsl_soc.c b/arch/powerpc/sysdev/fsl_soc.c
index f2c0988a03b..e48b20e934c 100644
--- a/arch/powerpc/sysdev/fsl_soc.c
+++ b/arch/powerpc/sysdev/fsl_soc.c
@@ -75,7 +75,7 @@ phys_addr_t get_immrbase(void)
EXPORT_SYMBOL(get_immrbase);
-#if defined(CONFIG_CPM2) || defined(CONFIG_8xx)
+#if defined(CONFIG_CPM2) || defined(CONFIG_QUICC_ENGINE) || defined(CONFIG_8xx)
static u32 brgfreq = -1;
@@ -100,11 +100,21 @@ u32 get_brgfreq(void)
/* Legacy device binding -- will go away when no users are left. */
node = of_find_node_by_type(NULL, "cpm");
+ if (!node)
+ node = of_find_compatible_node(NULL, NULL, "fsl,qe");
+ if (!node)
+ node = of_find_node_by_type(NULL, "qe");
+
if (node) {
prop = of_get_property(node, "brg-frequency", &size);
if (prop && size == 4)
brgfreq = *prop;
+ if (brgfreq == -1 || brgfreq == 0) {
+ prop = of_get_property(node, "bus-frequency", &size);
+ if (prop && size == 4)
+ brgfreq = *prop / 2;
+ }
of_node_put(node);
}
@@ -1266,31 +1276,17 @@ arch_initcall(cpm_smc_uart_of_init);
#endif /* CONFIG_8xx */
#endif /* CONFIG_PPC_CPM_NEW_BINDING */
-int __init fsl_spi_init(struct spi_board_info *board_infos,
- unsigned int num_board_infos,
- void (*activate_cs)(u8 cs, u8 polarity),
- void (*deactivate_cs)(u8 cs, u8 polarity))
+static int __init of_fsl_spi_probe(char *type, char *compatible, u32 sysclk,
+ struct spi_board_info *board_infos,
+ unsigned int num_board_infos,
+ void (*activate_cs)(u8 cs, u8 polarity),
+ void (*deactivate_cs)(u8 cs, u8 polarity))
{
struct device_node *np;
- unsigned int i;
- const u32 *sysclk;
-
- /* SPI controller is either clocked from QE or SoC clock */
- np = of_find_node_by_type(NULL, "qe");
- if (!np)
- np = of_find_node_by_type(NULL, "soc");
-
- if (!np)
- return -ENODEV;
-
- sysclk = of_get_property(np, "bus-frequency", NULL);
- if (!sysclk)
- return -ENODEV;
+ unsigned int i = 0;
- for (np = NULL, i = 1;
- (np = of_find_compatible_node(np, "spi", "fsl_spi")) != NULL;
- i++) {
- int ret = 0;
+ for_each_compatible_node(np, type, compatible) {
+ int ret;
unsigned int j;
const void *prop;
struct resource res[2];
@@ -1302,13 +1298,17 @@ int __init fsl_spi_init(struct spi_board_info *board_infos,
memset(res, 0, sizeof(res));
- pdata.sysclk = *sysclk;
+ pdata.sysclk = sysclk;
prop = of_get_property(np, "reg", NULL);
if (!prop)
goto err;
pdata.bus_num = *(u32 *)prop;
+ prop = of_get_property(np, "cell-index", NULL);
+ if (prop)
+ i = *(u32 *)prop;
+
prop = of_get_property(np, "mode", NULL);
if (prop && !strcmp(prop, "cpu-qe"))
pdata.qe_mode = 1;
@@ -1319,7 +1319,7 @@ int __init fsl_spi_init(struct spi_board_info *board_infos,
}
if (!pdata.max_chipselect)
- goto err;
+ continue;
ret = of_address_to_resource(np, 0, &res[0]);
if (ret)
@@ -1346,13 +1346,58 @@ int __init fsl_spi_init(struct spi_board_info *board_infos,
if (ret)
goto unreg;
- continue;
+ goto next;
unreg:
platform_device_del(pdev);
err:
- continue;
+ pr_err("%s: registration failed\n", np->full_name);
+next:
+ i++;
}
+ return i;
+}
+
+int __init fsl_spi_init(struct spi_board_info *board_infos,
+ unsigned int num_board_infos,
+ void (*activate_cs)(u8 cs, u8 polarity),
+ void (*deactivate_cs)(u8 cs, u8 polarity))
+{
+ u32 sysclk = -1;
+ int ret;
+
+#ifdef CONFIG_QUICC_ENGINE
+ /* SPI controller is either clocked from QE or SoC clock */
+ sysclk = get_brgfreq();
+#endif
+ if (sysclk == -1) {
+ struct device_node *np;
+ const u32 *freq;
+ int size;
+
+ np = of_find_node_by_type(NULL, "soc");
+ if (!np)
+ return -ENODEV;
+
+ freq = of_get_property(np, "clock-frequency", &size);
+ if (!freq || size != sizeof(*freq) || *freq == 0) {
+ freq = of_get_property(np, "bus-frequency", &size);
+ if (!freq || size != sizeof(*freq) || *freq == 0) {
+ of_node_put(np);
+ return -ENODEV;
+ }
+ }
+
+ sysclk = *freq;
+ of_node_put(np);
+ }
+
+ ret = of_fsl_spi_probe(NULL, "fsl,spi", sysclk, board_infos,
+ num_board_infos, activate_cs, deactivate_cs);
+ if (!ret)
+ of_fsl_spi_probe("spi", "fsl_spi", sysclk, board_infos,
+ num_board_infos, activate_cs, deactivate_cs);
+
return spi_register_board_info(board_infos, num_board_infos);
}
diff --git a/arch/powerpc/sysdev/ipic.c b/arch/powerpc/sysdev/ipic.c
index 4c016da6842..d7f6a70e78d 100644
--- a/arch/powerpc/sysdev/ipic.c
+++ b/arch/powerpc/sysdev/ipic.c
@@ -497,6 +497,12 @@ static struct ipic_info ipic_info[] = {
.force = IPIC_SIFCR_L,
.bit = 27,
},
+ [94] = {
+ .mask = IPIC_SIMSR_L,
+ .prio = 0,
+ .force = IPIC_SIFCR_L,
+ .bit = 30,
+ },
};
static inline u32 ipic_read(volatile u32 __iomem *base, unsigned int reg)
diff --git a/arch/powerpc/sysdev/micropatch.c b/arch/powerpc/sysdev/micropatch.c
index 712b10a55f8..d8d60284075 100644
--- a/arch/powerpc/sysdev/micropatch.c
+++ b/arch/powerpc/sysdev/micropatch.c
@@ -16,7 +16,7 @@
#include <asm/page.h>
#include <asm/pgtable.h>
#include <asm/8xx_immap.h>
-#include <asm/commproc.h>
+#include <asm/cpm1.h>
/*
* I2C/SPI relocation patch arrays.
diff --git a/arch/powerpc/sysdev/mpc8xx_pic.c b/arch/powerpc/sysdev/mpc8xx_pic.c
index 7aa4ff5f5ec..0e74a4bd982 100644
--- a/arch/powerpc/sysdev/mpc8xx_pic.c
+++ b/arch/powerpc/sysdev/mpc8xx_pic.c
@@ -10,7 +10,6 @@
#include <asm/irq.h>
#include <asm/io.h>
#include <asm/8xx_immap.h>
-#include <asm/mpc8xx.h>
#include "mpc8xx_pic.h"
diff --git a/arch/powerpc/sysdev/qe_lib/qe.c b/arch/powerpc/sysdev/qe_lib/qe.c
index 3925eae9b0f..5ef844da935 100644
--- a/arch/powerpc/sysdev/qe_lib/qe.c
+++ b/arch/powerpc/sysdev/qe_lib/qe.c
@@ -65,17 +65,22 @@ static phys_addr_t qebase = -1;
phys_addr_t get_qe_base(void)
{
struct device_node *qe;
+ unsigned int size;
+ const void *prop;
if (qebase != -1)
return qebase;
- qe = of_find_node_by_type(NULL, "qe");
- if (qe) {
- unsigned int size;
- const void *prop = of_get_property(qe, "reg", &size);
- qebase = of_translate_address(qe, prop);
- of_node_put(qe);
- };
+ qe = of_find_compatible_node(NULL, NULL, "fsl,qe");
+ if (!qe) {
+ qe = of_find_node_by_type(NULL, "qe");
+ if (!qe)
+ return qebase;
+ }
+
+ prop = of_get_property(qe, "reg", &size);
+ qebase = of_translate_address(qe, prop);
+ of_node_put(qe);
return qebase;
}
@@ -153,16 +158,26 @@ static unsigned int brg_clk = 0;
unsigned int get_brg_clk(void)
{
struct device_node *qe;
+ unsigned int size;
+ const u32 *prop;
+
if (brg_clk)
return brg_clk;
- qe = of_find_node_by_type(NULL, "qe");
- if (qe) {
- unsigned int size;
- const u32 *prop = of_get_property(qe, "brg-frequency", &size);
- brg_clk = *prop;
- of_node_put(qe);
- };
+ qe = of_find_compatible_node(NULL, NULL, "fsl,qe");
+ if (!qe) {
+ qe = of_find_node_by_type(NULL, "qe");
+ if (!qe)
+ return brg_clk;
+ }
+
+ prop = of_get_property(qe, "brg-frequency", &size);
+ if (!prop || size != sizeof(*prop))
+ return brg_clk;
+
+ brg_clk = *prop;
+ of_node_put(qe);
+
return brg_clk;
}
@@ -322,7 +337,7 @@ static rh_info_t qe_muram_info;
static void qe_muram_init(void)
{
struct device_node *np;
- u32 address;
+ const u32 *address;
u64 size;
unsigned int flags;
@@ -335,11 +350,21 @@ static void qe_muram_init(void)
/* XXX: This is a subset of the available muram. It
* varies with the processor and the microcode patches activated.
*/
- if ((np = of_find_node_by_name(NULL, "data-only")) != NULL) {
- address = *of_get_address(np, 0, &size, &flags);
- of_node_put(np);
- rh_attach_region(&qe_muram_info, address, (int) size);
+ np = of_find_compatible_node(NULL, NULL, "fsl,qe-muram-data");
+ if (!np) {
+ np = of_find_node_by_name(NULL, "data-only");
+ if (!np) {
+ WARN_ON(1);
+ return;
+ }
}
+
+ address = of_get_address(np, 0, &size, &flags);
+ WARN_ON(!address);
+
+ of_node_put(np);
+ if (address)
+ rh_attach_region(&qe_muram_info, *address, (int)size);
}
/* This function returns an index into the MURAM area.