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-rw-r--r--arch/x86/include/asm/bigsmp/apic.h2
-rw-r--r--arch/x86/include/asm/es7000/apic.h4
-rw-r--r--arch/x86/include/asm/mach-default/mach_apic.h4
-rw-r--r--arch/x86/include/asm/numaq/apic.h2
-rw-r--r--arch/x86/include/asm/summit/apic.h2
5 files changed, 7 insertions, 7 deletions
diff --git a/arch/x86/include/asm/bigsmp/apic.h b/arch/x86/include/asm/bigsmp/apic.h
index dca2d5b01da..d6aeca3c5a8 100644
--- a/arch/x86/include/asm/bigsmp/apic.h
+++ b/arch/x86/include/asm/bigsmp/apic.h
@@ -9,7 +9,7 @@ static inline int bigsmp_apic_id_registered(void)
return 1;
}
-static inline const cpumask_t *target_cpus(void)
+static inline const cpumask_t *bigsmp_target_cpus(void)
{
#ifdef CONFIG_SMP
return &cpu_online_map;
diff --git a/arch/x86/include/asm/es7000/apic.h b/arch/x86/include/asm/es7000/apic.h
index 342416b3fad..7e5c31a4f8d 100644
--- a/arch/x86/include/asm/es7000/apic.h
+++ b/arch/x86/include/asm/es7000/apic.h
@@ -16,7 +16,7 @@ static inline const cpumask_t *target_cpus_cluster(void)
return &CPU_MASK_ALL;
}
-static inline const cpumask_t *target_cpus(void)
+static inline const cpumask_t *es7000_target_cpus(void)
{
return &cpumask_of_cpu(smp_processor_id());
}
@@ -83,7 +83,7 @@ static inline void setup_apic_routing(void)
printk("Enabling APIC mode: %s. Using %d I/O APICs, target cpus %lx\n",
(apic_version[apic] == 0x14) ?
"Physical Cluster" : "Logical Cluster",
- nr_ioapics, cpus_addr(*target_cpus())[0]);
+ nr_ioapics, cpus_addr(*es7000_target_cpus())[0]);
}
static inline int multi_timer_check(int apic, int irq)
diff --git a/arch/x86/include/asm/mach-default/mach_apic.h b/arch/x86/include/asm/mach-default/mach_apic.h
index ce3bc4845b9..af1607ddd2a 100644
--- a/arch/x86/include/asm/mach-default/mach_apic.h
+++ b/arch/x86/include/asm/mach-default/mach_apic.h
@@ -8,7 +8,7 @@
#define APIC_DFR_VALUE (APIC_DFR_FLAT)
-static inline const struct cpumask *target_cpus(void)
+static inline const struct cpumask *default_target_cpus(void)
{
#ifdef CONFIG_SMP
return cpu_online_mask;
@@ -33,7 +33,7 @@ static inline const struct cpumask *target_cpus(void)
#define wakeup_secondary_cpu (apic->wakeup_cpu)
extern void setup_apic_routing(void);
#else
-#define TARGET_CPUS (target_cpus())
+#define TARGET_CPUS (default_target_cpus())
#define wakeup_secondary_cpu wakeup_secondary_cpu_via_init
/*
* Set up the logical destination ID.
diff --git a/arch/x86/include/asm/numaq/apic.h b/arch/x86/include/asm/numaq/apic.h
index a9d846769a0..1111ff9e41d 100644
--- a/arch/x86/include/asm/numaq/apic.h
+++ b/arch/x86/include/asm/numaq/apic.h
@@ -7,7 +7,7 @@
#define APIC_DFR_VALUE (APIC_DFR_CLUSTER)
-static inline const cpumask_t *target_cpus(void)
+static inline const cpumask_t *numaq_target_cpus(void)
{
return &CPU_MASK_ALL;
}
diff --git a/arch/x86/include/asm/summit/apic.h b/arch/x86/include/asm/summit/apic.h
index 427d0889f6f..7c1f9151429 100644
--- a/arch/x86/include/asm/summit/apic.h
+++ b/arch/x86/include/asm/summit/apic.h
@@ -15,7 +15,7 @@
#define APIC_DFR_VALUE (APIC_DFR_CLUSTER)
-static inline const cpumask_t *target_cpus(void)
+static inline const cpumask_t *summit_target_cpus(void)
{
/* CPU_MASK_ALL (0xff) has undefined behaviour with
* dest_LowestPrio mode logical clustered apic interrupt routing