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-rw-r--r--arch/x86/kernel/apic_32.c3
-rw-r--r--arch/x86/kernel/apic_64.c4
-rw-r--r--arch/x86/kernel/mpparse_32.c13
-rw-r--r--arch/x86/kernel/mpparse_64.c9
-rw-r--r--arch/x86/kernel/setup.c8
-rw-r--r--arch/x86/kernel/smpboot.c5
6 files changed, 8 insertions, 34 deletions
diff --git a/arch/x86/kernel/apic_32.c b/arch/x86/kernel/apic_32.c
index 4905a11b30e..687208190b0 100644
--- a/arch/x86/kernel/apic_32.c
+++ b/arch/x86/kernel/apic_32.c
@@ -52,9 +52,6 @@
unsigned long mp_lapic_addr;
-/* Processor that is doing the boot up */
-unsigned int boot_cpu_physical_apicid = -1U;
-
DEFINE_PER_CPU(u16, x86_bios_cpu_apicid) = BAD_APICID;
EXPORT_PER_CPU_SYMBOL(x86_bios_cpu_apicid);
diff --git a/arch/x86/kernel/apic_64.c b/arch/x86/kernel/apic_64.c
index 274ebabf49a..9e8e5c050c5 100644
--- a/arch/x86/kernel/apic_64.c
+++ b/arch/x86/kernel/apic_64.c
@@ -87,10 +87,6 @@ static unsigned long apic_phys;
unsigned long mp_lapic_addr;
-/* Processor that is doing the boot up */
-unsigned int boot_cpu_physical_apicid = -1U;
-EXPORT_SYMBOL(boot_cpu_physical_apicid);
-
DEFINE_PER_CPU(u16, x86_bios_cpu_apicid) = BAD_APICID;
EXPORT_PER_CPU_SYMBOL(x86_bios_cpu_apicid);
diff --git a/arch/x86/kernel/mpparse_32.c b/arch/x86/kernel/mpparse_32.c
index 2b16e5c71a6..ed4b3bc0e97 100644
--- a/arch/x86/kernel/mpparse_32.c
+++ b/arch/x86/kernel/mpparse_32.c
@@ -49,15 +49,6 @@ static int mp_current_pci_id;
int pic_mode;
-/* Make it easy to share the UP and SMP code: */
-#ifndef CONFIG_X86_SMP
-unsigned int num_processors;
-unsigned disabled_cpus __cpuinitdata;
-#ifndef CONFIG_X86_LOCAL_APIC
-unsigned int boot_cpu_physical_apicid = -1U;
-#endif
-#endif
-
/*
* Intel MP BIOS table parsing routines:
*/
@@ -93,9 +84,7 @@ static void __cpuinit MP_processor_info(struct mpc_config_processor *m)
int apicid;
if (!(m->mpc_cpuflag & CPU_ENABLED)) {
-#ifdef CONFIG_X86_SMP
disabled_cpus++;
-#endif
return;
}
@@ -817,9 +806,7 @@ void __cpuinit mp_register_lapic (int id, u8 enabled)
}
if (!enabled) {
-#ifdef CONFIG_X86_SMP
++disabled_cpus;
-#endif
return;
}
diff --git a/arch/x86/kernel/mpparse_64.c b/arch/x86/kernel/mpparse_64.c
index 07c98dbd468..f860727e915 100644
--- a/arch/x86/kernel/mpparse_64.c
+++ b/arch/x86/kernel/mpparse_64.c
@@ -45,15 +45,6 @@ int mp_bus_id_to_pci_bus[MAX_MP_BUSSES] = {[0 ... MAX_MP_BUSSES - 1] = -1 };
static int mp_current_pci_id = 0;
-/* Make it easy to share the UP and SMP code: */
-#ifndef CONFIG_X86_SMP
-unsigned int num_processors;
-unsigned disabled_cpus __cpuinitdata;
-#ifndef CONFIG_X86_LOCAL_APIC
-unsigned int boot_cpu_physical_apicid = -1U;
-#endif
-#endif
-
/*
* Intel MP BIOS table parsing routines:
*/
diff --git a/arch/x86/kernel/setup.c b/arch/x86/kernel/setup.c
index 011fcdd213f..ed157c90412 100644
--- a/arch/x86/kernel/setup.c
+++ b/arch/x86/kernel/setup.c
@@ -12,6 +12,14 @@
#include <asm/mpspec.h>
#include <asm/apicdef.h>
+unsigned int num_processors;
+unsigned disabled_cpus __cpuinitdata;
+/* Processor that is doing the boot up */
+unsigned int boot_cpu_physical_apicid = -1U;
+EXPORT_SYMBOL(boot_cpu_physical_apicid);
+
+physid_mask_t phys_cpu_present_map;
+
DEFINE_PER_CPU(u16, x86_cpu_to_apicid) = BAD_APICID;
EXPORT_PER_CPU_SYMBOL(x86_cpu_to_apicid);
diff --git a/arch/x86/kernel/smpboot.c b/arch/x86/kernel/smpboot.c
index abf63767cd4..21ad3f396a0 100644
--- a/arch/x86/kernel/smpboot.c
+++ b/arch/x86/kernel/smpboot.c
@@ -86,14 +86,9 @@ void *x86_bios_cpu_apicid_early_ptr;
u8 apicid_2_node[MAX_APICID];
#endif
-/* Internal processor count */
-unsigned int num_processors;
-
/* State of each CPU */
DEFINE_PER_CPU(int, cpu_state) = { 0 };
-unsigned disabled_cpus __cpuinitdata;
-
/* Store all idle threads, this can be reused instead of creating
* a new thread. Also avoids complicated thread destroy functionality
* for idle threads.