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-rw-r--r--arch/x86_64/Kconfig16
-rw-r--r--arch/x86_64/kernel/Makefile2
-rw-r--r--arch/x86_64/kernel/aperture.c2
-rw-r--r--arch/x86_64/kernel/apic.c9
-rw-r--r--arch/x86_64/kernel/io_apic.c48
-rw-r--r--arch/x86_64/kernel/pci-gart.c22
-rw-r--r--arch/x86_64/kernel/setup.c6
-rw-r--r--arch/x86_64/kernel/smpboot.c4
-rw-r--r--arch/x86_64/kernel/time.c22
9 files changed, 64 insertions, 67 deletions
diff --git a/arch/x86_64/Kconfig b/arch/x86_64/Kconfig
index 2f9deca31cc..e18eb79bf85 100644
--- a/arch/x86_64/Kconfig
+++ b/arch/x86_64/Kconfig
@@ -354,21 +354,6 @@ config HPET_TIMER
as it is off-chip. You can find the HPET spec at
<http://www.intel.com/hardwaredesign/hpetspec.htm>.
-config X86_PM_TIMER
- bool "PM timer" if EMBEDDED
- depends on ACPI
- default y
- help
- Support the ACPI PM timer for time keeping. This is slow,
- but is useful on some chipsets without HPET on systems with more
- than one CPU. On a single processor or single socket multi core
- system it is normally not required.
- When the PM timer is active 64bit vsyscalls are disabled
- and should not be enabled (/proc/sys/kernel/vsyscall64 should
- not be changed).
- The kernel selects the PM timer only as a last resort, so it is
- useful to enable just in case.
-
config HPET_EMULATE_RTC
bool "Provide RTC interrupt"
depends on HPET_TIMER && RTC=y
@@ -592,6 +577,7 @@ source "arch/x86_64/oprofile/Kconfig"
config KPROBES
bool "Kprobes (EXPERIMENTAL)"
+ depends on EXPERIMENTAL && MODULES
help
Kprobes allows you to trap at almost any kernel address and
execute a callback function. register_kprobe() establishes
diff --git a/arch/x86_64/kernel/Makefile b/arch/x86_64/kernel/Makefile
index 72fe60c20d3..a098a11e775 100644
--- a/arch/x86_64/kernel/Makefile
+++ b/arch/x86_64/kernel/Makefile
@@ -43,7 +43,7 @@ CFLAGS_vsyscall.o := $(PROFILING) -g0
bootflag-y += ../../i386/kernel/bootflag.o
cpuid-$(subst m,y,$(CONFIG_X86_CPUID)) += ../../i386/kernel/cpuid.o
-topology-y += ../../i386/mach-default/topology.o
+topology-y += ../../i386/kernel/topology.o
microcode-$(subst m,y,$(CONFIG_MICROCODE)) += ../../i386/kernel/microcode.o
intel_cacheinfo-y += ../../i386/kernel/cpu/intel_cacheinfo.o
quirks-y += ../../i386/kernel/quirks.o
diff --git a/arch/x86_64/kernel/aperture.c b/arch/x86_64/kernel/aperture.c
index e4e2b7d01f8..a0f955b9995 100644
--- a/arch/x86_64/kernel/aperture.c
+++ b/arch/x86_64/kernel/aperture.c
@@ -248,7 +248,7 @@ void __init iommu_hole_init(void)
/* Got the aperture from the AGP bridge */
} else if (swiotlb && !valid_agp) {
/* Do nothing */
- } else if ((!no_iommu && end_pfn >= MAX_DMA32_PFN) ||
+ } else if ((!no_iommu && end_pfn > MAX_DMA32_PFN) ||
force_iommu ||
valid_agp ||
fallback_aper_force) {
diff --git a/arch/x86_64/kernel/apic.c b/arch/x86_64/kernel/apic.c
index e5b14c57eaa..d70605eda33 100644
--- a/arch/x86_64/kernel/apic.c
+++ b/arch/x86_64/kernel/apic.c
@@ -962,12 +962,14 @@ void smp_apic_timer_interrupt(struct pt_regs *regs)
irq_exit();
}
+int __initdata unsync_tsc_on_multicluster;
+
/*
* oem_force_hpet_timer -- force HPET mode for some boxes.
*
* Thus far, the major user of this is IBM's Summit2 series:
*
- * Clustered boxes may have unsynced TSC problems if they are
+ * Some clustered boxes may have unsynced TSC problems if they are
* multi-chassis. Use available data to take a good guess.
* If in doubt, go HPET.
*/
@@ -977,6 +979,11 @@ __cpuinit int oem_force_hpet_timer(void)
unsigned id;
DECLARE_BITMAP(clustermap, NUM_APIC_CLUSTERS);
+ /* Only do this check on IBM machines - big Unisys systems
+ use multiple clusters too, but have synchronized TSC */
+ if (!unsync_tsc_on_multicluster)
+ return 0;
+
bitmap_zero(clustermap, NUM_APIC_CLUSTERS);
for (i = 0; i < NR_CPUS; i++) {
diff --git a/arch/x86_64/kernel/io_apic.c b/arch/x86_64/kernel/io_apic.c
index 2585c1d92b2..ffed464e6b1 100644
--- a/arch/x86_64/kernel/io_apic.c
+++ b/arch/x86_64/kernel/io_apic.c
@@ -50,6 +50,8 @@ static int no_timer_check;
int disable_timer_pin_1 __initdata;
+int timer_over_8254 __initdata = 1;
+
/* Where if anywhere is the i8259 connect in external int mode */
static struct { int pin, apic; } ioapic_i8259 = { -1, -1 };
@@ -251,6 +253,20 @@ static int __init enable_ioapic_setup(char *str)
__setup("noapic", disable_ioapic_setup);
__setup("apic", enable_ioapic_setup);
+static int __init setup_disable_8254_timer(char *s)
+{
+ timer_over_8254 = -1;
+ return 1;
+}
+static int __init setup_enable_8254_timer(char *s)
+{
+ timer_over_8254 = 2;
+ return 1;
+}
+
+__setup("disable_8254_timer", setup_disable_8254_timer);
+__setup("enable_8254_timer", setup_enable_8254_timer);
+
#include <asm/pci-direct.h>
#include <linux/pci_ids.h>
#include <linux/pci.h>
@@ -309,27 +325,20 @@ void __init check_ioapic(void)
#endif
/* RED-PEN skip them on mptables too? */
return;
+
+ /* This should be actually default, but
+ for 2.6.16 let's do it for ATI only where
+ it's really needed. */
case PCI_VENDOR_ID_ATI:
- if (apic_runs_main_timer != 0)
- break;
-#ifdef CONFIG_ACPI
- /* Don't do this for laptops right
- right now because their timer
- doesn't necessarily tick in C2/3 */
- if (acpi_fadt.revision >= 3 &&
- (acpi_fadt.plvl2_lat + acpi_fadt.plvl3_lat) < 1100) {
- printk(KERN_INFO
-"ATI board detected, but seems to be a laptop. Timer might be shakey, sorry\n");
- break;
- }
-#endif
+ if (timer_over_8254 == 1) {
+ timer_over_8254 = 0;
printk(KERN_INFO
- "ATI board detected. Using APIC/PM timer.\n");
- apic_runs_main_timer = 1;
- nohpet = 1;
+ "ATI board detected. Disabling timer routing over 8254.\n");
+ }
return;
}
+
/* No multi-function device? */
type = read_pci_config_byte(num,slot,func,
PCI_HEADER_TYPE);
@@ -1773,6 +1782,8 @@ static inline void unlock_ExtINT_logic(void)
* a wide range of boards and BIOS bugs. Fortunately only the timer IRQ
* is so screwy. Thanks to Brian Perkins for testing/hacking this beast
* fanatically on his truly buggy board.
+ *
+ * FIXME: really need to revamp this for modern platforms only.
*/
static inline void check_timer(void)
{
@@ -1795,7 +1806,8 @@ static inline void check_timer(void)
*/
apic_write(APIC_LVT0, APIC_LVT_MASKED | APIC_DM_EXTINT);
init_8259A(1);
- enable_8259A_irq(0);
+ if (timer_over_8254 > 0)
+ enable_8259A_irq(0);
pin1 = find_isa_irq_pin(0, mp_INT);
apic1 = find_isa_irq_apic(0, mp_INT);
@@ -1850,7 +1862,7 @@ static inline void check_timer(void)
}
printk(" failed.\n");
- if (nmi_watchdog) {
+ if (nmi_watchdog == NMI_IO_APIC) {
printk(KERN_WARNING "timer doesn't work through the IO-APIC - disabling NMI Watchdog!\n");
nmi_watchdog = 0;
}
diff --git a/arch/x86_64/kernel/pci-gart.c b/arch/x86_64/kernel/pci-gart.c
index dd0718dc178..0c3f052ba6c 100644
--- a/arch/x86_64/kernel/pci-gart.c
+++ b/arch/x86_64/kernel/pci-gart.c
@@ -228,11 +228,6 @@ static inline int need_iommu(struct device *dev, unsigned long addr, size_t size
int mmu = high;
if (force_iommu)
mmu = 1;
- if (no_iommu) {
- if (high)
- panic("PCI-DMA: high address but no IOMMU.\n");
- mmu = 0;
- }
return mmu;
}
@@ -241,11 +236,6 @@ static inline int nonforced_iommu(struct device *dev, unsigned long addr, size_t
u64 mask = *dev->dma_mask;
int high = addr + size >= mask;
int mmu = high;
- if (no_iommu) {
- if (high)
- panic("PCI-DMA: high address but no IOMMU.\n");
- mmu = 0;
- }
return mmu;
}
@@ -310,7 +300,7 @@ void gart_unmap_sg(struct device *dev, struct scatterlist *sg, int nents, int di
for (i = 0; i < nents; i++) {
struct scatterlist *s = &sg[i];
- if (!s->dma_length)
+ if (!s->dma_length || !s->length)
break;
dma_unmap_single(dev, s->dma_address, s->dma_length, dir);
}
@@ -364,6 +354,7 @@ static int __dma_map_cont(struct scatterlist *sg, int start, int stopat,
BUG_ON(i > start && s->offset);
if (i == start) {
+ *sout = *s;
sout->dma_address = iommu_bus_base;
sout->dma_address += iommu_page*PAGE_SIZE + s->offset;
sout->dma_length = s->length;
@@ -390,6 +381,7 @@ static inline int dma_map_cont(struct scatterlist *sg, int start, int stopat,
{
if (!need) {
BUG_ON(stopat - start != 1);
+ *sout = sg[start];
sout->dma_length = sg[start].length;
return 0;
}
@@ -632,17 +624,13 @@ static int __init pci_iommu_init(void)
(agp_copy_info(agp_bridge, &info) < 0);
#endif
- if (swiotlb) {
- no_iommu = 1;
+ if (swiotlb)
return -1;
- }
-
+
if (no_iommu ||
(!force_iommu && end_pfn <= MAX_DMA32_PFN) ||
!iommu_aperture ||
(no_agp && init_k8_gatt(&info) < 0)) {
- no_iommu = 1;
- no_iommu_init();
printk(KERN_INFO "PCI-DMA: Disabling IOMMU.\n");
if (end_pfn > MAX_DMA32_PFN) {
printk(KERN_ERR "WARNING more than 4GB of memory "
diff --git a/arch/x86_64/kernel/setup.c b/arch/x86_64/kernel/setup.c
index 9435ab7d6fb..aa55e3cec66 100644
--- a/arch/x86_64/kernel/setup.c
+++ b/arch/x86_64/kernel/setup.c
@@ -423,6 +423,12 @@ static __init void parse_cmdline_early (char ** cmdline_p)
else if(!memcmp(from, "elfcorehdr=", 11))
elfcorehdr_addr = memparse(from+11, &from);
#endif
+
+#ifdef CONFIG_HOTPLUG_CPU
+ else if (!memcmp(from, "additional_cpus=", 16))
+ setup_additional_cpus(from+16);
+#endif
+
next_char:
c = *(from++);
if (!c)
diff --git a/arch/x86_64/kernel/smpboot.c b/arch/x86_64/kernel/smpboot.c
index 67e4e28f4df..66e98659d07 100644
--- a/arch/x86_64/kernel/smpboot.c
+++ b/arch/x86_64/kernel/smpboot.c
@@ -1152,8 +1152,6 @@ void __init smp_cpus_done(unsigned int max_cpus)
setup_ioapic_dest();
#endif
- time_init_gtod();
-
check_nmi_watchdog();
}
@@ -1244,7 +1242,7 @@ void __cpu_die(unsigned int cpu)
printk(KERN_ERR "CPU %u didn't die...\n", cpu);
}
-static __init int setup_additional_cpus(char *s)
+__init int setup_additional_cpus(char *s)
{
return get_option(&s, &additional_cpus);
}
diff --git a/arch/x86_64/kernel/time.c b/arch/x86_64/kernel/time.c
index 67841d11ed1..3080f84bf7b 100644
--- a/arch/x86_64/kernel/time.c
+++ b/arch/x86_64/kernel/time.c
@@ -48,6 +48,8 @@ static void cpufreq_delayed_get(void);
extern void i8254_timer_resume(void);
extern int using_apic_timer;
+static char *time_init_gtod(void);
+
DEFINE_SPINLOCK(rtc_lock);
DEFINE_SPINLOCK(i8253_lock);
@@ -901,6 +903,7 @@ static struct irqaction irq0 = {
void __init time_init(void)
{
char *timename;
+ char *gtod;
#ifdef HPET_HACK_ENABLE_DANGEROUS
if (!vxtime.hpet_address) {
@@ -945,21 +948,19 @@ void __init time_init(void)
timename = "PIT";
}
- printk(KERN_INFO "time.c: Using %ld.%06ld MHz %s timer.\n",
- vxtime_hz / 1000000, vxtime_hz % 1000000, timename);
+ vxtime.mode = VXTIME_TSC;
+ gtod = time_init_gtod();
+
+ printk(KERN_INFO "time.c: Using %ld.%06ld MHz WALL %s GTOD %s timer.\n",
+ vxtime_hz / 1000000, vxtime_hz % 1000000, timename, gtod);
printk(KERN_INFO "time.c: Detected %d.%03d MHz processor.\n",
cpu_khz / 1000, cpu_khz % 1000);
- vxtime.mode = VXTIME_TSC;
vxtime.quot = (1000000L << 32) / vxtime_hz;
vxtime.tsc_quot = (1000L << 32) / cpu_khz;
vxtime.last_tsc = get_cycles_sync();
setup_irq(0, &irq0);
set_cyc2ns_scale(cpu_khz);
-
-#ifndef CONFIG_SMP
- time_init_gtod();
-#endif
}
/*
@@ -981,9 +982,9 @@ __cpuinit int unsynchronized_tsc(void)
}
/*
- * Decide after all CPUs are booted what mode gettimeofday should use.
+ * Decide what mode gettimeofday should use.
*/
-void __init time_init_gtod(void)
+__init static char *time_init_gtod(void)
{
char *timetype;
@@ -1011,8 +1012,7 @@ void __init time_init_gtod(void)
timetype = hpet_use_timer ? "HPET/TSC" : "PIT/TSC";
vxtime.mode = VXTIME_TSC;
}
-
- printk(KERN_INFO "time.c: Using %s based timekeeping.\n", timetype);
+ return timetype;
}
__setup("report_lost_ticks", time_setup);