aboutsummaryrefslogtreecommitdiff
path: root/arch
diff options
context:
space:
mode:
Diffstat (limited to 'arch')
-rw-r--r--arch/powerpc/boot/dts/cm5200.dts58
-rw-r--r--arch/powerpc/boot/dts/lite5200.dts94
-rw-r--r--arch/powerpc/boot/dts/lite5200b.dts91
-rw-r--r--arch/powerpc/boot/dts/motionpro.dts66
-rw-r--r--arch/powerpc/boot/dts/tqm5200.dts43
-rw-r--r--arch/powerpc/boot/serial.c2
6 files changed, 150 insertions, 204 deletions
diff --git a/arch/powerpc/boot/dts/cm5200.dts b/arch/powerpc/boot/dts/cm5200.dts
index 2b88a58791a..30737eafe68 100644
--- a/arch/powerpc/boot/dts/cm5200.dts
+++ b/arch/powerpc/boot/dts/cm5200.dts
@@ -47,17 +47,14 @@
soc5200@f0000000 {
#address-cells = <1>;
#size-cells = <1>;
- model = "fsl,mpc5200b";
- compatible = "fsl,mpc5200b";
- revision = ""; // from bootloader
- device_type = "soc";
+ compatible = "fsl,mpc5200b-immr";
ranges = <0 f0000000 0000c000>;
reg = <f0000000 00000100>;
bus-frequency = <0>; // from bootloader
system-frequency = <0>; // from bootloader
cdm@200 {
- compatible = "mpc5200b-cdm","mpc5200-cdm";
+ compatible = "fsl,mpc5200b-cdm","fsl,mpc5200-cdm";
reg = <200 38>;
};
@@ -65,11 +62,11 @@
// 5200 interrupts are encoded into two levels;
interrupt-controller;
#interrupt-cells = <3>;
- compatible = "mpc5200b-pic","mpc5200-pic";
+ compatible = "fsl,mpc5200b-pic","fsl,mpc5200-pic";
reg = <500 80>;
};
- gpt@600 { // General Purpose Timer
+ timer@600 { // General Purpose Timer
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
reg = <600 10>;
interrupts = <1 9 0>;
@@ -77,49 +74,49 @@
fsl,has-wdt;
};
- gpt@610 { // General Purpose Timer
+ timer@610 { // General Purpose Timer
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
reg = <610 10>;
interrupts = <1 a 0>;
interrupt-parent = <&mpc5200_pic>;
};
- gpt@620 { // General Purpose Timer
+ timer@620 { // General Purpose Timer
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
reg = <620 10>;
interrupts = <1 b 0>;
interrupt-parent = <&mpc5200_pic>;
};
- gpt@630 { // General Purpose Timer
+ timer@630 { // General Purpose Timer
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
reg = <630 10>;
interrupts = <1 c 0>;
interrupt-parent = <&mpc5200_pic>;
};
- gpt@640 { // General Purpose Timer
+ timer@640 { // General Purpose Timer
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
reg = <640 10>;
interrupts = <1 d 0>;
interrupt-parent = <&mpc5200_pic>;
};
- gpt@650 { // General Purpose Timer
+ timer@650 { // General Purpose Timer
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
reg = <650 10>;
interrupts = <1 e 0>;
interrupt-parent = <&mpc5200_pic>;
};
- gpt@660 { // General Purpose Timer
+ timer@660 { // General Purpose Timer
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
reg = <660 10>;
interrupts = <1 f 0>;
interrupt-parent = <&mpc5200_pic>;
};
- gpt@670 { // General Purpose Timer
+ timer@670 { // General Purpose Timer
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
reg = <670 10>;
interrupts = <1 10 0>;
@@ -127,43 +124,42 @@
};
rtc@800 { // Real time clock
- compatible = "mpc5200b-rtc","mpc5200-rtc";
+ compatible = "fsl,mpc5200b-rtc","fsl,mpc5200-rtc";
reg = <800 100>;
interrupts = <1 5 0 1 6 0>;
interrupt-parent = <&mpc5200_pic>;
};
gpio@b00 {
- compatible = "mpc5200b-gpio","mpc5200-gpio";
+ compatible = "fsl,mpc5200b-gpio","fsl,mpc5200-gpio";
reg = <b00 40>;
interrupts = <1 7 0>;
interrupt-parent = <&mpc5200_pic>;
};
- gpio-wkup@c00 {
- compatible = "mpc5200b-gpio-wkup","mpc5200-gpio-wkup";
+ gpio@c00 {
+ compatible = "fsl,mpc5200b-gpio-wkup","fsl,mpc5200-gpio-wkup";
reg = <c00 40>;
interrupts = <1 8 0 0 3 0>;
interrupt-parent = <&mpc5200_pic>;
};
spi@f00 {
- compatible = "mpc5200b-spi","mpc5200-spi";
+ compatible = "fsl,mpc5200b-spi","fsl,mpc5200-spi";
reg = <f00 20>;
interrupts = <2 d 0 2 e 0>;
interrupt-parent = <&mpc5200_pic>;
};
usb@1000 {
- device_type = "usb-ohci-be";
- compatible = "mpc5200b-ohci","mpc5200-ohci","ohci-be";
+ compatible = "fsl,mpc5200b-ohci","fsl,mpc5200-ohci","ohci-be";
reg = <1000 ff>;
interrupts = <2 6 0>;
interrupt-parent = <&mpc5200_pic>;
};
dma-controller@1200 {
- compatible = "mpc5200b-bestcomm","mpc5200-bestcomm";
+ compatible = "fsl,mpc5200b-bestcomm","fsl,mpc5200-bestcomm";
reg = <1200 80>;
interrupts = <3 0 0 3 1 0 3 2 0 3 3 0
3 4 0 3 5 0 3 6 0 3 7 0
@@ -173,13 +169,13 @@
};
xlb@1f00 {
- compatible = "mpc5200b-xlb","mpc5200-xlb";
+ compatible = "fsl,mpc5200b-xlb","fsl,mpc5200-xlb";
reg = <1f00 100>;
};
serial@2000 { // PSC1
device_type = "serial";
- compatible = "mpc5200b-psc-uart","mpc5200-psc-uart";
+ compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
port-number = <0>; // Logical port assignment
reg = <2000 100>;
interrupts = <2 1 0>;
@@ -188,7 +184,7 @@
serial@2200 { // PSC2
device_type = "serial";
- compatible = "mpc5200-psc-uart";
+ compatible = "fsl,mpc5200-psc-uart";
port-number = <1>; // Logical port assignment
reg = <2200 100>;
interrupts = <2 2 0>;
@@ -197,7 +193,7 @@
serial@2400 { // PSC3
device_type = "serial";
- compatible = "mpc5200-psc-uart";
+ compatible = "fsl,mpc5200-psc-uart";
port-number = <2>; // Logical port assignment
reg = <2400 100>;
interrupts = <2 3 0>;
@@ -206,7 +202,7 @@
serial@2c00 { // PSC6
device_type = "serial";
- compatible = "mpc5200b-psc-uart","mpc5200-psc-uart";
+ compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
port-number = <5>; // Logical port assignment
reg = <2c00 100>;
interrupts = <2 4 0>;
@@ -215,15 +211,15 @@
ethernet@3000 {
device_type = "network";
- compatible = "mpc5200b-fec","mpc5200-fec";
+ compatible = "fsl,mpc5200b-fec","fsl,mpc5200-fec";
reg = <3000 800>;
- local-mac-address = [ 00 00 00 00 00 00 ]; /* Filled in by U-Boot */
+ local-mac-address = [ 00 00 00 00 00 00 ];
interrupts = <2 5 0>;
interrupt-parent = <&mpc5200_pic>;
};
i2c@3d40 {
- compatible = "mpc5200b-i2c","mpc5200-i2c","fsl-i2c";
+ compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";
reg = <3d40 40>;
interrupts = <2 10 0>;
interrupt-parent = <&mpc5200_pic>;
@@ -231,7 +227,7 @@
};
sram@8000 {
- compatible = "mpc5200b-sram","mpc5200-sram";
+ compatible = "fsl,mpc5200b-sram","fsl,mpc5200-sram";
reg = <8000 4000>;
};
};
diff --git a/arch/powerpc/boot/dts/lite5200.dts b/arch/powerpc/boot/dts/lite5200.dts
index 7de3d2133d7..0d701c1bf53 100644
--- a/arch/powerpc/boot/dts/lite5200.dts
+++ b/arch/powerpc/boot/dts/lite5200.dts
@@ -10,15 +10,8 @@
* option) any later version.
*/
-/*
- * WARNING: Do not depend on this tree layout remaining static just yet.
- * The MPC5200 device tree conventions are still in flux
- * Keep an eye on the linuxppc-dev mailing list for more details
- */
-
/ {
model = "fsl,lite5200";
- // revision = "1.0";
compatible = "fsl,lite5200";
#address-cells = <1>;
#size-cells = <1>;
@@ -48,30 +41,27 @@
soc5200@f0000000 {
#address-cells = <1>;
#size-cells = <1>;
- model = "fsl,mpc5200";
- compatible = "mpc5200";
- revision = ""; // from bootloader
- device_type = "soc";
+ compatible = "fsl,mpc5200-immr";
ranges = <0 f0000000 0000c000>;
reg = <f0000000 00000100>;
bus-frequency = <0>; // from bootloader
system-frequency = <0>; // from bootloader
cdm@200 {
- compatible = "mpc5200-cdm";
+ compatible = "fsl,mpc5200-cdm";
reg = <200 38>;
};
- mpc5200_pic: pic@500 {
+ mpc5200_pic: interrupt-controller@500 {
// 5200 interrupts are encoded into two levels;
interrupt-controller;
#interrupt-cells = <3>;
device_type = "interrupt-controller";
- compatible = "mpc5200-pic";
+ compatible = "fsl,mpc5200-pic";
reg = <500 80>;
};
- gpt@600 { // General Purpose Timer
+ timer@600 { // General Purpose Timer
compatible = "fsl,mpc5200-gpt";
cell-index = <0>;
reg = <600 10>;
@@ -80,7 +70,7 @@
fsl,has-wdt;
};
- gpt@610 { // General Purpose Timer
+ timer@610 { // General Purpose Timer
compatible = "fsl,mpc5200-gpt";
cell-index = <1>;
reg = <610 10>;
@@ -88,7 +78,7 @@
interrupt-parent = <&mpc5200_pic>;
};
- gpt@620 { // General Purpose Timer
+ timer@620 { // General Purpose Timer
compatible = "fsl,mpc5200-gpt";
cell-index = <2>;
reg = <620 10>;
@@ -96,7 +86,7 @@
interrupt-parent = <&mpc5200_pic>;
};
- gpt@630 { // General Purpose Timer
+ timer@630 { // General Purpose Timer
compatible = "fsl,mpc5200-gpt";
cell-index = <3>;
reg = <630 10>;
@@ -104,7 +94,7 @@
interrupt-parent = <&mpc5200_pic>;
};
- gpt@640 { // General Purpose Timer
+ timer@640 { // General Purpose Timer
compatible = "fsl,mpc5200-gpt";
cell-index = <4>;
reg = <640 10>;
@@ -112,7 +102,7 @@
interrupt-parent = <&mpc5200_pic>;
};
- gpt@650 { // General Purpose Timer
+ timer@650 { // General Purpose Timer
compatible = "fsl,mpc5200-gpt";
cell-index = <5>;
reg = <650 10>;
@@ -120,7 +110,7 @@
interrupt-parent = <&mpc5200_pic>;
};
- gpt@660 { // General Purpose Timer
+ timer@660 { // General Purpose Timer
compatible = "fsl,mpc5200-gpt";
cell-index = <6>;
reg = <660 10>;
@@ -128,7 +118,7 @@
interrupt-parent = <&mpc5200_pic>;
};
- gpt@670 { // General Purpose Timer
+ timer@670 { // General Purpose Timer
compatible = "fsl,mpc5200-gpt";
cell-index = <7>;
reg = <670 10>;
@@ -137,25 +127,23 @@
};
rtc@800 { // Real time clock
- compatible = "mpc5200-rtc";
+ compatible = "fsl,mpc5200-rtc";
device_type = "rtc";
reg = <800 100>;
interrupts = <1 5 0 1 6 0>;
interrupt-parent = <&mpc5200_pic>;
};
- mscan@900 {
- device_type = "mscan";
- compatible = "mpc5200-mscan";
+ can@900 {
+ compatible = "fsl,mpc5200-mscan";
cell-index = <0>;
interrupts = <2 11 0>;
interrupt-parent = <&mpc5200_pic>;
reg = <900 80>;
};
- mscan@980 {
- device_type = "mscan";
- compatible = "mpc5200-mscan";
+ can@980 {
+ compatible = "fsl,mpc5200-mscan";
cell-index = <1>;
interrupts = <2 12 0>;
interrupt-parent = <&mpc5200_pic>;
@@ -163,38 +151,36 @@
};
gpio@b00 {
- compatible = "mpc5200-gpio";
+ compatible = "fsl,mpc5200-gpio";
reg = <b00 40>;
interrupts = <1 7 0>;
interrupt-parent = <&mpc5200_pic>;
};
- gpio-wkup@c00 {
- compatible = "mpc5200-gpio-wkup";
+ gpio@c00 {
+ compatible = "fsl,mpc5200-gpio-wkup";
reg = <c00 40>;
interrupts = <1 8 0 0 3 0>;
interrupt-parent = <&mpc5200_pic>;
};
spi@f00 {
- device_type = "spi";
- compatible = "mpc5200-spi";
+ compatible = "fsl,mpc5200-spi";
reg = <f00 20>;
interrupts = <2 d 0 2 e 0>;
interrupt-parent = <&mpc5200_pic>;
};
usb@1000 {
- device_type = "usb-ohci-be";
- compatible = "mpc5200-ohci","ohci-be";
+ compatible = "fsl,mpc5200-ohci","ohci-be";
reg = <1000 ff>;
interrupts = <2 6 0>;
interrupt-parent = <&mpc5200_pic>;
};
- bestcomm@1200 {
+ dma-controller@1200 {
device_type = "dma-controller";
- compatible = "mpc5200-bestcomm";
+ compatible = "fsl,mpc5200-bestcomm";
reg = <1200 80>;
interrupts = <3 0 0 3 1 0 3 2 0 3 3 0
3 4 0 3 5 0 3 6 0 3 7 0
@@ -204,13 +190,13 @@
};
xlb@1f00 {
- compatible = "mpc5200-xlb";
+ compatible = "fsl,mpc5200-xlb";
reg = <1f00 100>;
};
serial@2000 { // PSC1
device_type = "serial";
- compatible = "mpc5200-psc-uart";
+ compatible = "fsl,mpc5200-psc-uart";
port-number = <0>; // Logical port assignment
cell-index = <0>;
reg = <2000 100>;
@@ -220,8 +206,7 @@
// PSC2 in ac97 mode example
//ac97@2200 { // PSC2
- // device_type = "sound";
- // compatible = "mpc5200-psc-ac97";
+ // compatible = "fsl,mpc5200-psc-ac97";
// cell-index = <1>;
// reg = <2200 100>;
// interrupts = <2 2 0>;
@@ -230,8 +215,7 @@
// PSC3 in CODEC mode example
//i2s@2400 { // PSC3
- // device_type = "sound";
- // compatible = "mpc5200-psc-i2s";
+ // compatible = "fsl,mpc5200-psc-i2s";
// cell-index = <2>;
// reg = <2400 100>;
// interrupts = <2 3 0>;
@@ -241,7 +225,7 @@
// PSC4 in uart mode example
//serial@2600 { // PSC4
// device_type = "serial";
- // compatible = "mpc5200-psc-uart";
+ // compatible = "fsl,mpc5200-psc-uart";
// cell-index = <3>;
// reg = <2600 100>;
// interrupts = <2 b 0>;
@@ -251,7 +235,7 @@
// PSC5 in uart mode example
//serial@2800 { // PSC5
// device_type = "serial";
- // compatible = "mpc5200-psc-uart";
+ // compatible = "fsl,mpc5200-psc-uart";
// cell-index = <4>;
// reg = <2800 100>;
// interrupts = <2 c 0>;
@@ -260,8 +244,7 @@
// PSC6 in spi mode example
//spi@2c00 { // PSC6
- // device_type = "spi";
- // compatible = "mpc5200-psc-spi";
+ // compatible = "fsl,mpc5200-psc-spi";
// cell-index = <5>;
// reg = <2c00 100>;
// interrupts = <2 4 0>;
@@ -270,16 +253,16 @@
ethernet@3000 {
device_type = "network";
- compatible = "mpc5200-fec";
+ compatible = "fsl,mpc5200-fec";
reg = <3000 800>;
- mac-address = [ 02 03 04 05 06 07 ]; // Bad!
+ local-mac-address = [ 00 00 00 00 00 00 ];
interrupts = <2 5 0>;
interrupt-parent = <&mpc5200_pic>;
};
ata@3a00 {
device_type = "ata";
- compatible = "mpc5200-ata";
+ compatible = "fsl,mpc5200-ata";
reg = <3a00 100>;
interrupts = <2 7 0>;
interrupt-parent = <&mpc5200_pic>;
@@ -288,7 +271,7 @@
i2c@3d00 {
#address-cells = <1>;
#size-cells = <0>;
- compatible = "mpc5200-i2c","fsl-i2c";
+ compatible = "fsl,mpc5200-i2c","fsl-i2c";
cell-index = <0>;
reg = <3d00 40>;
interrupts = <2 f 0>;
@@ -299,7 +282,7 @@
i2c@3d40 {
#address-cells = <1>;
#size-cells = <0>;
- compatible = "mpc5200-i2c","fsl-i2c";
+ compatible = "fsl,mpc5200-i2c","fsl-i2c";
cell-index = <1>;
reg = <3d40 40>;
interrupts = <2 10 0>;
@@ -307,8 +290,7 @@
fsl5200-clocking;
};
sram@8000 {
- device_type = "sram";
- compatible = "mpc5200-sram","sram";
+ compatible = "fsl,mpc5200-sram","sram";
reg = <8000 4000>;
};
};
@@ -318,7 +300,7 @@
#size-cells = <2>;
#address-cells = <3>;
device_type = "pci";
- compatible = "mpc5200-pci";
+ compatible = "fsl,mpc5200-pci";
reg = <f0000d00 100>;
interrupt-map-mask = <f800 0 0 7>;
interrupt-map = <c000 0 0 1 &mpc5200_pic 0 0 3
diff --git a/arch/powerpc/boot/dts/lite5200b.dts b/arch/powerpc/boot/dts/lite5200b.dts
index dd2c4fd3d09..571ba02acca 100644
--- a/arch/powerpc/boot/dts/lite5200b.dts
+++ b/arch/powerpc/boot/dts/lite5200b.dts
@@ -18,7 +18,6 @@
/ {
model = "fsl,lite5200b";
- // revision = "1.0";
compatible = "fsl,lite5200b";
#address-cells = <1>;
#size-cells = <1>;
@@ -48,30 +47,27 @@
soc5200@f0000000 {
#address-cells = <1>;
#size-cells = <1>;
- model = "fsl,mpc5200b";
- compatible = "mpc5200";
- revision = ""; // from bootloader
- device_type = "soc";
+ compatible = "fsl,mpc5200b-immr";
ranges = <0 f0000000 0000c000>;
reg = <f0000000 00000100>;
bus-frequency = <0>; // from bootloader
system-frequency = <0>; // from bootloader
cdm@200 {
- compatible = "mpc5200b-cdm","mpc5200-cdm";
+ compatible = "fsl,mpc5200b-cdm","fsl,mpc5200-cdm";
reg = <200 38>;
};
- mpc5200_pic: pic@500 {
+ mpc5200_pic: interrupt-controller@500 {
// 5200 interrupts are encoded into two levels;
interrupt-controller;
#interrupt-cells = <3>;
device_type = "interrupt-controller";
- compatible = "mpc5200b-pic","mpc5200-pic";
+ compatible = "fsl,mpc5200b-pic","fsl,mpc5200-pic";
reg = <500 80>;
};
- gpt@600 { // General Purpose Timer
+ timer@600 { // General Purpose Timer
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
cell-index = <0>;
reg = <600 10>;
@@ -80,7 +76,7 @@
fsl,has-wdt;
};
- gpt@610 { // General Purpose Timer
+ timer@610 { // General Purpose Timer
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
cell-index = <1>;
reg = <610 10>;
@@ -88,7 +84,7 @@
interrupt-parent = <&mpc5200_pic>;
};
- gpt@620 { // General Purpose Timer
+ timer@620 { // General Purpose Timer
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
cell-index = <2>;
reg = <620 10>;
@@ -96,7 +92,7 @@
interrupt-parent = <&mpc5200_pic>;
};
- gpt@630 { // General Purpose Timer
+ timer@630 { // General Purpose Timer
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
cell-index = <3>;
reg = <630 10>;
@@ -104,7 +100,7 @@
interrupt-parent = <&mpc5200_pic>;
};
- gpt@640 { // General Purpose Timer
+ timer@640 { // General Purpose Timer
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
cell-index = <4>;
reg = <640 10>;
@@ -112,7 +108,7 @@
interrupt-parent = <&mpc5200_pic>;
};
- gpt@650 { // General Purpose Timer
+ timer@650 { // General Purpose Timer
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
cell-index = <5>;
reg = <650 10>;
@@ -120,7 +116,7 @@
interrupt-parent = <&mpc5200_pic>;
};
- gpt@660 { // General Purpose Timer
+ timer@660 { // General Purpose Timer
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
cell-index = <6>;
reg = <660 10>;
@@ -128,7 +124,7 @@
interrupt-parent = <&mpc5200_pic>;
};
- gpt@670 { // General Purpose Timer
+ timer@670 { // General Purpose Timer
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
cell-index = <7>;
reg = <670 10>;
@@ -137,25 +133,23 @@
};
rtc@800 { // Real time clock
- compatible = "mpc5200b-rtc","mpc5200-rtc";
+ compatible = "fsl,mpc5200b-rtc","fsl,mpc5200-rtc";
device_type = "rtc";
reg = <800 100>;
interrupts = <1 5 0 1 6 0>;
interrupt-parent = <&mpc5200_pic>;
};
- mscan@900 {
- device_type = "mscan";
- compatible = "mpc5200b-mscan","mpc5200-mscan";
+ can@900 {
+ compatible = "fsl,mpc5200b-mscan","fsl,mpc5200-mscan";
cell-index = <0>;
interrupts = <2 11 0>;
interrupt-parent = <&mpc5200_pic>;
reg = <900 80>;
};
- mscan@980 {
- device_type = "mscan";
- compatible = "mpc5200b-mscan","mpc5200-mscan";
+ can@980 {
+ compatible = "fsl,mpc5200b-mscan","fsl,mpc5200-mscan";
cell-index = <1>;
interrupts = <2 12 0>;
interrupt-parent = <&mpc5200_pic>;
@@ -163,38 +157,36 @@
};
gpio@b00 {
- compatible = "mpc5200b-gpio","mpc5200-gpio";
+ compatible = "fsl,mpc5200b-gpio","fsl,mpc5200-gpio";
reg = <b00 40>;
interrupts = <1 7 0>;
interrupt-parent = <&mpc5200_pic>;
};
- gpio-wkup@c00 {
- compatible = "mpc5200b-gpio-wkup","mpc5200-gpio-wkup";
+ gpio@c00 {
+ compatible = "fsl,mpc5200b-gpio-wkup","fsl,mpc5200-gpio-wkup";
reg = <c00 40>;
interrupts = <1 8 0 0 3 0>;
interrupt-parent = <&mpc5200_pic>;
};
spi@f00 {
- device_type = "spi";
- compatible = "mpc5200b-spi","mpc5200-spi";
+ compatible = "fsl,mpc5200b-spi","fsl,mpc5200-spi";
reg = <f00 20>;
interrupts = <2 d 0 2 e 0>;
interrupt-parent = <&mpc5200_pic>;
};
usb@1000 {
- device_type = "usb-ohci-be";
- compatible = "mpc5200b-ohci","mpc5200-ohci","ohci-be";
+ compatible = "fsl,mpc5200b-ohci","fsl,mpc5200-ohci","ohci-be";
reg = <1000 ff>;
interrupts = <2 6 0>;
interrupt-parent = <&mpc5200_pic>;
};
- bestcomm@1200 {
+ dma-controller@1200 {
device_type = "dma-controller";
- compatible = "mpc5200b-bestcomm","mpc5200-bestcomm";
+ compatible = "fsl,mpc5200b-bestcomm","fsl,mpc5200-bestcomm";
reg = <1200 80>;
interrupts = <3 0 0 3 1 0 3 2 0 3 3 0
3 4 0 3 5 0 3 6 0 3 7 0
@@ -204,13 +196,13 @@
};
xlb@1f00 {
- compatible = "mpc5200b-xlb","mpc5200-xlb";
+ compatible = "fsl,mpc5200b-xlb","fsl,mpc5200-xlb";
reg = <1f00 100>;
};
serial@2000 { // PSC1
device_type = "serial";
- compatible = "mpc5200b-psc-uart","mpc5200-psc-uart";
+ compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
port-number = <0>; // Logical port assignment
cell-index = <0>;
reg = <2000 100>;
@@ -220,8 +212,7 @@
// PSC2 in ac97 mode example
//ac97@2200 { // PSC2
- // device_type = "sound";
- // compatible = "mpc5200b-psc-ac97","mpc5200-psc-ac97";
+ // compatible = "fsl,mpc5200b-psc-ac97","fsl,mpc5200-psc-ac97";
// cell-index = <1>;
// reg = <2200 100>;
// interrupts = <2 2 0>;
@@ -230,8 +221,7 @@
// PSC3 in CODEC mode example
//i2s@2400 { // PSC3
- // device_type = "sound";
- // compatible = "mpc5200b-psc-i2s"; //not 5200 compatible
+ // compatible = "fsl,mpc5200b-psc-i2s"; //not 5200 compatible
// cell-index = <2>;
// reg = <2400 100>;
// interrupts = <2 3 0>;
@@ -241,7 +231,7 @@
// PSC4 in uart mode example
//serial@2600 { // PSC4
// device_type = "serial";
- // compatible = "mpc5200b-psc-uart","mpc5200-psc-uart";
+ // compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
// cell-index = <3>;
// reg = <2600 100>;
// interrupts = <2 b 0>;
@@ -251,7 +241,7 @@
// PSC5 in uart mode example
//serial@2800 { // PSC5
// device_type = "serial";
- // compatible = "mpc5200b-psc-uart","mpc5200-psc-uart";
+ // compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
// cell-index = <4>;
// reg = <2800 100>;
// interrupts = <2 c 0>;
@@ -260,8 +250,7 @@
// PSC6 in spi mode example
//spi@2c00 { // PSC6
- // device_type = "spi";
- // compatible = "mpc5200b-psc-spi","mpc5200-psc-spi";
+ // compatible = "fsl,mpc5200b-psc-spi","fsl,mpc5200-psc-spi";
// cell-index = <5>;
// reg = <2c00 100>;
// interrupts = <2 4 0>;
@@ -270,9 +259,9 @@
ethernet@3000 {
device_type = "network";
- compatible = "mpc5200b-fec","mpc5200-fec";
+ compatible = "fsl,mpc5200b-fec","fsl,mpc5200-fec";
reg = <3000 400>;
- mac-address = [ 02 03 04 05 06 07 ]; // Bad!
+ local-mac-address = [ 00 00 00 00 00 00 ];
interrupts = <2 5 0>;
interrupt-parent = <&mpc5200_pic>;
phy-handle = <&phy0>;
@@ -281,8 +270,7 @@
mdio@3000 {
#address-cells = <1>;
#size-cells = <0>;
- device_type = "mdio";
- compatible = "mpc5200b-fec-phy";
+ compatible = "fsl,mpc5200b-mdio";
reg = <3000 400>; // fec range, since we need to setup fec interrupts
interrupts = <2 5 0>; // these are for "mii command finished", not link changes & co.
interrupt-parent = <&mpc5200_pic>;
@@ -295,7 +283,7 @@
ata@3a00 {
device_type = "ata";
- compatible = "mpc5200b-ata","mpc5200-ata";
+ compatible = "fsl,mpc5200b-ata","fsl,mpc5200-ata";
reg = <3a00 100>;
interrupts = <2 7 0>;
interrupt-parent = <&mpc5200_pic>;
@@ -304,7 +292,7 @@
i2c@3d00 {
#address-cells = <1>;
#size-cells = <0>;
- compatible = "mpc5200b-i2c","mpc5200-i2c","fsl-i2c";
+ compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";
cell-index = <0>;
reg = <3d00 40>;
interrupts = <2 f 0>;
@@ -315,7 +303,7 @@
i2c@3d40 {
#address-cells = <1>;
#size-cells = <0>;
- compatible = "mpc5200b-i2c","mpc5200-i2c","fsl-i2c";
+ compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";
cell-index = <1>;
reg = <3d40 40>;
interrupts = <2 10 0>;
@@ -323,8 +311,7 @@
fsl5200-clocking;
};
sram@8000 {
- device_type = "sram";
- compatible = "mpc5200b-sram","mpc5200-sram","sram";
+ compatible = "fsl,mpc5200b-sram","fsl,mpc5200-sram","sram";
reg = <8000 4000>;
};
};
@@ -334,7 +321,7 @@
#size-cells = <2>;
#address-cells = <3>;
device_type = "pci";
- compatible = "mpc5200b-pci","mpc5200-pci";
+ compatible = "fsl,mpc5200b-pci","fsl,mpc5200-pci";
reg = <f0000d00 100>;
interrupt-map-mask = <f800 0 0 7>;
interrupt-map = <c000 0 0 1 &mpc5200_pic 0 0 3 // 1st slot
diff --git a/arch/powerpc/boot/dts/motionpro.dts b/arch/powerpc/boot/dts/motionpro.dts
index ee30805e35c..76951ab038e 100644
--- a/arch/powerpc/boot/dts/motionpro.dts
+++ b/arch/powerpc/boot/dts/motionpro.dts
@@ -10,12 +10,6 @@
* option) any later version.
*/
-/*
- * WARNING: Do not depend on this tree layout remaining static just yet.
- * The MPC5200 device tree conventions are still in flux
- * Keep an eye on the linuxppc-dev mailing list for more details
- */
-
/ {
model = "promess,motionpro";
compatible = "promess,motionpro";
@@ -47,29 +41,26 @@
soc5200@f0000000 {
#address-cells = <1>;
#size-cells = <1>;
- model = "fsl,mpc5200b";
- compatible = "fsl,mpc5200b";
- revision = ""; // from bootloader
- device_type = "soc";
+ compatible = "fsl,mpc5200b-immr";
ranges = <0 f0000000 0000c000>;
reg = <f0000000 00000100>;
bus-frequency = <0>; // from bootloader
system-frequency = <0>; // from bootloader
cdm@200 {
- compatible = "mpc5200b-cdm","mpc5200-cdm";
+ compatible = "fsl,mpc5200b-cdm","fsl,mpc5200-cdm";
reg = <200 38>;
};
- mpc5200_pic: pic@500 {
+ mpc5200_pic: interrupt-controller@500 {
// 5200 interrupts are encoded into two levels;
interrupt-controller;
#interrupt-cells = <3>;
- compatible = "mpc5200b-pic","mpc5200-pic";
+ compatible = "fsl,mpc5200b-pic","fsl,mpc5200-pic";
reg = <500 80>;
};
- gpt@600 { // General Purpose Timer
+ timer@600 { // General Purpose Timer
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
reg = <600 10>;
interrupts = <1 9 0>;
@@ -77,35 +68,35 @@
fsl,has-wdt;
};
- gpt@610 { // General Purpose Timer
+ timer@610 { // General Purpose Timer
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
reg = <610 10>;
interrupts = <1 a 0>;
interrupt-parent = <&mpc5200_pic>;
};
- gpt@620 { // General Purpose Timer
+ timer@620 { // General Purpose Timer
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
reg = <620 10>;
interrupts = <1 b 0>;
interrupt-parent = <&mpc5200_pic>;
};
- gpt@630 { // General Purpose Timer
+ timer@630 { // General Purpose Timer
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
reg = <630 10>;
interrupts = <1 c 0>;
interrupt-parent = <&mpc5200_pic>;
};
- gpt@640 { // General Purpose Timer
+ timer@640 { // General Purpose Timer
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
reg = <640 10>;
interrupts = <1 d 0>;
interrupt-parent = <&mpc5200_pic>;
};
- gpt@650 { // General Purpose Timer
+ timer@650 { // General Purpose Timer
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
reg = <650 10>;
interrupts = <1 e 0>;
@@ -130,28 +121,28 @@
};
rtc@800 { // Real time clock
- compatible = "mpc5200b-rtc","mpc5200-rtc";
+ compatible = "fsl,mpc5200b-rtc","fsl,mpc5200-rtc";
reg = <800 100>;
interrupts = <1 5 0 1 6 0>;
interrupt-parent = <&mpc5200_pic>;
};
mscan@980 {
- compatible = "mpc5200b-mscan","mpc5200-mscan";
+ compatible = "fsl,mpc5200b-mscan","fsl,mpc5200-mscan";
interrupts = <2 12 0>;
interrupt-parent = <&mpc5200_pic>;
reg = <980 80>;
};
gpio@b00 {
- compatible = "mpc5200b-gpio","mpc5200-gpio";
+ compatible = "fsl,mpc5200b-gpio","fsl,mpc5200-gpio";
reg = <b00 40>;
interrupts = <1 7 0>;
interrupt-parent = <&mpc5200_pic>;
};
- gpio-wkup@c00 {
- compatible = "mpc5200b-gpio-wkup","mpc5200-gpio-wkup";
+ gpio@c00 {
+ compatible = "fsl,mpc5200b-gpio-wkup","fsl,mpc5200-gpio-wkup";
reg = <c00 40>;
interrupts = <1 8 0 0 3 0>;
interrupt-parent = <&mpc5200_pic>;
@@ -159,21 +150,21 @@
spi@f00 {
- compatible = "mpc5200b-spi","mpc5200-spi";
+ compatible = "fsl,mpc5200b-spi","fsl,mpc5200-spi";
reg = <f00 20>;
interrupts = <2 d 0 2 e 0>;
interrupt-parent = <&mpc5200_pic>;
};
usb@1000 {
- compatible = "mpc5200b-ohci","mpc5200-ohci","ohci-be";
+ compatible = "fsl,mpc5200b-ohci","fsl,mpc5200-ohci","ohci-be";
reg = <1000 ff>;
interrupts = <2 6 0>;
interrupt-parent = <&mpc5200_pic>;
};
dma-controller@1200 {
- compatible = "mpc5200b-bestcomm","mpc5200-bestcomm";
+ compatible = "fsl,mpc5200b-bestcomm","fsl,mpc5200-bestcomm";
reg = <1200 80>;
interrupts = <3 0 0 3 1 0 3 2 0 3 3 0
3 4 0 3 5 0 3 6 0 3 7 0
@@ -183,13 +174,13 @@
};
xlb@1f00 {
- compatible = "mpc5200b-xlb","mpc5200-xlb";
+ compatible = "fsl,mpc5200b-xlb","fsl,mpc5200-xlb";
reg = <1f00 100>;
};
serial@2000 { // PSC1
device_type = "serial";
- compatible = "mpc5200b-psc-uart","mpc5200-psc-uart";
+ compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
port-number = <0>; // Logical port assignment
reg = <2000 100>;
interrupts = <2 1 0>;
@@ -198,7 +189,7 @@
// PSC2 in spi master mode
spi@2200 { // PSC2
- compatible = "mpc5200b-psc-spi","mpc5200-psc-spi";
+ compatible = "fsl,mpc5200b-psc-spi","fsl,mpc5200-psc-spi";
cell-index = <1>;
reg = <2200 100>;
interrupts = <2 2 0>;
@@ -208,7 +199,7 @@
// PSC5 in uart mode
serial@2800 { // PSC5
device_type = "serial";
- compatible = "mpc5200b-psc-uart","mpc5200-psc-uart";
+ compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
port-number = <4>; // Logical port assignment
reg = <2800 100>;
interrupts = <2 c 0>;
@@ -217,22 +208,22 @@
ethernet@3000 {
device_type = "network";
- compatible = "mpc5200b-fec","mpc5200-fec";
+ compatible = "fsl,mpc5200b-fec","fsl,mpc5200-fec";
reg = <3000 800>;
- local-mac-address = [ 00 00 00 00 00 00 ]; /* Filled in by U-Boot */
+ local-mac-address = [ 00 00 00 00 00 00 ];
interrupts = <2 5 0>;
interrupt-parent = <&mpc5200_pic>;
};
ata@3a00 {
- compatible = "mpc5200b-ata","mpc5200-ata";
+ compatible = "fsl,mpc5200b-ata","fsl,mpc5200-ata";
reg = <3a00 100>;
interrupts = <2 7 0>;
interrupt-parent = <&mpc5200_pic>;
};
i2c@3d40 {
- compatible = "mpc5200b-i2c","mpc5200-i2c","fsl-i2c";
+ compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";
reg = <3d40 40>;
interrupts = <2 10 0>;
interrupt-parent = <&mpc5200_pic>;
@@ -240,13 +231,12 @@
};
sram@8000 {
- compatible = "mpc5200b-sram","mpc5200-sram";
+ compatible = "fsl,mpc5200b-sram","fsl,mpc5200-sram";
reg = <8000 4000>;
};
};
lpb {
- model = "fsl,lpb";
compatible = "fsl,lpb";
#address-cells = <2>;
#size-cells = <1>;
@@ -288,7 +278,7 @@
#size-cells = <2>;
#address-cells = <3>;
device_type = "pci";
- compatible = "mpc5200b-pci","mpc5200-pci";
+ compatible = "fsl,mpc5200b-pci","fsl,mpc5200-pci";
reg = <f0000d00 100>;
interrupt-map-mask = <f800 0 0 7>;
interrupt-map = <c000 0 0 1 &mpc5200_pic 0 0 3 // 1st slot
diff --git a/arch/powerpc/boot/dts/tqm5200.dts b/arch/powerpc/boot/dts/tqm5200.dts
index 58c9799caf1..c86464f007d 100644
--- a/arch/powerpc/boot/dts/tqm5200.dts
+++ b/arch/powerpc/boot/dts/tqm5200.dts
@@ -10,12 +10,6 @@
* option) any later version.
*/
-/*
- * WARNING: Do not depend on this tree layout remaining static just yet.
- * The MPC5200 device tree conventions are still in flux
- * Keep an eye on the linuxppc-dev mailing list for more details
- */
-
/ {
model = "tqc,tqm5200";
compatible = "tqc,tqm5200";
@@ -47,29 +41,26 @@
soc5200@f0000000 {
#address-cells = <1>;
#size-cells = <1>;
- model = "fsl,mpc5200";
- compatible = "fsl,mpc5200";
- revision = ""; // from bootloader
- device_type = "soc";
+ compatible = "fsl,mpc5200-immr";
ranges = <0 f0000000 0000c000>;
reg = <f0000000 00000100>;
bus-frequency = <0>; // from bootloader
system-frequency = <0>; // from bootloader
cdm@200 {
- compatible = "mpc5200-cdm";
+ compatible = "fsl,mpc5200-cdm";
reg = <200 38>;
};
- mpc5200_pic: pic@500 {
+ mpc5200_pic: interrupt-controller@500 {
// 5200 interrupts are encoded into two levels;
interrupt-controller;
#interrupt-cells = <3>;
- compatible = "mpc5200-pic";
+ compatible = "fsl,mpc5200-pic";
reg = <500 80>;
};
- gpt@600 { // General Purpose Timer
+ timer@600 { // General Purpose Timer
compatible = "fsl,mpc5200-gpt";
reg = <600 10>;
interrupts = <1 9 0>;
@@ -78,21 +69,21 @@
};
gpio@b00 {
- compatible = "mpc5200-gpio";
+ compatible = "fsl,mpc5200-gpio";
reg = <b00 40>;
interrupts = <1 7 0>;
interrupt-parent = <&mpc5200_pic>;
};
usb@1000 {
- compatible = "mpc5200-ohci","ohci-be";
+ compatible = "fsl,mpc5200-ohci","ohci-be";
reg = <1000 ff>;
interrupts = <2 6 0>;
interrupt-parent = <&mpc5200_pic>;
};
dma-controller@1200 {
- compatible = "mpc5200-bestcomm";
+ compatible = "fsl,mpc5200-bestcomm";
reg = <1200 80>;
interrupts = <3 0 0 3 1 0 3 2 0 3 3 0
3 4 0 3 5 0 3 6 0 3 7 0
@@ -102,13 +93,13 @@
};
xlb@1f00 {
- compatible = "mpc5200-xlb";
+ compatible = "fsl,mpc5200-xlb";
reg = <1f00 100>;
};
serial@2000 { // PSC1
device_type = "serial";
- compatible = "mpc5200-psc-uart";
+ compatible = "fsl,mpc5200-psc-uart";
port-number = <0>; // Logical port assignment
reg = <2000 100>;
interrupts = <2 1 0>;
@@ -117,7 +108,7 @@
serial@2200 { // PSC2
device_type = "serial";
- compatible = "mpc5200-psc-uart";
+ compatible = "fsl,mpc5200-psc-uart";
port-number = <1>; // Logical port assignment
reg = <2200 100>;
interrupts = <2 2 0>;
@@ -126,7 +117,7 @@
serial@2400 { // PSC3
device_type = "serial";
- compatible = "mpc5200-psc-uart";
+ compatible = "fsl,mpc5200-psc-uart";
port-number = <2>; // Logical port assignment
reg = <2400 100>;
interrupts = <2 3 0>;
@@ -135,22 +126,22 @@
ethernet@3000 {
device_type = "network";
- compatible = "mpc5200-fec";
+ compatible = "fsl,mpc5200-fec";
reg = <3000 800>;
- local-mac-address = [ 00 00 00 00 00 00 ]; /* Filled in by U-Boot */
+ local-mac-address = [ 00 00 00 00 00 00 ];
interrupts = <2 5 0>;
interrupt-parent = <&mpc5200_pic>;
};
ata@3a00 {
- compatible = "mpc5200-ata";
+ compatible = "fsl,mpc5200-ata";
reg = <3a00 100>;
interrupts = <2 7 0>;
interrupt-parent = <&mpc5200_pic>;
};
i2c@3d40 {
- compatible = "mpc5200-i2c","fsl-i2c";
+ compatible = "fsl,mpc5200-i2c","fsl-i2c";
reg = <3d40 40>;
interrupts = <2 10 0>;
interrupt-parent = <&mpc5200_pic>;
@@ -158,7 +149,7 @@
};
sram@8000 {
- compatible = "mpc5200-sram";
+ compatible = "fsl,mpc5200-sram";
reg = <8000 4000>;
};
};
diff --git a/arch/powerpc/boot/serial.c b/arch/powerpc/boot/serial.c
index b6c68ef4680..9960421eb6b 100644
--- a/arch/powerpc/boot/serial.c
+++ b/arch/powerpc/boot/serial.c
@@ -126,7 +126,7 @@ int serial_console_init(void)
dt_is_compatible(devp, "fsl,cpm2-scc-uart") ||
dt_is_compatible(devp, "fsl,cpm2-smc-uart"))
rc = cpm_console_init(devp, &serial_cd);
- else if (dt_is_compatible(devp, "mpc5200-psc-uart"))
+ else if (dt_is_compatible(devp, "fsl,mpc5200-psc-uart"))
rc = mpc5200_psc_console_init(devp, &serial_cd);
else if (dt_is_compatible(devp, "xlnx,opb-uartlite-1.00.b") ||
dt_is_compatible(devp, "xlnx,xps-uartlite-1.00.a"))
generated by cgit v1.2.3 (git 2.25.1) at 2024-12-04 22:32:34 +0000