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-rw-r--r--arch/arm/boot/compressed/head-shark.S42
-rw-r--r--arch/arm/configs/bast_defconfig1
-rw-r--r--arch/arm/configs/s3c2410_defconfig1
-rw-r--r--arch/arm/kernel/smp.c6
-rw-r--r--arch/arm/mach-integrator/platsmp.c8
-rw-r--r--arch/arm/mach-s3c2410/dma.c2
-rw-r--r--arch/arm/mach-s3c2410/mach-bast.c37
-rw-r--r--arch/arm/nwfpe/fpa11.h4
-rw-r--r--arch/arm/nwfpe/fpmodule.c2
-rw-r--r--arch/arm/nwfpe/fpmodule.inl14
-rw-r--r--arch/i386/kernel/i387.c11
-rw-r--r--arch/i386/kernel/process.c20
-rw-r--r--arch/i386/kernel/setup.c14
-rw-r--r--arch/sparc64/kernel/entry.S17
-rw-r--r--arch/sparc64/kernel/irq.c20
-rw-r--r--arch/sparc64/kernel/process.c2
-rw-r--r--arch/sparc64/kernel/smp.c2
-rw-r--r--arch/sparc64/kernel/traps.c2
18 files changed, 119 insertions, 86 deletions
diff --git a/arch/arm/boot/compressed/head-shark.S b/arch/arm/boot/compressed/head-shark.S
index 848f60e5429..089c560e07f 100644
--- a/arch/arm/boot/compressed/head-shark.S
+++ b/arch/arm/boot/compressed/head-shark.S
@@ -63,8 +63,8 @@ __beginning: mov r4, r0 @ save the entry to the firmware
mov pc, r2
-__copy_target: .long 0x08508000
-__copy_end: .long 0x08608000
+__copy_target: .long 0x08507FFC
+__copy_end: .long 0x08607FFC
.word _start
.word __bss_start
@@ -73,9 +73,10 @@ __copy_end: .long 0x08608000
__temp_stack: .space 128
__mmu_off:
- adr r0, __ofw_data
+ adr r0, __ofw_data @ read the 1. entry of the memory map
ldr r0, [r0, #4]
orr r0, r0, #0x00600000
+ sub r0, r0, #4
ldr r1, __copy_end
ldr r3, __copy_target
@@ -89,20 +90,43 @@ __mmu_off:
* from 0x08500000 to 0x08508000 if we have only 8MB
*/
+/* As we get more 2.6-kernels it gets more and more
+ * uncomfortable to be bound to kernel images of 1MB only.
+ * So we add a loop here, to be able to copy some more.
+ * Alexander Schulz 2005-07-17
+ */
+
+ mov r4, #3 @ How many megabytes to copy
+
+
+__MoveCode: sub r4, r4, #1
__Copy: ldr r2, [r0], #-4
str r2, [r1], #-4
teq r1, r3
bne __Copy
+
+ /* The firmware maps us in blocks of 1 MB, the next block is
+ _below_ the last one. So our decrementing source pointer
+ ist right here, but the destination pointer must be increased
+ by 2 MB */
+ add r1, r1, #0x00200000
+ add r3, r3, #0x00100000
+
+ teq r4, #0
+ bne __MoveCode
+
+
/* and jump to it */
- adr r2, __go_on
- adr r0, __ofw_data
+ adr r2, __go_on @ where we want to jump
+ adr r0, __ofw_data @ read the 1. entry of the memory map
ldr r0, [r0, #4]
- sub r2, r2, r0
- sub r2, r2, #0x00500000
- ldr r0, __copy_target
+ sub r2, r2, r0 @ we are mapped add 0e50 now, sub that (-0e00)
+ sub r2, r2, #0x00500000 @ -0050
+ ldr r0, __copy_target @ and add 0850 8000 instead
+ add r0, r0, #4
add r2, r2, r0
- mov pc, r2
+ mov pc, r2 @ and jump there
__go_on:
adr sp, __temp_stack
diff --git a/arch/arm/configs/bast_defconfig b/arch/arm/configs/bast_defconfig
index 2d985e9611c..35e3a99bcbb 100644
--- a/arch/arm/configs/bast_defconfig
+++ b/arch/arm/configs/bast_defconfig
@@ -561,7 +561,6 @@ CONFIG_SERIAL_8250_SHARE_IRQ=y
#
CONFIG_SERIAL_S3C2410=y
CONFIG_SERIAL_S3C2410_CONSOLE=y
-CONFIG_SERIAL_BAST_SIO=y
CONFIG_SERIAL_CORE=y
CONFIG_SERIAL_CORE_CONSOLE=y
CONFIG_UNIX98_PTYS=y
diff --git a/arch/arm/configs/s3c2410_defconfig b/arch/arm/configs/s3c2410_defconfig
index 98b72ff3883..96a794d8de8 100644
--- a/arch/arm/configs/s3c2410_defconfig
+++ b/arch/arm/configs/s3c2410_defconfig
@@ -570,7 +570,6 @@ CONFIG_SERIAL_8250_SHARE_IRQ=y
#
CONFIG_SERIAL_S3C2410=y
CONFIG_SERIAL_S3C2410_CONSOLE=y
-CONFIG_SERIAL_BAST_SIO=y
CONFIG_SERIAL_CORE=y
CONFIG_SERIAL_CORE_CONSOLE=y
CONFIG_UNIX98_PTYS=y
diff --git a/arch/arm/kernel/smp.c b/arch/arm/kernel/smp.c
index 7ae45c3fc83..295e0a8379c 100644
--- a/arch/arm/kernel/smp.c
+++ b/arch/arm/kernel/smp.c
@@ -78,7 +78,7 @@ struct smp_call_struct {
static struct smp_call_struct * volatile smp_call_function_data;
static DEFINE_SPINLOCK(smp_call_function_lock);
-int __init __cpu_up(unsigned int cpu)
+int __cpuinit __cpu_up(unsigned int cpu)
{
struct task_struct *idle;
pgd_t *pgd;
@@ -159,7 +159,7 @@ int __init __cpu_up(unsigned int cpu)
* This is the secondary CPU boot entry. We're using this CPUs
* idle thread stack, but a set of temporary page tables.
*/
-asmlinkage void __init secondary_start_kernel(void)
+asmlinkage void __cpuinit secondary_start_kernel(void)
{
struct mm_struct *mm = &init_mm;
unsigned int cpu = smp_processor_id();
@@ -209,7 +209,7 @@ asmlinkage void __init secondary_start_kernel(void)
* Called by both boot and secondaries to move global data into
* per-processor storage.
*/
-void __init smp_store_cpu_info(unsigned int cpuid)
+void __cpuinit smp_store_cpu_info(unsigned int cpuid)
{
struct cpuinfo_arm *cpu_info = &per_cpu(cpu_data, cpuid);
diff --git a/arch/arm/mach-integrator/platsmp.c b/arch/arm/mach-integrator/platsmp.c
index 2ba02577709..aecf47ba033 100644
--- a/arch/arm/mach-integrator/platsmp.c
+++ b/arch/arm/mach-integrator/platsmp.c
@@ -27,12 +27,12 @@ extern void integrator_secondary_startup(void);
* control for which core is the next to come out of the secondary
* boot "holding pen"
*/
-volatile int __initdata pen_release = -1;
-unsigned long __initdata phys_pen_release = 0;
+volatile int __cpuinitdata pen_release = -1;
+unsigned long __cpuinitdata phys_pen_release = 0;
static DEFINE_SPINLOCK(boot_lock);
-void __init platform_secondary_init(unsigned int cpu)
+void __cpuinit platform_secondary_init(unsigned int cpu)
{
/*
* the primary core may have used a "cross call" soft interrupt
@@ -61,7 +61,7 @@ void __init platform_secondary_init(unsigned int cpu)
spin_unlock(&boot_lock);
}
-int __init boot_secondary(unsigned int cpu, struct task_struct *idle)
+int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
{
unsigned long timeout;
diff --git a/arch/arm/mach-s3c2410/dma.c b/arch/arm/mach-s3c2410/dma.c
index c7c28890d40..65feaf20d23 100644
--- a/arch/arm/mach-s3c2410/dma.c
+++ b/arch/arm/mach-s3c2410/dma.c
@@ -436,7 +436,7 @@ int s3c2410_dma_enqueue(unsigned int channel, void *id,
buf = kmem_cache_alloc(dma_kmem, GFP_ATOMIC);
if (buf == NULL) {
- pr_debug("%s: out of memory (%d alloc)\n",
+ pr_debug("%s: out of memory (%ld alloc)\n",
__FUNCTION__, sizeof(*buf));
return -ENOMEM;
}
diff --git a/arch/arm/mach-s3c2410/mach-bast.c b/arch/arm/mach-s3c2410/mach-bast.c
index ccb6bcefa46..206778ebfce 100644
--- a/arch/arm/mach-s3c2410/mach-bast.c
+++ b/arch/arm/mach-s3c2410/mach-bast.c
@@ -28,6 +28,7 @@
* 14-Mar-2006 BJD Updated for __iomem changes
* 22-Jun-2006 BJD Added DM9000 platform information
* 28-Jun-2006 BJD Moved pm functionality out to common code
+ * 17-Jul-2006 BJD Changed to platform device for SuperIO 16550s
*/
#include <linux/kernel.h>
@@ -64,6 +65,8 @@
#include <linux/mtd/nand_ecc.h>
#include <linux/mtd/partitions.h>
+#include <linux/serial_8250.h>
+
#include "clock.h"
#include "devs.h"
#include "cpu.h"
@@ -351,6 +354,39 @@ static struct platform_device bast_device_dm9k = {
}
};
+/* serial devices */
+
+#define SERIAL_BASE (S3C2410_CS2 + BAST_PA_SUPERIO)
+#define SERIAL_FLAGS (UPF_BOOT_AUTOCONF | UPF_IOREMAP | UPF_SHARE_IRQ)
+#define SERIAL_CLK (1843200)
+
+static struct plat_serial8250_port bast_sio_data[] = {
+ [0] = {
+ .mapbase = SERIAL_BASE + 0x2f8,
+ .irq = IRQ_PCSERIAL1,
+ .flags = SERIAL_FLAGS,
+ .iotype = UPIO_MEM,
+ .regshift = 0,
+ .uartclk = SERIAL_CLK,
+ },
+ [1] = {
+ .mapbase = SERIAL_BASE + 0x3f8,
+ .irq = IRQ_PCSERIAL2,
+ .flags = SERIAL_FLAGS,
+ .iotype = UPIO_MEM,
+ .regshift = 0,
+ .uartclk = SERIAL_CLK,
+ },
+ { }
+};
+
+static struct platform_device bast_sio = {
+ .name = "serial8250",
+ .id = 0,
+ .dev = {
+ .platform_data = &bast_sio_data,
+ },
+};
/* Standard BAST devices */
@@ -364,6 +400,7 @@ static struct platform_device *bast_devices[] __initdata = {
&s3c_device_nand,
&bast_device_nor,
&bast_device_dm9k,
+ &bast_sio,
};
static struct clk *bast_clocks[] = {
diff --git a/arch/arm/nwfpe/fpa11.h b/arch/arm/nwfpe/fpa11.h
index 45cc65426a2..e4a61aea534 100644
--- a/arch/arm/nwfpe/fpa11.h
+++ b/arch/arm/nwfpe/fpa11.h
@@ -29,9 +29,7 @@
* stack+task struct. Use the same method as 'current' uses to
* reach them.
*/
-register unsigned long *user_registers asm("sl");
-
-#define GET_USERREG() (user_registers)
+#define GET_USERREG() ((struct pt_regs *)(THREAD_START_SP + (unsigned long)current_thread_info()) - 1)
#include <linux/config.h>
#include <linux/thread_info.h>
diff --git a/arch/arm/nwfpe/fpmodule.c b/arch/arm/nwfpe/fpmodule.c
index a8efcf34888..12885f31d34 100644
--- a/arch/arm/nwfpe/fpmodule.c
+++ b/arch/arm/nwfpe/fpmodule.c
@@ -132,7 +132,7 @@ void float_raise(signed char flags)
printk(KERN_DEBUG
"NWFPE: %s[%d] takes exception %08x at %p from %08lx\n",
current->comm, current->pid, flags,
- __builtin_return_address(0), GET_USERREG()[15]);
+ __builtin_return_address(0), GET_USERREG()->ARM_pc);
#endif
/* Keep SoftFloat exception flags up to date. */
diff --git a/arch/arm/nwfpe/fpmodule.inl b/arch/arm/nwfpe/fpmodule.inl
index e5f59e9a302..2c39ad408f2 100644
--- a/arch/arm/nwfpe/fpmodule.inl
+++ b/arch/arm/nwfpe/fpmodule.inl
@@ -28,8 +28,8 @@ static inline unsigned long readRegister(const unsigned int nReg)
for this in this routine. LDF/STF instructions with Rn = PC
depend on the PC being correct, as they use PC+8 in their
address calculations. */
- unsigned long *userRegisters = GET_USERREG();
- unsigned int val = userRegisters[nReg];
+ struct pt_regs *regs = GET_USERREG();
+ unsigned int val = regs->uregs[nReg];
if (REG_PC == nReg)
val -= 4;
return val;
@@ -38,8 +38,8 @@ static inline unsigned long readRegister(const unsigned int nReg)
static inline void
writeRegister(const unsigned int nReg, const unsigned long val)
{
- unsigned long *userRegisters = GET_USERREG();
- userRegisters[nReg] = val;
+ struct pt_regs *regs = GET_USERREG();
+ regs->uregs[nReg] = val;
}
static inline unsigned long readCPSR(void)
@@ -63,12 +63,12 @@ static inline unsigned long readConditionCodes(void)
static inline void writeConditionCodes(const unsigned long val)
{
- unsigned long *userRegisters = GET_USERREG();
+ struct pt_regs *regs = GET_USERREG();
unsigned long rval;
/*
* Operate directly on userRegisters since
* the CPSR may be the PC register itself.
*/
- rval = userRegisters[REG_CPSR] & ~CC_MASK;
- userRegisters[REG_CPSR] = rval | (val & CC_MASK);
+ rval = regs->ARM_cpsr & ~CC_MASK;
+ regs->ARM_cpsr = rval | (val & CC_MASK);
}
diff --git a/arch/i386/kernel/i387.c b/arch/i386/kernel/i387.c
index b817168d9c6..d75524758da 100644
--- a/arch/i386/kernel/i387.c
+++ b/arch/i386/kernel/i387.c
@@ -82,17 +82,6 @@ void kernel_fpu_begin(void)
}
EXPORT_SYMBOL_GPL(kernel_fpu_begin);
-void restore_fpu( struct task_struct *tsk )
-{
- if ( cpu_has_fxsr ) {
- asm volatile( "fxrstor %0"
- : : "m" (tsk->thread.i387.fxsave) );
- } else {
- asm volatile( "frstor %0"
- : : "m" (tsk->thread.i387.fsave) );
- }
-}
-
/*
* FPU tag word conversions.
*/
diff --git a/arch/i386/kernel/process.c b/arch/i386/kernel/process.c
index ba243a4cc11..d9492058aaf 100644
--- a/arch/i386/kernel/process.c
+++ b/arch/i386/kernel/process.c
@@ -700,23 +700,27 @@ struct task_struct fastcall * __switch_to(struct task_struct *prev_p, struct tas
/*
* Restore %fs and %gs if needed.
+ *
+ * Glibc normally makes %fs be zero, and %gs is one of
+ * the TLS segments.
*/
- if (unlikely(prev->fs | prev->gs | next->fs | next->gs)) {
+ if (unlikely(prev->fs | next->fs))
loadsegment(fs, next->fs);
+
+ if (prev->gs | next->gs)
loadsegment(gs, next->gs);
- }
/*
* Now maybe reload the debug registers
*/
if (unlikely(next->debugreg[7])) {
- set_debugreg(current->thread.debugreg[0], 0);
- set_debugreg(current->thread.debugreg[1], 1);
- set_debugreg(current->thread.debugreg[2], 2);
- set_debugreg(current->thread.debugreg[3], 3);
+ set_debugreg(next->debugreg[0], 0);
+ set_debugreg(next->debugreg[1], 1);
+ set_debugreg(next->debugreg[2], 2);
+ set_debugreg(next->debugreg[3], 3);
/* no 4 and 5 */
- set_debugreg(current->thread.debugreg[6], 6);
- set_debugreg(current->thread.debugreg[7], 7);
+ set_debugreg(next->debugreg[6], 6);
+ set_debugreg(next->debugreg[7], 7);
}
if (unlikely(prev->io_bitmap_ptr || next->io_bitmap_ptr))
diff --git a/arch/i386/kernel/setup.c b/arch/i386/kernel/setup.c
index 7306353c520..af4de58cab5 100644
--- a/arch/i386/kernel/setup.c
+++ b/arch/i386/kernel/setup.c
@@ -1414,7 +1414,7 @@ static struct nop {
This runs before SMP is initialized to avoid SMP problems with
self modifying code. This implies that assymetric systems where
APs have less capabilities than the boot processor are not handled.
- In this case boot with "noreplacement". */
+ Tough. Make sure you disable such features by hand. */
void apply_alternatives(void *start, void *end)
{
struct alt_instr *a;
@@ -1442,24 +1442,12 @@ void apply_alternatives(void *start, void *end)
}
}
-static int no_replacement __initdata = 0;
-
void __init alternative_instructions(void)
{
extern struct alt_instr __alt_instructions[], __alt_instructions_end[];
- if (no_replacement)
- return;
apply_alternatives(__alt_instructions, __alt_instructions_end);
}
-static int __init noreplacement_setup(char *s)
-{
- no_replacement = 1;
- return 0;
-}
-
-__setup("noreplacement", noreplacement_setup);
-
static char * __init machine_specific_memory_setup(void);
#ifdef CONFIG_MCA
diff --git a/arch/sparc64/kernel/entry.S b/arch/sparc64/kernel/entry.S
index d781f10adc5..88332f00094 100644
--- a/arch/sparc64/kernel/entry.S
+++ b/arch/sparc64/kernel/entry.S
@@ -1600,11 +1600,11 @@ sys_clone: flushw
ba,pt %xcc, sparc_do_fork
add %sp, PTREGS_OFF, %o2
ret_from_syscall:
- /* Clear SPARC_FLAG_NEWCHILD, switch_to leaves thread.flags in
- * %o7 for us. Check performance counter stuff too.
+ /* Clear current_thread_info()->new_child, and
+ * check performance counter stuff too.
*/
- andn %o7, _TIF_NEWCHILD, %l0
- stx %l0, [%g6 + TI_FLAGS]
+ stb %g0, [%g6 + TI_NEW_CHILD]
+ ldx [%g6 + TI_FLAGS], %l0
call schedule_tail
mov %g7, %o0
andcc %l0, _TIF_PERFCTR, %g0
@@ -1720,12 +1720,11 @@ ret_sys_call:
/* Check if force_successful_syscall_return()
* was invoked.
*/
- ldx [%curptr + TI_FLAGS], %l0
- andcc %l0, _TIF_SYSCALL_SUCCESS, %g0
- be,pt %icc, 1f
- andn %l0, _TIF_SYSCALL_SUCCESS, %l0
+ ldub [%curptr + TI_SYS_NOERROR], %l0
+ brz,pt %l0, 1f
+ nop
ba,pt %xcc, 80f
- stx %l0, [%curptr + TI_FLAGS]
+ stb %g0, [%curptr + TI_SYS_NOERROR]
1:
cmp %o0, -ERESTART_RESTARTBLOCK
diff --git a/arch/sparc64/kernel/irq.c b/arch/sparc64/kernel/irq.c
index daa2fb93052..c9b69167632 100644
--- a/arch/sparc64/kernel/irq.c
+++ b/arch/sparc64/kernel/irq.c
@@ -782,8 +782,14 @@ static void distribute_irqs(void)
}
#endif
+struct sun5_timer {
+ u64 count0;
+ u64 limit0;
+ u64 count1;
+ u64 limit1;
+};
-struct sun5_timer *prom_timers;
+static struct sun5_timer *prom_timers;
static u64 prom_limit0, prom_limit1;
static void map_prom_timers(void)
@@ -839,18 +845,6 @@ static void kill_prom_timer(void)
: "g1", "g2");
}
-void enable_prom_timer(void)
-{
- if (!prom_timers)
- return;
-
- /* Set it to whatever was there before. */
- prom_timers->limit1 = prom_limit1;
- prom_timers->count1 = 0;
- prom_timers->limit0 = prom_limit0;
- prom_timers->count0 = 0;
-}
-
void init_irqwork_curcpu(void)
{
register struct irq_work_struct *workp asm("o2");
diff --git a/arch/sparc64/kernel/process.c b/arch/sparc64/kernel/process.c
index a0cd2b2494d..cffb1c8ab4f 100644
--- a/arch/sparc64/kernel/process.c
+++ b/arch/sparc64/kernel/process.c
@@ -621,8 +621,8 @@ int copy_thread(int nr, unsigned long clone_flags, unsigned long sp,
memcpy(child_trap_frame, (((struct sparc_stackf *)regs)-1), (TRACEREG_SZ+STACKFRAME_SZ));
t->flags = (t->flags & ~((0xffUL << TI_FLAG_CWP_SHIFT) | (0xffUL << TI_FLAG_CURRENT_DS_SHIFT))) |
- _TIF_NEWCHILD |
(((regs->tstate + 1) & TSTATE_CWP) << TI_FLAG_CWP_SHIFT);
+ t->new_child = 1;
t->ksp = ((unsigned long) child_trap_frame) - STACK_BIAS;
t->kregs = (struct pt_regs *)(child_trap_frame+sizeof(struct sparc_stackf));
t->fpsaved[0] = 0;
diff --git a/arch/sparc64/kernel/smp.c b/arch/sparc64/kernel/smp.c
index 7e8e2919e18..b9b42491e11 100644
--- a/arch/sparc64/kernel/smp.c
+++ b/arch/sparc64/kernel/smp.c
@@ -137,7 +137,7 @@ void __init smp_callin(void)
/* Clear this or we will die instantly when we
* schedule back to this idler...
*/
- clear_thread_flag(TIF_NEWCHILD);
+ current_thread_info()->new_child = 0;
/* Attach to the address space of init_task. */
atomic_inc(&init_mm.mm_count);
diff --git a/arch/sparc64/kernel/traps.c b/arch/sparc64/kernel/traps.c
index a9f4596d7c2..100b0107c4b 100644
--- a/arch/sparc64/kernel/traps.c
+++ b/arch/sparc64/kernel/traps.c
@@ -2125,6 +2125,8 @@ void __init trap_init(void)
TI_PCR != offsetof(struct thread_info, pcr_reg) ||
TI_CEE_STUFF != offsetof(struct thread_info, cee_stuff) ||
TI_PRE_COUNT != offsetof(struct thread_info, preempt_count) ||
+ TI_NEW_CHILD != offsetof(struct thread_info, new_child) ||
+ TI_SYS_NOERROR != offsetof(struct thread_info, syscall_noerror) ||
TI_FPREGS != offsetof(struct thread_info, fpregs) ||
(TI_FPREGS & (64 - 1)))
thread_info_offsets_are_bolixed_dave();
generated by cgit v1.2.3 (git 2.25.1) at 2024-12-19 23:27:34 +0000