diff options
Diffstat (limited to 'arch')
80 files changed, 1219 insertions, 202 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index a44c6da9bf8..85016313bd1 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -324,6 +324,12 @@ config ARCH_NS9XXX <http://www.digi.com/products/microprocessors/index.jsp> +config ARCH_MXC + bool "Freescale MXC/iMX-based" + select ARCH_MTD_XIP + help + Support for Freescale MXC/iMX-based family of processors + config ARCH_PNX4008 bool "Philips Nexperia PNX4008 Mobile" help @@ -432,6 +438,7 @@ source "arch/arm/mach-omap1/Kconfig" source "arch/arm/mach-omap2/Kconfig" source "arch/arm/plat-s3c24xx/Kconfig" +source "arch/arm/plat-s3c/Kconfig" if ARCH_S3C2410 source "arch/arm/mach-s3c2400/Kconfig" @@ -456,6 +463,8 @@ source "arch/arm/mach-realview/Kconfig" source "arch/arm/mach-at91/Kconfig" +source "arch/arm/plat-mxc/Kconfig" + source "arch/arm/mach-netx/Kconfig" source "arch/arm/mach-ns9xxx/Kconfig" diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug index 40c5eb1f55c..18101f5f5f2 100644 --- a/arch/arm/Kconfig.debug +++ b/arch/arm/Kconfig.debug @@ -82,24 +82,24 @@ config DEBUG_CLPS711X_UART2 output to the second serial port on these devices. Saying N will cause the debug messages to appear on the first serial port. -config DEBUG_S3C2410_PORT - depends on DEBUG_LL && ARCH_S3C2410 - bool "Kernel low-level debugging messages via S3C2410 UART" +config DEBUG_S3C_PORT + depends on DEBUG_LL && PLAT_S3C + bool "Kernel low-level debugging messages via S3C UART" help Say Y here if you want debug print routines to go to one of the - S3C2410 internal UARTs. The chosen UART must have been configured + S3C internal UARTs. The chosen UART must have been configured before it is used. -config DEBUG_S3C2410_UART - depends on ARCH_S3C2410 - int "S3C2410 UART to use for low-level debug" +config DEBUG_S3C_UART + depends on PLAT_S3C + int "S3C UART to use for low-level debug" default "0" help - Choice for UART for kernel low-level using S3C2410 UARTS, + Choice for UART for kernel low-level using S3C UARTS, should be between zero and two. The port must have been initialised by the boot-loader before use. The uncompressor code port configuration is now handled - by CONFIG_S3C2410_LOWLEVEL_UART_PORT. + by CONFIG_S3C_LOWLEVEL_UART_PORT. endmenu diff --git a/arch/arm/Makefile b/arch/arm/Makefile index cbd5010d3bc..fa4ea9ff079 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile @@ -137,6 +137,8 @@ endif textofs-$(CONFIG_ARCH_NS9XXX) := 0x00108000 machine-$(CONFIG_ARCH_DAVINCI) := davinci machine-$(CONFIG_ARCH_KS8695) := ks8695 + incdir-$(CONFIG_ARCH_MXC) := mxc + machine-$(CONFIG_ARCH_MX3) := mx3 ifeq ($(CONFIG_ARCH_EBSA110),y) # This is what happens if you forget the IOCS16 line. @@ -183,6 +185,7 @@ core-$(CONFIG_VFP) += arch/arm/vfp/ core-$(CONFIG_PLAT_IOP) += arch/arm/plat-iop/ core-$(CONFIG_ARCH_OMAP) += arch/arm/plat-omap/ core-$(CONFIG_PLAT_S3C24XX) += arch/arm/plat-s3c24xx/ +core-$(CONFIG_ARCH_MXC) += arch/arm/plat-mxc/ drivers-$(CONFIG_OPROFILE) += arch/arm/oprofile/ drivers-$(CONFIG_ARCH_CLPS7500) += drivers/acorn/char/ diff --git a/arch/arm/boot/Makefile b/arch/arm/boot/Makefile index ec9c400c7f8..25f12303b10 100644 --- a/arch/arm/boot/Makefile +++ b/arch/arm/boot/Makefile @@ -91,4 +91,12 @@ zinstall: $(obj)/zImage $(CONFIG_SHELL) $(srctree)/$(src)/install.sh $(KERNELRELEASE) \ $(obj)/zImage System.map "$(INSTALL_PATH)" +zi: + $(CONFIG_SHELL) $(srctree)/$(src)/install.sh $(KERNELRELEASE) \ + $(obj)/zImage System.map "$(INSTALL_PATH)" + +i: + $(CONFIG_SHELL) $(srctree)/$(src)/install.sh $(KERNELRELEASE) \ + $(obj)/Image System.map "$(INSTALL_PATH)" + subdir- := bootp compressed diff --git a/arch/arm/boot/compressed/Makefile b/arch/arm/boot/compressed/Makefile index a1f1691b67f..6b8cbd69f24 100644 --- a/arch/arm/boot/compressed/Makefile +++ b/arch/arm/boot/compressed/Makefile @@ -73,7 +73,7 @@ SEDFLAGS = s/TEXT_START/$(ZTEXTADDR)/;s/BSS_START/$(ZBSSADDR)/ targets := vmlinux vmlinux.lds piggy.gz piggy.o font.o font.c \ head.o misc.o $(OBJS) -EXTRA_CFLAGS := -fpic +EXTRA_CFLAGS := -fpic -fno-builtin EXTRA_AFLAGS := # Supply ZRELADDR, INITRD_PHYS and PARAMS_PHYS to the decompressor via diff --git a/arch/arm/boot/compressed/head.S b/arch/arm/boot/compressed/head.S index d7fb5ee1637..b9b03eda70e 100644 --- a/arch/arm/boot/compressed/head.S +++ b/arch/arm/boot/compressed/head.S @@ -55,7 +55,7 @@ #elif defined(CONFIG_ARCH_S3C2410) .macro loadsp, rb mov \rb, #0x50000000 - add \rb, \rb, #0x4000 * CONFIG_S3C2410_LOWLEVEL_UART_PORT + add \rb, \rb, #0x4000 * CONFIG_S3C_LOWLEVEL_UART_PORT .endm #else .macro loadsp, rb diff --git a/arch/arm/configs/s3c2410_defconfig b/arch/arm/configs/s3c2410_defconfig index 1d5150e4d6b..f8a1645b3d4 100644 --- a/arch/arm/configs/s3c2410_defconfig +++ b/arch/arm/configs/s3c2410_defconfig @@ -138,11 +138,11 @@ CONFIG_ARCH_S3C2410=y CONFIG_PLAT_S3C24XX=y CONFIG_CPU_S3C244X=y CONFIG_PM_SIMTEC=y -# CONFIG_S3C2410_BOOT_WATCHDOG is not set -# CONFIG_S3C2410_BOOT_ERROR_RESET is not set +# CONFIG_S3C_BOOT_WATCHDOG is not set +# CONFIG_S3C_BOOT_ERROR_RESET is not set # CONFIG_S3C2410_PM_DEBUG is not set # CONFIG_S3C2410_PM_CHECK is not set -CONFIG_S3C2410_LOWLEVEL_UART_PORT=0 +CONFIG_S3C_LOWLEVEL_UART_PORT=0 CONFIG_S3C2410_DMA=y # CONFIG_S3C2410_DMA_DEBUG is not set CONFIG_MACH_SMDK=y @@ -1392,8 +1392,8 @@ CONFIG_DEBUG_USER=y # CONFIG_DEBUG_ERRORS is not set CONFIG_DEBUG_LL=y # CONFIG_DEBUG_ICEDCC is not set -CONFIG_DEBUG_S3C2410_PORT=y -CONFIG_DEBUG_S3C2410_UART=0 +CONFIG_DEBUG_S3C_PORT=y +CONFIG_DEBUG_S3C_UART=0 # # Security options diff --git a/arch/arm/mach-at91/at91rm9200_devices.c b/arch/arm/mach-at91/at91rm9200_devices.c index 70599bcf451..0417c165d50 100644 --- a/arch/arm/mach-at91/at91rm9200_devices.c +++ b/arch/arm/mach-at91/at91rm9200_devices.c @@ -477,7 +477,7 @@ void __init at91_add_device_i2c(void) {} * SPI * -------------------------------------------------------------------- */ -#if defined(CONFIG_SPI_AT91) || defined(CONFIG_SPI_AT91_MODULE) || defined(CONFIG_AT91_SPI) || defined(CONFIG_AT91_SPI_MODULE) +#if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE) static u64 spi_dmamask = 0xffffffffUL; static struct resource spi_resources[] = { @@ -494,7 +494,7 @@ static struct resource spi_resources[] = { }; static struct platform_device at91rm9200_spi_device = { - .name = "at91_spi", + .name = "atmel_spi", .id = 0, .dev = { .dma_mask = &spi_dmamask, @@ -522,18 +522,14 @@ void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) else cs_pin = spi_standard_cs[devices[i].chip_select]; -#ifdef CONFIG_SPI_AT91_MANUAL_CS + /* enable chip-select pin */ at91_set_gpio_output(cs_pin, 1); -#else - at91_set_A_periph(cs_pin, 0); -#endif /* pass chip-select pin to driver */ devices[i].controller_data = (void *) cs_pin; } spi_register_board_info(devices, nr_devices); - at91_clock_associate("spi_clk", &at91rm9200_spi_device.dev, "spi"); platform_device_register(&at91rm9200_spi_device); } #else diff --git a/arch/arm/mach-iop32x/Kconfig b/arch/arm/mach-iop32x/Kconfig index 9bb02b6d7ae..dbe07c9472e 100644 --- a/arch/arm/mach-iop32x/Kconfig +++ b/arch/arm/mach-iop32x/Kconfig @@ -42,6 +42,13 @@ config IOP3XX_ATU Say N if the IOP is an add in card, the host system owns the PCI bus in this case. +config MACH_EM7210 + bool "Enable support for the Lanner EM7210" + help + Say Y here if you want to run your kernel on the Lanner EM7210 + board. Say also Y here if you have a SS4000e Baxter Creek NAS + appliance." + endmenu endif diff --git a/arch/arm/mach-iop32x/Makefile b/arch/arm/mach-iop32x/Makefile index 7b05b37e1f9..cfdf8a137c2 100644 --- a/arch/arm/mach-iop32x/Makefile +++ b/arch/arm/mach-iop32x/Makefile @@ -11,3 +11,4 @@ obj-$(CONFIG_MACH_GLANTANK) += glantank.o obj-$(CONFIG_ARCH_IQ80321) += iq80321.o obj-$(CONFIG_ARCH_IQ31244) += iq31244.o obj-$(CONFIG_MACH_N2100) += n2100.o +obj-$(CONFIG_MACH_EM7210) += em7210.o diff --git a/arch/arm/mach-iop32x/em7210.c b/arch/arm/mach-iop32x/em7210.c new file mode 100644 index 00000000000..c947152f9a3 --- /dev/null +++ b/arch/arm/mach-iop32x/em7210.c @@ -0,0 +1,215 @@ +/* + * arch/arm/mach-iop32x/em7210.c + * + * Board support code for the Lanner EM7210 platforms. + * + * Based on arch/arm/mach-iop32x/iq31244.c file. + * + * Copyright (C) 2007 Arnaud Patard <arnaud.patard@rtp-net.org> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + */ + +#include <linux/mm.h> +#include <linux/init.h> +#include <linux/kernel.h> +#include <linux/pci.h> +#include <linux/pm.h> +#include <linux/serial_core.h> +#include <linux/serial_8250.h> +#include <linux/mtd/physmap.h> +#include <linux/platform_device.h> +#include <linux/i2c.h> +#include <asm/hardware.h> +#include <linux/io.h> +#include <linux/irq.h> +#include <asm/mach/arch.h> +#include <asm/mach/map.h> +#include <asm/mach/pci.h> +#include <asm/mach/time.h> +#include <asm/mach-types.h> +#include <asm/arch/time.h> + +static void __init em7210_timer_init(void) +{ + /* http://www.kwaak.net/fotos/fotos-nas/slide_24.html */ + /* 33.333 MHz crystal. */ + iop_init_time(200000000); +} + +static struct sys_timer em7210_timer = { + .init = em7210_timer_init, + .offset = iop_gettimeoffset, +}; + +/* + * EM7210 RTC + */ +static struct i2c_board_info __initdata em7210_i2c_devices[] = { + { + I2C_BOARD_INFO("rtc-rs5c372", 0x32), + .type = "rs5c372a", + }, +}; + +/* + * EM7210 I/O + */ +static struct map_desc em7210_io_desc[] __initdata = { + { /* on-board devices */ + .virtual = IQ31244_UART, + .pfn = __phys_to_pfn(IQ31244_UART), + .length = 0x00100000, + .type = MT_DEVICE, + }, +}; + +void __init em7210_map_io(void) +{ + iop3xx_map_io(); + iotable_init(em7210_io_desc, ARRAY_SIZE(em7210_io_desc)); +} + + +/* + * EM7210 PCI + */ +#define INTA IRQ_IOP32X_XINT0 +#define INTB IRQ_IOP32X_XINT1 +#define INTC IRQ_IOP32X_XINT2 +#define INTD IRQ_IOP32X_XINT3 + +static int __init +em7210_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin) +{ + static int pci_irq_table[][4] = { + /* + * PCI IDSEL/INTPIN->INTLINE + * A B C D + */ + {INTB, INTB, INTB, INTB}, /* console / uart */ + {INTA, INTA, INTA, INTA}, /* 1st 82541 */ + {INTD, INTD, INTD, INTD}, /* 2nd 82541 */ + {INTC, INTC, INTC, INTC}, /* GD31244 */ + {INTD, INTA, INTA, INTA}, /* mini-PCI */ + {INTD, INTC, INTA, INTA}, /* NEC USB */ + }; + + if (pin < 1 || pin > 4) + return -1; + + return pci_irq_table[slot % 6][pin - 1]; +} + +static struct hw_pci em7210_pci __initdata = { + .swizzle = pci_std_swizzle, + .nr_controllers = 1, + .setup = iop3xx_pci_setup, + .preinit = iop3xx_pci_preinit, + .scan = iop3xx_pci_scan_bus, + .map_irq = em7210_pci_map_irq, +}; + +static int __init em7210_pci_init(void) +{ + if (machine_is_em7210()) + pci_common_init(&em7210_pci); + + return 0; +} + +subsys_initcall(em7210_pci_init); + + +/* + * EM7210 Flash + */ +static struct physmap_flash_data em7210_flash_data = { + .width = 2, +}; + +static struct resource em7210_flash_resource = { + .start = 0xf0000000, + .end = 0xf1ffffff, + .flags = IORESOURCE_MEM, +}; + +static struct platform_device em7210_flash_device = { + .name = "physmap-flash", + .id = 0, + .dev = { + .platform_data = &em7210_flash_data, + }, + .num_resources = 1, + .resource = &em7210_flash_resource, +}; + + +/* + * EM7210 UART + * The physical address of the serial port is 0xfe800000, + * so it can be used for physical and virtual address. + */ +static struct plat_serial8250_port em7210_serial_port[] = { + { + .mapbase = IQ31244_UART, + .membase = (char *)IQ31244_UART, + .irq = IRQ_IOP32X_XINT1, + .flags = UPF_SKIP_TEST, + .iotype = UPIO_MEM, + .regshift = 0, + .uartclk = 1843200, + }, + { }, +}; + +static struct resource em7210_uart_resource = { + .start = IQ31244_UART, + .end = IQ31244_UART + 7, + .flags = IORESOURCE_MEM, +}; + +static struct platform_device em7210_serial_device = { + .name = "serial8250", + .id = PLAT8250_DEV_PLATFORM, + .dev = { + .platform_data = em7210_serial_port, + }, + .num_resources = 1, + .resource = &em7210_uart_resource, +}; + +void em7210_power_off(void) +{ + *IOP3XX_GPOE &= 0xfe; + *IOP3XX_GPOD |= 0x01; +} + +static void __init em7210_init_machine(void) +{ + platform_device_register(&em7210_serial_device); + platform_device_register(&iop3xx_i2c0_device); + platform_device_register(&iop3xx_i2c1_device); + platform_device_register(&em7210_flash_device); + platform_device_register(&iop3xx_dma_0_channel); + platform_device_register(&iop3xx_dma_1_channel); + + i2c_register_board_info(0, em7210_i2c_devices, + ARRAY_SIZE(em7210_i2c_devices)); + + + pm_power_off = em7210_power_off; +} + +MACHINE_START(EM7210, "Lanner EM7210") + .phys_io = IQ31244_UART, + .io_pg_offst = ((IQ31244_UART) >> 18) & 0xfffc, + .boot_params = 0xa0000100, + .map_io = em7210_map_io, + .init_irq = iop32x_init_irq, + .timer = &em7210_timer, + .init_machine = em7210_init_machine, +MACHINE_END diff --git a/arch/arm/mach-iop32x/irq.c b/arch/arm/mach-iop32x/irq.c index c971171c290..55cf0162e8c 100644 --- a/arch/arm/mach-iop32x/irq.c +++ b/arch/arm/mach-iop32x/irq.c @@ -63,7 +63,8 @@ void __init iop32x_init_irq(void) if (machine_is_glantank() || machine_is_iq80321() || machine_is_iq31244() || - machine_is_n2100()) + machine_is_n2100() || + machine_is_em7210()) *IOP3XX_PCIIRSR = 0x0f; for (i = 0; i < NR_IRQS; i++) { diff --git a/arch/arm/mach-ixp4xx/common.c b/arch/arm/mach-ixp4xx/common.c index 8112f726ffa..4c54a86eda3 100644 --- a/arch/arm/mach-ixp4xx/common.c +++ b/arch/arm/mach-ixp4xx/common.c @@ -188,7 +188,7 @@ static int ixp4xx_set_irq_type(unsigned int irq, unsigned int type) *int_reg |= (int_style << (line * IXP4XX_GPIO_STYLE_SIZE)); /* Configure the line as an input */ - gpio_line_config(line, IXP4XX_GPIO_IN); + gpio_line_config(irq2gpio[irq], IXP4XX_GPIO_IN); return 0; } diff --git a/arch/arm/mach-ks8695/irq.c b/arch/arm/mach-ks8695/irq.c index 2407bba0054..4c3ab43e104 100644 --- a/arch/arm/mach-ks8695/irq.c +++ b/arch/arm/mach-ks8695/irq.c @@ -23,7 +23,6 @@ #include <linux/module.h> #include <linux/interrupt.h> #include <linux/ioport.h> -#include <linux/ptrace.h> #include <linux/sysdev.h> #include <asm/hardware.h> diff --git a/arch/arm/mach-mx3/Kconfig b/arch/arm/mach-mx3/Kconfig new file mode 100644 index 00000000000..5fe8606cac0 --- /dev/null +++ b/arch/arm/mach-mx3/Kconfig @@ -0,0 +1,12 @@ +menu "MX3 Options" + depends on ARCH_MX3 + +config MACH_MX31ADS + bool "Support MX31ADS platforms" + default y + help + Include support for MX31ADS platform. This includes specific + configurations for the board and its peripherals. + +endmenu + diff --git a/arch/arm/mach-mx3/Makefile b/arch/arm/mach-mx3/Makefile new file mode 100644 index 00000000000..cbec997f332 --- /dev/null +++ b/arch/arm/mach-mx3/Makefile @@ -0,0 +1,8 @@ +# +# Makefile for the linux kernel. +# + +# Object file lists. + +obj-y := mm.o time.o +obj-$(CONFIG_MACH_MX31ADS) += mx31ads.o diff --git a/arch/arm/mach-mx3/Makefile.boot b/arch/arm/mach-mx3/Makefile.boot new file mode 100644 index 00000000000..e1dd366f836 --- /dev/null +++ b/arch/arm/mach-mx3/Makefile.boot @@ -0,0 +1,3 @@ + zreladdr-y := 0x80008000 +params_phys-y := 0x80000100 +initrd_phys-y := 0x80800000 diff --git a/arch/arm/mach-mx3/mm.c b/arch/arm/mach-mx3/mm.c new file mode 100644 index 00000000000..41dad485ded --- /dev/null +++ b/arch/arm/mach-mx3/mm.c @@ -0,0 +1,64 @@ +/* + * Copyright (C) 1999,2000 Arm Limited + * Copyright (C) 2000 Deep Blue Solutions Ltd + * Copyright (C) 2002 Shane Nay (shane@minirl.com) + * Copyright 2005-2007 Freescale Semiconductor, Inc. All Rights Reserved. + * - add MX31 specific definitions + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#include <linux/mm.h> +#include <linux/init.h> +#include <asm/hardware.h> +#include <asm/pgtable.h> +#include <asm/mach/map.h> +#include <asm/arch/common.h> + +/*! + * @file mm.c + * + * @brief This file creates static virtual to physical mappings, common to all MX3 boards. + * + * @ingroup Memory + */ + +/*! + * This table defines static virtual address mappings for I/O regions. + * These are the mappings common across all MX3 boards. + */ +static struct map_desc mxc_io_desc[] __initdata = { + { + .virtual = X_MEMC_BASE_ADDR_VIRT, + .pfn = __phys_to_pfn(X_MEMC_BASE_ADDR), + .length = X_MEMC_SIZE, + .type = MT_DEVICE + }, { + .virtual = AVIC_BASE_ADDR_VIRT, + .pfn = __phys_to_pfn(AVIC_BASE_ADDR), + .length = AVIC_SIZE, + .type = MT_NONSHARED_DEVICE + }, +}; + +/*! + * This function initializes the memory map. It is called during the + * system startup to create static physical to virtual memory mappings + * for the IO modules. + */ +void __init mxc_map_io(void) +{ + iotable_init(mxc_io_desc, ARRAY_SIZE(mxc_io_desc)); +} diff --git a/arch/arm/mach-mx3/mx31ads.c b/arch/arm/mach-mx3/mx31ads.c new file mode 100644 index 00000000000..7e89bdc23a9 --- /dev/null +++ b/arch/arm/mach-mx3/mx31ads.c @@ -0,0 +1,142 @@ +/* + * Copyright (C) 2000 Deep Blue Solutions Ltd + * Copyright (C) 2002 Shane Nay (shane@minirl.com) + * Copyright 2005-2007 Freescale Semiconductor, Inc. All Rights Reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#include <linux/types.h> +#include <linux/init.h> +#include <linux/clk.h> +#include <linux/serial_8250.h> + +#include <asm/hardware.h> +#include <asm/mach-types.h> +#include <asm/mach/arch.h> +#include <asm/memory.h> +#include <asm/mach/map.h> +#include <asm/arch/common.h> + +/*! + * @file mx31ads.c + * + * @brief This file contains the board-specific initialization routines. + * + * @ingroup System + */ + +#if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE) +/*! + * The serial port definition structure. + */ +static struct plat_serial8250_port serial_platform_data[] = { + { + .membase = (void *)(PBC_BASE_ADDRESS + PBC_SC16C652_UARTA), + .mapbase = (unsigned long)(CS4_BASE_ADDR + PBC_SC16C652_UARTA), + .irq = EXPIO_INT_XUART_INTA, + .uartclk = 14745600, + .regshift = 0, + .iotype = UPIO_MEM, + .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_AUTO_IRQ, + }, { + .membase = (void *)(PBC_BASE_ADDRESS + PBC_SC16C652_UARTB), + .mapbase = (unsigned long)(CS4_BASE_ADDR + PBC_SC16C652_UARTB), + .irq = EXPIO_INT_XUART_INTB, + .uartclk = 14745600, + .regshift = 0, + .iotype = UPIO_MEM, + .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_AUTO_IRQ, + }, + {}, +}; + +static struct platform_device serial_device = { + .name = "serial8250", + .id = 0, + .dev = { + .platform_data = serial_platform_data, + }, +}; + +static int __init mxc_init_extuart(void) +{ + return platform_device_register(&serial_device); +} +#else +static inline int mxc_init_extuart(void) +{ + return 0; +} +#endif + +/*! + * This structure defines static mappings for the i.MX31ADS board. + */ +static struct map_desc mx31ads_io_desc[] __initdata = { + { + .virtual = AIPS1_BASE_ADDR_VIRT, + .pfn = __phys_to_pfn(AIPS1_BASE_ADDR), + .length = AIPS1_SIZE, + .type = MT_NONSHARED_DEVICE + }, { + .virtual = SPBA0_BASE_ADDR_VIRT, + .pfn = __phys_to_pfn(SPBA0_BASE_ADDR), + .length = SPBA0_SIZE, + .type = MT_NONSHARED_DEVICE + }, { + .virtual = AIPS2_BASE_ADDR_VIRT, + .pfn = __phys_to_pfn(AIPS2_BASE_ADDR), + .length = AIPS2_SIZE, + .type = MT_NONSHARED_DEVICE + }, { + .virtual = CS4_BASE_ADDR_VIRT, + .pfn = __phys_to_pfn(CS4_BASE_ADDR), + .length = CS4_SIZE / 2, + .type = MT_DEVICE + }, +}; + +/*! + * Set up static virtual mappings. + */ +void __init mx31ads_map_io(void) +{ + mxc_map_io(); + iotable_init(mx31ads_io_desc, ARRAY_SIZE(mx31ads_io_desc)); +} + +/*! + * Board specific initialization. + */ +static void __init mxc_board_init(void) +{ + mxc_init_extuart(); +} + +/* + * The following uses standard kernel macros defined in arch.h in order to + * initialize __mach_desc_MX31ADS data structure. + */ +MACHINE_START(MX31ADS, "Freescale MX31ADS") + /* Maintainer: Freescale Semiconductor, Inc. */ + .phys_io = AIPS1_BASE_ADDR, + .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, + .boot_params = PHYS_OFFSET + 0x100, + .map_io = mx31ads_map_io, + .init_irq = mxc_init_irq, + .init_machine = mxc_board_init, + .timer = &mxc_timer, +MACHINE_END diff --git a/arch/arm/mach-mx3/time.c b/arch/arm/mach-mx3/time.c new file mode 100644 index 00000000000..e81fb5c5d7c --- /dev/null +++ b/arch/arm/mach-mx3/time.c @@ -0,0 +1,152 @@ +/* + * System Timer Interrupt reconfigured to run in free-run mode. + * Author: Vitaly Wool + * Copyright 2004 MontaVista Software Inc. + * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +/*! + * @file time.c + * @brief This file contains OS tick and wdog timer implementations. + * + * This file contains OS tick and wdog timer implementations. + * + * @ingroup Timers + */ + +#include <linux/module.h> +#include <linux/init.h> +#include <linux/interrupt.h> +#include <linux/irq.h> +#include <asm/hardware.h> +#include <asm/mach/time.h> +#include <asm/io.h> +#include <asm/arch/common.h> + +/*! + * This is the timer interrupt service routine to do required tasks. + * It also services the WDOG timer at the frequency of twice per WDOG + * timeout value. For example, if the WDOG's timeout value is 4 (2 + * seconds since the WDOG runs at 0.5Hz), it will be serviced once + * every 2/2=1 second. + * + * @param irq GPT interrupt source number (not used) + * @param dev_id this parameter is not used + * @return always returns \b IRQ_HANDLED as defined in + * include/linux/interrupt.h. + */ +static irqreturn_t mxc_timer_interrupt(int irq, void *dev_id) +{ + unsigned int next_match; + + write_seqlock(&xtime_lock); + + if (__raw_readl(MXC_GPT_GPTSR) & GPTSR_OF1) { + do { + timer_tick(); + next_match = __raw_readl(MXC_GPT_GPTOCR1) + LATCH; + __raw_writel(GPTSR_OF1, MXC_GPT_GPTSR); + __raw_writel(next_match, MXC_GPT_GPTOCR1); + } while ((signed long)(next_match - + __raw_readl(MXC_GPT_GPTCNT)) <= 0); + } + + write_sequnlock(&xtime_lock); + + return IRQ_HANDLED; +} + +/*! + * This function is used to obtain the number of microseconds since the last + * timer interrupt. Note that interrupts is disabled by do_gettimeofday(). + * + * @return the number of microseconds since the last timer interrupt. + */ +static unsigned long mxc_gettimeoffset(void) +{ + unsigned long ticks_to_match, elapsed, usec, tick_usec, i; + + /* Get ticks before next timer match */ + ticks_to_match = + __raw_readl(MXC_GPT_GPTOCR1) - __raw_readl(MXC_GPT_GPTCNT); + + /* We need elapsed ticks since last match */ + elapsed = LATCH - ticks_to_match; + + /* Now convert them to usec */ + /* Insure no overflow when calculating the usec below */ + for (i = 1, tick_usec = tick_nsec / 1000;; i *= 2) { + tick_usec /= i; + if ((0xFFFFFFFF / tick_usec) > elapsed) + break; + } + usec = (unsigned long)(elapsed * tick_usec) / (LATCH / i); + + return usec; +} + +/*! + * The OS tick timer interrupt structure. + */ +static struct irqaction timer_irq = { + .name = "MXC Timer Tick", + .flags = IRQF_DISABLED | IRQF_TIMER, + .handler = mxc_timer_interrupt +}; + +/*! + * This function is used to initialize the GPT to produce an interrupt + * based on HZ. It is called by start_kernel() during system startup. + */ +void __init mxc_init_time(void) +{ + u32 reg, v; + reg = __raw_readl(MXC_GPT_GPTCR); + reg &= ~GPTCR_ENABLE; + __raw_writel(reg, MXC_GPT_GPTCR); + reg |= GPTCR_SWR; + __raw_writel(reg, MXC_GPT_GPTCR); + + while ((__raw_readl(MXC_GPT_GPTCR) & GPTCR_SWR) != 0) + cpu_relax(); + + reg = GPTCR_FRR | GPTCR_CLKSRC_HIGHFREQ; + __raw_writel(reg, MXC_GPT_GPTCR); + + /* TODO: get timer rate from clk driver */ + v = 66500000; + + __raw_writel((v / CLOCK_TICK_RATE) - 1, MXC_GPT_GPTPR); + + if ((v % CLOCK_TICK_RATE) != 0) { + pr_info("\nWARNING: Can't generate CLOCK_TICK_RATE at %d Hz\n", + CLOCK_TICK_RATE); + } + pr_info("Actual CLOCK_TICK_RATE is %d Hz\n", + v / ((__raw_readl(MXC_GPT_GPTPR) & 0xFFF) + 1)); + + reg = __raw_readl(MXC_GPT_GPTCNT); + reg += LATCH; + __raw_writel(reg, MXC_GPT_GPTOCR1); + + setup_irq(MXC_INT_GPT, &timer_irq); + + reg = __raw_readl(MXC_GPT_GPTCR); + reg = + GPTCR_FRR | GPTCR_CLKSRC_HIGHFREQ | GPTCR_STOPEN | GPTCR_DOZEN | + GPTCR_WAITEN | GPTCR_ENMOD | GPTCR_ENABLE; + __raw_writel(reg, MXC_GPT_GPTCR); + + __raw_writel(GPTIR_OF1IE, MXC_GPT_GPTIR); +} + +struct sys_timer mxc_timer = { + .init = mxc_init_time, + .offset = mxc_gettimeoffset, +}; diff --git a/arch/arm/mach-ns9xxx/Makefile b/arch/arm/mach-ns9xxx/Makefile index 53213a69f60..4476411b814 100644 --- a/arch/arm/mach-ns9xxx/Makefile +++ b/arch/arm/mach-ns9xxx/Makefile @@ -1,6 +1,7 @@ obj-y := irq.o time.o generic.o obj-$(CONFIG_MACH_CC9P9360DEV) += mach-cc9p9360dev.o +obj-$(CONFIG_MACH_CC9P9360JS) += mach-cc9p9360js.o obj-$(CONFIG_BOARD_A9M9750DEV) += board-a9m9750dev.o obj-$(CONFIG_BOARD_JSCC9P9360) += board-jscc9p9360.o diff --git a/arch/arm/mach-ns9xxx/board-a9m9750dev.c b/arch/arm/mach-ns9xxx/board-a9m9750dev.c index 25289884a60..925048e7adf 100644 --- a/arch/arm/mach-ns9xxx/board-a9m9750dev.c +++ b/arch/arm/mach-ns9xxx/board-a9m9750dev.c @@ -77,7 +77,7 @@ static void a9m9750dev_fpga_demux_handler(unsigned int irq, desc = irq_desc + FPGA_IRQ(irqno); - desc_handle_irq(irqno, desc); + desc_handle_irq(FPGA_IRQ(irqno), desc); } } @@ -91,7 +91,7 @@ void __init board_a9m9750dev_init_irq(void) * use GPIO 11, because GPIO 32 is used for the LCD */ /* XXX: proper GPIO handling */ - BBU_GC(2) &= ~0x2000; + BBU_GCONFb1(1) &= ~0x2000; for (i = FPGA_IRQ(0); i <= FPGA_IRQ(7); ++i) { set_irq_chip(i, &a9m9750dev_fpga_chip); @@ -178,7 +178,7 @@ void __init board_a9m9750dev_init_machine(void) /* setup static CS0: memory configuration */ reg = MEM_SMC(0); - REGSET(reg, MEM_SMC, WSMC, OFF); + REGSET(reg, MEM_SMC, PSMC, OFF); REGSET(reg, MEM_SMC, BSMC, OFF); REGSET(reg, MEM_SMC, EW, OFF); REGSET(reg, MEM_SMC, PB, 1); @@ -196,4 +196,3 @@ void __init board_a9m9750dev_init_machine(void) platform_add_devices(board_a9m9750dev_devices, ARRAY_SIZE(board_a9m9750dev_devices)); } - diff --git a/arch/arm/mach-ns9xxx/generic.c b/arch/arm/mach-ns9xxx/generic.c index 83e2b6532b2..d742c921e34 100644 --- a/arch/arm/mach-ns9xxx/generic.c +++ b/arch/arm/mach-ns9xxx/generic.c @@ -18,6 +18,8 @@ #include <asm/arch-ns9xxx/regs-mem.h> #include <asm/arch-ns9xxx/board.h> +#include "generic.h" + static struct map_desc standard_io_desc[] __initdata = { { /* BBus */ .virtual = io_p2v(0x90000000), diff --git a/arch/arm/mach-ns9xxx/irq.c b/arch/arm/mach-ns9xxx/irq.c index 83d92724a97..b8c7b00522e 100644 --- a/arch/arm/mach-ns9xxx/irq.c +++ b/arch/arm/mach-ns9xxx/irq.c @@ -21,6 +21,15 @@ static void ns9xxx_ack_irq_timer(unsigned int irq) { u32 tc = SYS_TC(irq - IRQ_TIMER0); + /* + * If the timer is programmed to halt on terminal count, the + * timer must be disabled before clearing the interrupt. + */ + if (REGGET(tc, SYS_TCx, REN) == 0) { + REGSET(tc, SYS_TCx, TEN, DIS); + SYS_TC(irq - IRQ_TIMER0) = tc; + } + REGSET(tc, SYS_TCx, INTC, SET); SYS_TC(irq - IRQ_TIMER0) = tc; @@ -28,7 +37,7 @@ static void ns9xxx_ack_irq_timer(unsigned int irq) SYS_TC(irq - IRQ_TIMER0) = tc; } -void (*ns9xxx_ack_irq_functions[NR_IRQS])(unsigned int) = { +static void (*ns9xxx_ack_irq_functions[NR_IRQS])(unsigned int) = { [IRQ_TIMER0] = ns9xxx_ack_irq_timer, [IRQ_TIMER1] = ns9xxx_ack_irq_timer, [IRQ_TIMER2] = ns9xxx_ack_irq_timer, diff --git a/arch/arm/mach-ns9xxx/mach-cc9p9360js.c b/arch/arm/mach-ns9xxx/mach-cc9p9360js.c index d09d5fa5620..85c8b41105c 100644 --- a/arch/arm/mach-ns9xxx/mach-cc9p9360js.c +++ b/arch/arm/mach-ns9xxx/mach-cc9p9360js.c @@ -20,7 +20,7 @@ static void __init mach_cc9p9360js_init_machine(void) board_jscc9p9360_init_machine(); } -MACHINE_START(CC9P9360DEV, "Digi ConnectCore 9P 9360 on an JSCC9P9360 Devboard") +MACHINE_START(CC9P9360JS, "Digi ConnectCore 9P 9360 on an JSCC9P9360 Devboard") .map_io = ns9xxx_map_io, .init_irq = ns9xxx_init_irq, .init_machine = mach_cc9p9360js_init_machine, diff --git a/arch/arm/mach-rpc/riscpc.c b/arch/arm/mach-rpc/riscpc.c index 570cf937e73..a454451c97c 100644 --- a/arch/arm/mach-rpc/riscpc.c +++ b/arch/arm/mach-rpc/riscpc.c @@ -87,7 +87,7 @@ static void __init rpc_map_io(void) /* * Turn off floppy. */ - outb(0xc, 0x3f2); + writeb(0xc, PCIO_BASE + (0x3f2 << 2)); /* * RiscPC can't handle half-word loads and stores diff --git a/arch/arm/mach-s3c2410/Kconfig b/arch/arm/mach-s3c2410/Kconfig index d4b013b283c..e2079cf9266 100644 --- a/arch/arm/mach-s3c2410/Kconfig +++ b/arch/arm/mach-s3c2410/Kconfig @@ -9,6 +9,7 @@ config CPU_S3C2410 depends on ARCH_S3C2410 select S3C2410_CLOCK select S3C2410_GPIO + select CPU_LLSERIAL_S3C2410 select S3C2410_PM if PM help Support for S3C2410 and S3C2410A family from the S3C24XX line diff --git a/arch/arm/mach-s3c2410/clock.c b/arch/arm/mach-s3c2410/clock.c index 5b4831c4c1d..cab9d6265e9 100644 --- a/arch/arm/mach-s3c2410/clock.c +++ b/arch/arm/mach-s3c2410/clock.c @@ -37,7 +37,7 @@ #include <asm/hardware.h> #include <asm/io.h> -#include <asm/arch/regs-serial.h> +#include <asm/plat-s3c/regs-serial.h> #include <asm/arch/regs-clock.h> #include <asm/arch/regs-gpio.h> diff --git a/arch/arm/mach-s3c2410/dma.c b/arch/arm/mach-s3c2410/dma.c index 67d1ad36397..80d83739ab9 100644 --- a/arch/arm/mach-s3c2410/dma.c +++ b/arch/arm/mach-s3c2410/dma.c @@ -23,14 +23,14 @@ #include <asm/plat-s3c24xx/cpu.h> #include <asm/plat-s3c24xx/dma.h> -#include <asm/arch/regs-serial.h> +#include <asm/plat-s3c/regs-serial.h> #include <asm/arch/regs-gpio.h> -#include <asm/arch/regs-ac97.h> +#include <asm/plat-s3c/regs-ac97.h> #include <asm/arch/regs-mem.h> #include <asm/arch/regs-lcd.h> #include <asm/arch/regs-sdi.h> -#include <asm/arch/regs-iis.h> -#include <asm/arch/regs-spi.h> +#include <asm/plat-s3c24xx/regs-iis.h> +#include <asm/plat-s3c24xx/regs-spi.h> static struct s3c24xx_dma_map __initdata s3c2410_dma_mappings[] = { [DMACH_XD0] = { diff --git a/arch/arm/mach-s3c2410/mach-amlm5900.c b/arch/arm/mach-s3c2410/mach-amlm5900.c index 435adcce648..43bb5e10630 100644 --- a/arch/arm/mach-s3c2410/mach-amlm5900.c +++ b/arch/arm/mach-s3c2410/mach-amlm5900.c @@ -48,7 +48,7 @@ #include <asm/mach-types.h> #include <asm/arch/fb.h> -#include <asm/arch/regs-serial.h> +#include <asm/plat-s3c/regs-serial.h> #include <asm/arch/regs-lcd.h> #include <asm/arch/regs-gpio.h> diff --git a/arch/arm/mach-s3c2410/mach-bast.c b/arch/arm/mach-s3c2410/mach-bast.c index 8b52ea95d4f..bc926992b4e 100644 --- a/arch/arm/mach-s3c2410/mach-bast.c +++ b/arch/arm/mach-s3c2410/mach-bast.c @@ -36,13 +36,13 @@ #include <asm/mach-types.h> //#include <asm/debug-ll.h> -#include <asm/arch/regs-serial.h> +#include <asm/plat-s3c/regs-serial.h> #include <asm/arch/regs-gpio.h> #include <asm/arch/regs-mem.h> #include <asm/arch/regs-lcd.h> -#include <asm/arch/nand.h> -#include <asm/arch/iic.h> +#include <asm/plat-s3c/nand.h> +#include <asm/plat-s3c/iic.h> #include <asm/arch/fb.h> #include <linux/mtd/mtd.h> diff --git a/arch/arm/mach-s3c2410/mach-h1940.c b/arch/arm/mach-s3c2410/mach-h1940.c index 5c9bcea7476..9a172b4ad72 100644 --- a/arch/arm/mach-s3c2410/mach-h1940.c +++ b/arch/arm/mach-s3c2410/mach-h1940.c @@ -30,7 +30,7 @@ #include <asm/irq.h> #include <asm/mach-types.h> -#include <asm/arch/regs-serial.h> +#include <asm/plat-s3c/regs-serial.h> #include <asm/arch/regs-lcd.h> #include <asm/arch/regs-gpio.h> #include <asm/arch/regs-clock.h> @@ -38,7 +38,7 @@ #include <asm/arch/h1940.h> #include <asm/arch/h1940-latch.h> #include <asm/arch/fb.h> -#include <asm/arch/udc.h> +#include <asm/plat-s3c24xx/udc.h> #include <asm/plat-s3c24xx/clock.h> #include <asm/plat-s3c24xx/devs.h> diff --git a/arch/arm/mach-s3c2410/mach-n30.c b/arch/arm/mach-s3c2410/mach-n30.c index 412e50c3d28..621f548da61 100644 --- a/arch/arm/mach-s3c2410/mach-n30.c +++ b/arch/arm/mach-s3c2410/mach-n30.c @@ -33,9 +33,9 @@ #include <asm/irq.h> #include <asm/mach-types.h> -#include <asm/arch/regs-serial.h> +#include <asm/plat-s3c/regs-serial.h> #include <asm/arch/regs-gpio.h> -#include <asm/arch/iic.h> +#include <asm/plat-s3c/iic.h> #include <asm/plat-s3c24xx/s3c2410.h> #include <asm/plat-s3c24xx/clock.h> diff --git a/arch/arm/mach-s3c2410/mach-otom.c b/arch/arm/mach-s3c2410/mach-otom.c index 1f899fa588d..717af40e447 100644 --- a/arch/arm/mach-s3c2410/mach-otom.c +++ b/arch/arm/mach-s3c2410/mach-otom.c @@ -29,7 +29,7 @@ #include <asm/irq.h> #include <asm/mach-types.h> -#include <asm/arch/regs-serial.h> +#include <asm/plat-s3c/regs-serial.h> #include <asm/arch/regs-gpio.h> #include <asm/plat-s3c24xx/s3c2410.h> diff --git a/arch/arm/mach-s3c2410/mach-qt2410.c b/arch/arm/mach-s3c2410/mach-qt2410.c index d86e6f18bac..e670b1e1631 100644 --- a/arch/arm/mach-s3c2410/mach-qt2410.c +++ b/arch/arm/mach-s3c2410/mach-qt2410.c @@ -49,10 +49,10 @@ #include <asm/arch/regs-gpio.h> #include <asm/arch/leds-gpio.h> -#include <asm/arch/regs-serial.h> +#include <asm/plat-s3c/regs-serial.h> #include <asm/arch/fb.h> -#include <asm/arch/nand.h> -#include <asm/arch/udc.h> +#include <asm/plat-s3c/nand.h> +#include <asm/plat-s3c24xx/udc.h> #include <asm/arch/spi.h> #include <asm/arch/spi-gpio.h> diff --git a/arch/arm/mach-s3c2410/mach-smdk2410.c b/arch/arm/mach-s3c2410/mach-smdk2410.c index 5852d300d52..226550504c8 100644 --- a/arch/arm/mach-s3c2410/mach-smdk2410.c +++ b/arch/arm/mach-s3c2410/mach-smdk2410.c @@ -47,7 +47,7 @@ #include <asm/irq.h> #include <asm/mach-types.h> -#include <asm/arch/regs-serial.h> +#include <asm/plat-s3c/regs-serial.h> #include <asm/plat-s3c24xx/devs.h> #include <asm/plat-s3c24xx/cpu.h> diff --git a/arch/arm/mach-s3c2410/mach-vr1000.c b/arch/arm/mach-s3c2410/mach-vr1000.c index 7b624bb0049..9f43f3f124f 100644 --- a/arch/arm/mach-s3c2410/mach-vr1000.c +++ b/arch/arm/mach-s3c2410/mach-vr1000.c @@ -39,7 +39,7 @@ #include <asm/irq.h> #include <asm/mach-types.h> -#include <asm/arch/regs-serial.h> +#include <asm/plat-s3c/regs-serial.h> #include <asm/arch/regs-gpio.h> #include <asm/arch/leds-gpio.h> diff --git a/arch/arm/mach-s3c2410/s3c2410.c b/arch/arm/mach-s3c2410/s3c2410.c index 1a86a980375..e580303cb0a 100644 --- a/arch/arm/mach-s3c2410/s3c2410.c +++ b/arch/arm/mach-s3c2410/s3c2410.c @@ -29,7 +29,7 @@ #include <asm/irq.h> #include <asm/arch/regs-clock.h> -#include <asm/arch/regs-serial.h> +#include <asm/plat-s3c/regs-serial.h> #include <asm/plat-s3c24xx/s3c2410.h> #include <asm/plat-s3c24xx/cpu.h> @@ -40,7 +40,6 @@ static struct map_desc s3c2410_iodesc[] __initdata = { IODESC_ENT(CLKPWR), - IODESC_ENT(LCD), IODESC_ENT(TIMER), IODESC_ENT(WATCHDOG), }; diff --git a/arch/arm/mach-s3c2410/sleep.S b/arch/arm/mach-s3c2410/sleep.S index d1eeed2ad47..8a9c5a2bb25 100644 --- a/arch/arm/mach-s3c2410/sleep.S +++ b/arch/arm/mach-s3c2410/sleep.S @@ -32,7 +32,7 @@ #include <asm/arch/regs-gpio.h> #include <asm/arch/regs-clock.h> #include <asm/arch/regs-mem.h> -#include <asm/arch/regs-serial.h> +#include <asm/plat-s3c/regs-serial.h> /* s3c2410_cpu_suspend * diff --git a/arch/arm/mach-s3c2412/Kconfig b/arch/arm/mach-s3c2412/Kconfig index d5be5d05326..8e8fe48ea47 100644 --- a/arch/arm/mach-s3c2412/Kconfig +++ b/arch/arm/mach-s3c2412/Kconfig @@ -7,6 +7,7 @@ config CPU_S3C2412 bool depends on ARCH_S3C2410 + select CPU_LLSERIAL_S3C2440 select S3C2412_PM if PM select S3C2412_DMA if S3C2410_DMA help diff --git a/arch/arm/mach-s3c2412/clock.c b/arch/arm/mach-s3c2412/clock.c index 6a8e4448770..8543dd6df39 100644 --- a/arch/arm/mach-s3c2412/clock.c +++ b/arch/arm/mach-s3c2412/clock.c @@ -37,7 +37,7 @@ #include <asm/hardware.h> #include <asm/io.h> -#include <asm/arch/regs-serial.h> +#include <asm/plat-s3c/regs-serial.h> #include <asm/arch/regs-clock.h> #include <asm/arch/regs-gpio.h> diff --git a/arch/arm/mach-s3c2412/dma.c b/arch/arm/mach-s3c2412/dma.c index 668cccefe7b..4b9425c1bf7 100644 --- a/arch/arm/mach-s3c2412/dma.c +++ b/arch/arm/mach-s3c2412/dma.c @@ -24,14 +24,14 @@ #include <asm/plat-s3c24xx/dma.h> #include <asm/plat-s3c24xx/cpu.h> -#include <asm/arch/regs-serial.h> +#include <asm/plat-s3c/regs-serial.h> #include <asm/arch/regs-gpio.h> -#include <asm/arch/regs-ac97.h> +#include <asm/plat-s3c/regs-ac97.h> #include <asm/arch/regs-mem.h> #include <asm/arch/regs-lcd.h> #include <asm/arch/regs-sdi.h> -#include <asm/arch/regs-iis.h> -#include <asm/arch/regs-spi.h> +#include <asm/plat-s3c24xx/regs-iis.h> +#include <asm/plat-s3c24xx/regs-spi.h> #define MAP(x) { (x)| DMA_CH_VALID, (x)| DMA_CH_VALID, (x)| DMA_CH_VALID, (x)| DMA_CH_VALID } diff --git a/arch/arm/mach-s3c2412/mach-smdk2413.c b/arch/arm/mach-s3c2412/mach-smdk2413.c index 063af09f899..b126a530daa 100644 --- a/arch/arm/mach-s3c2412/mach-smdk2413.c +++ b/arch/arm/mach-s3c2412/mach-smdk2413.c @@ -32,12 +32,12 @@ #include <asm/mach-types.h> //#include <asm/debug-ll.h> -#include <asm/arch/regs-serial.h> +#include <asm/plat-s3c/regs-serial.h> #include <asm/arch/regs-gpio.h> #include <asm/arch/regs-lcd.h> #include <asm/arch/idle.h> -#include <asm/arch/udc.h> +#include <asm/plat-s3c24xx/udc.h> #include <asm/arch/fb.h> #include <asm/plat-s3c24xx/s3c2410.h> diff --git a/arch/arm/mach-s3c2412/mach-vstms.c b/arch/arm/mach-s3c2412/mach-vstms.c index f2fbd65956a..32982547cd6 100644 --- a/arch/arm/mach-s3c2412/mach-vstms.c +++ b/arch/arm/mach-s3c2412/mach-vstms.c @@ -33,14 +33,14 @@ #include <asm/irq.h> #include <asm/mach-types.h> -#include <asm/arch/regs-serial.h> +#include <asm/plat-s3c/regs-serial.h> #include <asm/arch/regs-gpio.h> #include <asm/arch/regs-lcd.h> #include <asm/arch/idle.h> #include <asm/arch/fb.h> -#include <asm/arch/nand.h> +#include <asm/plat-s3c/nand.h> #include <asm/plat-s3c24xx/s3c2410.h> #include <asm/plat-s3c24xx/s3c2412.h> diff --git a/arch/arm/mach-s3c2412/s3c2412.c b/arch/arm/mach-s3c2412/s3c2412.c index 782b5814ced..e0ccb404623 100644 --- a/arch/arm/mach-s3c2412/s3c2412.c +++ b/arch/arm/mach-s3c2412/s3c2412.c @@ -34,12 +34,12 @@ #include <asm/arch/idle.h> #include <asm/arch/regs-clock.h> -#include <asm/arch/regs-serial.h> +#include <asm/plat-s3c/regs-serial.h> #include <asm/arch/regs-power.h> #include <asm/arch/regs-gpio.h> #include <asm/arch/regs-gpioj.h> #include <asm/arch/regs-dsc.h> -#include <asm/arch/regs-spi.h> +#include <asm/plat-s3c24xx/regs-spi.h> #include <asm/arch/regs-s3c2412.h> #include <asm/plat-s3c24xx/s3c2412.h> @@ -63,7 +63,6 @@ static inline void s3c2412_init_gpio2(void) static struct map_desc s3c2412_iodesc[] __initdata = { IODESC_ENT(CLKPWR), - IODESC_ENT(LCD), IODESC_ENT(TIMER), IODESC_ENT(WATCHDOG), }; diff --git a/arch/arm/mach-s3c2440/Kconfig b/arch/arm/mach-s3c2440/Kconfig index e3bfda098c0..f1915bd61d1 100644 --- a/arch/arm/mach-s3c2440/Kconfig +++ b/arch/arm/mach-s3c2440/Kconfig @@ -12,6 +12,7 @@ config CPU_S3C2440 select S3C2410_GPIO select S3C2440_DMA if S3C2410_DMA select CPU_S3C244X + select CPU_LLSERIAL_S3C2440 help Support for S3C2440 Samsung Mobile CPU based systems. diff --git a/arch/arm/mach-s3c2440/dma.c b/arch/arm/mach-s3c2440/dma.c index cd035a3ec87..f509f062e74 100644 --- a/arch/arm/mach-s3c2440/dma.c +++ b/arch/arm/mach-s3c2440/dma.c @@ -23,14 +23,14 @@ #include <asm/plat-s3c24xx/dma.h> #include <asm/plat-s3c24xx/cpu.h> -#include <asm/arch/regs-serial.h> +#include <asm/plat-s3c/regs-serial.h> #include <asm/arch/regs-gpio.h> -#include <asm/arch/regs-ac97.h> +#include <asm/plat-s3c/regs-ac97.h> #include <asm/arch/regs-mem.h> #include <asm/arch/regs-lcd.h> #include <asm/arch/regs-sdi.h> -#include <asm/arch/regs-iis.h> -#include <asm/arch/regs-spi.h> +#include <asm/plat-s3c24xx/regs-iis.h> +#include <asm/plat-s3c24xx/regs-spi.h> static struct s3c24xx_dma_map __initdata s3c2440_dma_mappings[] = { [DMACH_XD0] = { diff --git a/arch/arm/mach-s3c2440/mach-anubis.c b/arch/arm/mach-s3c2440/mach-anubis.c index 29c163d300d..3d3dfa95db8 100644 --- a/arch/arm/mach-s3c2440/mach-anubis.c +++ b/arch/arm/mach-s3c2440/mach-anubis.c @@ -34,11 +34,11 @@ #include <asm/irq.h> #include <asm/mach-types.h> -#include <asm/arch/regs-serial.h> +#include <asm/plat-s3c/regs-serial.h> #include <asm/arch/regs-gpio.h> #include <asm/arch/regs-mem.h> #include <asm/arch/regs-lcd.h> -#include <asm/arch/nand.h> +#include <asm/plat-s3c/nand.h> #include <linux/mtd/mtd.h> #include <linux/mtd/nand.h> diff --git a/arch/arm/mach-s3c2440/mach-nexcoder.c b/arch/arm/mach-s3c2440/mach-nexcoder.c index 5e61f2166c7..afe0d7b7e38 100644 --- a/arch/arm/mach-s3c2440/mach-nexcoder.c +++ b/arch/arm/mach-s3c2440/mach-nexcoder.c @@ -36,7 +36,7 @@ //#include <asm/debug-ll.h> #include <asm/arch/regs-gpio.h> -#include <asm/arch/regs-serial.h> +#include <asm/plat-s3c/regs-serial.h> #include <asm/plat-s3c24xx/s3c2410.h> #include <asm/plat-s3c24xx/s3c2440.h> diff --git a/arch/arm/mach-s3c2440/mach-osiris.c b/arch/arm/mach-s3c2440/mach-osiris.c index 89f4c9c5777..0ba7e9060c7 100644 --- a/arch/arm/mach-s3c2440/mach-osiris.c +++ b/arch/arm/mach-s3c2440/mach-osiris.c @@ -31,11 +31,11 @@ #include <asm/irq.h> #include <asm/mach-types.h> -#include <asm/arch/regs-serial.h> +#include <asm/plat-s3c/regs-serial.h> #include <asm/arch/regs-gpio.h> #include <asm/arch/regs-mem.h> #include <asm/arch/regs-lcd.h> -#include <asm/arch/nand.h> +#include <asm/plat-s3c/nand.h> #include <linux/mtd/mtd.h> #include <linux/mtd/nand.h> diff --git a/arch/arm/mach-s3c2440/mach-rx3715.c b/arch/arm/mach-s3c2440/mach-rx3715.c index 866ff71c01d..b59e6d39f2f 100644 --- a/arch/arm/mach-s3c2440/mach-rx3715.c +++ b/arch/arm/mach-s3c2440/mach-rx3715.c @@ -38,12 +38,12 @@ #include <asm/irq.h> #include <asm/mach-types.h> -#include <asm/arch/regs-serial.h> +#include <asm/plat-s3c/regs-serial.h> #include <asm/arch/regs-gpio.h> #include <asm/arch/regs-lcd.h> #include <asm/arch/h1940.h> -#include <asm/arch/nand.h> +#include <asm/plat-s3c/nand.h> #include <asm/arch/fb.h> #include <asm/plat-s3c24xx/clock.h> diff --git a/arch/arm/mach-s3c2440/mach-smdk2440.c b/arch/arm/mach-s3c2440/mach-smdk2440.c index e167254e232..670115b8a12 100644 --- a/arch/arm/mach-s3c2440/mach-smdk2440.c +++ b/arch/arm/mach-s3c2440/mach-smdk2440.c @@ -31,7 +31,7 @@ #include <asm/irq.h> #include <asm/mach-types.h> -#include <asm/arch/regs-serial.h> +#include <asm/plat-s3c/regs-serial.h> #include <asm/arch/regs-gpio.h> #include <asm/arch/regs-lcd.h> diff --git a/arch/arm/mach-s3c2442/Kconfig b/arch/arm/mach-s3c2442/Kconfig index bf8d87abfab..88d5fd34fe3 100644 --- a/arch/arm/mach-s3c2442/Kconfig +++ b/arch/arm/mach-s3c2442/Kconfig @@ -11,6 +11,7 @@ config CPU_S3C2442 select S3C2410_GPIO select S3C2410_PM if PM select CPU_S3C244X + select CPU_LLSERIAL_S3C2440 help Support for S3C2442 Samsung Mobile CPU based systems. diff --git a/arch/arm/mach-s3c2443/Kconfig b/arch/arm/mach-s3c2443/Kconfig index c649bb2e7ce..14252f57375 100644 --- a/arch/arm/mach-s3c2443/Kconfig +++ b/arch/arm/mach-s3c2443/Kconfig @@ -8,6 +8,7 @@ config CPU_S3C2443 bool depends on ARCH_S3C2410 select S3C2443_DMA if S3C2410_DMA + select CPU_LLSERIAL_S3C2440 help Support for the S3C2443 SoC from the S3C24XX line diff --git a/arch/arm/mach-s3c2443/dma.c b/arch/arm/mach-s3c2443/dma.c index f70e8ccffc3..fc3ede82af8 100644 --- a/arch/arm/mach-s3c2443/dma.c +++ b/arch/arm/mach-s3c2443/dma.c @@ -24,14 +24,14 @@ #include <asm/plat-s3c24xx/dma.h> #include <asm/plat-s3c24xx/cpu.h> -#include <asm/arch/regs-serial.h> +#include <asm/plat-s3c/regs-serial.h> #include <asm/arch/regs-gpio.h> -#include <asm/arch/regs-ac97.h> +#include <asm/plat-s3c/regs-ac97.h> #include <asm/arch/regs-mem.h> #include <asm/arch/regs-lcd.h> #include <asm/arch/regs-sdi.h> -#include <asm/arch/regs-iis.h> -#include <asm/arch/regs-spi.h> +#include <asm/plat-s3c24xx/regs-iis.h> +#include <asm/plat-s3c24xx/regs-spi.h> #define MAP(x) { \ [0] = (x) | DMA_CH_VALID, \ diff --git a/arch/arm/mach-s3c2443/mach-smdk2443.c b/arch/arm/mach-s3c2443/mach-smdk2443.c index b1eb709ee65..8cd93130ef3 100644 --- a/arch/arm/mach-s3c2443/mach-smdk2443.c +++ b/arch/arm/mach-s3c2443/mach-smdk2443.c @@ -31,7 +31,7 @@ #include <asm/irq.h> #include <asm/mach-types.h> -#include <asm/arch/regs-serial.h> +#include <asm/plat-s3c/regs-serial.h> #include <asm/arch/regs-gpio.h> #include <asm/arch/regs-lcd.h> diff --git a/arch/arm/mach-sa1100/Kconfig b/arch/arm/mach-sa1100/Kconfig index cd67ab1b217..f99d9013905 100644 --- a/arch/arm/mach-sa1100/Kconfig +++ b/arch/arm/mach-sa1100/Kconfig @@ -101,6 +101,16 @@ config SA1100_JORNADA720 handheld computer. See <http://www.hp.com/jornada/products/720> for details. +config SA1100_JORNADA720_SSP + bool "HP Jornada 720 Extended SSP driver" + select SA1100_SSP + depends on SA1100_JORNADA720 + help + Say Y here if you have a HP Jornada 7xx handheld computer and you + want to access devices connected to the MCU. Those include the + keyboard, touchscreen, backlight and battery. This driver also activates + the generic SSP which it extends. + config SA1100_HACKKIT bool "HackKit Core CPU Board" help @@ -145,8 +155,7 @@ config SA1100_SSP help Say Y here to enable support for the generic PIO SSP driver. This isn't for audio support, but for attached sensors and - other devices, eg for BadgePAD 4 sensor support, or Jornada - 720 touchscreen support. + other devices, eg for BadgePAD 4 sensor support. config H3600_SLEEVE tristate "Compaq iPAQ Handheld sleeve support" diff --git a/arch/arm/mach-sa1100/Makefile b/arch/arm/mach-sa1100/Makefile index e27f15042a2..7a61e8d33ab 100644 --- a/arch/arm/mach-sa1100/Makefile +++ b/arch/arm/mach-sa1100/Makefile @@ -31,6 +31,7 @@ obj-$(CONFIG_SA1100_HACKKIT) += hackkit.o led-$(CONFIG_SA1100_HACKKIT) += leds-hackkit.o obj-$(CONFIG_SA1100_JORNADA720) += jornada720.o +obj-$(CONFIG_SA1100_JORNADA720_SSP) += jornada720_ssp.o obj-$(CONFIG_SA1100_LART) += lart.o led-$(CONFIG_SA1100_LART) += leds-lart.o @@ -51,3 +52,4 @@ obj-$(CONFIG_LEDS) += $(led-y) # Miscelaneous functions obj-$(CONFIG_PM) += pm.o sleep.o obj-$(CONFIG_SA1100_SSP) += ssp.o + diff --git a/arch/arm/mach-sa1100/jornada720_ssp.c b/arch/arm/mach-sa1100/jornada720_ssp.c new file mode 100644 index 00000000000..0a45e1ac8ad --- /dev/null +++ b/arch/arm/mach-sa1100/jornada720_ssp.c @@ -0,0 +1,201 @@ +/** + * arch/arm/mac-sa1100/jornada720_ssp.c + * + * Copyright (C) 2006/2007 Kristoffer Ericson <Kristoffer.Ericson@gmail.com> + * Copyright (C) 2006 Filip Zyzniewski <filip.zyzniewski@tefnet.pl> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * SSP driver for the HP Jornada 710/720/728 + */ + +#include <linux/delay.h> +#include <linux/errno.h> +#include <linux/init.h> +#include <linux/kernel.h> +#include <linux/module.h> +#include <linux/platform_device.h> +#include <linux/sched.h> +#include <linux/slab.h> + +#include <asm/hardware.h> +#include <asm/hardware/ssp.h> +#include <asm/arch/jornada720.h> + +static DEFINE_SPINLOCK(jornada_ssp_lock); +static unsigned long jornada_ssp_flags; + +/** + * jornada_ssp_reverse - reverses input byte + * + * we need to reverse all data we recieve from the mcu due to its physical location + * returns : 01110111 -> 11101110 + */ +u8 inline jornada_ssp_reverse(u8 byte) +{ + return + ((0x80 & byte) >> 7) | + ((0x40 & byte) >> 5) | + ((0x20 & byte) >> 3) | + ((0x10 & byte) >> 1) | + ((0x08 & byte) << 1) | + ((0x04 & byte) << 3) | + ((0x02 & byte) << 5) | + ((0x01 & byte) << 7); +}; +EXPORT_SYMBOL(jornada_ssp_reverse); + +/** + * jornada_ssp_byte - waits for ready ssp bus and sends byte + * + * waits for fifo buffer to clear and then transmits, if it doesn't then we will + * timeout after <timeout> rounds. Needs mcu running before its called. + * + * returns : %mcu output on success + * : %-ETIMEOUT on timeout + */ +int jornada_ssp_byte(u8 byte) +{ + int timeout = 400000; + u16 ret; + + while ((GPLR & GPIO_GPIO10)) { + if (!--timeout) { + printk(KERN_WARNING "SSP: timeout while waiting for transmit\n"); + return -ETIMEDOUT; + } + cpu_relax(); + } + + ret = jornada_ssp_reverse(byte) << 8; + + ssp_write_word(ret); + ssp_read_word(&ret); + + return jornada_ssp_reverse(ret); +}; +EXPORT_SYMBOL(jornada_ssp_byte); + +/** + * jornada_ssp_inout - decide if input is command or trading byte + * + * returns : (jornada_ssp_byte(byte)) on success + * : %-ETIMEOUT on timeout failure + */ +int jornada_ssp_inout(u8 byte) +{ + int ret, i; + + /* true means command byte */ + if (byte != TXDUMMY) { + ret = jornada_ssp_byte(byte); + /* Proper return to commands is TxDummy */ + if (ret != TXDUMMY) { + for (i = 0; i < 256; i++)/* flushing bus */ + if (jornada_ssp_byte(TXDUMMY) == -1) + break; + return -ETIMEDOUT; + } + } else /* Exchange TxDummy for data */ + ret = jornada_ssp_byte(TXDUMMY); + + return ret; +}; +EXPORT_SYMBOL(jornada_ssp_inout); + +/** + * jornada_ssp_start - enable mcu + * + */ +int jornada_ssp_start() +{ + spin_lock_irqsave(&jornada_ssp_lock, jornada_ssp_flags); + GPCR = GPIO_GPIO25; + udelay(50); + return 0; +}; +EXPORT_SYMBOL(jornada_ssp_start); + +/** + * jornada_ssp_end - disable mcu and turn off lock + * + */ +int jornada_ssp_end() +{ + GPSR = GPIO_GPIO25; + spin_unlock_irqrestore(&jornada_ssp_lock, jornada_ssp_flags); + return 0; +}; +EXPORT_SYMBOL(jornada_ssp_end); + +static int __init jornada_ssp_probe(struct platform_device *dev) +{ + int ret; + + GPSR = GPIO_GPIO25; + + ret = ssp_init(); + + /* worked fine, lets not bother with anything else */ + if (!ret) { + printk(KERN_INFO "SSP: device initialized with irq\n"); + return ret; + } + + printk(KERN_WARNING "SSP: initialization failed, trying non-irq solution \n"); + + /* init of Serial 4 port */ + Ser4MCCR0 = 0; + Ser4SSCR0 = 0x0387; + Ser4SSCR1 = 0x18; + + /* clear out any left over data */ + ssp_flush(); + + /* enable MCU */ + jornada_ssp_start(); + + /* see if return value makes sense */ + ret = jornada_ssp_inout(GETBRIGHTNESS); + + /* seems like it worked, just feed it with TxDummy to get rid of data */ + if (ret == TxDummy) + jornada_ssp_inout(TXDUMMY); + + jornada_ssp_end(); + + /* failed, lets just kill everything */ + if (ret == -ETIMEDOUT) { + printk(KERN_WARNING "SSP: attempts failed, bailing\n"); + ssp_exit(); + return -ENODEV; + } + + /* all fine */ + printk(KERN_INFO "SSP: device initialized\n"); + return 0; +}; + +static int jornada_ssp_remove(struct platform_device *dev) +{ + /* Note that this doesnt actually remove the driver, since theres nothing to remove + * It just makes sure everything is turned off */ + GPSR = GPIO_GPIO25; + ssp_exit(); + return 0; +}; + +struct platform_driver jornadassp_driver = { + .probe = jornada_ssp_probe, + .remove = jornada_ssp_remove, + .driver = { + .name = "jornada_ssp", + }, +}; + +static int __init jornada_ssp_init(void) +{ + return platform_driver_register(&jornadassp_driver); +} diff --git a/arch/arm/mach-sa1100/neponset.c b/arch/arm/mach-sa1100/neponset.c index 3a0a1ee2542..9f1ed150930 100644 --- a/arch/arm/mach-sa1100/neponset.c +++ b/arch/arm/mach-sa1100/neponset.c @@ -292,6 +292,8 @@ static struct platform_device *devices[] __initdata = { &smc91x_device, }; +extern void sa1110_mb_disable(void); + static int __init neponset_init(void) { platform_driver_register(&neponset_device_driver); diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig index e7904bc92c7..12161ae445d 100644 --- a/arch/arm/mm/Kconfig +++ b/arch/arm/mm/Kconfig @@ -345,13 +345,14 @@ config CPU_XSC3 # ARMv6 config CPU_V6 bool "Support ARM V6 processor" - depends on ARCH_INTEGRATOR || MACH_REALVIEW_EB || ARCH_OMAP2 + depends on ARCH_INTEGRATOR || MACH_REALVIEW_EB || ARCH_OMAP2 || ARCH_MX3 + default y if ARCH_MX3 select CPU_32v6 select CPU_ABRT_EV6 select CPU_CACHE_V6 select CPU_CACHE_VIPT select CPU_CP15_MMU - select CPU_HAS_ASID + select CPU_HAS_ASID if MMU select CPU_COPY_V6 if MMU select CPU_TLB_V6 if MMU @@ -359,7 +360,7 @@ config CPU_V6 config CPU_32v6K bool "Support ARM V6K processor extensions" if !SMP depends on CPU_V6 - default y if SMP + default y if SMP && !ARCH_MX3 help Say Y here if your ARMv6 processor supports the 'K' extension. This enables the kernel to use some instructions not present @@ -377,7 +378,7 @@ config CPU_V7 select CPU_CACHE_V7 select CPU_CACHE_VIPT select CPU_CP15_MMU - select CPU_HAS_ASID + select CPU_HAS_ASID if MMU select CPU_COPY_V6 if MMU select CPU_TLB_V7 if MMU @@ -405,6 +406,7 @@ config CPU_32v5 config CPU_32v6 bool + select TLS_REG_EMUL if !CPU_32v6K && !MMU config CPU_32v7 bool @@ -598,7 +600,7 @@ config CPU_DCACHE_SIZE config CPU_DCACHE_WRITETHROUGH bool "Force write through D-cache" - depends on (CPU_ARM740T || CPU_ARM920T || CPU_ARM922T || CPU_ARM925T || CPU_ARM926T || CPU_ARM940T || CPU_ARM946E || CPU_ARM1020 || CPU_V6) && !CPU_DCACHE_DISABLE + depends on (CPU_ARM740T || CPU_ARM920T || CPU_ARM922T || CPU_ARM925T || CPU_ARM926T || CPU_ARM940T || CPU_ARM946E || CPU_ARM1020) && !CPU_DCACHE_DISABLE default y if CPU_ARM925T help Say Y here to use the data cache in writethrough mode. Unless you @@ -611,12 +613,6 @@ config CPU_CACHE_ROUND_ROBIN Say Y here to use the predictable round-robin cache replacement policy. Unless you specifically require this or are unsure, say N. -config CPU_L2CACHE_DISABLE - bool "Disable level 2 cache" - depends on CPU_V7 - help - Say Y here to disable the level 2 cache. If unsure, say N. - config CPU_BPREDICT_DISABLE bool "Disable branch prediction" depends on CPU_ARM1020 || CPU_V6 || CPU_XSC3 || CPU_V7 diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c index 08a36f1b35d..b4e9b734e0b 100644 --- a/arch/arm/mm/cache-l2x0.c +++ b/arch/arm/mm/cache-l2x0.c @@ -17,6 +17,7 @@ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ #include <linux/init.h> +#include <linux/spinlock.h> #include <asm/cacheflush.h> #include <asm/io.h> @@ -25,14 +26,19 @@ #define CACHE_LINE_SIZE 32 static void __iomem *l2x0_base; +static DEFINE_SPINLOCK(l2x0_lock); static inline void sync_writel(unsigned long val, unsigned long reg, unsigned long complete_mask) { + unsigned long flags; + + spin_lock_irqsave(&l2x0_lock, flags); writel(val, l2x0_base + reg); /* wait for the operation to complete */ while (readl(l2x0_base + reg) & complete_mask) ; + spin_unlock_irqrestore(&l2x0_lock, flags); } static inline void cache_sync(void) diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c index 3b5e47dc0c9..e5d61ee3d4a 100644 --- a/arch/arm/mm/mmu.c +++ b/arch/arm/mm/mmu.c @@ -114,6 +114,10 @@ static void __init early_cachepolicy(char **p) } if (i == ARRAY_SIZE(cache_policies)) printk(KERN_ERR "ERROR: unknown or unsupported cache policy\n"); + if (cpu_architecture() >= CPU_ARCH_ARMv6) { + printk(KERN_WARNING "Only cachepolicy=writeback supported on ARMv6 and later\n"); + cachepolicy = CPOLICY_WRITEBACK; + } flush_cache_all(); set_cr(cr_alignment); } @@ -252,13 +256,15 @@ static void __init build_mem_type_table(void) int cpu_arch = cpu_architecture(); int i; + if (cpu_arch < CPU_ARCH_ARMv6) { #if defined(CONFIG_CPU_DCACHE_DISABLE) - if (cachepolicy > CPOLICY_BUFFERED) - cachepolicy = CPOLICY_BUFFERED; + if (cachepolicy > CPOLICY_BUFFERED) + cachepolicy = CPOLICY_BUFFERED; #elif defined(CONFIG_CPU_DCACHE_WRITETHROUGH) - if (cachepolicy > CPOLICY_WRITETHROUGH) - cachepolicy = CPOLICY_WRITETHROUGH; + if (cachepolicy > CPOLICY_WRITETHROUGH) + cachepolicy = CPOLICY_WRITETHROUGH; #endif + } if (cpu_arch < CPU_ARCH_ARMv5) { if (cachepolicy >= CPOLICY_WRITEALLOC) cachepolicy = CPOLICY_WRITEBACK; diff --git a/arch/arm/mm/proc-syms.c b/arch/arm/mm/proc-syms.c index 9f396b4fa0b..2b5ba396e3a 100644 --- a/arch/arm/mm/proc-syms.c +++ b/arch/arm/mm/proc-syms.c @@ -31,12 +31,14 @@ EXPORT_SYMBOL(__cpuc_coherent_kern_range); EXPORT_SYMBOL(cpu_cache); #endif +#ifdef CONFIG_MMU #ifndef MULTI_USER EXPORT_SYMBOL(__cpu_clear_user_page); EXPORT_SYMBOL(__cpu_copy_user_page); #else EXPORT_SYMBOL(cpu_user); #endif +#endif /* * No module should need to touch the TLB (and currently diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S index 718f4782ee8..e0acc5ae6f6 100644 --- a/arch/arm/mm/proc-v7.S +++ b/arch/arm/mm/proc-v7.S @@ -77,6 +77,7 @@ ENTRY(cpu_v7_dcache_clean_area) * - we are not using split page tables */ ENTRY(cpu_v7_switch_mm) +#ifdef CONFIG_MMU mov r2, #0 ldr r1, [r1, #MM_CONTEXT_ID] @ get mm->context.id orr r0, r0, #TTB_RGN_OC_WB @ mark PTWs outer cacheable, WB @@ -86,6 +87,7 @@ ENTRY(cpu_v7_switch_mm) isb mcr p15, 0, r1, c13, c0, 1 @ set context ID isb +#endif mov pc, lr /* @@ -109,6 +111,7 @@ ENTRY(cpu_v7_switch_mm) * 1111 0 1 1 r/w r/w */ ENTRY(cpu_v7_set_pte_ext) +#ifdef CONFIG_MMU str r1, [r0], #-2048 @ linux version bic r3, r1, #0x000003f0 @@ -136,6 +139,7 @@ ENTRY(cpu_v7_set_pte_ext) str r3, [r0] mcr p15, 0, r0, c7, c10, 1 @ flush_pte +#endif mov pc, lr cpu_v7_name: @@ -169,6 +173,7 @@ __v7_setup: mcr p15, 0, r10, c7, c5, 0 @ I+BTB cache invalidate #endif dsb +#ifdef CONFIG_MMU mcr p15, 0, r10, c8, c7, 0 @ invalidate I + D TLBs mcr p15, 0, r10, c2, c0, 2 @ TTB control register orr r4, r4, #TTB_RGN_OC_WB @ mark PTWs outer cacheable, WB @@ -176,21 +181,12 @@ __v7_setup: mcr p15, 0, r4, c2, c0, 1 @ load TTB1 mov r10, #0x1f @ domains 0, 1 = manager mcr p15, 0, r10, c3, c0, 0 @ load domain access register -#ifndef CONFIG_CPU_L2CACHE_DISABLE - @ L2 cache configuration in the L2 aux control register - mrc p15, 1, r10, c9, c0, 2 - bic r10, r10, #(1 << 16) @ L2 outer cache - mcr p15, 1, r10, c9, c0, 2 - @ L2 cache is enabled in the aux control register - mrc p15, 0, r10, c1, c0, 1 - orr r10, r10, #2 - mcr p15, 0, r10, c1, c0, 1 #endif - mrc p15, 0, r0, c1, c0, 0 @ read control register - ldr r10, cr1_clear @ get mask for bits to clear - bic r0, r0, r10 @ clear bits them - ldr r10, cr1_set @ get mask for bits to set - orr r0, r0, r10 @ set them + adr r5, v7_crval + ldmia r5, {r5, r6} + mrc p15, 0, r0, c1, c0, 0 @ read control register + bic r0, r0, r5 @ clear bits them + orr r0, r0, r6 @ set them mov pc, lr @ return to head.S:__ret /* @@ -199,12 +195,9 @@ __v7_setup: * rrrr rrrx xxx0 0101 xxxx xxxx x111 xxxx < forced * 0 110 0011 1.00 .111 1101 < we want */ - .type cr1_clear, #object - .type cr1_set, #object -cr1_clear: - .word 0x0120c302 -cr1_set: - .word 0x00c0387d + .type v7_crval, #object +v7_crval: + crval clear=0x0120c302, mmuset=0x00c0387d, ucset=0x00c0187c __v7_setup_stack: .space 4 * 11 @ 11 registers diff --git a/arch/arm/plat-iop/time.c b/arch/arm/plat-iop/time.c index 100d57ad98e..ba3d21d8fba 100644 --- a/arch/arm/plat-iop/time.c +++ b/arch/arm/plat-iop/time.c @@ -78,6 +78,13 @@ static struct irqaction iop_timer_irq = { .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL, }; +static unsigned long iop_tick_rate; +unsigned long get_iop_tick_rate(void) +{ + return iop_tick_rate; +} +EXPORT_SYMBOL(get_iop_tick_rate); + void __init iop_init_time(unsigned long tick_rate) { u32 timer_ctl; @@ -85,6 +92,7 @@ void __init iop_init_time(unsigned long tick_rate) ticks_per_jiffy = (tick_rate + HZ/2) / HZ; ticks_per_usec = tick_rate / 1000000; next_jiffy_time = 0xffffffff; + iop_tick_rate = tick_rate; timer_ctl = IOP_TMR_EN | IOP_TMR_PRIVILEGED | IOP_TMR_RELOAD | IOP_TMR_RATIO_1_1; diff --git a/arch/arm/plat-mxc/Kconfig b/arch/arm/plat-mxc/Kconfig new file mode 100644 index 00000000000..03a65c0dfb6 --- /dev/null +++ b/arch/arm/plat-mxc/Kconfig @@ -0,0 +1,20 @@ +if ARCH_MXC + +menu "Freescale MXC Implementations" + +choice + prompt "MXC/iMX System Type" + default 0 + +config ARCH_MX3 + bool "MX3-based" + help + This enables support for systems based on the Freescale i.MX3 family + +endchoice + +source "arch/arm/mach-mx3/Kconfig" + +endmenu + +endif diff --git a/arch/arm/plat-mxc/Makefile b/arch/arm/plat-mxc/Makefile new file mode 100644 index 00000000000..66ad9c2b6d6 --- /dev/null +++ b/arch/arm/plat-mxc/Makefile @@ -0,0 +1,10 @@ +# +# Makefile for the linux kernel. +# + +# Common support +obj-y := irq.o + +obj-m := +obj-n := +obj- := diff --git a/arch/arm/plat-mxc/irq.c b/arch/arm/plat-mxc/irq.c new file mode 100644 index 00000000000..87d253bc3d3 --- /dev/null +++ b/arch/arm/plat-mxc/irq.c @@ -0,0 +1,83 @@ +/* + * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include <linux/module.h> +#include <linux/moduleparam.h> +#include <linux/init.h> +#include <linux/device.h> +#include <linux/errno.h> +#include <asm/hardware.h> +#include <asm/io.h> +#include <asm/irq.h> +#include <asm/mach/irq.h> +#include <asm/arch/common.h> + +/*! + * Disable interrupt number "irq" in the AVIC + * + * @param irq interrupt source number + */ +static void mxc_mask_irq(unsigned int irq) +{ + __raw_writel(irq, AVIC_INTDISNUM); +} + +/*! + * Enable interrupt number "irq" in the AVIC + * + * @param irq interrupt source number + */ +static void mxc_unmask_irq(unsigned int irq) +{ + __raw_writel(irq, AVIC_INTENNUM); +} + +static struct irq_chip mxc_avic_chip = { + .mask_ack = mxc_mask_irq, + .mask = mxc_mask_irq, + .unmask = mxc_unmask_irq, +}; + +/*! + * This function initializes the AVIC hardware and disables all the + * interrupts. It registers the interrupt enable and disable functions + * to the kernel for each interrupt source. + */ +void __init mxc_init_irq(void) +{ + int i; + u32 reg; + + /* put the AVIC into the reset value with + * all interrupts disabled + */ + __raw_writel(0, AVIC_INTCNTL); + __raw_writel(0x1f, AVIC_NIMASK); + + /* disable all interrupts */ + __raw_writel(0, AVIC_INTENABLEH); + __raw_writel(0, AVIC_INTENABLEL); + + /* all IRQ no FIQ */ + __raw_writel(0, AVIC_INTTYPEH); + __raw_writel(0, AVIC_INTTYPEL); + for (i = 0; i < MXC_MAX_INT_LINES; i++) { + set_irq_chip(i, &mxc_avic_chip); + set_irq_handler(i, handle_level_irq); + set_irq_flags(i, IRQF_VALID); + } + + /* Set WDOG2's interrupt the highest priority level (bit 28-31) */ + reg = __raw_readl(AVIC_NIPRIORITY6); + reg |= (0xF << 28); + __raw_writel(reg, AVIC_NIPRIORITY6); + + printk(KERN_INFO "MXC IRQ initialized\n"); +} diff --git a/arch/arm/plat-s3c/Kconfig b/arch/arm/plat-s3c/Kconfig new file mode 100644 index 00000000000..31656c33e05 --- /dev/null +++ b/arch/arm/plat-s3c/Kconfig @@ -0,0 +1,104 @@ +# arch/arm/plat-s3c/Kconfig +# +# Copyright 2007 Simtec Electronics +# +# Licensed under GPLv2 + +config PLAT_S3C + bool + depends on ARCH_S3C2410 + default y if ARCH_S3C2410 + select NO_IOPORT + help + Base platform code for any Samsung S3C device + +# low-level serial option nodes + +config CPU_LLSERIAL_S3C2410_ONLY + bool + depends on ARCH_S3C2410 + default y if CPU_LLSERIAL_S3C2410 && !CPU_LLSERIAL_S3C2440 + +config CPU_LLSERIAL_S3C2440_ONLY + bool + depends on ARCH_S3C2410 + default y if CPU_LLSERIAL_S3C2440 && !CPU_LLSERIAL_S3C2410 + +config CPU_LLSERIAL_S3C2410 + bool + depends on ARCH_S3C2410 + help + Selected if there is an S3C2410 (or register compatible) serial + low-level implementation needed + +config CPU_LLSERIAL_S3C2440 + bool + depends on ARCH_S3C2410 + help + Selected if there is an S3C2440 (or register compatible) serial + low-level implementation needed + +# boot configurations + +comment "Boot options" + +config S3C_BOOT_WATCHDOG + bool "S3C Initialisation watchdog" + depends on PLAT_S3C && S3C2410_WATCHDOG + help + Say y to enable the watchdog during the kernel decompression + stage. If the kernel fails to uncompress, then the watchdog + will trigger a reset and the system should restart. + +config S3C_BOOT_ERROR_RESET + bool "S3C Reboot on decompression error" + depends on PLAT_S3C + help + Say y here to use the watchdog to reset the system if the + kernel decompressor detects an error during decompression. + +comment "Power management" + +config S3C2410_PM_DEBUG + bool "S3C2410 PM Suspend debug" + depends on PLAT_S3C && PM + help + Say Y here if you want verbose debugging from the PM Suspend and + Resume code. See <file:Documentation/arm/Samsung-S3C24XX/Suspend.txt> + for more information. + +config S3C2410_PM_CHECK + bool "S3C2410 PM Suspend Memory CRC" + depends on PLAT_S3C && PM && CRC32 + help + Enable the PM code's memory area checksum over sleep. This option + will generate CRCs of all blocks of memory, and store them before + going to sleep. The blocks are then checked on resume for any + errors. + + Note, this can take several seconds depending on memory size + and CPU speed. + + See <file:Documentation/arm/Samsung-S3C24XX/Suspend.txt> + +config S3C2410_PM_CHECK_CHUNKSIZE + int "S3C2410 PM Suspend CRC Chunksize (KiB)" + depends on PLAT_S3C && PM && S3C2410_PM_CHECK + default 64 + help + Set the chunksize in Kilobytes of the CRC for checking memory + corruption over suspend and resume. A smaller value will mean that + the CRC data block will take more memory, but wil identify any + faults with better precision. + + See <file:Documentation/arm/Samsung-S3C24XX/Suspend.txt> + +config S3C_LOWLEVEL_UART_PORT + int "S3C UART to use for low-level messages" + depends on PLAT_S3C + default 0 + help + Choice of which UART port to use for the low-level messages, + such as the `Uncompressing...` at start time. The value of + this configuration should be between zero and two. The port + must have been initialised by the boot-loader before use. diff --git a/arch/arm/plat-s3c24xx/Kconfig b/arch/arm/plat-s3c24xx/Kconfig index b972f36d547..b66fb3c4e22 100644 --- a/arch/arm/plat-s3c24xx/Kconfig +++ b/arch/arm/plat-s3c24xx/Kconfig @@ -10,7 +10,7 @@ config PLAT_S3C24XX default y if ARCH_S3C2410 select NO_IOPORT help - Base platform code for any Samsung S3C device + Base platform code for any Samsung S3C24XX device if PLAT_S3C24XX @@ -26,64 +26,6 @@ config PM_SIMTEC Common power management code for systems that are compatible with the Simtec style of power management -config S3C2410_BOOT_WATCHDOG - bool "S3C2410 Initialisation watchdog" - depends on ARCH_S3C2410 && S3C2410_WATCHDOG - help - Say y to enable the watchdog during the kernel decompression - stage. If the kernel fails to uncompress, then the watchdog - will trigger a reset and the system should restart. - -config S3C2410_BOOT_ERROR_RESET - bool "S3C2410 Reboot on decompression error" - depends on ARCH_S3C2410 - help - Say y here to use the watchdog to reset the system if the - kernel decompressor detects an error during decompression. - -config S3C2410_PM_DEBUG - bool "S3C2410 PM Suspend debug" - depends on ARCH_S3C2410 && PM - help - Say Y here if you want verbose debugging from the PM Suspend and - Resume code. See <file:Documentation/arm/Samsung-S3C24XX/Suspend.txt> - for more information. - -config S3C2410_PM_CHECK - bool "S3C2410 PM Suspend Memory CRC" - depends on ARCH_S3C2410 && PM && CRC32 - help - Enable the PM code's memory area checksum over sleep. This option - will generate CRCs of all blocks of memory, and store them before - going to sleep. The blocks are then checked on resume for any - errors. - - Note, this can take several seconds depending on memory size - and CPU speed. - - See <file:Documentation/arm/Samsung-S3C24XX/Suspend.txt> - -config S3C2410_PM_CHECK_CHUNKSIZE - int "S3C2410 PM Suspend CRC Chunksize (KiB)" - depends on ARCH_S3C2410 && PM && S3C2410_PM_CHECK - default 64 - help - Set the chunksize in Kilobytes of the CRC for checking memory - corruption over suspend and resume. A smaller value will mean that - the CRC data block will take more memory, but wil identify any - faults with better precision. - - See <file:Documentation/arm/Samsung-S3C24XX/Suspend.txt> - -config S3C2410_LOWLEVEL_UART_PORT - int "S3C2410 UART to use for low-level messages" - default 0 - help - Choice of which UART port to use for the low-level messages, - such as the `Uncompressing...` at start time. The value of - this configuration should be between zero and two. The port - must have been initialised by the boot-loader before use. - config S3C2410_DMA bool "S3C2410 DMA support" depends on ARCH_S3C2410 diff --git a/arch/arm/plat-s3c24xx/common-smdk.c b/arch/arm/plat-s3c24xx/common-smdk.c index 7ed19b23ce5..398c7ac2529 100644 --- a/arch/arm/plat-s3c24xx/common-smdk.c +++ b/arch/arm/plat-s3c24xx/common-smdk.c @@ -38,7 +38,7 @@ #include <asm/arch/regs-gpio.h> #include <asm/arch/leds-gpio.h> -#include <asm/arch/nand.h> +#include <asm/plat-s3c/nand.h> #include <asm/plat-s3c24xx/common-smdk.h> #include <asm/plat-s3c24xx/devs.h> diff --git a/arch/arm/plat-s3c24xx/cpu.c b/arch/arm/plat-s3c24xx/cpu.c index 8ce4904d313..f513ab083b8 100644 --- a/arch/arm/plat-s3c24xx/cpu.c +++ b/arch/arm/plat-s3c24xx/cpu.c @@ -38,7 +38,7 @@ #include <asm/mach/map.h> #include <asm/arch/regs-gpio.h> -#include <asm/arch/regs-serial.h> +#include <asm/plat-s3c/regs-serial.h> #include <asm/plat-s3c24xx/cpu.h> #include <asm/plat-s3c24xx/devs.h> diff --git a/arch/arm/plat-s3c24xx/devs.c b/arch/arm/plat-s3c24xx/devs.c index 5875da0ae0e..e546e933b3f 100644 --- a/arch/arm/plat-s3c24xx/devs.c +++ b/arch/arm/plat-s3c24xx/devs.c @@ -28,12 +28,12 @@ #include <asm/io.h> #include <asm/irq.h> -#include <asm/arch/regs-serial.h> -#include <asm/arch/udc.h> +#include <asm/plat-s3c/regs-serial.h> +#include <asm/plat-s3c24xx/udc.h> #include <asm/plat-s3c24xx/devs.h> #include <asm/plat-s3c24xx/cpu.h> -#include <asm/arch/regs-spi.h> +#include <asm/plat-s3c24xx/regs-spi.h> /* Serial port registrations */ diff --git a/arch/arm/plat-s3c24xx/pm.c b/arch/arm/plat-s3c24xx/pm.c index 5692eccdf4d..eab1850616d 100644 --- a/arch/arm/plat-s3c24xx/pm.c +++ b/arch/arm/plat-s3c24xx/pm.c @@ -40,7 +40,7 @@ #include <asm/hardware.h> #include <asm/io.h> -#include <asm/arch/regs-serial.h> +#include <asm/plat-s3c/regs-serial.h> #include <asm/arch/regs-clock.h> #include <asm/arch/regs-gpio.h> #include <asm/arch/regs-mem.h> diff --git a/arch/arm/plat-s3c24xx/s3c244x.c b/arch/arm/plat-s3c24xx/s3c244x.c index 767f2e9a3a5..3444b13afac 100644 --- a/arch/arm/plat-s3c24xx/s3c244x.c +++ b/arch/arm/plat-s3c24xx/s3c244x.c @@ -30,7 +30,7 @@ #include <asm/irq.h> #include <asm/arch/regs-clock.h> -#include <asm/arch/regs-serial.h> +#include <asm/plat-s3c/regs-serial.h> #include <asm/arch/regs-gpio.h> #include <asm/arch/regs-gpioj.h> #include <asm/arch/regs-dsc.h> @@ -47,7 +47,6 @@ static struct map_desc s3c244x_iodesc[] __initdata = { IODESC_ENT(CLKPWR), IODESC_ENT(TIMER), IODESC_ENT(WATCHDOG), - IODESC_ENT(LCD), }; /* uart initialisation */ diff --git a/arch/arm/plat-s3c24xx/sleep.S b/arch/arm/plat-s3c24xx/sleep.S index 7b7ae790b00..d47113bbc34 100644 --- a/arch/arm/plat-s3c24xx/sleep.S +++ b/arch/arm/plat-s3c24xx/sleep.S @@ -32,7 +32,7 @@ #include <asm/arch/regs-gpio.h> #include <asm/arch/regs-clock.h> #include <asm/arch/regs-mem.h> -#include <asm/arch/regs-serial.h> +#include <asm/plat-s3c/regs-serial.h> /* CONFIG_DEBUG_RESUME is dangerous if your bootloader does not * reset the UART configuration, only enable if you really need this! diff --git a/arch/arm/plat-s3c24xx/time.c b/arch/arm/plat-s3c24xx/time.c index b7667375bce..2ec1daaa0e5 100644 --- a/arch/arm/plat-s3c24xx/time.c +++ b/arch/arm/plat-s3c24xx/time.c @@ -33,7 +33,7 @@ #include <asm/io.h> #include <asm/irq.h> #include <asm/arch/map.h> -#include <asm/arch/regs-timer.h> +#include <asm/plat-s3c/regs-timer.h> #include <asm/arch/regs-irq.h> #include <asm/mach/time.h> diff --git a/arch/arm/vfp/vfphw.S b/arch/arm/vfp/vfphw.S index d4b7b229631..0ac022f800a 100644 --- a/arch/arm/vfp/vfphw.S +++ b/arch/arm/vfp/vfphw.S @@ -74,14 +74,14 @@ vfp_support_entry: VFPFMRX r1, FPEXC @ Is the VFP enabled? DBGSTR1 "fpexc %08x", r1 - tst r1, #FPEXC_ENABLE + tst r1, #FPEXC_EN bne look_for_VFP_exceptions @ VFP is already enabled DBGSTR1 "enable %x", r10 ldr r3, last_VFP_context_address - orr r1, r1, #FPEXC_ENABLE @ user FPEXC has the enable bit set + orr r1, r1, #FPEXC_EN @ user FPEXC has the enable bit set ldr r4, [r3, r11, lsl #2] @ last_VFP_context pointer - bic r5, r1, #FPEXC_EXCEPTION @ make sure exceptions are disabled + bic r5, r1, #FPEXC_EX @ make sure exceptions are disabled cmp r4, r10 beq check_for_exception @ we are returning to the same @ process, so the registers are @@ -124,7 +124,7 @@ no_old_VFP_process: VFPFMXR FPSCR, r5 @ restore status check_for_exception: - tst r1, #FPEXC_EXCEPTION + tst r1, #FPEXC_EX bne process_exception @ might as well handle the pending @ exception before retrying branch @ out before setting an FPEXC that @@ -136,10 +136,10 @@ check_for_exception: look_for_VFP_exceptions: - tst r1, #FPEXC_EXCEPTION + tst r1, #FPEXC_EX bne process_exception VFPFMRX r5, FPSCR - tst r5, #FPSCR_IXE @ IXE doesn't set FPEXC_EXCEPTION ! + tst r5, #FPSCR_IXE @ IXE doesn't set FPEXC_EX ! bne process_exception @ Fall into hand on to next handler - appropriate coproc instr diff --git a/arch/arm/vfp/vfpmodule.c b/arch/arm/vfp/vfpmodule.c index 1106b5f9cf1..04ddab2bd87 100644 --- a/arch/arm/vfp/vfpmodule.c +++ b/arch/arm/vfp/vfpmodule.c @@ -53,7 +53,7 @@ static int vfp_notifier(struct notifier_block *self, unsigned long cmd, void *v) * case the thread migrates to a different CPU. The * restoring is done lazily. */ - if ((fpexc & FPEXC_ENABLE) && last_VFP_context[cpu]) { + if ((fpexc & FPEXC_EN) && last_VFP_context[cpu]) { vfp_save_state(last_VFP_context[cpu], fpexc); last_VFP_context[cpu]->hard.cpu = cpu; } @@ -70,7 +70,7 @@ static int vfp_notifier(struct notifier_block *self, unsigned long cmd, void *v) * Always disable VFP so we can lazily save/restore the * old state. */ - fmxr(FPEXC, fpexc & ~FPEXC_ENABLE); + fmxr(FPEXC, fpexc & ~FPEXC_EN); return NOTIFY_DONE; } @@ -81,13 +81,13 @@ static int vfp_notifier(struct notifier_block *self, unsigned long cmd, void *v) */ memset(vfp, 0, sizeof(union vfp_state)); - vfp->hard.fpexc = FPEXC_ENABLE; + vfp->hard.fpexc = FPEXC_EN; vfp->hard.fpscr = FPSCR_ROUND_NEAREST; /* * Disable VFP to ensure we initialise it first. */ - fmxr(FPEXC, fmrx(FPEXC) & ~FPEXC_ENABLE); + fmxr(FPEXC, fmrx(FPEXC) & ~FPEXC_EN); } /* flush and release case: Per-thread VFP cleanup. */ @@ -229,7 +229,7 @@ void VFP9_bounce(u32 trigger, u32 fpexc, struct pt_regs *regs) /* * Enable access to the VFP so we can handle the bounce. */ - fmxr(FPEXC, fpexc & ~(FPEXC_EXCEPTION|FPEXC_INV|FPEXC_UFC|FPEXC_IOC)); + fmxr(FPEXC, fpexc & ~(FPEXC_EX|FPEXC_INV|FPEXC_UFC|FPEXC_IOC)); orig_fpscr = fpscr = fmrx(FPSCR); @@ -248,7 +248,7 @@ void VFP9_bounce(u32 trigger, u32 fpexc, struct pt_regs *regs) /* * Modify fpscr to indicate the number of iterations remaining */ - if (fpexc & FPEXC_EXCEPTION) { + if (fpexc & FPEXC_EX) { u32 len; len = fpexc + (1 << FPEXC_LENGTH_BIT); |