diff options
Diffstat (limited to 'drivers/ide')
59 files changed, 2248 insertions, 4460 deletions
diff --git a/drivers/ide/Kconfig b/drivers/ide/Kconfig index 4200251ff63..6d9fd92763f 100644 --- a/drivers/ide/Kconfig +++ b/drivers/ide/Kconfig @@ -308,6 +308,14 @@ config IDE_GENERIC help If unsure, say N. +config BLK_DEV_PLATFORM + tristate "Platform driver for IDE interfaces" + help + This is the platform IDE driver, used mostly for Memory Mapped + IDE devices, like Compact Flashes running in True IDE mode. + + If unsure, say N. + config BLK_DEV_CMD640 bool "CMD640 chipset bugfix/support" depends on X86 @@ -351,17 +359,16 @@ config BLK_DEV_IDEPNP would like the kernel to automatically detect and activate it, say Y here. +if PCI + +comment "PCI IDE chipsets support" + config BLK_DEV_IDEPCI - bool "PCI IDE chipset support" if PCI - default BLK_DEV_IDEDMA_PMAC if PPC_PMAC && BLK_DEV_IDEDMA_PMAC - help - Say Y here for PCI systems which use IDE drive(s). - This option helps the IDE driver to automatically detect and - configure all PCI-based IDE interfaces in your system. + bool config IDEPCI_SHARE_IRQ bool "Sharing PCI IDE interrupts support" - depends on PCI && BLK_DEV_IDEPCI + depends on BLK_DEV_IDEPCI help Some ATA/IDE chipsets have hardware support which allows for sharing a single IRQ with other cards. To enable support for @@ -371,11 +378,11 @@ config IDEPCI_SHARE_IRQ If unsure, say N. config IDEPCI_PCIBUS_ORDER - def_bool PCI && BLK_DEV_IDE=y && BLK_DEV_IDEPCI + def_bool BLK_DEV_IDE=y && BLK_DEV_IDEPCI config BLK_DEV_OFFBOARD bool "Boot off-board chipsets first support" - depends on PCI && BLK_DEV_IDEPCI + depends on BLK_DEV_IDEPCI help Normally, IDE controllers built into the motherboard (on-board controllers) are assigned to ide0 and ide1 while those on add-in PCI @@ -398,21 +405,23 @@ config BLK_DEV_OFFBOARD config BLK_DEV_GENERIC tristate "Generic PCI IDE Chipset Support" - depends on BLK_DEV_IDEPCI + select BLK_DEV_IDEPCI help This option provides generic support for various PCI IDE Chipsets which otherwise might not be supported. config BLK_DEV_OPTI621 tristate "OPTi 82C621 chipset enhanced support (EXPERIMENTAL)" - depends on PCI && BLK_DEV_IDEPCI && EXPERIMENTAL + depends on EXPERIMENTAL + select BLK_DEV_IDEPCI help This is a driver for the OPTi 82C621 EIDE controller. Please read the comments at the top of <file:drivers/ide/pci/opti621.c>. config BLK_DEV_RZ1000 tristate "RZ1000 chipset bugfix/support" - depends on PCI && BLK_DEV_IDEPCI && X86 + depends on X86 + select BLK_DEV_IDEPCI help The PC-Technologies RZ1000 IDE chip is used on many common 486 and Pentium motherboards, usually along with the "Neptune" chipset. @@ -423,43 +432,12 @@ config BLK_DEV_RZ1000 things will operate 100% reliably. config BLK_DEV_IDEDMA_PCI - bool "Generic PCI bus-master DMA support" - depends on PCI && BLK_DEV_IDEPCI - ---help--- - If your PCI system uses IDE drive(s) (as opposed to SCSI, say) and - is capable of bus-master DMA operation (most Pentium PCI systems), - you will want to say Y here to reduce CPU overhead. You can then use - the "hdparm" utility to enable DMA for drives for which it was not - enabled automatically. By default, DMA is not enabled automatically - for these drives, but you can change that by saying Y to the - following question "Use DMA by default when available". You can get - the latest version of the hdparm utility from - <ftp://ibiblio.org/pub/Linux/system/hardware/>. - - Read the comments at the beginning of <file:drivers/ide/ide-dma.c> - and the file <file:Documentation/ide.txt> for more information. - - It is safe to say Y to this question. - -if BLK_DEV_IDEDMA_PCI - -config BLK_DEV_IDEDMA_FORCED - bool "Force enable legacy 2.0.X HOSTS to use DMA" - help - This is an old piece of lost code from Linux 2.0 Kernels. - - Generally say N here. - -config IDEDMA_ONLYDISK - bool "Enable DMA only for disks " - help - This is used if you know your ATAPI Devices are going to fail DMA - Transfers. - - Generally say N here. + bool + select BLK_DEV_IDEPCI config BLK_DEV_AEC62XX tristate "AEC62XX chipset support" + select BLK_DEV_IDEDMA_PCI help This driver adds explicit support for Acard AEC62xx (Artop ATP8xx) IDE controllers. This allows the kernel to change PIO, DMA and UDMA @@ -467,6 +445,7 @@ config BLK_DEV_AEC62XX config BLK_DEV_ALI15X3 tristate "ALI M15x3 chipset support" + select BLK_DEV_IDEDMA_PCI help This driver ensures (U)DMA support for ALI 1533, 1543 and 1543C onboard chipsets. It also tests for Simplex mode and enables @@ -495,6 +474,7 @@ config WDC_ALI15X3 config BLK_DEV_AMD74XX tristate "AMD and nVidia IDE support" + select BLK_DEV_IDEDMA_PCI help This driver adds explicit support for AMD-7xx and AMD-8111 chips and also for the nVidia nForce chip. This allows the kernel to @@ -504,6 +484,7 @@ config BLK_DEV_AMD74XX config BLK_DEV_ATIIXP tristate "ATI IXP chipset IDE support" depends on X86 + select BLK_DEV_IDEDMA_PCI help This driver adds explicit support for ATI IXP chipset. This allows the kernel to change PIO, DMA and UDMA speeds @@ -513,18 +494,21 @@ config BLK_DEV_ATIIXP config BLK_DEV_CMD64X tristate "CMD64{3|6|8|9} chipset support" + select BLK_DEV_IDEDMA_PCI help Say Y here if you have an IDE controller which uses any of these chipsets: CMD643, CMD646, or CMD648. config BLK_DEV_TRIFLEX tristate "Compaq Triflex IDE support" + select BLK_DEV_IDEDMA_PCI help Say Y here if you have a Compaq Triflex IDE controller, such as those commonly found on Compaq Pentium-Pro systems config BLK_DEV_CY82C693 tristate "CY82C693 chipset support" + select BLK_DEV_IDEDMA_PCI help This driver adds detection and support for the CY82C693 chipset used on Digital's PC-Alpha 164SX boards. @@ -535,6 +519,7 @@ config BLK_DEV_CY82C693 config BLK_DEV_CS5520 tristate "Cyrix CS5510/20 MediaGX chipset support (VERY EXPERIMENTAL)" depends on EXPERIMENTAL + select BLK_DEV_IDEDMA_PCI help Include support for PIO tuning and virtual DMA on the Cyrix MediaGX 5510/5520 chipset. This will automatically be detected and @@ -544,6 +529,7 @@ config BLK_DEV_CS5520 config BLK_DEV_CS5530 tristate "Cyrix/National Semiconductor CS5530 MediaGX chipset support" + select BLK_DEV_IDEDMA_PCI help Include support for UDMA on the Cyrix MediaGX 5530 chipset. This will automatically be detected and configured if found. @@ -553,6 +539,7 @@ config BLK_DEV_CS5530 config BLK_DEV_CS5535 tristate "AMD CS5535 chipset support" depends on X86 && !X86_64 + select BLK_DEV_IDEDMA_PCI help Include support for UDMA on the NSC/AMD CS5535 companion chipset. This will automatically be detected and configured if found. @@ -561,6 +548,7 @@ config BLK_DEV_CS5535 config BLK_DEV_HPT34X tristate "HPT34X chipset support" + select BLK_DEV_IDEDMA_PCI help This driver adds up to 4 more EIDE devices sharing a single interrupt. The HPT343 chipset in its current form is a non-bootable @@ -581,7 +569,8 @@ config HPT34X_AUTODMA config BLK_DEV_HPT366 tristate "HPT36X/37X chipset support" - ---help--- + select BLK_DEV_IDEDMA_PCI + help HPT366 is an Ultra DMA chipset for ATA-66. HPT368 is an Ultra DMA chipset for ATA-66 RAID Based. HPT370 is an Ultra DMA chipset for ATA-100. @@ -605,18 +594,21 @@ config BLK_DEV_HPT366 config BLK_DEV_JMICRON tristate "JMicron JMB36x support" + select BLK_DEV_IDEDMA_PCI help Basic support for the JMicron ATA controllers. For full support use the libata drivers. config BLK_DEV_SC1200 tristate "National SCx200 chipset support" + select BLK_DEV_IDEDMA_PCI help This driver adds support for the built in IDE on the National SCx200 series of embedded x86 "Geode" systems config BLK_DEV_PIIX tristate "Intel PIIXn chipsets support" + select BLK_DEV_IDEDMA_PCI help This driver adds explicit support for Intel PIIX and ICH chips and also for the Efar Victory66 (slc90e66) chip. This allows @@ -625,17 +617,20 @@ config BLK_DEV_PIIX config BLK_DEV_IT8213 tristate "IT8213 IDE support" + select BLK_DEV_IDEDMA_PCI help This driver adds support for the ITE 8213 IDE controller. config BLK_DEV_IT821X tristate "IT821X IDE support" + select BLK_DEV_IDEDMA_PCI help This driver adds support for the ITE 8211 IDE controller and the IT 8212 IDE RAID controller in both RAID and pass-through mode. config BLK_DEV_NS87415 tristate "NS87415 chipset support" + select BLK_DEV_IDEDMA_PCI help This driver adds detection and support for the NS87415 chip (used mainly on SPARC64 and PA-RISC machines). @@ -644,6 +639,7 @@ config BLK_DEV_NS87415 config BLK_DEV_PDC202XX_OLD tristate "PROMISE PDC202{46|62|65|67} support" + select BLK_DEV_IDEDMA_PCI help Promise Ultra33 or PDC20246 Promise Ultra66 or PDC20262 @@ -685,9 +681,11 @@ config PDC202XX_BURST config BLK_DEV_PDC202XX_NEW tristate "PROMISE PDC202{68|69|70|71|75|76|77} support" + select BLK_DEV_IDEDMA_PCI config BLK_DEV_SVWKS tristate "ServerWorks OSB4/CSB5/CSB6 chipsets support" + select BLK_DEV_IDEDMA_PCI help This driver adds PIO/(U)DMA support for the ServerWorks OSB4/CSB5 chipsets. @@ -696,6 +694,7 @@ config BLK_DEV_SGIIOC4 tristate "Silicon Graphics IOC4 chipset ATA/ATAPI support" depends on (IA64_SGI_SN2 || IA64_GENERIC) && SGI_IOC4 select IDEPCI_SHARE_IRQ + select BLK_DEV_IDEDMA_PCI help This driver adds PIO & MultiMode DMA-2 support for the SGI IOC4 chipset, which has one channel and can support two devices. @@ -703,6 +702,7 @@ config BLK_DEV_SGIIOC4 config BLK_DEV_SIIMAGE tristate "Silicon Image chipset support" + select BLK_DEV_IDEDMA_PCI help This driver adds PIO/(U)DMA support for the SI CMD680 and SII 3112 (Serial ATA) chips. @@ -710,7 +710,8 @@ config BLK_DEV_SIIMAGE config BLK_DEV_SIS5513 tristate "SiS5513 chipset support" depends on X86 - ---help--- + select BLK_DEV_IDEDMA_PCI + help This driver ensures (U)DMA support for SIS5513 chipset family based mainboards. @@ -729,6 +730,7 @@ config BLK_DEV_SIS5513 config BLK_DEV_SL82C105 tristate "Winbond SL82c105 support" depends on (PPC || ARM) + select BLK_DEV_IDEDMA_PCI help If you have a Winbond SL82c105 IDE controller, say Y here to enable special configuration for this chip. This is common on various CHRP @@ -736,6 +738,7 @@ config BLK_DEV_SL82C105 config BLK_DEV_SLC90E66 tristate "SLC90E66 chipset support" + select BLK_DEV_IDEDMA_PCI help This driver ensures (U)DMA support for Victory66 SouthBridges for SMsC with Intel NorthBridges. This is an Ultra66 based chipset. @@ -751,6 +754,7 @@ config BLK_DEV_SLC90E66 config BLK_DEV_TRM290 tristate "Tekram TRM290 chipset support" + select BLK_DEV_IDEDMA_PCI help This driver adds support for bus master DMA transfers using the Tekram TRM290 PCI IDE chip. Volunteers are @@ -759,6 +763,7 @@ config BLK_DEV_TRM290 config BLK_DEV_VIA82CXXX tristate "VIA82CXXX chipset support" + select BLK_DEV_IDEDMA_PCI help This driver adds explicit support for VIA BusMastering IDE chips. This allows the kernel to change PIO, DMA and UDMA speeds and to @@ -766,12 +771,14 @@ config BLK_DEV_VIA82CXXX config BLK_DEV_TC86C001 tristate "Toshiba TC86C001 support" + select BLK_DEV_IDEDMA_PCI help This driver adds support for Toshiba TC86C001 GOKU-S chip. config BLK_DEV_CELLEB tristate "Toshiba's Cell Reference Set IDE support" depends on PPC_CELLEB + select BLK_DEV_IDEDMA_PCI help This driver provides support for the built-in IDE controller on Toshiba Cell Reference Board. @@ -985,24 +992,9 @@ config IDE_EXT_DIRECT endchoice # no isa -> no vlb -config IDE_CHIPSETS - bool "Other IDE chipset support" - depends on ISA - ---help--- - Say Y here if you want to include enhanced support for various IDE - interface chipsets used on motherboards and add-on cards. You can - then pick your particular IDE chip from among the following options. - This enhanced support may be necessary for Linux to be able to - access the 3rd/4th drives in some systems. It may also enable - setting of higher speed I/O rates to improve system performance with - these chipsets. Most of these also require special kernel boot - parameters to actually turn on the support at runtime; you can find - a list of these in the file <file:Documentation/ide.txt>. - - People with SCSI-only systems can say N here. - -if IDE_CHIPSETS +if ISA +comment "Other IDE chipsets support" comment "Note: most of these also require special kernel boot parameters" config BLK_DEV_4DRIVES @@ -1064,22 +1056,6 @@ endif config BLK_DEV_IDEDMA def_bool BLK_DEV_IDEDMA_PCI || BLK_DEV_IDEDMA_PMAC || BLK_DEV_IDEDMA_ICS || BLK_DEV_IDE_AU1XXX_MDMA2_DBDMA -config IDEDMA_IVB - bool "IGNORE word93 Validation BITS" - depends on BLK_DEV_IDEDMA_PCI || BLK_DEV_IDEDMA_PMAC || BLK_DEV_IDEDMA_ICS - ---help--- - There are unclear terms in ATA-4 and ATA-5 standards how certain - hardware (an 80c ribbon) should be detected. Different interpretations - of the standards have been released in hardware. This causes problems: - for example, a host with Ultra Mode 4 (or higher) will not run - in that mode with an 80c ribbon. - - If you are experiencing compatibility or performance problems, you - MAY try to answer Y here. However, it does not necessarily solve - any of your problems, it could even cause more of them. - - It is normally safe to answer Y; however, the default is N. - endif config BLK_DEV_HD_ONLY diff --git a/drivers/ide/arm/icside.c b/drivers/ide/arm/icside.c index 8a9b98fcb66..3af33fbf1f8 100644 --- a/drivers/ide/arm/icside.c +++ b/drivers/ide/arm/icside.c @@ -248,15 +248,9 @@ static void icside_build_sglist(ide_drive_t *drive, struct request *rq) * MW1 80 50 50 150 C * MW2 70 25 25 120 C */ -static int icside_set_speed(ide_drive_t *drive, u8 xfer_mode) +static void icside_set_dma_mode(ide_drive_t *drive, const u8 xfer_mode) { - int on = 0, cycle_time = 0, use_dma_info = 0; - - /* - * Limit the transfer speed to MW_DMA_2. - */ - if (xfer_mode > XFER_MW_DMA_2) - xfer_mode = XFER_MW_DMA_2; + int cycle_time, use_dma_info = 0; switch (xfer_mode) { case XFER_MW_DMA_2: @@ -278,6 +272,8 @@ static int icside_set_speed(ide_drive_t *drive, u8 xfer_mode) case XFER_SW_DMA_0: cycle_time = 480; break; + default: + return; } /* @@ -289,17 +285,8 @@ static int icside_set_speed(ide_drive_t *drive, u8 xfer_mode) drive->drive_data = cycle_time; - if (cycle_time && ide_config_drive_speed(drive, xfer_mode) == 0) - on = 1; - else - drive->drive_data = 480; - printk("%s: %s selected (peak %dMB/s)\n", drive->name, ide_xfer_verbose(xfer_mode), 2000 / drive->drive_data); - - drive->current_speed = xfer_mode; - - return on; } static void icside_dma_host_off(ide_drive_t *drive) @@ -322,45 +309,6 @@ static int icside_dma_on(ide_drive_t *drive) return 0; } -static int icside_dma_check(ide_drive_t *drive) -{ - struct hd_driveid *id = drive->id; - ide_hwif_t *hwif = HWIF(drive); - int xfer_mode = XFER_PIO_2; - int on; - - if (!(id->capability & 1) || !hwif->autodma) - goto out; - - /* - * Consult the list of known "bad" drives - */ - if (__ide_dma_bad_drive(drive)) - goto out; - - /* - * Enable DMA on any drive that has multiword DMA - */ - if (id->field_valid & 2) { - xfer_mode = ide_max_dma_mode(drive); - goto out; - } - - /* - * Consult the list of known "good" drives - */ - if (__ide_dma_good_drive(drive)) { - if (id->eide_dma_time > 150) - goto out; - xfer_mode = XFER_MW_DMA_1; - } - -out: - on = icside_set_speed(drive, xfer_mode); - - return on ? 0 : -1; -} - static int icside_dma_end(ide_drive_t *drive) { ide_hwif_t *hwif = HWIF(drive); @@ -467,18 +415,13 @@ static void icside_dma_lost_irq(ide_drive_t *drive) static void icside_dma_init(ide_hwif_t *hwif) { - printk(" %s: SG-DMA", hwif->name); - - hwif->atapi_dma = 1; hwif->mwdma_mask = 7; /* MW0..2 */ hwif->swdma_mask = 7; /* SW0..2 */ hwif->dmatable_cpu = NULL; hwif->dmatable_dma = 0; - hwif->speedproc = icside_set_speed; - hwif->autodma = 1; + hwif->set_dma_mode = icside_set_dma_mode; - hwif->ide_dma_check = icside_dma_check; hwif->dma_host_off = icside_dma_host_off; hwif->dma_off_quietly = icside_dma_off_quietly; hwif->dma_host_on = icside_dma_host_on; @@ -490,11 +433,6 @@ static void icside_dma_init(ide_hwif_t *hwif) hwif->ide_dma_test_irq = icside_dma_test_irq; hwif->dma_timeout = icside_dma_timeout; hwif->dma_lost_irq = icside_dma_lost_irq; - - hwif->drives[0].autodma = hwif->autodma; - hwif->drives[1].autodma = hwif->autodma; - - printk(" capable%s\n", hwif->autodma ? ", auto-enable" : ""); } #else #define icside_dma_init(hwif) (0) diff --git a/drivers/ide/cris/ide-cris.c b/drivers/ide/cris/ide-cris.c index 04636f7eaae..9a96a10ba9d 100644 --- a/drivers/ide/cris/ide-cris.c +++ b/drivers/ide/cris/ide-cris.c @@ -664,7 +664,6 @@ cris_ide_inb(unsigned long reg) return (unsigned char)cris_ide_inw(reg); } -static int cris_dma_check (ide_drive_t *drive); static int cris_dma_end (ide_drive_t *drive); static int cris_dma_setup (ide_drive_t *drive); static void cris_dma_exec_cmd (ide_drive_t *drive, u8 command); @@ -680,12 +679,10 @@ static void cris_dma_off(ide_drive_t *drive) { } -static void tune_cris_ide(ide_drive_t *drive, u8 pio) +static void cris_set_pio_mode(ide_drive_t *drive, const u8 pio) { int setup, strobe, hold; - pio = ide_get_best_pio_mode(drive, pio, 4); - switch(pio) { case 0: @@ -718,19 +715,12 @@ static void tune_cris_ide(ide_drive_t *drive, u8 pio) } cris_ide_set_speed(TYPE_PIO, setup, strobe, hold); - - (void)ide_config_drive_speed(drive, XFER_PIO_0 + pio); } -static int speed_cris_ide(ide_drive_t *drive, u8 speed) +static void cris_set_dma_mode(ide_drive_t *drive, const u8 speed) { int cyc = 0, dvs = 0, strobe = 0, hold = 0; - if (speed >= XFER_PIO_0 && speed <= XFER_PIO_4) { - tune_cris_ide(drive, speed - XFER_PIO_0); - return ide_config_drive_speed(drive, speed); - } - switch(speed) { case XFER_UDMA_0: @@ -766,8 +756,6 @@ static int speed_cris_ide(ide_drive_t *drive, u8 speed) cris_ide_set_speed(TYPE_UDMA, cyc, dvs, 0); else cris_ide_set_speed(TYPE_DMA, 0, strobe, hold); - - return ide_config_drive_speed(drive, speed); } void __init @@ -797,13 +785,12 @@ init_e100_ide (void) ide_register_hw(&hw, 1, &hwif); hwif->mmio = 1; hwif->chipset = ide_etrax100; - hwif->tuneproc = &tune_cris_ide; - hwif->speedproc = &speed_cris_ide; + hwif->set_pio_mode = &cris_set_pio_mode; + hwif->set_dma_mode = &cris_set_dma_mode; hwif->ata_input_data = &cris_ide_input_data; hwif->ata_output_data = &cris_ide_output_data; hwif->atapi_input_bytes = &cris_atapi_input_bytes; hwif->atapi_output_bytes = &cris_atapi_output_bytes; - hwif->ide_dma_check = &cris_dma_check; hwif->ide_dma_end = &cris_dma_end; hwif->dma_setup = &cris_dma_setup; hwif->dma_exec_cmd = &cris_dma_exec_cmd; @@ -818,12 +805,12 @@ init_e100_ide (void) hwif->dma_host_on = &cris_dma_on; hwif->dma_off_quietly = &cris_dma_off; hwif->cbl = ATA_CBL_PATA40; + hwif->host_flags |= IDE_HFLAG_NO_ATAPI_DMA; hwif->pio_mask = ATA_PIO4, + hwif->drives[0].autotune = 1; + hwif->drives[1].autotune = 1; hwif->ultra_mask = cris_ultra_mask; hwif->mwdma_mask = 0x07; /* Multiword DMA 0-2 */ - hwif->autodma = 1; - hwif->drives[0].autodma = 1; - hwif->drives[1].autodma = 1; } /* Reset pulse */ @@ -950,7 +937,8 @@ static int cris_ide_build_dmatable (ide_drive_t *drive) /* group sequential buffers into one large buffer */ addr = page_to_phys(sg->page) + sg->offset; size = sg_dma_len(sg); - while (sg++, --i) { + while (--i) { + sg = sg_next(sg); if ((addr + size) != page_to_phys(sg->page) + sg->offset) break; size += sg_dma_len(sg); @@ -1028,14 +1016,6 @@ static ide_startstop_t cris_dma_intr (ide_drive_t *drive) * the caller should revert to PIO for the current request. */ -static int cris_dma_check(ide_drive_t *drive) -{ - if (ide_tune_dma(drive)) - return 0; - - return -1; -} - static int cris_dma_end(ide_drive_t *drive) { drive->waiting_for_dma = 0; diff --git a/drivers/ide/ide-acpi.c b/drivers/ide/ide-acpi.c index 17aea65d7dd..1d5f6823101 100644 --- a/drivers/ide/ide-acpi.c +++ b/drivers/ide/ide-acpi.c @@ -612,6 +612,45 @@ void ide_acpi_push_timing(ide_hwif_t *hwif) EXPORT_SYMBOL_GPL(ide_acpi_push_timing); /** + * ide_acpi_set_state - set the channel power state + * @hwif: target IDE interface + * @on: state, on/off + * + * This function executes the _PS0/_PS3 ACPI method to set the power state. + * ACPI spec requires _PS0 when IDE power on and _PS3 when power off + */ +void ide_acpi_set_state(ide_hwif_t *hwif, int on) +{ + int unit; + + if (ide_noacpi) + return; + + DEBPRINT("ENTER:\n"); + + if (!hwif->acpidata) { + DEBPRINT("no ACPI data for %s\n", hwif->name); + return; + } + /* channel first and then drives for power on and verse versa for power off */ + if (on) + acpi_bus_set_power(hwif->acpidata->obj_handle, ACPI_STATE_D0); + for (unit = 0; unit < MAX_DRIVES; ++unit) { + ide_drive_t *drive = &hwif->drives[unit]; + + if (!drive->acpidata->obj_handle) + drive->acpidata->obj_handle = ide_acpi_drive_get_handle(drive); + + if (drive->acpidata->obj_handle && drive->present) { + acpi_bus_set_power(drive->acpidata->obj_handle, + on? ACPI_STATE_D0: ACPI_STATE_D3); + } + } + if (!on) + acpi_bus_set_power(hwif->acpidata->obj_handle, ACPI_STATE_D3); +} + +/** * ide_acpi_init - initialize the ACPI link for an IDE interface * @hwif: target IDE interface (channel) * @@ -679,6 +718,8 @@ void ide_acpi_init(ide_hwif_t *hwif) return; } + /* ACPI _PS0 before _STM */ + ide_acpi_set_state(hwif, 1); /* * ACPI requires us to call _STM on startup */ diff --git a/drivers/ide/ide-disk.c b/drivers/ide/ide-disk.c index 4754769eda9..2722d9165b6 100644 --- a/drivers/ide/ide-disk.c +++ b/drivers/ide/ide-disk.c @@ -169,7 +169,7 @@ static ide_startstop_t __ide_do_rw_disk(ide_drive_t *drive, struct request *rq, nsectors.all = (u16) rq->nr_sectors; - if (hwif->no_lba48_dma && lba48 && dma) { + if ((hwif->host_flags & IDE_HFLAG_NO_LBA48_DMA) && lba48 && dma) { if (block + rq->nr_sectors > 1ULL << 28) dma = 0; else @@ -716,32 +716,6 @@ static void idedisk_prepare_flush(struct request_queue *q, struct request *rq) rq->buffer = rq->cmd; } -static int idedisk_issue_flush(struct request_queue *q, struct gendisk *disk, - sector_t *error_sector) -{ - ide_drive_t *drive = q->queuedata; - struct request *rq; - int ret; - - if (!drive->wcache) - return 0; - - rq = blk_get_request(q, WRITE, __GFP_WAIT); - - idedisk_prepare_flush(q, rq); - - ret = blk_execute_rq(q, disk, rq, 0); - - /* - * if we failed and caller wants error offset, get it - */ - if (ret && error_sector) - *error_sector = ide_get_error_location(drive, rq->cmd); - - blk_put_request(rq); - return ret; -} - /* * This is tightly woven into the driver->do_special can not touch. * DON'T do it again until a total personality rewrite is committed. @@ -781,7 +755,6 @@ static void update_ordered(ide_drive_t *drive) struct hd_driveid *id = drive->id; unsigned ordered = QUEUE_ORDERED_NONE; prepare_flush_fn *prep_fn = NULL; - issue_flush_fn *issue_fn = NULL; if (drive->wcache) { unsigned long long capacity; @@ -805,13 +778,11 @@ static void update_ordered(ide_drive_t *drive) if (barrier) { ordered = QUEUE_ORDERED_DRAIN_FLUSH; prep_fn = idedisk_prepare_flush; - issue_fn = idedisk_issue_flush; } } else ordered = QUEUE_ORDERED_DRAIN; blk_queue_ordered(drive->queue, ordered, prep_fn); - blk_queue_issue_flush_fn(drive->queue, issue_fn); } static int write_cache(ide_drive_t *drive, int arg) @@ -885,7 +856,7 @@ static int set_lba_addressing(ide_drive_t *drive, int arg) drive->addressing = 0; - if (HWIF(drive)->no_lba48) + if (drive->hwif->host_flags & IDE_HFLAG_NO_LBA48) return 0; if (!idedisk_supports_lba48(drive->id)) @@ -918,6 +889,7 @@ static inline void idedisk_add_settings(ide_drive_t *drive) { ; } static void idedisk_setup (ide_drive_t *drive) { + ide_hwif_t *hwif = drive->hwif; struct hd_driveid *id = drive->id; unsigned long long capacity; @@ -938,7 +910,6 @@ static void idedisk_setup (ide_drive_t *drive) (void)set_lba_addressing(drive, 1); if (drive->addressing == 1) { - ide_hwif_t *hwif = HWIF(drive); int max_s = 2048; if (max_s > hwif->rqsize) @@ -961,7 +932,7 @@ static void idedisk_setup (ide_drive_t *drive) drive->capacity64 = 1ULL << 28; } - if (drive->hwif->no_lba48_dma && drive->addressing) { + if ((hwif->host_flags & IDE_HFLAG_NO_LBA48_DMA) && drive->addressing) { if (drive->capacity64 > 1ULL << 28) { printk(KERN_INFO "%s: cannot use LBA48 DMA - PIO mode will" " be used for accessing sectors > %u\n", diff --git a/drivers/ide/ide-dma.c b/drivers/ide/ide-dma.c index ff644a5e12c..80b4f17f394 100644 --- a/drivers/ide/ide-dma.c +++ b/drivers/ide/ide-dma.c @@ -169,6 +169,11 @@ ide_startstop_t ide_dma_intr (ide_drive_t *drive) EXPORT_SYMBOL_GPL(ide_dma_intr); +static int ide_dma_good_drive(ide_drive_t *drive) +{ + return ide_in_drive_list(drive->id, drive_whitelist); +} + #ifdef CONFIG_BLK_DEV_IDEDMA_PCI /** * ide_build_sglist - map IDE scatter gather for DMA I/O @@ -275,7 +280,7 @@ int ide_build_dmatable (ide_drive_t *drive, struct request *rq) } } - sg++; + sg = sg_next(sg); i--; } @@ -333,35 +338,32 @@ static int config_drive_for_dma (ide_drive_t *drive) ide_hwif_t *hwif = drive->hwif; struct hd_driveid *id = drive->id; - /* consult the list of known "bad" drives */ - if (__ide_dma_bad_drive(drive)) - return -1; + if (drive->media != ide_disk) { + if (hwif->host_flags & IDE_HFLAG_NO_ATAPI_DMA) + return -1; + } - if (drive->media != ide_disk && hwif->atapi_dma == 0) - return -1; + /* + * Enable DMA on any drive that has + * UltraDMA (mode 0/1/2/3/4/5/6) enabled + */ + if ((id->field_valid & 4) && ((id->dma_ultra >> 8) & 0x7f)) + return 1; - if ((id->capability & 1) && drive->autodma) { - /* - * Enable DMA on any drive that has - * UltraDMA (mode 0/1/2/3/4/5/6) enabled - */ - if ((id->field_valid & 4) && ((id->dma_ultra >> 8) & 0x7f)) - return 0; - /* - * Enable DMA on any drive that has mode2 DMA - * (multi or single) enabled - */ - if (id->field_valid & 2) /* regular DMA */ - if ((id->dma_mword & 0x404) == 0x404 || - (id->dma_1word & 0x404) == 0x404) - return 0; + /* + * Enable DMA on any drive that has mode2 DMA + * (multi or single) enabled + */ + if (id->field_valid & 2) /* regular DMA */ + if ((id->dma_mword & 0x404) == 0x404 || + (id->dma_1word & 0x404) == 0x404) + return 1; - /* Consult the list of known "good" drives */ - if (__ide_dma_good_drive(drive)) - return 0; - } + /* Consult the list of known "good" drives */ + if (ide_dma_good_drive(drive)) + return 1; - return -1; + return 0; } /** @@ -622,6 +624,8 @@ static int __ide_dma_test_irq(ide_drive_t *drive) drive->name, __FUNCTION__); return 0; } +#else +static inline int config_drive_for_dma(ide_drive_t *drive) { return 0; } #endif /* CONFIG_BLK_DEV_IDEDMA_PCI */ int __ide_dma_bad_drive (ide_drive_t *drive) @@ -639,21 +643,13 @@ int __ide_dma_bad_drive (ide_drive_t *drive) EXPORT_SYMBOL(__ide_dma_bad_drive); -int __ide_dma_good_drive (ide_drive_t *drive) -{ - struct hd_driveid *id = drive->id; - return ide_in_drive_list(id, drive_whitelist); -} - -EXPORT_SYMBOL(__ide_dma_good_drive); - static const u8 xfer_mode_bases[] = { XFER_UDMA_0, XFER_MW_DMA_0, XFER_SW_DMA_0, }; -static unsigned int ide_get_mode_mask(ide_drive_t *drive, u8 base) +static unsigned int ide_get_mode_mask(ide_drive_t *drive, u8 base, u8 req_mode) { struct hd_driveid *id = drive->id; ide_hwif_t *hwif = drive->hwif; @@ -664,17 +660,28 @@ static unsigned int ide_get_mode_mask(ide_drive_t *drive, u8 base) if ((id->field_valid & 4) == 0) break; - mask = id->dma_ultra & hwif->ultra_mask; - if (hwif->udma_filter) - mask &= hwif->udma_filter(drive); + mask = hwif->udma_filter(drive); + else + mask = hwif->ultra_mask; + mask &= id->dma_ultra; - if ((mask & 0x78) && (eighty_ninty_three(drive) == 0)) - mask &= 0x07; + /* + * avoid false cable warning from eighty_ninty_three() + */ + if (req_mode > XFER_UDMA_2) { + if ((mask & 0x78) && (eighty_ninty_three(drive) == 0)) + mask &= 0x07; + } break; case XFER_MW_DMA_0: - if (id->field_valid & 2) - mask = id->dma_mword & hwif->mwdma_mask; + if ((id->field_valid & 2) == 0) + break; + if (hwif->mdma_filter) + mask = hwif->mdma_filter(drive); + else + mask = hwif->mwdma_mask; + mask &= id->dma_mword; break; case XFER_SW_DMA_0: if (id->field_valid & 2) { @@ -703,26 +710,33 @@ static unsigned int ide_get_mode_mask(ide_drive_t *drive, u8 base) } /** - * ide_max_dma_mode - compute DMA speed + * ide_find_dma_mode - compute DMA speed * @drive: IDE device + * @req_mode: requested mode + * + * Checks the drive/host capabilities and finds the speed to use for + * the DMA transfer. The speed is then limited by the requested mode. * - * Checks the drive capabilities and returns the speed to use - * for the DMA transfer. Returns 0 if the drive is incapable - * of DMA transfers. + * Returns 0 if the drive/host combination is incapable of DMA transfers + * or if the requested mode is not a DMA mode. */ -u8 ide_max_dma_mode(ide_drive_t *drive) +u8 ide_find_dma_mode(ide_drive_t *drive, u8 req_mode) { ide_hwif_t *hwif = drive->hwif; unsigned int mask; int x, i; u8 mode = 0; - if (drive->media != ide_disk && hwif->atapi_dma == 0) - return 0; + if (drive->media != ide_disk) { + if (hwif->host_flags & IDE_HFLAG_NO_ATAPI_DMA) + return 0; + } for (i = 0; i < ARRAY_SIZE(xfer_mode_bases); i++) { - mask = ide_get_mode_mask(drive, xfer_mode_bases[i]); + if (req_mode < xfer_mode_bases[i]) + continue; + mask = ide_get_mode_mask(drive, xfer_mode_bases[i], req_mode); x = fls(mask) - 1; if (x >= 0) { mode = xfer_mode_bases[i] + x; @@ -730,36 +744,65 @@ u8 ide_max_dma_mode(ide_drive_t *drive) } } + if (hwif->chipset == ide_acorn && mode == 0) { + /* + * is this correct? + */ + if (ide_dma_good_drive(drive) && drive->id->eide_dma_time < 150) + mode = XFER_MW_DMA_1; + } + printk(KERN_DEBUG "%s: selected mode 0x%x\n", drive->name, mode); - return mode; + return min(mode, req_mode); } -EXPORT_SYMBOL_GPL(ide_max_dma_mode); +EXPORT_SYMBOL_GPL(ide_find_dma_mode); -int ide_tune_dma(ide_drive_t *drive) +static int ide_tune_dma(ide_drive_t *drive) { u8 speed; - if ((drive->id->capability & 1) == 0 || drive->autodma == 0) + if (noautodma || drive->nodma || (drive->id->capability & 1) == 0) return 0; /* consult the list of known "bad" drives */ if (__ide_dma_bad_drive(drive)) return 0; + if (drive->hwif->host_flags & IDE_HFLAG_TRUST_BIOS_FOR_DMA) + return config_drive_for_dma(drive); + speed = ide_max_dma_mode(drive); if (!speed) return 0; - if (drive->hwif->speedproc(drive, speed)) + if (drive->hwif->host_flags & IDE_HFLAG_NO_SET_MODE) + return 0; + + if (ide_set_dma_mode(drive, speed)) return 0; return 1; } -EXPORT_SYMBOL_GPL(ide_tune_dma); +static int ide_dma_check(ide_drive_t *drive) +{ + ide_hwif_t *hwif = drive->hwif; + int vdma = (hwif->host_flags & IDE_HFLAG_VDMA)? 1 : 0; + + if (!vdma && ide_tune_dma(drive)) + return 0; + + /* TODO: always do PIO fallback */ + if (hwif->host_flags & IDE_HFLAG_TRUST_BIOS_FOR_DMA) + return -1; + + ide_set_max_pio(drive); + + return vdma ? 0 : -1; +} void ide_dma_verbose(ide_drive_t *drive) { @@ -818,7 +861,7 @@ int ide_set_dma(ide_drive_t *drive) ide_hwif_t *hwif = drive->hwif; int rc; - rc = hwif->ide_dma_check(drive); + rc = ide_dma_check(drive); switch(rc) { case -1: /* DMA needs to be disabled */ @@ -995,8 +1038,6 @@ void ide_setup_dma (ide_hwif_t *hwif, unsigned long dma_base, unsigned int num_p hwif->ide_dma_on = &__ide_dma_on; if (!hwif->dma_host_on) hwif->dma_host_on = &ide_dma_host_on; - if (!hwif->ide_dma_check) - hwif->ide_dma_check = &config_drive_for_dma; if (!hwif->dma_setup) hwif->dma_setup = &ide_dma_setup; if (!hwif->dma_exec_cmd) diff --git a/drivers/ide/ide-floppy.c b/drivers/ide/ide-floppy.c index ae8e1a64b8a..04a357808f2 100644 --- a/drivers/ide/ide-floppy.c +++ b/drivers/ide/ide-floppy.c @@ -606,26 +606,24 @@ static void idefloppy_input_buffers (ide_drive_t *drive, idefloppy_pc_t *pc, uns { struct request *rq = pc->rq; struct bio_vec *bvec; - struct bio *bio; + struct req_iterator iter; unsigned long flags; char *data; - int count, i, done = 0; + int count, done = 0; - rq_for_each_bio(bio, rq) { - bio_for_each_segment(bvec, bio, i) { - if (!bcount) - break; + rq_for_each_segment(bvec, rq, iter) { + if (!bcount) + break; - count = min(bvec->bv_len, bcount); + count = min(bvec->bv_len, bcount); - data = bvec_kmap_irq(bvec, &flags); - drive->hwif->atapi_input_bytes(drive, data, count); - bvec_kunmap_irq(data, &flags); + data = bvec_kmap_irq(bvec, &flags); + drive->hwif->atapi_input_bytes(drive, data, count); + bvec_kunmap_irq(data, &flags); - bcount -= count; - pc->b_count += count; - done += count; - } + bcount -= count; + pc->b_count += count; + done += count; } idefloppy_do_end_request(drive, 1, done >> 9); @@ -639,27 +637,25 @@ static void idefloppy_input_buffers (ide_drive_t *drive, idefloppy_pc_t *pc, uns static void idefloppy_output_buffers (ide_drive_t *drive, idefloppy_pc_t *pc, unsigned int bcount) { struct request *rq = pc->rq; - struct bio *bio; + struct req_iterator iter; struct bio_vec *bvec; unsigned long flags; - int count, i, done = 0; + int count, done = 0; char *data; - rq_for_each_bio(bio, rq) { - bio_for_each_segment(bvec, bio, i) { - if (!bcount) - break; + rq_for_each_segment(bvec, rq, iter) { + if (!bcount) + break; - count = min(bvec->bv_len, bcount); + count = min(bvec->bv_len, bcount); - data = bvec_kmap_irq(bvec, &flags); - drive->hwif->atapi_output_bytes(drive, data, count); - bvec_kunmap_irq(data, &flags); + data = bvec_kmap_irq(bvec, &flags); + drive->hwif->atapi_output_bytes(drive, data, count); + bvec_kunmap_irq(data, &flags); - bcount -= count; - pc->b_count += count; - done += count; - } + bcount -= count; + pc->b_count += count; + done += count; } idefloppy_do_end_request(drive, 1, done >> 9); diff --git a/drivers/ide/ide-io.c b/drivers/ide/ide-io.c index aa9f5f0b1e6..32eaa3f8051 100644 --- a/drivers/ide/ide-io.c +++ b/drivers/ide/ide-io.c @@ -47,12 +47,12 @@ #include <linux/device.h> #include <linux/kmod.h> #include <linux/scatterlist.h> +#include <linux/bitops.h> #include <asm/byteorder.h> #include <asm/irq.h> #include <asm/uaccess.h> #include <asm/io.h> -#include <asm/bitops.h> static int __ide_end_request(ide_drive_t *drive, struct request *rq, int uptodate, unsigned int nr_bytes) @@ -201,8 +201,7 @@ static ide_startstop_t ide_start_power_step(ide_drive_t *drive, struct request * return do_rw_taskfile(drive, args); case idedisk_pm_restore_pio: /* Resume step 1 (restore PIO) */ - if (drive->hwif->tuneproc != NULL) - drive->hwif->tuneproc(drive, 255); + ide_set_max_pio(drive); /* * skip idedisk_pm_idle for ATAPI devices */ @@ -220,11 +219,11 @@ static ide_startstop_t ide_start_power_step(ide_drive_t *drive, struct request * case ide_pm_restore_dma: /* Resume step 3 (restore DMA) */ /* - * Right now, all we do is call hwif->ide_dma_check(drive), + * Right now, all we do is call ide_set_dma(drive), * we could be smarter and check for current xfer_speed * in struct drive etc... */ - if (drive->hwif->ide_dma_check == NULL) + if (drive->hwif->ide_dma_on == NULL) break; drive->hwif->dma_off_quietly(drive); /* @@ -323,41 +322,6 @@ static void ide_complete_pm_request (ide_drive_t *drive, struct request *rq) spin_unlock_irqrestore(&ide_lock, flags); } -/* - * FIXME: probably move this somewhere else, name is bad too :) - */ -u64 ide_get_error_location(ide_drive_t *drive, char *args) -{ - u32 high, low; - u8 hcyl, lcyl, sect; - u64 sector; - - high = 0; - hcyl = args[5]; - lcyl = args[4]; - sect = args[3]; - - if (ide_id_has_flush_cache_ext(drive->id)) { - low = (hcyl << 16) | (lcyl << 8) | sect; - HWIF(drive)->OUTB(drive->ctl|0x80, IDE_CONTROL_REG); - high = ide_read_24(drive); - } else { - u8 cur = HWIF(drive)->INB(IDE_SELECT_REG); - if (cur & 0x40) { - high = cur & 0xf; - low = (hcyl << 16) | (lcyl << 8) | sect; - } else { - low = hcyl * drive->head * drive->sect; - low += lcyl * drive->sect; - low += sect - 1; - } - } - - sector = ((u64) high << 24) | low; - return sector; -} -EXPORT_SYMBOL(ide_get_error_location); - /** * ide_end_drive_cmd - end an explicit drive command * @drive: command @@ -520,7 +484,8 @@ static ide_startstop_t ide_ata_error(ide_drive_t *drive, struct request *rq, u8 } } - if ((stat & DRQ_STAT) && rq_data_dir(rq) == READ && hwif->err_stops_fifo == 0) + if ((stat & DRQ_STAT) && rq_data_dir(rq) == READ && + (hwif->host_flags & IDE_HFLAG_ERROR_STOPS_FIFO) == 0) try_to_flush_leftover_data(drive); if (rq->errors >= ERROR_MAX || blk_noretry_request(rq)) { @@ -788,6 +753,30 @@ static ide_startstop_t ide_disk_special(ide_drive_t *drive) return ide_started; } +/* + * handle HDIO_SET_PIO_MODE ioctl abusers here, eventually it will go away + */ +static int set_pio_mode_abuse(ide_hwif_t *hwif, u8 req_pio) +{ + switch (req_pio) { + case 202: + case 201: + case 200: + case 102: + case 101: + case 100: + return (hwif->host_flags & IDE_HFLAG_ABUSE_DMA_MODES) ? 1 : 0; + case 9: + case 8: + return (hwif->host_flags & IDE_HFLAG_ABUSE_PREFETCH) ? 1 : 0; + case 7: + case 6: + return (hwif->host_flags & IDE_HFLAG_ABUSE_FAST_DEVSEL) ? 1 : 0; + default: + return 0; + } +} + /** * do_special - issue some special commands * @drive: drive the command is for @@ -805,9 +794,25 @@ static ide_startstop_t do_special (ide_drive_t *drive) printk("%s: do_special: 0x%02x\n", drive->name, s->all); #endif if (s->b.set_tune) { + ide_hwif_t *hwif = drive->hwif; + u8 req_pio = drive->tune_req; + s->b.set_tune = 0; - if (HWIF(drive)->tuneproc != NULL) - HWIF(drive)->tuneproc(drive, drive->tune_req); + + if (set_pio_mode_abuse(drive->hwif, req_pio)) { + if (hwif->set_pio_mode) + hwif->set_pio_mode(drive, req_pio); + } else { + int keep_dma = drive->using_dma; + + ide_set_pio(drive, req_pio); + + if (hwif->host_flags & IDE_HFLAG_SET_PIO_MODE_KEEP_DMA) { + if (keep_dma) + hwif->ide_dma_on(drive); + } + } + return ide_stopped; } else { if (drive->media == ide_disk) @@ -842,7 +847,8 @@ void ide_init_sg_cmd(ide_drive_t *drive, struct request *rq) ide_hwif_t *hwif = drive->hwif; hwif->nsect = hwif->nleft = rq->nr_sectors; - hwif->cursg = hwif->cursg_ofs = 0; + hwif->cursg_ofs = 0; + hwif->cursg = NULL; } EXPORT_SYMBOL_GPL(ide_init_sg_cmd); diff --git a/drivers/ide/ide-iops.c b/drivers/ide/ide-iops.c index 646a54e233d..d4d790f91f9 100644 --- a/drivers/ide/ide-iops.c +++ b/drivers/ide/ide-iops.c @@ -473,57 +473,22 @@ int drive_is_ready (ide_drive_t *drive) EXPORT_SYMBOL(drive_is_ready); /* - * Global for All, and taken from ide-pmac.c. Can be called - * with spinlock held & IRQs disabled, so don't schedule ! - */ -int wait_for_ready (ide_drive_t *drive, int timeout) -{ - ide_hwif_t *hwif = HWIF(drive); - u8 stat = 0; - - while(--timeout) { - stat = hwif->INB(IDE_STATUS_REG); - if (!(stat & BUSY_STAT)) { - if (drive->ready_stat == 0) - break; - else if ((stat & drive->ready_stat)||(stat & ERR_STAT)) - break; - } - mdelay(1); - } - if ((stat & ERR_STAT) || timeout <= 0) { - if (stat & ERR_STAT) { - printk(KERN_ERR "%s: wait_for_ready, " - "error status: %x\n", drive->name, stat); - } - return 1; - } - return 0; -} - -/* * This routine busy-waits for the drive status to be not "busy". * It then checks the status for all of the "good" bits and none * of the "bad" bits, and if all is okay it returns 0. All other - * cases return 1 after invoking ide_error() -- caller should just return. + * cases return error -- caller may then invoke ide_error(). * * This routine should get fixed to not hog the cpu during extra long waits.. * That could be done by busy-waiting for the first jiffy or two, and then * setting a timer to wake up at half second intervals thereafter, * until timeout is achieved, before timing out. */ -int ide_wait_stat (ide_startstop_t *startstop, ide_drive_t *drive, u8 good, u8 bad, unsigned long timeout) +static int __ide_wait_stat(ide_drive_t *drive, u8 good, u8 bad, unsigned long timeout, u8 *rstat) { - ide_hwif_t *hwif = HWIF(drive); - u8 stat; - int i; + ide_hwif_t *hwif = drive->hwif; unsigned long flags; - - /* bail early if we've exceeded max_failures */ - if (drive->max_failures && (drive->failures > drive->max_failures)) { - *startstop = ide_stopped; - return 1; - } + int i; + u8 stat; udelay(1); /* spec allows drive 400ns to assert "BUSY" */ if ((stat = hwif->INB(IDE_STATUS_REG)) & BUSY_STAT) { @@ -541,8 +506,8 @@ int ide_wait_stat (ide_startstop_t *startstop, ide_drive_t *drive, u8 good, u8 b break; local_irq_restore(flags); - *startstop = ide_error(drive, "status timeout", stat); - return 1; + *rstat = stat; + return -EBUSY; } } local_irq_restore(flags); @@ -556,11 +521,39 @@ int ide_wait_stat (ide_startstop_t *startstop, ide_drive_t *drive, u8 good, u8 b */ for (i = 0; i < 10; i++) { udelay(1); - if (OK_STAT((stat = hwif->INB(IDE_STATUS_REG)), good, bad)) + if (OK_STAT((stat = hwif->INB(IDE_STATUS_REG)), good, bad)) { + *rstat = stat; return 0; + } } - *startstop = ide_error(drive, "status error", stat); - return 1; + *rstat = stat; + return -EFAULT; +} + +/* + * In case of error returns error value after doing "*startstop = ide_error()". + * The caller should return the updated value of "startstop" in this case, + * "startstop" is unchanged when the function returns 0. + */ +int ide_wait_stat(ide_startstop_t *startstop, ide_drive_t *drive, u8 good, u8 bad, unsigned long timeout) +{ + int err; + u8 stat; + + /* bail early if we've exceeded max_failures */ + if (drive->max_failures && (drive->failures > drive->max_failures)) { + *startstop = ide_stopped; + return 1; + } + + err = __ide_wait_stat(drive, good, bad, timeout, &stat); + + if (err) { + char *s = (err == -EBUSY) ? "status timeout" : "status error"; + *startstop = ide_error(drive, s, stat); + } + + return err; } EXPORT_SYMBOL(ide_wait_stat); @@ -620,15 +613,10 @@ u8 eighty_ninty_three (ide_drive_t *drive) /* * FIXME: - * - change master/slave IDENTIFY order * - force bit13 (80c cable present) check also for !ivb devices * (unless the slave device is pre-ATA3) */ -#ifndef CONFIG_IDEDMA_IVB if ((id->hw_config & 0x4000) || (ivb && (id->hw_config & 0x2000))) -#else - if (id->hw_config & 0x6000) -#endif return 1; no_80w: @@ -778,28 +766,17 @@ int ide_driveid_update (ide_drive_t *drive) #endif } -/* - * Similar to ide_wait_stat(), except it never calls ide_error internally. - * This is a kludge to handle the new ide_config_drive_speed() function, - * and should not otherwise be used anywhere. Eventually, the tuneproc's - * should be updated to return ide_startstop_t, in which case we can get - * rid of this abomination again. :) -ml - * - * It is gone.......... - * - * const char *msg == consider adding for verbose errors. - */ -int ide_config_drive_speed (ide_drive_t *drive, u8 speed) +int ide_config_drive_speed(ide_drive_t *drive, u8 speed) { - ide_hwif_t *hwif = HWIF(drive); - int i, error = 1; + ide_hwif_t *hwif = drive->hwif; + int error; u8 stat; // while (HWGROUP(drive)->busy) // msleep(50); #ifdef CONFIG_BLK_DEV_IDEDMA - if (hwif->ide_dma_check) /* check if host supports DMA */ + if (hwif->ide_dma_on) /* check if host supports DMA */ hwif->dma_host_off(drive); #endif @@ -832,35 +809,10 @@ int ide_config_drive_speed (ide_drive_t *drive, u8 speed) hwif->OUTBSYNC(drive, WIN_SETFEATURES, IDE_COMMAND_REG); if ((IDE_CONTROL_REG) && (drive->quirk_list == 2)) hwif->OUTB(drive->ctl, IDE_CONTROL_REG); - udelay(1); - /* - * Wait for drive to become non-BUSY - */ - if ((stat = hwif->INB(IDE_STATUS_REG)) & BUSY_STAT) { - unsigned long flags, timeout; - local_irq_set(flags); - timeout = jiffies + WAIT_CMD; - while ((stat = hwif->INB(IDE_STATUS_REG)) & BUSY_STAT) { - if (time_after(jiffies, timeout)) - break; - } - local_irq_restore(flags); - } - /* - * Allow status to settle, then read it again. - * A few rare drives vastly violate the 400ns spec here, - * so we'll wait up to 10usec for a "good" status - * rather than expensively fail things immediately. - * This fix courtesy of Matthew Faupel & Niccolo Rigacci. - */ - for (i = 0; i < 10; i++) { - udelay(1); - if (OK_STAT((stat = hwif->INB(IDE_STATUS_REG)), drive->ready_stat, BUSY_STAT|DRQ_STAT|ERR_STAT)) { - error = 0; - break; - } - } + error = __ide_wait_stat(drive, drive->ready_stat, + BUSY_STAT|DRQ_STAT|ERR_STAT, + WAIT_CMD, &stat); SELECT_MASK(drive, 0); @@ -878,7 +830,7 @@ int ide_config_drive_speed (ide_drive_t *drive, u8 speed) #ifdef CONFIG_BLK_DEV_IDEDMA if (speed >= XFER_SW_DMA_0) hwif->dma_host_on(drive); - else if (hwif->ide_dma_check) /* check if host supports DMA */ + else if (hwif->ide_dma_on) /* check if host supports DMA */ hwif->dma_off_quietly(drive); #endif @@ -905,9 +857,6 @@ int ide_config_drive_speed (ide_drive_t *drive, u8 speed) return error; } -EXPORT_SYMBOL(ide_config_drive_speed); - - /* * This should get invoked any time we exit the driver to * wait for an interrupt response from a drive. handler() points diff --git a/drivers/ide/ide-lib.c b/drivers/ide/ide-lib.c index 92a6c7bcf52..af86433baed 100644 --- a/drivers/ide/ide-lib.c +++ b/drivers/ide/ide-lib.c @@ -76,56 +76,26 @@ EXPORT_SYMBOL(ide_xfer_verbose); * Given the available transfer modes this function returns * the best available speed at or below the speed requested. * - * FIXME: filter also PIO/SWDMA/MWDMA modes + * TODO: check device PIO capabilities */ -u8 ide_rate_filter(ide_drive_t *drive, u8 speed) +static u8 ide_rate_filter(ide_drive_t *drive, u8 speed) { -#ifdef CONFIG_BLK_DEV_IDEDMA ide_hwif_t *hwif = drive->hwif; - u8 mask = hwif->ultra_mask, mode = XFER_MW_DMA_2; + u8 mode = ide_find_dma_mode(drive, speed); - if (hwif->udma_filter) - mask = hwif->udma_filter(drive); - - /* - * TODO: speed > XFER_UDMA_2 extra check is needed to avoid false - * cable warning from eighty_ninty_three(), moving ide_rate_filter() - * calls from ->speedproc to core code will make this hack go away - */ - if (speed > XFER_UDMA_2) { - if ((mask & 0x78) && (eighty_ninty_three(drive) == 0)) - mask &= 0x07; + if (mode == 0) { + if (hwif->pio_mask) + mode = fls(hwif->pio_mask) - 1 + XFER_PIO_0; + else + mode = XFER_PIO_4; } - if (mask) - mode = fls(mask) - 1 + XFER_UDMA_0; - // printk("%s: mode 0x%02x, speed 0x%02x\n", __FUNCTION__, mode, speed); return min(speed, mode); -#else /* !CONFIG_BLK_DEV_IDEDMA */ - return min(speed, (u8)XFER_PIO_4); -#endif /* CONFIG_BLK_DEV_IDEDMA */ -} - -EXPORT_SYMBOL(ide_rate_filter); - -int ide_use_fast_pio(ide_drive_t *drive) -{ - struct hd_driveid *id = drive->id; - - if ((id->capability & 1) && drive->autodma) - return 1; - - if ((id->capability & 8) || (id->field_valid & 2)) - return 1; - - return 0; } -EXPORT_SYMBOL_GPL(ide_use_fast_pio); - /* * Standard (generic) timings for PIO modes, from ATA2 specification. * These timings are for access to the IDE data port register *only*. @@ -340,6 +310,35 @@ u8 ide_get_best_pio_mode (ide_drive_t *drive, u8 mode_wanted, u8 max_mode) EXPORT_SYMBOL_GPL(ide_get_best_pio_mode); +/* req_pio == "255" for auto-tune */ +void ide_set_pio(ide_drive_t *drive, u8 req_pio) +{ + ide_hwif_t *hwif = drive->hwif; + u8 host_pio, pio; + + if (hwif->set_pio_mode == NULL) + return; + + BUG_ON(hwif->pio_mask == 0x00); + + host_pio = fls(hwif->pio_mask) - 1; + + pio = ide_get_best_pio_mode(drive, req_pio, host_pio); + + /* + * TODO: + * - report device max PIO mode + * - check req_pio != 255 against device max PIO mode + */ + printk(KERN_DEBUG "%s: host max PIO%d wanted PIO%d%s selected PIO%d\n", + drive->name, host_pio, req_pio, + req_pio == 255 ? "(auto-tune)" : "", pio); + + (void)ide_set_pio_mode(drive, XFER_PIO_0 + pio); +} + +EXPORT_SYMBOL_GPL(ide_set_pio); + /** * ide_toggle_bounce - handle bounce buffering * @drive: drive to update @@ -364,26 +363,83 @@ void ide_toggle_bounce(ide_drive_t *drive, int on) blk_queue_bounce_limit(drive->queue, addr); } +int ide_set_pio_mode(ide_drive_t *drive, const u8 mode) +{ + ide_hwif_t *hwif = drive->hwif; + + if (hwif->set_pio_mode == NULL) + return -1; + + /* + * TODO: temporary hack for some legacy host drivers that didn't + * set transfer mode on the device in ->set_pio_mode method... + */ + if (hwif->set_dma_mode == NULL) { + hwif->set_pio_mode(drive, mode - XFER_PIO_0); + return 0; + } + + if (hwif->host_flags & IDE_HFLAG_POST_SET_MODE) { + if (ide_config_drive_speed(drive, mode)) + return -1; + hwif->set_pio_mode(drive, mode - XFER_PIO_0); + return 0; + } else { + hwif->set_pio_mode(drive, mode - XFER_PIO_0); + return ide_config_drive_speed(drive, mode); + } +} + +int ide_set_dma_mode(ide_drive_t *drive, const u8 mode) +{ + ide_hwif_t *hwif = drive->hwif; + + if (hwif->set_dma_mode == NULL) + return -1; + + if (hwif->host_flags & IDE_HFLAG_POST_SET_MODE) { + if (ide_config_drive_speed(drive, mode)) + return -1; + hwif->set_dma_mode(drive, mode); + return 0; + } else { + hwif->set_dma_mode(drive, mode); + return ide_config_drive_speed(drive, mode); + } +} + +EXPORT_SYMBOL_GPL(ide_set_dma_mode); + /** * ide_set_xfer_rate - set transfer rate * @drive: drive to set - * @speed: speed to attempt to set + * @rate: speed to attempt to set * * General helper for setting the speed of an IDE device. This * function knows about user enforced limits from the configuration - * which speedproc() does not. High level drivers should never - * invoke speedproc() directly. + * which ->set_pio_mode/->set_dma_mode does not. */ - + int ide_set_xfer_rate(ide_drive_t *drive, u8 rate) { -#ifndef CONFIG_BLK_DEV_IDEDMA - rate = min(rate, (u8) XFER_PIO_4); -#endif - if(HWIF(drive)->speedproc) - return HWIF(drive)->speedproc(drive, rate); - else + ide_hwif_t *hwif = drive->hwif; + + if (hwif->set_dma_mode == NULL) return -1; + + rate = ide_rate_filter(drive, rate); + + if (rate >= XFER_PIO_0 && rate <= XFER_PIO_5) + return ide_set_pio_mode(drive, rate); + + /* + * TODO: transfer modes 0x00-0x07 passed from the user-space are + * currently handled here which needs fixing (please note that such + * case could happen iff the transfer mode has already been set on + * the device by ide-proc.c::set_xfer_rate()). + */ + + return ide_set_dma_mode(drive, rate); } static void ide_dump_opcode(ide_drive_t *drive) diff --git a/drivers/ide/ide-probe.c b/drivers/ide/ide-probe.c index 3a2a9a338fd..e294c7415c2 100644 --- a/drivers/ide/ide-probe.c +++ b/drivers/ide/ide-probe.c @@ -719,9 +719,9 @@ EXPORT_SYMBOL_GPL(ide_undecoded_slave); */ static void probe_hwif(ide_hwif_t *hwif, void (*fixup)(ide_hwif_t *hwif)) { - unsigned int unit; unsigned long flags; unsigned int irqd; + int unit; if (hwif->noprobe) return; @@ -777,10 +777,9 @@ static void probe_hwif(ide_hwif_t *hwif, void (*fixup)(ide_hwif_t *hwif)) printk(KERN_DEBUG "%s: Wait for ready failed before probe !\n", hwif->name); /* - * Second drive should only exist if first drive was found, - * but a lot of cdrom drives are configured as single slaves. + * Need to probe slave device first to make it release PDIAG-. */ - for (unit = 0; unit < MAX_DRIVES; ++unit) { + for (unit = MAX_DRIVES - 1; unit >= 0; unit--) { ide_drive_t *drive = &hwif->drives[unit]; drive->dn = (hwif->channel ? 2 : 0) + unit; (void) probe_for_drive(drive); @@ -827,10 +826,8 @@ static void probe_hwif(ide_hwif_t *hwif, void (*fixup)(ide_hwif_t *hwif)) ide_drive_t *drive = &hwif->drives[unit]; if (drive->present) { - if (hwif->tuneproc != NULL && - drive->autotune == IDE_TUNE_AUTO) - /* auto-tune PIO mode */ - hwif->tuneproc(drive, 255); + if (drive->autotune == IDE_TUNE_AUTO) + ide_set_max_pio(drive); if (drive->autotune != IDE_TUNE_DEFAULT && drive->autotune != IDE_TUNE_AUTO) @@ -838,16 +835,7 @@ static void probe_hwif(ide_hwif_t *hwif, void (*fixup)(ide_hwif_t *hwif)) drive->nice1 = 1; - /* - * MAJOR HACK BARF :-/ - * - * FIXME: chipsets own this cruft! - */ - /* - * Move here to prevent module loading clashing. - */ - // drive->autodma = hwif->autodma; - if (hwif->ide_dma_check) { + if (hwif->ide_dma_on) { /* * Force DMAing for the beginning of the check. * Some chipsets appear to do interesting @@ -855,10 +843,7 @@ static void probe_hwif(ide_hwif_t *hwif, void (*fixup)(ide_hwif_t *hwif)) * PARANOIA!!! */ hwif->dma_off_quietly(drive); -#ifdef CONFIG_IDEDMA_ONLYDISK - if (drive->media == ide_disk) -#endif - ide_set_dma(drive); + ide_set_dma(drive); } } } @@ -966,7 +951,8 @@ static int ide_init_queue(ide_drive_t *drive) blk_queue_segment_boundary(q, 0xffff); if (!hwif->rqsize) { - if (hwif->no_lba48 || hwif->no_lba48_dma) + if ((hwif->host_flags & IDE_HFLAG_NO_LBA48) || + (hwif->host_flags & IDE_HFLAG_NO_LBA48_DMA)) hwif->rqsize = 256; else hwif->rqsize = 65536; @@ -1352,7 +1338,7 @@ static int hwif_init(ide_hwif_t *hwif) if (!hwif->sg_max_nents) hwif->sg_max_nents = PRD_ENTRIES; - hwif->sg_table = kmalloc(sizeof(struct scatterlist)*hwif->sg_max_nents, + hwif->sg_table = kzalloc(sizeof(struct scatterlist)*hwif->sg_max_nents, GFP_KERNEL); if (!hwif->sg_table) { printk(KERN_ERR "%s: unable to allocate SG table.\n", hwif->name); diff --git a/drivers/ide/ide-taskfile.c b/drivers/ide/ide-taskfile.c index aa06dafb74a..2a3c8d49834 100644 --- a/drivers/ide/ide-taskfile.c +++ b/drivers/ide/ide-taskfile.c @@ -45,6 +45,7 @@ #include <linux/hdreg.h> #include <linux/ide.h> #include <linux/bitops.h> +#include <linux/scatterlist.h> #include <asm/byteorder.h> #include <asm/irq.h> @@ -263,6 +264,7 @@ static void ide_pio_sector(ide_drive_t *drive, unsigned int write) { ide_hwif_t *hwif = drive->hwif; struct scatterlist *sg = hwif->sg_table; + struct scatterlist *cursg = hwif->cursg; struct page *page; #ifdef CONFIG_HIGHMEM unsigned long flags; @@ -270,8 +272,14 @@ static void ide_pio_sector(ide_drive_t *drive, unsigned int write) unsigned int offset; u8 *buf; - page = sg[hwif->cursg].page; - offset = sg[hwif->cursg].offset + hwif->cursg_ofs * SECTOR_SIZE; + cursg = hwif->cursg; + if (!cursg) { + cursg = sg; + hwif->cursg = sg; + } + + page = cursg->page; + offset = cursg->offset + hwif->cursg_ofs * SECTOR_SIZE; /* get the current page and offset */ page = nth_page(page, (offset >> PAGE_SHIFT)); @@ -285,8 +293,8 @@ static void ide_pio_sector(ide_drive_t *drive, unsigned int write) hwif->nleft--; hwif->cursg_ofs++; - if ((hwif->cursg_ofs * SECTOR_SIZE) == sg[hwif->cursg].length) { - hwif->cursg++; + if ((hwif->cursg_ofs * SECTOR_SIZE) == cursg->length) { + hwif->cursg = sg_next(hwif->cursg); hwif->cursg_ofs = 0; } @@ -367,6 +375,8 @@ static ide_startstop_t task_error(ide_drive_t *drive, struct request *rq, static void task_end_request(ide_drive_t *drive, struct request *rq, u8 stat) { + HWIF(drive)->cursg = NULL; + if (rq->cmd_type == REQ_TYPE_ATA_TASKFILE) { ide_task_t *task = rq->special; diff --git a/drivers/ide/ide.c b/drivers/ide/ide.c index 5e88a060df0..961e6c89728 100644 --- a/drivers/ide/ide.c +++ b/drivers/ide/ide.c @@ -100,8 +100,6 @@ static int ide_scan_direction; /* THIS was formerly 2.2.x pci=reverse */ int noautodma = 0; -EXPORT_SYMBOL(noautodma); - #ifdef CONFIG_BLK_DEV_IDEACPI int ide_noacpi = 0; int ide_noacpitfs = 1; @@ -136,8 +134,6 @@ static void init_hwif_data(ide_hwif_t *hwif, unsigned int index) hwif->bus_state = BUSSTATE_ON; - hwif->atapi_dma = 0; /* disable all atapi dma */ - init_completion(&hwif->gendev_rel_comp); default_hwif_iops(hwif); @@ -381,7 +377,6 @@ static void ide_hwif_restore(ide_hwif_t *hwif, ide_hwif_t *tmp_hwif) hwif->pio_mask = tmp_hwif->pio_mask; - hwif->atapi_dma = tmp_hwif->atapi_dma; hwif->ultra_mask = tmp_hwif->ultra_mask; hwif->mwdma_mask = tmp_hwif->mwdma_mask; hwif->swdma_mask = tmp_hwif->swdma_mask; @@ -396,8 +391,9 @@ static void ide_hwif_restore(ide_hwif_t *hwif, ide_hwif_t *tmp_hwif) hwif->cds = tmp_hwif->cds; #endif - hwif->tuneproc = tmp_hwif->tuneproc; - hwif->speedproc = tmp_hwif->speedproc; + hwif->set_pio_mode = tmp_hwif->set_pio_mode; + hwif->set_dma_mode = tmp_hwif->set_dma_mode; + hwif->mdma_filter = tmp_hwif->mdma_filter; hwif->udma_filter = tmp_hwif->udma_filter; hwif->selectproc = tmp_hwif->selectproc; hwif->reset_poll = tmp_hwif->reset_poll; @@ -417,7 +413,6 @@ static void ide_hwif_restore(ide_hwif_t *hwif, ide_hwif_t *tmp_hwif) hwif->dma_exec_cmd = tmp_hwif->dma_exec_cmd; hwif->dma_start = tmp_hwif->dma_start; hwif->ide_dma_end = tmp_hwif->ide_dma_end; - hwif->ide_dma_check = tmp_hwif->ide_dma_check; hwif->ide_dma_on = tmp_hwif->ide_dma_on; hwif->dma_off_quietly = tmp_hwif->dma_off_quietly; hwif->ide_dma_test_irq = tmp_hwif->ide_dma_test_irq; @@ -442,7 +437,6 @@ static void ide_hwif_restore(ide_hwif_t *hwif, ide_hwif_t *tmp_hwif) hwif->mmio = tmp_hwif->mmio; hwif->rqsize = tmp_hwif->rqsize; - hwif->no_lba48 = tmp_hwif->no_lba48; #ifndef CONFIG_BLK_DEV_IDECS hwif->irq = tmp_hwif->irq; @@ -460,7 +454,6 @@ static void ide_hwif_restore(ide_hwif_t *hwif, ide_hwif_t *tmp_hwif) hwif->select_data = tmp_hwif->select_data; hwif->extra_base = tmp_hwif->extra_base; hwif->extra_ports = tmp_hwif->extra_ports; - hwif->autodma = tmp_hwif->autodma; hwif->hwif_data = tmp_hwif->hwif_data; } @@ -822,7 +815,7 @@ int set_using_dma(ide_drive_t *drive, int arg) if (!drive->id || !(drive->id->capability & 1)) goto out; - if (hwif->ide_dma_check == NULL) + if (hwif->ide_dma_on == NULL) goto out; err = -EBUSY; @@ -866,8 +859,9 @@ int set_pio_mode(ide_drive_t *drive, int arg) if (arg < 0 || arg > 255) return -EINVAL; - if (!HWIF(drive)->tuneproc) + if (drive->hwif->set_pio_mode == NULL) return -ENOSYS; + if (drive->special.b.set_tune) return -EBUSY; ide_init_drive_cmd(&rq); @@ -914,6 +908,7 @@ static int generic_ide_suspend(struct device *dev, pm_message_t mesg) struct request rq; struct request_pm_state rqpm; ide_task_t args; + int ret; /* Call ACPI _GTM only once */ if (!(drive->dn % 2)) @@ -930,7 +925,14 @@ static int generic_ide_suspend(struct device *dev, pm_message_t mesg) mesg.event = PM_EVENT_FREEZE; rqpm.pm_state = mesg.event; - return ide_do_drive_cmd(drive, &rq, ide_wait); + ret = ide_do_drive_cmd(drive, &rq, ide_wait); + /* only call ACPI _PS3 after both drivers are suspended */ + if (!ret && (((drive->dn % 2) && hwif->drives[0].present + && hwif->drives[1].present) + || !hwif->drives[0].present + || !hwif->drives[1].present)) + ide_acpi_set_state(hwif, 0); + return ret; } static int generic_ide_resume(struct device *dev) @@ -943,8 +945,10 @@ static int generic_ide_resume(struct device *dev) int err; /* Call ACPI _STM only once */ - if (!(drive->dn % 2)) + if (!(drive->dn % 2)) { + ide_acpi_set_state(hwif, 1); ide_acpi_push_timing(hwif); + } ide_acpi_exec_tfs(drive); @@ -1264,7 +1268,7 @@ static int __init ide_setup(char *s) if (!strcmp(s, "ide=nodma")) { printk(" : Prevented DMA\n"); noautodma = 1; - return 1; + goto obsolete_option; } #ifdef CONFIG_IDEPCI_PCIBUS_ORDER @@ -1298,7 +1302,7 @@ static int __init ide_setup(char *s) */ if (s[0] == 'h' && s[1] == 'd' && s[2] >= 'a' && s[2] <= max_drive) { const char *hd_words[] = { - "none", "noprobe", "nowerr", "cdrom", "minus5", + "none", "noprobe", "nowerr", "cdrom", "nodma", "autotune", "noautotune", "minus8", "swapdata", "bswap", "noflush", "remap", "remap63", "scsi", NULL }; unit = s[2] - 'a'; @@ -1326,6 +1330,9 @@ static int __init ide_setup(char *s) drive->ready_stat = 0; hwif->noprobe = 0; goto done; + case -5: /* nodma */ + drive->nodma = 1; + goto done; case -6: /* "autotune" */ drive->autotune = IDE_TUNE_AUTO; goto obsolete_option; @@ -1387,7 +1394,7 @@ static int __init ide_setup(char *s) */ static const char *ide_words[] = { "noprobe", "serialize", "minus3", "minus4", - "reset", "dma", "ata66", "minus8", "minus9", + "reset", "minus6", "ata66", "minus8", "minus9", "minus10", "four", "qd65xx", "ht6560b", "cmd640_vlb", "dtc2278", "umc8672", "ali14xx", NULL }; hw = s[3] - '0'; @@ -1466,6 +1473,7 @@ static int __init ide_setup(char *s) case -10: /* minus10 */ case -9: /* minus9 */ case -8: /* minus8 */ + case -6: case -4: case -3: goto bad_option; @@ -1480,9 +1488,6 @@ static int __init ide_setup(char *s) #else goto bad_hwif; #endif - case -6: /* dma */ - hwif->autodma = 1; - goto obsolete_option; case -5: /* "reset" */ hwif->reset = 1; goto obsolete_option; @@ -1651,20 +1656,13 @@ static struct device_attribute ide_dev_attrs[] = { __ATTR_NULL }; -static int ide_uevent(struct device *dev, char **envp, int num_envp, - char *buffer, int buffer_size) +static int ide_uevent(struct device *dev, struct kobj_uevent_env *env) { ide_drive_t *drive = to_ide_device(dev); - int i = 0; - int length = 0; - - add_uevent_var(envp, num_envp, &i, buffer, buffer_size, &length, - "MEDIA=%s", media_string(drive)); - add_uevent_var(envp, num_envp, &i, buffer, buffer_size, &length, - "DRIVENAME=%s", drive->name); - add_uevent_var(envp, num_envp, &i, buffer, buffer_size, &length, - "MODALIAS=ide:m-%s", media_string(drive)); - envp[i] = NULL; + + add_uevent_var(env, "MEDIA=%s", media_string(drive)); + add_uevent_var(env, "DRIVENAME=%s", drive->name); + add_uevent_var(env, "MODALIAS=ide:m-%s", media_string(drive)); return 0; } diff --git a/drivers/ide/legacy/Makefile b/drivers/ide/legacy/Makefile index c7971061767..409822349f1 100644 --- a/drivers/ide/legacy/Makefile +++ b/drivers/ide/legacy/Makefile @@ -7,6 +7,8 @@ obj-$(CONFIG_BLK_DEV_UMC8672) += umc8672.o obj-$(CONFIG_BLK_DEV_IDECS) += ide-cs.o +obj-$(CONFIG_BLK_DEV_PLATFORM) += ide_platform.o + # Last of all obj-$(CONFIG_BLK_DEV_HD) += hd.o diff --git a/drivers/ide/legacy/ali14xx.c b/drivers/ide/legacy/ali14xx.c index 9b9c4761cb7..2f0ef9b4403 100644 --- a/drivers/ide/legacy/ali14xx.c +++ b/drivers/ide/legacy/ali14xx.c @@ -68,8 +68,6 @@ static RegInitializer initData[] __initdata = { {0x35, 0x03}, {0x00, 0x00} }; -#define ALI_MAX_PIO 4 - /* timing parameter registers for each drive */ static struct { u8 reg1, reg2, reg3, reg4; } regTab[4] = { {0x03, 0x26, 0x04, 0x27}, /* drive 0 */ @@ -109,7 +107,7 @@ static void outReg (u8 data, u8 reg) * This function computes timing parameters * and sets controller registers accordingly. */ -static void ali14xx_tune_drive (ide_drive_t *drive, u8 pio) +static void ali14xx_set_pio_mode(ide_drive_t *drive, const u8 pio) { int driveNum; int time1, time2; @@ -117,8 +115,6 @@ static void ali14xx_tune_drive (ide_drive_t *drive, u8 pio) unsigned long flags; int bus_speed = system_bus_clock(); - pio = ide_get_best_pio_mode(drive, pio, ALI_MAX_PIO); - /* calculate timing, according to PIO mode */ time1 = ide_pio_cycle_time(drive, pio); time2 = ide_pio_timings[pio].active_time; @@ -212,12 +208,12 @@ static int __init ali14xx_probe(void) hwif->chipset = ide_ali14xx; hwif->pio_mask = ATA_PIO4; - hwif->tuneproc = &ali14xx_tune_drive; + hwif->set_pio_mode = &ali14xx_set_pio_mode; hwif->mate = mate; mate->chipset = ide_ali14xx; mate->pio_mask = ATA_PIO4; - mate->tuneproc = &ali14xx_tune_drive; + mate->set_pio_mode = &ali14xx_set_pio_mode; mate->mate = hwif; mate->channel = 1; diff --git a/drivers/ide/legacy/dtc2278.c b/drivers/ide/legacy/dtc2278.c index 6c01d951d07..f1652125486 100644 --- a/drivers/ide/legacy/dtc2278.c +++ b/drivers/ide/legacy/dtc2278.c @@ -67,12 +67,10 @@ static void sub22 (char b, char c) } } -static void tune_dtc2278 (ide_drive_t *drive, u8 pio) +static void dtc2278_set_pio_mode(ide_drive_t *drive, const u8 pio) { unsigned long flags; - pio = ide_get_best_pio_mode(drive, pio, 4); - if (pio >= 3) { spin_lock_irqsave(&ide_lock, flags); /* @@ -124,7 +122,7 @@ static int __init dtc2278_probe(void) hwif->serialized = 1; hwif->chipset = ide_dtc2278; hwif->pio_mask = ATA_PIO4; - hwif->tuneproc = &tune_dtc2278; + hwif->set_pio_mode = &dtc2278_set_pio_mode; hwif->drives[0].no_unmask = 1; hwif->drives[1].no_unmask = 1; hwif->mate = mate; diff --git a/drivers/ide/legacy/ht6560b.c b/drivers/ide/legacy/ht6560b.c index bfaa2025173..2e5a9cc5c0f 100644 --- a/drivers/ide/legacy/ht6560b.c +++ b/drivers/ide/legacy/ht6560b.c @@ -199,7 +199,7 @@ static int __init try_to_init_ht6560b(void) return 1; } -static u8 ht_pio2timings(ide_drive_t *drive, u8 pio) +static u8 ht_pio2timings(ide_drive_t *drive, const u8 pio) { int active_time, recovery_time; int active_cycles, recovery_cycles; @@ -208,7 +208,6 @@ static u8 ht_pio2timings(ide_drive_t *drive, u8 pio) if (pio) { unsigned int cycle_time; - pio = ide_get_best_pio_mode(drive, pio, 5); cycle_time = ide_pio_cycle_time(drive, pio); /* @@ -277,7 +276,7 @@ static void ht_set_prefetch(ide_drive_t *drive, u8 state) #endif } -static void tune_ht6560b (ide_drive_t *drive, u8 pio) +static void ht6560b_set_pio_mode(ide_drive_t *drive, const u8 pio) { unsigned long flags; u8 timing; @@ -333,15 +332,17 @@ int __init ht6560b_init(void) hwif->chipset = ide_ht6560b; hwif->selectproc = &ht6560b_selectproc; + hwif->host_flags = IDE_HFLAG_ABUSE_PREFETCH; hwif->pio_mask = ATA_PIO5; - hwif->tuneproc = &tune_ht6560b; + hwif->set_pio_mode = &ht6560b_set_pio_mode; hwif->serialized = 1; /* is this needed? */ hwif->mate = mate; mate->chipset = ide_ht6560b; mate->selectproc = &ht6560b_selectproc; + mate->host_flags = IDE_HFLAG_ABUSE_PREFETCH; mate->pio_mask = ATA_PIO5; - mate->tuneproc = &tune_ht6560b; + mate->set_pio_mode = &ht6560b_set_pio_mode; mate->serialized = 1; /* is this needed? */ mate->mate = hwif; mate->channel = 1; diff --git a/drivers/ide/legacy/ide-cs.c b/drivers/ide/legacy/ide-cs.c index 4cdb519f983..e8e360c2619 100644 --- a/drivers/ide/legacy/ide-cs.c +++ b/drivers/ide/legacy/ide-cs.c @@ -28,7 +28,7 @@ and other provisions required by the GPL. If you do not delete the provisions above, a recipient may use your version of this file under either the MPL or the GPL. - + ======================================================================*/ #include <linux/module.h> @@ -327,13 +327,13 @@ failed: After a card is removed, ide_release() will unregister the net device, and release the PCMCIA configuration. If the device is still open, this will be postponed until it is closed. - + ======================================================================*/ void ide_release(struct pcmcia_device *link) { ide_info_t *info = link->priv; - + DEBUG(0, "ide_release(0x%p)\n", link); if (info->ndev) { @@ -353,11 +353,12 @@ void ide_release(struct pcmcia_device *link) stuff to run after an event is received. A CARD_REMOVAL event also sets some flags to discourage the ide drivers from talking to the ports. - + ======================================================================*/ static struct pcmcia_device_id ide_ids[] = { PCMCIA_DEVICE_FUNC_ID(4), + PCMCIA_DEVICE_MANF_CARD(0x0000, 0x0000), /* Corsair */ PCMCIA_DEVICE_MANF_CARD(0x0007, 0x0000), /* Hitachi */ PCMCIA_DEVICE_MANF_CARD(0x000a, 0x0000), /* I-O Data CFA */ PCMCIA_DEVICE_MANF_CARD(0x001c, 0x0001), /* Mitsubishi CFA */ @@ -366,7 +367,7 @@ static struct pcmcia_device_id ide_ids[] = { PCMCIA_DEVICE_MANF_CARD(0x0098, 0x0000), /* Toshiba */ PCMCIA_DEVICE_MANF_CARD(0x00a4, 0x002d), PCMCIA_DEVICE_MANF_CARD(0x00ce, 0x0000), /* Samsung */ - PCMCIA_DEVICE_MANF_CARD(0x0319, 0x0000), /* Hitachi */ + PCMCIA_DEVICE_MANF_CARD(0x0319, 0x0000), /* Hitachi */ PCMCIA_DEVICE_MANF_CARD(0x2080, 0x0001), PCMCIA_DEVICE_MANF_CARD(0x4e01, 0x0100), /* Viking CFA */ PCMCIA_DEVICE_MANF_CARD(0x4e01, 0x0200), /* Lexar, Viking CFA */ @@ -384,6 +385,7 @@ static struct pcmcia_device_id ide_ids[] = { PCMCIA_DEVICE_PROD_ID12("FREECOM", "PCCARD-IDE", 0x5714cbf7, 0x48e0ab8e), PCMCIA_DEVICE_PROD_ID12("HITACHI", "FLASH", 0xf4f43949, 0x9eb86aae), PCMCIA_DEVICE_PROD_ID12("HITACHI", "microdrive", 0xf4f43949, 0xa6d76178), + PCMCIA_DEVICE_PROD_ID12("Hyperstone", "Model1", 0x3d5b9ef5, 0xca6ab420), PCMCIA_DEVICE_PROD_ID12("IBM", "microdrive", 0xb569a6e5, 0xa6d76178), PCMCIA_DEVICE_PROD_ID12("IBM", "IBM17JSSFP20", 0xb569a6e5, 0xf2508753), PCMCIA_DEVICE_PROD_ID12("KINGSTON", "CF8GB", 0x2e6d1829, 0xacbe682e), diff --git a/drivers/ide/legacy/ide_platform.c b/drivers/ide/legacy/ide_platform.c new file mode 100644 index 00000000000..b992b2b91fe --- /dev/null +++ b/drivers/ide/legacy/ide_platform.c @@ -0,0 +1,182 @@ +/* + * Platform IDE driver + * + * Copyright (C) 2007 MontaVista Software + * + * Maintainer: Kumar Gala <galak@kernel.crashing.org> + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ + +#include <linux/types.h> +#include <linux/init.h> +#include <linux/kernel.h> +#include <linux/ide.h> +#include <linux/ioport.h> +#include <linux/module.h> +#include <linux/pata_platform.h> +#include <linux/platform_device.h> +#include <linux/io.h> + +static struct { + void __iomem *plat_ide_mapbase; + void __iomem *plat_ide_alt_mapbase; + ide_hwif_t *hwif; + int index; +} hwif_prop; + +static ide_hwif_t *__devinit plat_ide_locate_hwif(void __iomem *base, + void __iomem *ctrl, struct pata_platform_info *pdata, int irq, + int mmio) +{ + unsigned long port = (unsigned long)base; + ide_hwif_t *hwif; + int index, i; + + for (index = 0; index < MAX_HWIFS; ++index) { + hwif = ide_hwifs + index; + if (hwif->io_ports[IDE_DATA_OFFSET] == port) + goto found; + } + + for (index = 0; index < MAX_HWIFS; ++index) { + hwif = ide_hwifs + index; + if (hwif->io_ports[IDE_DATA_OFFSET] == 0) + goto found; + } + + return NULL; + +found: + + hwif->hw.io_ports[IDE_DATA_OFFSET] = port; + + port += (1 << pdata->ioport_shift); + for (i = IDE_ERROR_OFFSET; i <= IDE_STATUS_OFFSET; + i++, port += (1 << pdata->ioport_shift)) + hwif->hw.io_ports[i] = port; + + hwif->hw.io_ports[IDE_CONTROL_OFFSET] = (unsigned long)ctrl; + + memcpy(hwif->io_ports, hwif->hw.io_ports, sizeof(hwif->hw.io_ports)); + hwif->hw.irq = hwif->irq = irq; + + hwif->hw.dma = NO_DMA; + hwif->chipset = hwif->hw.chipset = ide_generic; + + if (mmio) { + hwif->mmio = 1; + default_hwif_mmiops(hwif); + } + + hwif_prop.hwif = hwif; + hwif_prop.index = index; + + return hwif; +} + +static int __devinit plat_ide_probe(struct platform_device *pdev) +{ + struct resource *res_base, *res_alt, *res_irq; + ide_hwif_t *hwif; + struct pata_platform_info *pdata; + int ret = 0; + int mmio = 0; + + pdata = pdev->dev.platform_data; + + /* get a pointer to the register memory */ + res_base = platform_get_resource(pdev, IORESOURCE_IO, 0); + res_alt = platform_get_resource(pdev, IORESOURCE_IO, 1); + + if (!res_base || !res_alt) { + res_base = platform_get_resource(pdev, IORESOURCE_MEM, 0); + res_alt = platform_get_resource(pdev, IORESOURCE_MEM, 1); + if (!res_base || !res_alt) { + ret = -ENOMEM; + goto out; + } + mmio = 1; + } + + res_irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0); + if (!res_irq) { + ret = -EINVAL; + goto out; + } + + if (mmio) { + hwif_prop.plat_ide_mapbase = devm_ioremap(&pdev->dev, + res_base->start, res_base->end - res_base->start + 1); + hwif_prop.plat_ide_alt_mapbase = devm_ioremap(&pdev->dev, + res_alt->start, res_alt->end - res_alt->start + 1); + } else { + hwif_prop.plat_ide_mapbase = devm_ioport_map(&pdev->dev, + res_base->start, res_base->end - res_base->start + 1); + hwif_prop.plat_ide_alt_mapbase = devm_ioport_map(&pdev->dev, + res_alt->start, res_alt->end - res_alt->start + 1); + } + + hwif = plat_ide_locate_hwif(hwif_prop.plat_ide_mapbase, + hwif_prop.plat_ide_alt_mapbase, pdata, res_irq->start, mmio); + + if (!hwif) { + ret = -ENODEV; + goto out; + } + hwif->gendev.parent = &pdev->dev; + hwif->noprobe = 0; + + probe_hwif_init(hwif); + + platform_set_drvdata(pdev, hwif); + ide_proc_register_port(hwif); + + return 0; + +out: + return ret; +} + +static int __devexit plat_ide_remove(struct platform_device *pdev) +{ + ide_hwif_t *hwif = pdev->dev.driver_data; + + if (hwif != hwif_prop.hwif) { + dev_printk(KERN_DEBUG, &pdev->dev, "%s: hwif value error", + pdev->name); + } else { + ide_unregister(hwif_prop.index); + hwif_prop.index = 0; + hwif_prop.hwif = NULL; + } + + return 0; +} + +static struct platform_driver platform_ide_driver = { + .driver = { + .name = "pata_platform", + }, + .probe = plat_ide_probe, + .remove = __devexit_p(plat_ide_remove), +}; + +static int __init platform_ide_init(void) +{ + return platform_driver_register(&platform_ide_driver); +} + +static void __exit platform_ide_exit(void) +{ + platform_driver_unregister(&platform_ide_driver); +} + +MODULE_DESCRIPTION("Platform IDE driver"); +MODULE_LICENSE("GPL"); + +module_init(platform_ide_init); +module_exit(platform_ide_exit); diff --git a/drivers/ide/legacy/qd65xx.c b/drivers/ide/legacy/qd65xx.c index 8b87a424094..0c81d2d0b94 100644 --- a/drivers/ide/legacy/qd65xx.c +++ b/drivers/ide/legacy/qd65xx.c @@ -224,15 +224,14 @@ static void qd_set_timing (ide_drive_t *drive, u8 timing) printk(KERN_DEBUG "%s: %#x\n", drive->name, timing); } -/* - * qd6500_tune_drive - */ - -static void qd6500_tune_drive (ide_drive_t *drive, u8 pio) +static void qd6500_set_pio_mode(ide_drive_t *drive, const u8 pio) { int active_time = 175; int recovery_time = 415; /* worst case values from the dos driver */ + /* + * FIXME: use "pio" value + */ if (drive->id && !qd_find_disk_type(drive, &active_time, &recovery_time) && drive->id->tPIO && (drive->id->field_valid & 0x02) && drive->id->eide_pio >= 240) { @@ -246,11 +245,7 @@ static void qd6500_tune_drive (ide_drive_t *drive, u8 pio) qd_set_timing(drive, qd6500_compute_timing(HWIF(drive), active_time, recovery_time)); } -/* - * qd6580_tune_drive - */ - -static void qd6580_tune_drive (ide_drive_t *drive, u8 pio) +static void qd6580_set_pio_mode(ide_drive_t *drive, const u8 pio) { int base = HWIF(drive)->select_data; unsigned int cycle_time; @@ -258,7 +253,6 @@ static void qd6580_tune_drive (ide_drive_t *drive, u8 pio) int recovery_time = 415; /* worst case values from the dos driver */ if (drive->id && !qd_find_disk_type(drive, &active_time, &recovery_time)) { - pio = ide_get_best_pio_mode(drive, pio, 4); cycle_time = ide_pio_cycle_time(drive, pio); switch (pio) { @@ -335,8 +329,7 @@ static int __init qd_testreg(int port) */ static void __init qd_setup(ide_hwif_t *hwif, int base, int config, - unsigned int data0, unsigned int data1, - void (*tuneproc) (ide_drive_t *, u8 pio)) + unsigned int data0, unsigned int data1) { hwif->chipset = ide_qd65xx; hwif->channel = hwif->index; @@ -347,8 +340,6 @@ static void __init qd_setup(ide_hwif_t *hwif, int base, int config, hwif->drives[0].io_32bit = hwif->drives[1].io_32bit = 1; hwif->pio_mask = ATA_PIO4; - hwif->tuneproc = tuneproc; - probe_hwif_init(hwif); } /* @@ -361,7 +352,7 @@ static void __exit qd_unsetup(ide_hwif_t *hwif) { u8 config = hwif->config_data; int base = hwif->select_data; - void *tuneproc = (void *) hwif->tuneproc; + void *set_pio_mode = (void *)hwif->set_pio_mode; if (hwif->chipset != ide_qd65xx) return; @@ -369,12 +360,12 @@ static void __exit qd_unsetup(ide_hwif_t *hwif) printk(KERN_NOTICE "%s: back to defaults\n", hwif->name); hwif->selectproc = NULL; - hwif->tuneproc = NULL; + hwif->set_pio_mode = NULL; - if (tuneproc == (void *) qd6500_tune_drive) { + if (set_pio_mode == (void *)qd6500_set_pio_mode) { // will do it for both qd_write_reg(QD6500_DEF_DATA, QD_TIMREG(&hwif->drives[0])); - } else if (tuneproc == (void *) qd6580_tune_drive) { + } else if (set_pio_mode == (void *)qd6580_set_pio_mode) { if (QD_CONTROL(hwif) & QD_CONTR_SEC_DISABLED) { qd_write_reg(QD6580_DEF_DATA, QD_TIMREG(&hwif->drives[0])); qd_write_reg(QD6580_DEF_DATA2, QD_TIMREG(&hwif->drives[1])); @@ -424,8 +415,11 @@ static int __init qd_probe(int base) return 1; } - qd_setup(hwif, base, config, QD6500_DEF_DATA, QD6500_DEF_DATA, - &qd6500_tune_drive); + qd_setup(hwif, base, config, QD6500_DEF_DATA, QD6500_DEF_DATA); + + hwif->set_pio_mode = &qd6500_set_pio_mode; + + probe_hwif_init(hwif); ide_proc_register_port(hwif); @@ -455,8 +449,12 @@ static int __init qd_probe(int base) printk(KERN_INFO "%s: qd6580: single IDE board\n", hwif->name); qd_setup(hwif, base, config | (control << 8), - QD6580_DEF_DATA, QD6580_DEF_DATA2, - &qd6580_tune_drive); + QD6580_DEF_DATA, QD6580_DEF_DATA2); + + hwif->set_pio_mode = &qd6580_set_pio_mode; + + probe_hwif_init(hwif); + qd_write_reg(QD_DEF_CONTR,QD_CONTROL_PORT); ide_proc_register_port(hwif); @@ -472,11 +470,19 @@ static int __init qd_probe(int base) hwif->name, mate->name); qd_setup(hwif, base, config | (control << 8), - QD6580_DEF_DATA, QD6580_DEF_DATA, - &qd6580_tune_drive); + QD6580_DEF_DATA, QD6580_DEF_DATA); + + hwif->set_pio_mode = &qd6580_set_pio_mode; + + probe_hwif_init(hwif); + qd_setup(mate, base, config | (control << 8), - QD6580_DEF_DATA2, QD6580_DEF_DATA2, - &qd6580_tune_drive); + QD6580_DEF_DATA2, QD6580_DEF_DATA2); + + mate->set_pio_mode = &qd6580_set_pio_mode; + + probe_hwif_init(mate); + qd_write_reg(QD_DEF_CONTR,QD_CONTROL_PORT); ide_proc_register_port(hwif); diff --git a/drivers/ide/legacy/umc8672.c b/drivers/ide/legacy/umc8672.c index d2862e638bc..1151c92dd53 100644 --- a/drivers/ide/legacy/umc8672.c +++ b/drivers/ide/legacy/umc8672.c @@ -105,12 +105,11 @@ static void umc_set_speeds (u8 speeds[]) speeds[0], speeds[1], speeds[2], speeds[3]); } -static void tune_umc (ide_drive_t *drive, u8 pio) +static void umc_set_pio_mode(ide_drive_t *drive, const u8 pio) { unsigned long flags; ide_hwgroup_t *hwgroup = ide_hwifs[HWIF(drive)->index^1].hwgroup; - pio = ide_get_best_pio_mode(drive, pio, 4); printk("%s: setting umc8672 to PIO mode%d (speed %d)\n", drive->name, pio, pio_to_umc[pio]); spin_lock_irqsave(&ide_lock, flags); @@ -150,12 +149,12 @@ static int __init umc8672_probe(void) hwif->chipset = ide_umc8672; hwif->pio_mask = ATA_PIO4; - hwif->tuneproc = &tune_umc; + hwif->set_pio_mode = &umc_set_pio_mode; hwif->mate = mate; mate->chipset = ide_umc8672; mate->pio_mask = ATA_PIO4; - mate->tuneproc = &tune_umc; + mate->set_pio_mode = &umc_set_pio_mode; mate->mate = hwif; mate->channel = 1; diff --git a/drivers/ide/mips/au1xxx-ide.c b/drivers/ide/mips/au1xxx-ide.c index 2ba6a054b86..2f322d7e881 100644 --- a/drivers/ide/mips/au1xxx-ide.c +++ b/drivers/ide/mips/au1xxx-ide.c @@ -99,20 +99,9 @@ void auide_outsw(unsigned long port, void *addr, u32 count) #endif -static void auide_tune_drive(ide_drive_t *drive, byte pio) +static void au1xxx_set_pio_mode(ide_drive_t *drive, const u8 pio) { - int mem_sttime; - int mem_stcfg; - u8 speed; - - /* get the best pio mode for the drive */ - pio = ide_get_best_pio_mode(drive, pio, 4); - - printk(KERN_INFO "%s: setting Au1XXX IDE to PIO mode%d\n", - drive->name, pio); - - mem_sttime = 0; - mem_stcfg = au_readl(MEM_STCFG2); + int mem_sttime = 0, mem_stcfg = au_readl(MEM_STCFG2); /* set pio mode! */ switch(pio) { @@ -170,23 +159,11 @@ static void auide_tune_drive(ide_drive_t *drive, byte pio) au_writel(mem_sttime,MEM_STTIME2); au_writel(mem_stcfg,MEM_STCFG2); - - speed = pio + XFER_PIO_0; - ide_config_drive_speed(drive, speed); } -static int auide_tune_chipset (ide_drive_t *drive, u8 speed) +static void auide_set_dma_mode(ide_drive_t *drive, const u8 speed) { - int mem_sttime; - int mem_stcfg; - - mem_sttime = 0; - mem_stcfg = au_readl(MEM_STCFG2); - - if (speed >= XFER_PIO_0 && speed <= XFER_PIO_4) { - auide_tune_drive(drive, speed - XFER_PIO_0); - return 0; - } + int mem_sttime = 0, mem_stcfg = au_readl(MEM_STCFG2); switch(speed) { #ifdef CONFIG_BLK_DEV_IDE_AU1XXX_MDMA2_DBDMA @@ -222,16 +199,11 @@ static int auide_tune_chipset (ide_drive_t *drive, u8 speed) break; #endif default: - return 1; + return; } - if (ide_config_drive_speed(drive, speed)) - return 1; - au_writel(mem_sttime,MEM_STTIME2); au_writel(mem_stcfg,MEM_STCFG2); - - return 0; } /* @@ -324,7 +296,7 @@ static int auide_build_dmatable(ide_drive_t *drive) cur_addr += tc; cur_len -= tc; } - sg++; + sg = sg_next(sg); i--; } @@ -379,11 +351,18 @@ static int auide_dma_setup(ide_drive_t *drive) return 0; } -static int auide_dma_check(ide_drive_t *drive) +static u8 auide_mdma_filter(ide_drive_t *drive) { - u8 speed = ide_max_dma_mode(drive); + /* + * FIXME: ->white_list and ->black_list are based on completely bogus + * ->ide_dma_check implementation which didn't set neither the host + * controller timings nor the device for the desired transfer mode. + * + * They should be either removed or 0x00 MWDMA mask should be + * returned for devices on the ->black_list. + */ - if( dbdma_init_done == 0 ){ + if (dbdma_init_done == 0) { auide_hwif.white_list = ide_in_drive_list(drive->id, dma_white_list); auide_hwif.black_list = ide_in_drive_list(drive->id, @@ -394,22 +373,11 @@ static int auide_dma_check(ide_drive_t *drive) } /* Is the drive in our DMA black list? */ - - if ( auide_hwif.black_list ) { - drive->using_dma = 0; - - /* Borrowed the warning message from ide-dma.c */ - + if (auide_hwif.black_list) printk(KERN_WARNING "%s: Disabling DMA for %s (blacklisted)\n", - drive->name, drive->id->model); - } - else - drive->using_dma = 1; - - if (drive->autodma && (speed & XFER_MODE) != XFER_PIO) - return 0; + drive->name, drive->id->model); - return -1; + return drive->hwif->mwdma_mask; } static int auide_dma_test_irq(ide_drive_t *drive) @@ -693,6 +661,7 @@ static int au_ide_probe(struct device *dev) #endif hwif->pio_mask = ATA_PIO4; + hwif->host_flags = IDE_HFLAG_POST_SET_MODE; hwif->noprobe = 0; hwif->drives[0].unmask = 1; @@ -712,14 +681,15 @@ static int au_ide_probe(struct device *dev) hwif->OUTSW = auide_outsw; #endif - hwif->tuneproc = &auide_tune_drive; - hwif->speedproc = &auide_tune_chipset; + hwif->set_pio_mode = &au1xxx_set_pio_mode; + hwif->set_dma_mode = &auide_set_dma_mode; #ifdef CONFIG_BLK_DEV_IDE_AU1XXX_MDMA2_DBDMA hwif->dma_off_quietly = &auide_dma_off_quietly; hwif->dma_timeout = &auide_dma_timeout; - hwif->ide_dma_check = &auide_dma_check; + hwif->mdma_filter = &auide_mdma_filter; + hwif->dma_exec_cmd = &auide_dma_exec_cmd; hwif->dma_start = &auide_dma_start; hwif->ide_dma_end = &auide_dma_end; @@ -729,20 +699,12 @@ static int au_ide_probe(struct device *dev) hwif->dma_host_on = &auide_dma_host_on; hwif->dma_lost_irq = &auide_dma_lost_irq; hwif->ide_dma_on = &auide_dma_on; - - hwif->autodma = 1; - hwif->drives[0].autodma = hwif->autodma; - hwif->drives[1].autodma = hwif->autodma; - hwif->atapi_dma = 1; - #else /* !CONFIG_BLK_DEV_IDE_AU1XXX_MDMA2_DBDMA */ - hwif->autodma = 0; hwif->channel = 0; hwif->hold = 1; hwif->select_data = 0; /* no chipset-specific code */ hwif->config_data = 0; /* no chipset-specific code */ - hwif->drives[0].autodma = 0; hwif->drives[0].autotune = 1; /* 1=autotune, 2=noautotune, 0=default */ #endif hwif->drives[0].no_io_32bit = 1; diff --git a/drivers/ide/pci/aec62xx.c b/drivers/ide/pci/aec62xx.c index 74432830abf..b3dc12a70d5 100644 --- a/drivers/ide/pci/aec62xx.c +++ b/drivers/ide/pci/aec62xx.c @@ -1,5 +1,5 @@ /* - * linux/drivers/ide/pci/aec62xx.c Version 0.24 May 24, 2007 + * linux/drivers/ide/pci/aec62xx.c Version 0.26 Sep 1, 2007 * * Copyright (C) 1999-2002 Andre Hedrick <andre@linux-ide.org> * Copyright (C) 2007 MontaVista Software, Inc. <source@mvista.com> @@ -87,12 +87,11 @@ static u8 pci_bus_clock_list_ultra (u8 speed, struct chipset_bus_clock_list_entr return chipset_table->ultra_settings; } -static int aec6210_tune_chipset (ide_drive_t *drive, u8 xferspeed) +static void aec6210_set_mode(ide_drive_t *drive, const u8 speed) { ide_hwif_t *hwif = HWIF(drive); struct pci_dev *dev = hwif->pci_dev; u16 d_conf = 0; - u8 speed = ide_rate_filter(drive, xferspeed); u8 ultra = 0, ultra_conf = 0; u8 tmp0 = 0, tmp1 = 0, tmp2 = 0; unsigned long flags; @@ -112,14 +111,12 @@ static int aec6210_tune_chipset (ide_drive_t *drive, u8 xferspeed) tmp2 = ((ultra_conf << (2*drive->dn)) | (tmp1 & ~(3 << (2*drive->dn)))); pci_write_config_byte(dev, 0x54, tmp2); local_irq_restore(flags); - return(ide_config_drive_speed(drive, speed)); } -static int aec6260_tune_chipset (ide_drive_t *drive, u8 xferspeed) +static void aec6260_set_mode(ide_drive_t *drive, const u8 speed) { ide_hwif_t *hwif = HWIF(drive); struct pci_dev *dev = hwif->pci_dev; - u8 speed = ide_rate_filter(drive, xferspeed); u8 unit = (drive->select.b.unit & 0x01); u8 tmp1 = 0, tmp2 = 0; u8 ultra = 0, drive_conf = 0, ultra_conf = 0; @@ -137,24 +134,11 @@ static int aec6260_tune_chipset (ide_drive_t *drive, u8 xferspeed) tmp2 = ((ultra_conf << (4*unit)) | (tmp1 & ~(7 << (4*unit)))); pci_write_config_byte(dev, (0x44|hwif->channel), tmp2); local_irq_restore(flags); - return(ide_config_drive_speed(drive, speed)); } -static void aec62xx_tune_drive (ide_drive_t *drive, u8 pio) +static void aec_set_pio_mode(ide_drive_t *drive, const u8 pio) { - pio = ide_get_best_pio_mode(drive, pio, 4); - (void) HWIF(drive)->speedproc(drive, pio + XFER_PIO_0); -} - -static int aec62xx_config_drive_xfer_rate (ide_drive_t *drive) -{ - if (ide_tune_dma(drive)) - return 0; - - if (ide_use_fast_pio(drive)) - aec62xx_tune_drive(drive, 255); - - return -1; + drive->hwif->set_dma_mode(drive, pio + XFER_PIO_0); } static void aec62xx_dma_lost_irq (ide_drive_t *drive) @@ -200,114 +184,78 @@ static unsigned int __devinit init_chipset_aec62xx(struct pci_dev *dev, const ch static void __devinit init_hwif_aec62xx(ide_hwif_t *hwif) { struct pci_dev *dev = hwif->pci_dev; - u8 reg54 = 0, mask = hwif->channel ? 0xf0 : 0x0f; - unsigned long flags; - hwif->tuneproc = &aec62xx_tune_drive; + hwif->set_pio_mode = &aec_set_pio_mode; - if (dev->device == PCI_DEVICE_ID_ARTOP_ATP850UF) { - if(hwif->mate) - hwif->mate->serialized = hwif->serialized = 1; - hwif->speedproc = &aec6210_tune_chipset; - } else - hwif->speedproc = &aec6260_tune_chipset; + if (dev->device == PCI_DEVICE_ID_ARTOP_ATP850UF) + hwif->set_dma_mode = &aec6210_set_mode; + else + hwif->set_dma_mode = &aec6260_set_mode; - if (!hwif->dma_base) { - hwif->drives[0].autotune = hwif->drives[1].autotune = 1; + if (hwif->dma_base == 0) return; - } - - hwif->ultra_mask = hwif->cds->udma_mask; - hwif->mwdma_mask = 0x07; - hwif->ide_dma_check = &aec62xx_config_drive_xfer_rate; hwif->dma_lost_irq = &aec62xx_dma_lost_irq; - if (dev->device == PCI_DEVICE_ID_ARTOP_ATP850UF) { - spin_lock_irqsave(&ide_lock, flags); - pci_read_config_byte (dev, 0x54, ®54); - pci_write_config_byte(dev, 0x54, (reg54 & ~mask)); - spin_unlock_irqrestore(&ide_lock, flags); - } else if (hwif->cbl != ATA_CBL_PATA40_SHORT) { + if (dev->device == PCI_DEVICE_ID_ARTOP_ATP850UF) + return; + + if (hwif->cbl != ATA_CBL_PATA40_SHORT) { u8 ata66 = 0, mask = hwif->channel ? 0x02 : 0x01; pci_read_config_byte(hwif->pci_dev, 0x49, &ata66); hwif->cbl = (ata66 & mask) ? ATA_CBL_PATA40 : ATA_CBL_PATA80; } - - if (!noautodma) - hwif->autodma = 1; - hwif->drives[0].autodma = hwif->drives[1].autodma = hwif->autodma; -} - -static int __devinit init_setup_aec62xx(struct pci_dev *dev, ide_pci_device_t *d) -{ - return ide_setup_pci_device(dev, d); -} - -static int __devinit init_setup_aec6x80(struct pci_dev *dev, ide_pci_device_t *d) -{ - unsigned long dma_base = pci_resource_start(dev, 4); - - if (inb(dma_base + 2) & 0x10) { - d->name = (dev->device == PCI_DEVICE_ID_ARTOP_ATP865R) ? - "AEC6880R" : "AEC6880"; - d->udma_mask = 0x7f; /* udma0-6 */ - } - - return ide_setup_pci_device(dev, d); } static ide_pci_device_t aec62xx_chipsets[] __devinitdata = { { /* 0 */ .name = "AEC6210", - .init_setup = init_setup_aec62xx, .init_chipset = init_chipset_aec62xx, .init_hwif = init_hwif_aec62xx, - .autodma = AUTODMA, .enablebits = {{0x4a,0x02,0x02}, {0x4a,0x04,0x04}}, - .bootable = OFF_BOARD, + .host_flags = IDE_HFLAG_SERIALIZE | + IDE_HFLAG_NO_ATAPI_DMA | + IDE_HFLAG_OFF_BOARD, .pio_mask = ATA_PIO4, - .udma_mask = 0x07, /* udma0-2 */ + .mwdma_mask = ATA_MWDMA2, + .udma_mask = ATA_UDMA2, },{ /* 1 */ .name = "AEC6260", - .init_setup = init_setup_aec62xx, .init_chipset = init_chipset_aec62xx, .init_hwif = init_hwif_aec62xx, - .autodma = NOAUTODMA, - .bootable = OFF_BOARD, + .host_flags = IDE_HFLAG_NO_ATAPI_DMA | IDE_HFLAG_NO_AUTODMA | + IDE_HFLAG_OFF_BOARD, .pio_mask = ATA_PIO4, - .udma_mask = 0x1f, /* udma0-4 */ + .mwdma_mask = ATA_MWDMA2, + .udma_mask = ATA_UDMA4, },{ /* 2 */ .name = "AEC6260R", - .init_setup = init_setup_aec62xx, .init_chipset = init_chipset_aec62xx, .init_hwif = init_hwif_aec62xx, - .autodma = AUTODMA, .enablebits = {{0x4a,0x02,0x02}, {0x4a,0x04,0x04}}, - .bootable = NEVER_BOARD, + .host_flags = IDE_HFLAG_NO_ATAPI_DMA, .pio_mask = ATA_PIO4, - .udma_mask = 0x1f, /* udma0-4 */ + .mwdma_mask = ATA_MWDMA2, + .udma_mask = ATA_UDMA4, },{ /* 3 */ .name = "AEC6280", - .init_setup = init_setup_aec6x80, .init_chipset = init_chipset_aec62xx, .init_hwif = init_hwif_aec62xx, - .autodma = AUTODMA, - .bootable = OFF_BOARD, + .host_flags = IDE_HFLAG_NO_ATAPI_DMA | IDE_HFLAG_OFF_BOARD, .pio_mask = ATA_PIO4, - .udma_mask = 0x3f, /* udma0-5 */ + .mwdma_mask = ATA_MWDMA2, + .udma_mask = ATA_UDMA5, },{ /* 4 */ .name = "AEC6280R", - .init_setup = init_setup_aec6x80, .init_chipset = init_chipset_aec62xx, .init_hwif = init_hwif_aec62xx, - .autodma = AUTODMA, .enablebits = {{0x4a,0x02,0x02}, {0x4a,0x04,0x04}}, - .bootable = OFF_BOARD, + .host_flags = IDE_HFLAG_NO_ATAPI_DMA | IDE_HFLAG_OFF_BOARD, .pio_mask = ATA_PIO4, - .udma_mask = 0x3f, /* udma0-5 */ + .mwdma_mask = ATA_MWDMA2, + .udma_mask = ATA_UDMA5, } }; @@ -325,17 +273,29 @@ static ide_pci_device_t aec62xx_chipsets[] __devinitdata = { static int __devinit aec62xx_init_one(struct pci_dev *dev, const struct pci_device_id *id) { - ide_pci_device_t d = aec62xx_chipsets[id->driver_data]; + ide_pci_device_t d; + u8 idx = id->driver_data; + + d = aec62xx_chipsets[idx]; + + if (idx == 3 || idx == 4) { + unsigned long dma_base = pci_resource_start(dev, 4); + + if (inb(dma_base + 2) & 0x10) { + d.name = (idx == 4) ? "AEC6880R" : "AEC6880"; + d.udma_mask = ATA_UDMA6; + } + } - return d.init_setup(dev, &d); + return ide_setup_pci_device(dev, &d); } -static struct pci_device_id aec62xx_pci_tbl[] = { - { PCI_VENDOR_ID_ARTOP, PCI_DEVICE_ID_ARTOP_ATP850UF, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, - { PCI_VENDOR_ID_ARTOP, PCI_DEVICE_ID_ARTOP_ATP860, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 1 }, - { PCI_VENDOR_ID_ARTOP, PCI_DEVICE_ID_ARTOP_ATP860R, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 2 }, - { PCI_VENDOR_ID_ARTOP, PCI_DEVICE_ID_ARTOP_ATP865, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 3 }, - { PCI_VENDOR_ID_ARTOP, PCI_DEVICE_ID_ARTOP_ATP865R, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 4 }, +static const struct pci_device_id aec62xx_pci_tbl[] = { + { PCI_VDEVICE(ARTOP, PCI_DEVICE_ID_ARTOP_ATP850UF), 0 }, + { PCI_VDEVICE(ARTOP, PCI_DEVICE_ID_ARTOP_ATP860), 1 }, + { PCI_VDEVICE(ARTOP, PCI_DEVICE_ID_ARTOP_ATP860R), 2 }, + { PCI_VDEVICE(ARTOP, PCI_DEVICE_ID_ARTOP_ATP865), 3 }, + { PCI_VDEVICE(ARTOP, PCI_DEVICE_ID_ARTOP_ATP865R), 4 }, { 0, }, }; MODULE_DEVICE_TABLE(pci, aec62xx_pci_tbl); diff --git a/drivers/ide/pci/alim15x3.c b/drivers/ide/pci/alim15x3.c index 11ecb618007..8ee2b48d105 100644 --- a/drivers/ide/pci/alim15x3.c +++ b/drivers/ide/pci/alim15x3.c @@ -1,5 +1,5 @@ /* - * linux/drivers/ide/pci/alim15x3.c Version 0.25 Jun 9 2007 + * linux/drivers/ide/pci/alim15x3.c Version 0.27 Aug 27 2007 * * Copyright (C) 1998-2000 Michel Aubry, Maintainer * Copyright (C) 1998-2000 Andrzej Krzysztofowicz, Maintainer @@ -283,17 +283,14 @@ static int ali_get_info (char *buffer, char **addr, off_t offset, int count) #endif /* defined(DISPLAY_ALI_TIMINGS) && defined(CONFIG_IDE_PROC_FS) */ /** - * ali15x3_tune_pio - set up chipset for PIO mode - * @drive: drive to tune - * @pio: desired mode + * ali_set_pio_mode - set host controller for PIO mode + * @drive: drive + * @pio: PIO mode number * - * Select the best PIO mode for the drive in question. - * Then program the controller for this mode. - * - * Returns the PIO mode programmed. + * Program the controller for the given PIO mode. */ - -static u8 ali15x3_tune_pio (ide_drive_t *drive, u8 pio) + +static void ali_set_pio_mode(ide_drive_t *drive, const u8 pio) { ide_hwif_t *hwif = HWIF(drive); struct pci_dev *dev = hwif->pci_dev; @@ -306,7 +303,6 @@ static u8 ali15x3_tune_pio (ide_drive_t *drive, u8 pio) u8 cd_dma_fifo = 0; int unit = drive->select.b.unit & 1; - pio = ide_get_best_pio_mode(drive, pio, 5); s_time = ide_pio_timings[pio].setup_time; a_time = ide_pio_timings[pio].active_time; if ((s_clc = (s_time * bus_speed + 999) / 1000) >= 8) @@ -359,23 +355,6 @@ static u8 ali15x3_tune_pio (ide_drive_t *drive, u8 pio) * { 25, 70, 25 }, PIO Mode 4 with IORDY ns * { 20, 50, 30 } PIO Mode 5 with IORDY (nonstandard) */ - - return pio; -} - -/** - * ali15x3_tune_drive - set up drive for PIO mode - * @drive: drive to tune - * @pio: desired mode - * - * Program the controller with the best PIO timing for the given drive. - * Then set up the drive itself. - */ - -static void ali15x3_tune_drive (ide_drive_t *drive, u8 pio) -{ - pio = ali15x3_tune_pio(drive, pio); - (void) ide_config_drive_speed(drive, XFER_PIO_0 + pio); } /** @@ -407,24 +386,25 @@ static u8 ali_udma_filter(ide_drive_t *drive) } /** - * ali15x3_tune_chipset - set up chipset/drive for new speed - * @drive: drive to configure for - * @xferspeed: desired speed + * ali_set_dma_mode - set host controller for DMA mode + * @drive: drive + * @speed: DMA mode * * Configure the hardware for the desired IDE transfer mode. - * We also do the needed drive configuration through helpers */ - -static int ali15x3_tune_chipset (ide_drive_t *drive, u8 xferspeed) + +static void ali_set_dma_mode(ide_drive_t *drive, const u8 speed) { ide_hwif_t *hwif = HWIF(drive); struct pci_dev *dev = hwif->pci_dev; - u8 speed = ide_rate_filter(drive, xferspeed); u8 speed1 = speed; u8 unit = (drive->select.b.unit & 0x01); u8 tmpbyte = 0x00; int m5229_udma = (hwif->channel) ? 0x57 : 0x56; + if (speed < XFER_PIO_0) + return; + if (speed == XFER_UDMA_6) speed1 = 0x47; @@ -437,8 +417,9 @@ static int ali15x3_tune_chipset (ide_drive_t *drive, u8 xferspeed) tmpbyte &= ultra_enable; pci_write_config_byte(dev, m5229_udma, tmpbyte); - if (speed < XFER_SW_DMA_0) - (void) ali15x3_tune_pio(drive, speed - XFER_PIO_0); + /* + * FIXME: Oh, my... DMA timings are never set. + */ } else { pci_read_config_byte(dev, m5229_udma, &tmpbyte); tmpbyte &= (0x0f << ((1-unit) << 2)); @@ -453,27 +434,6 @@ static int ali15x3_tune_chipset (ide_drive_t *drive, u8 xferspeed) pci_write_config_byte(dev, 0x4b, tmpbyte); } } - return (ide_config_drive_speed(drive, speed)); -} - -/** - * ali15x3_config_drive_for_dma - configure for DMA - * @drive: drive to configure - * - * Configure a drive for DMA operation. If DMA is not possible we - * drop the drive into PIO mode instead. - */ - -static int ali15x3_config_drive_for_dma(ide_drive_t *drive) -{ - drive->init_speed = 0; - - if (ide_tune_dma(drive)) - return 0; - - ali15x3_tune_drive(drive, 255); - - return -1; } /** @@ -588,7 +548,7 @@ out: * Cable special cases */ -static struct dmi_system_id cable_dmi_table[] = { +static const struct dmi_system_id cable_dmi_table[] = { { .ident = "HP Pavilion N5430", .matches = { @@ -700,51 +660,39 @@ static u8 __devinit ata66_ali15x3(ide_hwif_t *hwif) static void __devinit init_hwif_common_ali15x3 (ide_hwif_t *hwif) { - hwif->autodma = 0; - hwif->tuneproc = &ali15x3_tune_drive; - hwif->speedproc = &ali15x3_tune_chipset; + hwif->set_pio_mode = &ali_set_pio_mode; + hwif->set_dma_mode = &ali_set_dma_mode; hwif->udma_filter = &ali_udma_filter; /* don't use LBA48 DMA on ALi devices before rev 0xC5 */ - hwif->no_lba48_dma = (m5229_revision <= 0xC4) ? 1 : 0; + if (m5229_revision <= 0xC4) + hwif->host_flags |= IDE_HFLAG_NO_LBA48_DMA; - if (!hwif->dma_base) { - hwif->drives[0].autotune = 1; - hwif->drives[1].autotune = 1; + if (hwif->dma_base == 0) return; - } - if (m5229_revision > 0x20) - hwif->atapi_dma = 1; + /* + * check in ->init_dma guarantees m5229_revision >= 0x20 here + */ + + if (m5229_revision == 0x20) + hwif->host_flags |= IDE_HFLAG_NO_ATAPI_DMA; if (m5229_revision <= 0x20) hwif->ultra_mask = 0x00; /* no udma */ else if (m5229_revision < 0xC2) - hwif->ultra_mask = 0x07; /* udma0-2 */ + hwif->ultra_mask = ATA_UDMA2; else if (m5229_revision == 0xC2 || m5229_revision == 0xC3) - hwif->ultra_mask = 0x1f; /* udma0-4 */ + hwif->ultra_mask = ATA_UDMA4; else if (m5229_revision == 0xC4) - hwif->ultra_mask = 0x3f; /* udma0-5 */ + hwif->ultra_mask = ATA_UDMA5; else - hwif->ultra_mask = 0x7f; /* udma0-6 */ - - hwif->mwdma_mask = 0x07; - hwif->swdma_mask = 0x07; - - if (m5229_revision >= 0x20) { - /* - * M1543C or newer for DMAing - */ - hwif->ide_dma_check = &ali15x3_config_drive_for_dma; - hwif->dma_setup = &ali15x3_dma_setup; - if (!noautodma) - hwif->autodma = 1; - - if (hwif->cbl != ATA_CBL_PATA40_SHORT) - hwif->cbl = ata66_ali15x3(hwif); - } - hwif->drives[0].autodma = hwif->autodma; - hwif->drives[1].autodma = hwif->autodma; + hwif->ultra_mask = ATA_UDMA6; + + hwif->dma_setup = &ali15x3_dma_setup; + + if (hwif->cbl != ATA_CBL_PATA40_SHORT) + hwif->cbl = ata66_ali15x3(hwif); } /** @@ -823,9 +771,10 @@ static ide_pci_device_t ali15x3_chipset __devinitdata = { .init_chipset = init_chipset_ali15x3, .init_hwif = init_hwif_ali15x3, .init_dma = init_dma_ali15x3, - .autodma = AUTODMA, - .bootable = ON_BOARD, + .host_flags = IDE_HFLAG_BOOTABLE, .pio_mask = ATA_PIO5, + .swdma_mask = ATA_SWDMA2, + .mwdma_mask = ATA_MWDMA2, }; /** @@ -855,9 +804,9 @@ static int __devinit alim15x3_init_one(struct pci_dev *dev, const struct pci_dev } -static struct pci_device_id alim15x3_pci_tbl[] = { - { PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M5229, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, - { PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M5228, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, +static const struct pci_device_id alim15x3_pci_tbl[] = { + { PCI_VDEVICE(AL, PCI_DEVICE_ID_AL_M5229), 0 }, + { PCI_VDEVICE(AL, PCI_DEVICE_ID_AL_M5228), 0 }, { 0, }, }; MODULE_DEVICE_TABLE(pci, alim15x3_pci_tbl); diff --git a/drivers/ide/pci/amd74xx.c b/drivers/ide/pci/amd74xx.c index 06c15a6a3e7..7cafefbf6c1 100644 --- a/drivers/ide/pci/amd74xx.c +++ b/drivers/ide/pci/amd74xx.c @@ -1,5 +1,5 @@ /* - * Version 2.21 + * Version 2.24 * * AMD 755/756/766/8111 and nVidia nForce/2/2s/3/3s/CK804/MCP04 * IDE driver for Linux. @@ -28,9 +28,6 @@ #include "ide-timing.h" -#define DISPLAY_AMD_TIMINGS - -#define AMD_IDE_ENABLE (0x00 + amd_config->base) #define AMD_IDE_CONFIG (0x01 + amd_config->base) #define AMD_CABLE_DETECT (0x02 + amd_config->base) #define AMD_DRIVE_TIMING (0x08 + amd_config->base) @@ -88,118 +85,6 @@ static char *amd_dma[] = { "16", "25", "33", "44", "66", "100", "133" }; static unsigned char amd_cyc2udma[] = { 6, 6, 5, 4, 0, 1, 1, 2, 2, 3, 3, 3, 3, 3, 3, 7 }; /* - * AMD /proc entry. - */ - -#ifdef CONFIG_IDE_PROC_FS - -#include <linux/stat.h> -#include <linux/proc_fs.h> - -static u8 amd74xx_proc; - -static unsigned char amd_udma2cyc[] = { 4, 6, 8, 10, 3, 2, 1, 15 }; -static unsigned long amd_base; -static struct pci_dev *bmide_dev; -extern int (*amd74xx_display_info)(char *, char **, off_t, int); /* ide-proc.c */ - -#define amd_print(format, arg...) p += sprintf(p, format "\n" , ## arg) -#define amd_print_drive(name, format, arg...)\ - p += sprintf(p, name); for (i = 0; i < 4; i++) p += sprintf(p, format, ## arg); p += sprintf(p, "\n"); - -static int amd74xx_get_info(char *buffer, char **addr, off_t offset, int count) -{ - int speed[4], cycle[4], setup[4], active[4], recover[4], den[4], - uen[4], udma[4], active8b[4], recover8b[4]; - struct pci_dev *dev = bmide_dev; - unsigned int v, u, i; - unsigned short c, w; - unsigned char t; - int len; - char *p = buffer; - - amd_print("----------AMD BusMastering IDE Configuration----------------"); - - amd_print("Driver Version: 2.13"); - amd_print("South Bridge: %s", pci_name(bmide_dev)); - - amd_print("Revision: IDE %#x", dev->revision); - amd_print("Highest DMA rate: UDMA%s", amd_dma[fls(amd_config->udma_mask) - 1]); - - amd_print("BM-DMA base: %#lx", amd_base); - amd_print("PCI clock: %d.%dMHz", amd_clock / 1000, amd_clock / 100 % 10); - - amd_print("-----------------------Primary IDE-------Secondary IDE------"); - - pci_read_config_byte(dev, AMD_IDE_CONFIG, &t); - amd_print("Prefetch Buffer: %10s%20s", (t & 0x80) ? "yes" : "no", (t & 0x20) ? "yes" : "no"); - amd_print("Post Write Buffer: %10s%20s", (t & 0x40) ? "yes" : "no", (t & 0x10) ? "yes" : "no"); - - pci_read_config_byte(dev, AMD_IDE_ENABLE, &t); - amd_print("Enabled: %10s%20s", (t & 0x02) ? "yes" : "no", (t & 0x01) ? "yes" : "no"); - - c = inb(amd_base + 0x02) | (inb(amd_base + 0x0a) << 8); - amd_print("Simplex only: %10s%20s", (c & 0x80) ? "yes" : "no", (c & 0x8000) ? "yes" : "no"); - - amd_print("Cable Type: %10s%20s", (amd_80w & 1) ? "80w" : "40w", (amd_80w & 2) ? "80w" : "40w"); - - if (!amd_clock) - return p - buffer; - - amd_print("-------------------drive0----drive1----drive2----drive3-----"); - - pci_read_config_byte(dev, AMD_ADDRESS_SETUP, &t); - pci_read_config_dword(dev, AMD_DRIVE_TIMING, &v); - pci_read_config_word(dev, AMD_8BIT_TIMING, &w); - pci_read_config_dword(dev, AMD_UDMA_TIMING, &u); - - for (i = 0; i < 4; i++) { - setup[i] = ((t >> ((3 - i) << 1)) & 0x3) + 1; - recover8b[i] = ((w >> ((1 - (i >> 1)) << 3)) & 0xf) + 1; - active8b[i] = ((w >> (((1 - (i >> 1)) << 3) + 4)) & 0xf) + 1; - active[i] = ((v >> (((3 - i) << 3) + 4)) & 0xf) + 1; - recover[i] = ((v >> ((3 - i) << 3)) & 0xf) + 1; - - udma[i] = amd_udma2cyc[((u >> ((3 - i) << 3)) & 0x7)]; - uen[i] = ((u >> ((3 - i) << 3)) & 0x40) ? 1 : 0; - den[i] = (c & ((i & 1) ? 0x40 : 0x20) << ((i & 2) << 2)); - - if (den[i] && uen[i] && udma[i] == 1) { - speed[i] = amd_clock * 3; - cycle[i] = 666666 / amd_clock; - continue; - } - - if (den[i] && uen[i] && udma[i] == 15) { - speed[i] = amd_clock * 4; - cycle[i] = 500000 / amd_clock; - continue; - } - - speed[i] = 4 * amd_clock / ((den[i] && uen[i]) ? udma[i] : (active[i] + recover[i]) * 2); - cycle[i] = 1000000 * ((den[i] && uen[i]) ? udma[i] : (active[i] + recover[i]) * 2) / amd_clock / 2; - } - - amd_print_drive("Transfer Mode: ", "%10s", den[i] ? (uen[i] ? "UDMA" : "DMA") : "PIO"); - - amd_print_drive("Address Setup: ", "%8dns", 1000000 * setup[i] / amd_clock); - amd_print_drive("Cmd Active: ", "%8dns", 1000000 * active8b[i] / amd_clock); - amd_print_drive("Cmd Recovery: ", "%8dns", 1000000 * recover8b[i] / amd_clock); - amd_print_drive("Data Active: ", "%8dns", 1000000 * active[i] / amd_clock); - amd_print_drive("Data Recovery: ", "%8dns", 1000000 * recover[i] / amd_clock); - amd_print_drive("Cycle Time: ", "%8dns", cycle[i]); - amd_print_drive("Transfer Rate: ", "%4d.%dMB/s", speed[i] / 1000, speed[i] / 100 % 10); - - /* hoping p - buffer is less than 4K... */ - len = (p - buffer) - offset; - *addr = buffer + offset; - - return len > count ? count : len; -} - -#endif - -/* * amd_set_speed() writes timing values to the chipset registers */ @@ -229,20 +114,16 @@ static void amd_set_speed(struct pci_dev *dev, unsigned char dn, struct ide_timi } /* - * amd_set_drive() computes timing values configures the drive and - * the chipset to a desired transfer mode. It also can be called - * by upper layers. + * amd_set_drive() computes timing values and configures the chipset + * to a desired transfer mode. It also can be called by upper layers. */ -static int amd_set_drive(ide_drive_t *drive, u8 speed) +static void amd_set_drive(ide_drive_t *drive, const u8 speed) { ide_drive_t *peer = HWIF(drive)->drives + (~drive->dn & 1); struct ide_timing t, p; int T, UT; - if (speed != XFER_PIO_SLOW) - ide_config_drive_speed(drive, speed); - T = 1000000000 / amd_clock; UT = (amd_config->udma_mask == ATA_UDMA2) ? T : (T / 2); @@ -257,42 +138,15 @@ static int amd_set_drive(ide_drive_t *drive, u8 speed) if (speed == XFER_UDMA_6 && amd_clock <= 33333) t.udma = 15; amd_set_speed(HWIF(drive)->pci_dev, drive->dn, &t); - - if (!drive->init_speed) - drive->init_speed = speed; - drive->current_speed = speed; - - return 0; } /* - * amd74xx_tune_drive() is a callback from upper layers for - * PIO-only tuning. + * amd_set_pio_mode() is a callback from upper layers for PIO-only tuning. */ -static void amd74xx_tune_drive(ide_drive_t *drive, u8 pio) -{ - if (pio == 255) - pio = ide_get_best_pio_mode(drive, 255, 5); - - amd_set_drive(drive, XFER_PIO_0 + min_t(byte, pio, 5)); -} - -static int amd74xx_ide_dma_check(ide_drive_t *drive) +static void amd_set_pio_mode(ide_drive_t *drive, const u8 pio) { - u8 speed = ide_max_dma_mode(drive); - - if (speed == 0) { - amd74xx_tune_drive(drive, 255); - return -1; - } - - amd_set_drive(drive, speed); - - if (drive->autodma) - return 0; - - return -1; + amd_set_drive(drive, XFER_PIO_0 + pio); } /* @@ -379,24 +233,10 @@ static unsigned int __devinit init_chipset_amd74xx(struct pci_dev *dev, const ch * Print the boot message. */ - pci_read_config_byte(dev, PCI_REVISION_ID, &t); printk(KERN_INFO "%s: %s (rev %02x) UDMA%s controller\n", amd_chipset->name, pci_name(dev), dev->revision, amd_dma[fls(amd_config->udma_mask) - 1]); -/* - * Register /proc/ide/amd74xx entry - */ - -#if defined(DISPLAY_AMD_TIMINGS) && defined(CONFIG_IDE_PROC_FS) - if (!amd74xx_proc) { - amd_base = pci_resource_start(dev, 4); - bmide_dev = dev; - ide_pci_create_host_proc("amd74xx", amd74xx_get_info); - amd74xx_proc = 1; - } -#endif /* DISPLAY_AMD_TIMINGS && CONFIG_IDE_PROC_FS */ - return dev->irq; } @@ -407,27 +247,20 @@ static void __devinit init_hwif_amd74xx(ide_hwif_t *hwif) if (hwif->irq == 0) /* 0 is bogus but will do for now */ hwif->irq = pci_get_legacy_ide_irq(hwif->pci_dev, hwif->channel); - hwif->autodma = 0; - - hwif->tuneproc = &amd74xx_tune_drive; - hwif->speedproc = &amd_set_drive; + hwif->set_pio_mode = &amd_set_pio_mode; + hwif->set_dma_mode = &amd_set_drive; for (i = 0; i < 2; i++) { hwif->drives[i].io_32bit = 1; hwif->drives[i].unmask = 1; - hwif->drives[i].autotune = 1; - hwif->drives[i].dn = hwif->channel * 2 + i; } if (!hwif->dma_base) return; - hwif->atapi_dma = 1; - hwif->ultra_mask = amd_config->udma_mask; - hwif->mwdma_mask = 0x07; - if ((amd_config->flags & AMD_BAD_SWDMA) == 0) - hwif->swdma_mask = 0x07; + if (amd_config->flags & AMD_BAD_SWDMA) + hwif->swdma_mask = 0x00; if (hwif->cbl != ATA_CBL_PATA40_SHORT) { if ((amd_80w >> hwif->channel) & 1) @@ -435,12 +268,6 @@ static void __devinit init_hwif_amd74xx(ide_hwif_t *hwif) else hwif->cbl = ATA_CBL_PATA40; } - - hwif->ide_dma_check = &amd74xx_ide_dma_check; - if (!noautodma) - hwif->autodma = 1; - hwif->drives[0].autodma = hwif->autodma; - hwif->drives[1].autodma = hwif->autodma; } #define DECLARE_AMD_DEV(name_str) \ @@ -448,12 +275,14 @@ static void __devinit init_hwif_amd74xx(ide_hwif_t *hwif) .name = name_str, \ .init_chipset = init_chipset_amd74xx, \ .init_hwif = init_hwif_amd74xx, \ - .autodma = AUTODMA, \ .enablebits = {{0x40,0x02,0x02}, {0x40,0x01,0x01}}, \ - .bootable = ON_BOARD, \ - .host_flags = IDE_HFLAG_PIO_NO_BLACKLIST \ - | IDE_HFLAG_PIO_NO_DOWNGRADE, \ + .host_flags = IDE_HFLAG_PIO_NO_BLACKLIST | \ + IDE_HFLAG_PIO_NO_DOWNGRADE | \ + IDE_HFLAG_POST_SET_MODE | \ + IDE_HFLAG_BOOTABLE, \ .pio_mask = ATA_PIO5, \ + .swdma_mask = ATA_SWDMA2, \ + .mwdma_mask = ATA_MWDMA2, \ } #define DECLARE_NV_DEV(name_str) \ @@ -461,12 +290,14 @@ static void __devinit init_hwif_amd74xx(ide_hwif_t *hwif) .name = name_str, \ .init_chipset = init_chipset_amd74xx, \ .init_hwif = init_hwif_amd74xx, \ - .autodma = AUTODMA, \ .enablebits = {{0x50,0x02,0x02}, {0x50,0x01,0x01}}, \ - .bootable = ON_BOARD, \ - .host_flags = IDE_HFLAG_PIO_NO_BLACKLIST \ - | IDE_HFLAG_PIO_NO_DOWNGRADE, \ + .host_flags = IDE_HFLAG_PIO_NO_BLACKLIST | \ + IDE_HFLAG_PIO_NO_DOWNGRADE | \ + IDE_HFLAG_POST_SET_MODE | \ + IDE_HFLAG_BOOTABLE, \ .pio_mask = ATA_PIO5, \ + .swdma_mask = ATA_SWDMA2, \ + .mwdma_mask = ATA_MWDMA2, \ } static ide_pci_device_t amd74xx_chipsets[] __devinitdata = { @@ -508,34 +339,34 @@ static int __devinit amd74xx_probe(struct pci_dev *dev, const struct pci_device_ return ide_setup_pci_device(dev, amd_chipset); } -static struct pci_device_id amd74xx_pci_tbl[] = { - { PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_COBRA_7401, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, - { PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_VIPER_7409, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 1 }, - { PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_VIPER_7411, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 2 }, - { PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_OPUS_7441, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 3 }, - { PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_8111_IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 4 }, - { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 5 }, - { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE2_IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 6 }, - { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE2S_IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 7 }, +static const struct pci_device_id amd74xx_pci_tbl[] = { + { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_COBRA_7401), 0 }, + { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_VIPER_7409), 1 }, + { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_VIPER_7411), 2 }, + { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_OPUS_7441), 3 }, + { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_8111_IDE), 4 }, + { PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_IDE), 5 }, + { PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE2_IDE), 6 }, + { PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE2S_IDE), 7 }, #ifdef CONFIG_BLK_DEV_IDE_SATA - { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE2S_SATA, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 8 }, + { PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE2S_SATA), 8 }, #endif - { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE3_IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 9 }, - { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE3S_IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 10 }, + { PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE3_IDE), 9 }, + { PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE3S_IDE), 10 }, #ifdef CONFIG_BLK_DEV_IDE_SATA - { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE3S_SATA, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 11 }, - { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE3S_SATA2, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 12 }, + { PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE3S_SATA), 11 }, + { PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE3S_SATA2), 12 }, #endif - { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_CK804_IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 13 }, - { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP04_IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 14 }, - { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 15 }, - { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP55_IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 16 }, - { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP61_IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 17 }, - { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP65_IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 18 }, - { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP67_IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 19 }, - { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP73_IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 20 }, - { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP77_IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 21 }, - { PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_CS5536_IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 22 }, + { PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_CK804_IDE), 13 }, + { PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP04_IDE), 14 }, + { PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_IDE), 15 }, + { PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP55_IDE), 16 }, + { PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP61_IDE), 17 }, + { PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP65_IDE), 18 }, + { PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP67_IDE), 19 }, + { PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP73_IDE), 20 }, + { PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP77_IDE), 21 }, + { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_CS5536_IDE), 22 }, { 0, }, }; MODULE_DEVICE_TABLE(pci, amd74xx_pci_tbl); diff --git a/drivers/ide/pci/atiixp.c b/drivers/ide/pci/atiixp.c index 1725aa402d9..30784305307 100644 --- a/drivers/ide/pci/atiixp.c +++ b/drivers/ide/pci/atiixp.c @@ -1,5 +1,5 @@ /* - * linux/drivers/ide/pci/atiixp.c Version 0.02 Jun 16 2007 + * linux/drivers/ide/pci/atiixp.c Version 0.03 Aug 3 2007 * * Copyright (C) 2003 ATI Inc. <hyu@ati.com> * Copyright (C) 2004,2007 Bartlomiej Zolnierkiewicz @@ -47,43 +47,6 @@ static int save_mdma_mode[4]; static DEFINE_SPINLOCK(atiixp_lock); -/** - * atiixp_dma_2_pio - return the PIO mode matching DMA - * @xfer_rate: transfer speed - * - * Returns the nearest equivalent PIO timing for the PIO or DMA - * mode requested by the controller. - */ - -static u8 atiixp_dma_2_pio(u8 xfer_rate) { - switch(xfer_rate) { - case XFER_UDMA_6: - case XFER_UDMA_5: - case XFER_UDMA_4: - case XFER_UDMA_3: - case XFER_UDMA_2: - case XFER_UDMA_1: - case XFER_UDMA_0: - case XFER_MW_DMA_2: - case XFER_PIO_4: - return 4; - case XFER_MW_DMA_1: - case XFER_PIO_3: - return 3; - case XFER_SW_DMA_2: - case XFER_PIO_2: - return 2; - case XFER_MW_DMA_0: - case XFER_SW_DMA_1: - case XFER_SW_DMA_0: - case XFER_PIO_1: - case XFER_PIO_0: - case XFER_PIO_SLOW: - default: - return 0; - } -} - static void atiixp_dma_host_on(ide_drive_t *drive) { struct pci_dev *dev = drive->hwif->pci_dev; @@ -122,14 +85,14 @@ static void atiixp_dma_host_off(ide_drive_t *drive) } /** - * atiixp_tune_pio - tune a drive attached to a ATIIXP - * @drive: drive to tune - * @pio: desired PIO mode + * atiixp_set_pio_mode - set host controller for PIO mode + * @drive: drive + * @pio: PIO mode number * * Set the interface PIO mode. */ -static void atiixp_tune_pio(ide_drive_t *drive, u8 pio) +static void atiixp_set_pio_mode(ide_drive_t *drive, const u8 pio) { struct pci_dev *dev = drive->hwif->pci_dev; unsigned long flags; @@ -153,38 +116,25 @@ static void atiixp_tune_pio(ide_drive_t *drive, u8 pio) spin_unlock_irqrestore(&atiixp_lock, flags); } -static void atiixp_tuneproc(ide_drive_t *drive, u8 pio) -{ - pio = ide_get_best_pio_mode(drive, pio, 4); - atiixp_tune_pio(drive, pio); - (void)ide_config_drive_speed(drive, XFER_PIO_0 + pio); -} - /** - * atiixp_tune_chipset - tune a ATIIXP interface - * @drive: IDE drive to tune - * @xferspeed: speed to configure + * atiixp_set_dma_mode - set host controller for DMA mode + * @drive: drive + * @speed: DMA mode * - * Set a ATIIXP interface channel to the desired speeds. This involves - * requires the right timing data into the ATIIXP configuration space - * then setting the drive parameters appropriately + * Set a ATIIXP host controller to the desired DMA mode. This involves + * programming the right timing data into the PCI configuration space. */ -static int atiixp_speedproc(ide_drive_t *drive, u8 xferspeed) +static void atiixp_set_dma_mode(ide_drive_t *drive, const u8 speed) { struct pci_dev *dev = drive->hwif->pci_dev; unsigned long flags; int timing_shift = (drive->dn & 2) ? 16 : 0 + (drive->dn & 1) ? 0 : 8; u32 tmp32; u16 tmp16; - u8 speed, pio; - speed = ide_rate_filter(drive, xferspeed); - - if (speed >= XFER_PIO_0 && speed <= XFER_PIO_4) { - atiixp_tune_pio(drive, speed - XFER_PIO_0); - return ide_config_drive_speed(drive, speed); - } + if (speed < XFER_MW_DMA_0) + return; spin_lock_irqsave(&atiixp_lock, flags); @@ -206,36 +156,6 @@ static int atiixp_speedproc(ide_drive_t *drive, u8 xferspeed) } spin_unlock_irqrestore(&atiixp_lock, flags); - - if (speed >= XFER_SW_DMA_0) - pio = atiixp_dma_2_pio(speed); - else - pio = speed - XFER_PIO_0; - - atiixp_tune_pio(drive, pio); - - return ide_config_drive_speed(drive, speed); -} - -/** - * atiixp_dma_check - set up an IDE device - * @drive: IDE drive to configure - * - * Set up the ATIIXP interface for the best available speed on this - * interface, preferring DMA to PIO. - */ - -static int atiixp_dma_check(ide_drive_t *drive) -{ - drive->init_speed = 0; - - if (ide_tune_dma(drive)) - return 0; - - if (ide_use_fast_pio(drive)) - atiixp_tuneproc(drive, 255); - - return -1; } /** @@ -252,23 +172,12 @@ static void __devinit init_hwif_atiixp(ide_hwif_t *hwif) u8 ch = hwif->channel; struct pci_dev *pdev = hwif->pci_dev; - if (!hwif->irq) - hwif->irq = ch ? 15 : 14; - - hwif->autodma = 0; - hwif->tuneproc = &atiixp_tuneproc; - hwif->speedproc = &atiixp_speedproc; - hwif->drives[0].autotune = 1; - hwif->drives[1].autotune = 1; + hwif->set_pio_mode = &atiixp_set_pio_mode; + hwif->set_dma_mode = &atiixp_set_dma_mode; if (!hwif->dma_base) return; - hwif->atapi_dma = 1; - hwif->ultra_mask = 0x3f; - hwif->mwdma_mask = 0x06; - hwif->swdma_mask = 0x04; - pci_read_config_byte(pdev, ATIIXP_IDE_UDMA_MODE + ch, &udma_mode); if ((udma_mode & 0x07) >= 0x04 || (udma_mode & 0x70) >= 0x40) @@ -278,12 +187,6 @@ static void __devinit init_hwif_atiixp(ide_hwif_t *hwif) hwif->dma_host_on = &atiixp_dma_host_on; hwif->dma_host_off = &atiixp_dma_host_off; - hwif->ide_dma_check = &atiixp_dma_check; - if (!noautodma) - hwif->autodma = 1; - - hwif->drives[1].autodma = hwif->autodma; - hwif->drives[0].autodma = hwif->autodma; } @@ -291,18 +194,20 @@ static ide_pci_device_t atiixp_pci_info[] __devinitdata = { { /* 0 */ .name = "ATIIXP", .init_hwif = init_hwif_atiixp, - .autodma = AUTODMA, .enablebits = {{0x48,0x01,0x00}, {0x48,0x08,0x00}}, - .bootable = ON_BOARD, + .host_flags = IDE_HFLAG_LEGACY_IRQS | IDE_HFLAG_BOOTABLE, .pio_mask = ATA_PIO4, + .mwdma_mask = ATA_MWDMA2, + .udma_mask = ATA_UDMA5, },{ /* 1 */ .name = "SB600_PATA", .init_hwif = init_hwif_atiixp, - .autodma = AUTODMA, .enablebits = {{0x48,0x01,0x00}, {0x00,0x00,0x00}}, - .bootable = ON_BOARD, - .host_flags = IDE_HFLAG_SINGLE, + .host_flags = IDE_HFLAG_SINGLE | IDE_HFLAG_LEGACY_IRQS | + IDE_HFLAG_BOOTABLE, .pio_mask = ATA_PIO4, + .mwdma_mask = ATA_MWDMA2, + .udma_mask = ATA_UDMA5, }, }; @@ -320,12 +225,12 @@ static int __devinit atiixp_init_one(struct pci_dev *dev, const struct pci_devic return ide_setup_pci_device(dev, &atiixp_pci_info[id->driver_data]); } -static struct pci_device_id atiixp_pci_tbl[] = { - { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP200_IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, - { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP300_IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, - { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP400_IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, - { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP600_IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 1}, - { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP700_IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 1}, +static const struct pci_device_id atiixp_pci_tbl[] = { + { PCI_VDEVICE(ATI, PCI_DEVICE_ID_ATI_IXP200_IDE), 0 }, + { PCI_VDEVICE(ATI, PCI_DEVICE_ID_ATI_IXP300_IDE), 0 }, + { PCI_VDEVICE(ATI, PCI_DEVICE_ID_ATI_IXP400_IDE), 0 }, + { PCI_VDEVICE(ATI, PCI_DEVICE_ID_ATI_IXP600_IDE), 1 }, + { PCI_VDEVICE(ATI, PCI_DEVICE_ID_ATI_IXP700_IDE), 0 }, { 0, }, }; MODULE_DEVICE_TABLE(pci, atiixp_pci_tbl); diff --git a/drivers/ide/pci/cmd640.c b/drivers/ide/pci/cmd640.c index 9689494efa2..f369645e4d1 100644 --- a/drivers/ide/pci/cmd640.c +++ b/drivers/ide/pci/cmd640.c @@ -628,45 +628,40 @@ static void cmd640_set_mode (unsigned int index, u8 pio_mode, unsigned int cycle program_drive_counts (index); } -/* - * Drive PIO mode selection: - */ -static void cmd640_tune_drive (ide_drive_t *drive, u8 mode_wanted) +static void cmd640_set_pio_mode(ide_drive_t *drive, const u8 pio) { unsigned int index = 0, cycle_time; u8 b; while (drive != cmd_drives[index]) { if (++index > 3) { - printk("%s: bad news in cmd640_tune_drive\n", drive->name); + printk(KERN_ERR "%s: bad news in %s\n", + drive->name, __FUNCTION__); return; } } - switch (mode_wanted) { + switch (pio) { case 6: /* set fast-devsel off */ case 7: /* set fast-devsel on */ - mode_wanted &= 1; b = get_cmd640_reg(CNTRL) & ~0x27; - if (mode_wanted) + if (pio & 1) b |= 0x27; put_cmd640_reg(CNTRL, b); - printk("%s: %sabled cmd640 fast host timing (devsel)\n", drive->name, mode_wanted ? "en" : "dis"); + printk("%s: %sabled cmd640 fast host timing (devsel)\n", drive->name, (pio & 1) ? "en" : "dis"); return; case 8: /* set prefetch off */ case 9: /* set prefetch on */ - mode_wanted &= 1; - set_prefetch_mode(index, mode_wanted); - printk("%s: %sabled cmd640 prefetch\n", drive->name, mode_wanted ? "en" : "dis"); + set_prefetch_mode(index, pio & 1); + printk("%s: %sabled cmd640 prefetch\n", drive->name, (pio & 1) ? "en" : "dis"); return; } - mode_wanted = ide_get_best_pio_mode(drive, mode_wanted, 5); - cycle_time = ide_pio_cycle_time(drive, mode_wanted); - cmd640_set_mode(index, mode_wanted, cycle_time); + cycle_time = ide_pio_cycle_time(drive, pio); + cmd640_set_mode(index, pio, cycle_time); printk("%s: selected cmd640 PIO mode%d (%dns)", - drive->name, mode_wanted, cycle_time); + drive->name, pio, cycle_time); display_clocks(index); } @@ -766,8 +761,10 @@ int __init ide_probe_for_cmd640x (void) cmd_hwif0->name, 'a' + cmd640_chip_version - 1, bus_type, cfr); cmd_hwif0->chipset = ide_cmd640; #ifdef CONFIG_BLK_DEV_CMD640_ENHANCED + cmd_hwif0->host_flags = IDE_HFLAG_ABUSE_PREFETCH | + IDE_HFLAG_ABUSE_FAST_DEVSEL; cmd_hwif0->pio_mask = ATA_PIO5; - cmd_hwif0->tuneproc = &cmd640_tune_drive; + cmd_hwif0->set_pio_mode = &cmd640_set_pio_mode; #endif /* CONFIG_BLK_DEV_CMD640_ENHANCED */ /* @@ -822,8 +819,10 @@ int __init ide_probe_for_cmd640x (void) cmd_hwif1->mate = cmd_hwif0; cmd_hwif1->channel = 1; #ifdef CONFIG_BLK_DEV_CMD640_ENHANCED + cmd_hwif1->host_flags = IDE_HFLAG_ABUSE_PREFETCH | + IDE_HFLAG_ABUSE_FAST_DEVSEL; cmd_hwif1->pio_mask = ATA_PIO5; - cmd_hwif1->tuneproc = &cmd640_tune_drive; + cmd_hwif1->set_pio_mode = &cmd640_set_pio_mode; #endif /* CONFIG_BLK_DEV_CMD640_ENHANCED */ } printk(KERN_INFO "%s: %sserialized, secondary interface %s\n", cmd_hwif1->name, diff --git a/drivers/ide/pci/cmd64x.c b/drivers/ide/pci/cmd64x.c index 0e3b5de26e6..adee2ef6fd7 100644 --- a/drivers/ide/pci/cmd64x.c +++ b/drivers/ide/pci/cmd64x.c @@ -214,28 +214,25 @@ static void program_cycle_times (ide_drive_t *drive, int cycle_time, int active_ } /* - * This routine selects drive's best PIO mode and writes into the chipset - * registers setup/active/recovery timings. + * This routine writes into the chipset registers + * PIO setup/active/recovery timings. */ -static u8 cmd64x_tune_pio (ide_drive_t *drive, u8 mode_wanted) +static void cmd64x_tune_pio(ide_drive_t *drive, const u8 pio) { ide_hwif_t *hwif = HWIF(drive); struct pci_dev *dev = hwif->pci_dev; unsigned int cycle_time; - u8 pio_mode, setup_count, arttim = 0; + u8 setup_count, arttim = 0; + static const u8 setup_values[] = {0x40, 0x40, 0x40, 0x80, 0, 0xc0}; static const u8 arttim_regs[4] = {ARTTIM0, ARTTIM1, ARTTIM23, ARTTIM23}; - pio_mode = ide_get_best_pio_mode(drive, mode_wanted, 5); - cycle_time = ide_pio_cycle_time(drive, pio_mode); - - cmdprintk("%s: PIO mode wanted %d, selected %d (%d ns)\n", - drive->name, mode_wanted, pio_mode, cycle_time); + cycle_time = ide_pio_cycle_time(drive, pio); program_cycle_times(drive, cycle_time, - ide_pio_timings[pio_mode].active_time); + ide_pio_timings[pio].active_time); - setup_count = quantize_timing(ide_pio_timings[pio_mode].setup_time, + setup_count = quantize_timing(ide_pio_timings[pio].setup_time, 1000 / system_bus_clock()); /* @@ -266,16 +263,14 @@ static u8 cmd64x_tune_pio (ide_drive_t *drive, u8 mode_wanted) arttim |= setup_values[setup_count]; (void) pci_write_config_byte(dev, arttim_regs[drive->dn], arttim); cmdprintk("Write 0x%02x to reg 0x%x\n", arttim, arttim_regs[drive->dn]); - - return pio_mode; } /* * Attempts to set drive's PIO mode. - * Special cases are 8: prefetch off, 9: prefetch on (both never worked), - * and 255: auto-select best mode (used at boot time). + * Special cases are 8: prefetch off, 9: prefetch on (both never worked) */ -static void cmd64x_tune_drive (ide_drive_t *drive, u8 pio) + +static void cmd64x_set_pio_mode(ide_drive_t *drive, const u8 pio) { /* * Filter out the prefetch control values @@ -284,19 +279,16 @@ static void cmd64x_tune_drive (ide_drive_t *drive, u8 pio) if (pio == 8 || pio == 9) return; - pio = cmd64x_tune_pio(drive, pio); - (void) ide_config_drive_speed(drive, XFER_PIO_0 + pio); + cmd64x_tune_pio(drive, pio); } -static int cmd64x_tune_chipset (ide_drive_t *drive, u8 speed) +static void cmd64x_set_dma_mode(ide_drive_t *drive, const u8 speed) { ide_hwif_t *hwif = HWIF(drive); struct pci_dev *dev = hwif->pci_dev; u8 unit = drive->dn & 0x01; u8 regU = 0, pciU = hwif->channel ? UDIDETCR1 : UDIDETCR0; - speed = ide_rate_filter(drive, speed); - if (speed >= XFER_SW_DMA_0) { (void) pci_read_config_byte(dev, pciU, ®U); regU &= ~(unit ? 0xCA : 0x35); @@ -330,33 +322,12 @@ static int cmd64x_tune_chipset (ide_drive_t *drive, u8 speed) case XFER_MW_DMA_0: program_cycle_times(drive, 480, 215); break; - case XFER_PIO_5: - case XFER_PIO_4: - case XFER_PIO_3: - case XFER_PIO_2: - case XFER_PIO_1: - case XFER_PIO_0: - (void) cmd64x_tune_pio(drive, speed - XFER_PIO_0); - break; default: - return 1; + return; } if (speed >= XFER_SW_DMA_0) (void) pci_write_config_byte(dev, pciU, regU); - - return ide_config_drive_speed(drive, speed); -} - -static int cmd64x_config_drive_for_dma (ide_drive_t *drive) -{ - if (ide_tune_dma(drive)) - return 0; - - if (ide_use_fast_pio(drive)) - cmd64x_tune_drive(drive, 255); - - return -1; } static int cmd648_ide_dma_end (ide_drive_t *drive) @@ -468,11 +439,8 @@ static unsigned int __devinit init_chipset_cmd64x(struct pci_dev *dev, const cha u8 mrdmode = 0; if (dev->device == PCI_DEVICE_ID_CMD_646) { - u8 rev = 0; - pci_read_config_byte(dev, PCI_REVISION_ID, &rev); - - switch (rev) { + switch (dev->revision) { case 0x07: case 0x05: printk("%s: UltraDMA capable\n", name); @@ -534,22 +502,13 @@ static u8 __devinit ata66_cmd64x(ide_hwif_t *hwif) static void __devinit init_hwif_cmd64x(ide_hwif_t *hwif) { struct pci_dev *dev = hwif->pci_dev; - u8 rev = 0; - - pci_read_config_byte(dev, PCI_REVISION_ID, &rev); - - hwif->tuneproc = &cmd64x_tune_drive; - hwif->speedproc = &cmd64x_tune_chipset; - hwif->drives[0].autotune = hwif->drives[1].autotune = 1; + hwif->set_pio_mode = &cmd64x_set_pio_mode; + hwif->set_dma_mode = &cmd64x_set_dma_mode; if (!hwif->dma_base) return; - hwif->atapi_dma = 1; - hwif->mwdma_mask = 0x07; - hwif->ultra_mask = hwif->cds->udma_mask; - /* * UltraDMA only supported on PCI646U and PCI646U2, which * correspond to revisions 0x03, 0x05 and 0x07 respectively. @@ -562,11 +521,9 @@ static void __devinit init_hwif_cmd64x(ide_hwif_t *hwif) * * So we only do UltraDMA on revision 0x05 and 0x07 chipsets. */ - if (dev->device == PCI_DEVICE_ID_CMD_646 && rev < 5) + if (dev->device == PCI_DEVICE_ID_CMD_646 && dev->revision < 5) hwif->ultra_mask = 0x00; - hwif->ide_dma_check = &cmd64x_config_drive_for_dma; - if (hwif->cbl != ATA_CBL_PATA40_SHORT) hwif->cbl = ata66_cmd64x(hwif); @@ -579,10 +536,10 @@ static void __devinit init_hwif_cmd64x(ide_hwif_t *hwif) break; case PCI_DEVICE_ID_CMD_646: hwif->chipset = ide_cmd646; - if (rev == 0x01) { + if (dev->revision == 0x01) { hwif->ide_dma_end = &cmd646_1_ide_dma_end; break; - } else if (rev >= 0x03) + } else if (dev->revision >= 0x03) goto alt_irq_bits; /* fall thru */ default: @@ -590,89 +547,70 @@ static void __devinit init_hwif_cmd64x(ide_hwif_t *hwif) hwif->ide_dma_test_irq = &cmd64x_ide_dma_test_irq; break; } - - if (!noautodma) - hwif->autodma = 1; - hwif->drives[0].autodma = hwif->drives[1].autodma = hwif->autodma; -} - -static int __devinit init_setup_cmd64x(struct pci_dev *dev, ide_pci_device_t *d) -{ - return ide_setup_pci_device(dev, d); -} - -static int __devinit init_setup_cmd646(struct pci_dev *dev, ide_pci_device_t *d) -{ - /* - * The original PCI0646 didn't have the primary channel enable bit, - * it appeared starting with PCI0646U (i.e. revision ID 3). - */ - if (dev->revision < 3) - d->enablebits[0].reg = 0; - - return ide_setup_pci_device(dev, d); } static ide_pci_device_t cmd64x_chipsets[] __devinitdata = { { /* 0 */ .name = "CMD643", - .init_setup = init_setup_cmd64x, .init_chipset = init_chipset_cmd64x, .init_hwif = init_hwif_cmd64x, - .autodma = AUTODMA, .enablebits = {{0x00,0x00,0x00}, {0x51,0x08,0x08}}, - .bootable = ON_BOARD, + .host_flags = IDE_HFLAG_ABUSE_PREFETCH | IDE_HFLAG_BOOTABLE, .pio_mask = ATA_PIO5, + .mwdma_mask = ATA_MWDMA2, .udma_mask = 0x00, /* no udma */ },{ /* 1 */ .name = "CMD646", - .init_setup = init_setup_cmd646, .init_chipset = init_chipset_cmd64x, .init_hwif = init_hwif_cmd64x, - .autodma = AUTODMA, .enablebits = {{0x51,0x04,0x04}, {0x51,0x08,0x08}}, - .bootable = ON_BOARD, + .host_flags = IDE_HFLAG_ABUSE_PREFETCH | IDE_HFLAG_BOOTABLE, .pio_mask = ATA_PIO5, - .udma_mask = 0x07, /* udma0-2 */ + .mwdma_mask = ATA_MWDMA2, + .udma_mask = ATA_UDMA2, },{ /* 2 */ .name = "CMD648", - .init_setup = init_setup_cmd64x, .init_chipset = init_chipset_cmd64x, .init_hwif = init_hwif_cmd64x, - .autodma = AUTODMA, .enablebits = {{0x51,0x04,0x04}, {0x51,0x08,0x08}}, - .bootable = ON_BOARD, + .host_flags = IDE_HFLAG_ABUSE_PREFETCH | IDE_HFLAG_BOOTABLE, .pio_mask = ATA_PIO5, - .udma_mask = 0x1f, /* udma0-4 */ + .mwdma_mask = ATA_MWDMA2, + .udma_mask = ATA_UDMA4, },{ /* 3 */ .name = "CMD649", - .init_setup = init_setup_cmd64x, .init_chipset = init_chipset_cmd64x, .init_hwif = init_hwif_cmd64x, - .autodma = AUTODMA, .enablebits = {{0x51,0x04,0x04}, {0x51,0x08,0x08}}, - .bootable = ON_BOARD, + .host_flags = IDE_HFLAG_ABUSE_PREFETCH | IDE_HFLAG_BOOTABLE, .pio_mask = ATA_PIO5, - .udma_mask = 0x3f, /* udma0-5 */ + .mwdma_mask = ATA_MWDMA2, + .udma_mask = ATA_UDMA5, } }; -/* - * We may have to modify enablebits for PCI0646, so we'd better pass - * a local copy of the ide_pci_device_t structure down the call chain... - */ static int __devinit cmd64x_init_one(struct pci_dev *dev, const struct pci_device_id *id) { - ide_pci_device_t d = cmd64x_chipsets[id->driver_data]; + ide_pci_device_t d; + u8 idx = id->driver_data; + + d = cmd64x_chipsets[idx]; + + /* + * The original PCI0646 didn't have the primary channel enable bit, + * it appeared starting with PCI0646U (i.e. revision ID 3). + */ + if (idx == 1 && dev->revision < 3) + d.enablebits[0].reg = 0; - return d.init_setup(dev, &d); + return ide_setup_pci_device(dev, &d); } -static struct pci_device_id cmd64x_pci_tbl[] = { - { PCI_VENDOR_ID_CMD, PCI_DEVICE_ID_CMD_643, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, - { PCI_VENDOR_ID_CMD, PCI_DEVICE_ID_CMD_646, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 1}, - { PCI_VENDOR_ID_CMD, PCI_DEVICE_ID_CMD_648, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 2}, - { PCI_VENDOR_ID_CMD, PCI_DEVICE_ID_CMD_649, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 3}, +static const struct pci_device_id cmd64x_pci_tbl[] = { + { PCI_VDEVICE(CMD, PCI_DEVICE_ID_CMD_643), 0 }, + { PCI_VDEVICE(CMD, PCI_DEVICE_ID_CMD_646), 1 }, + { PCI_VDEVICE(CMD, PCI_DEVICE_ID_CMD_648), 2 }, + { PCI_VDEVICE(CMD, PCI_DEVICE_ID_CMD_649), 3 }, { 0, }, }; MODULE_DEVICE_TABLE(pci, cmd64x_pci_tbl); diff --git a/drivers/ide/pci/cs5520.c b/drivers/ide/pci/cs5520.c index b89e8165687..aa98e817d38 100644 --- a/drivers/ide/pci/cs5520.c +++ b/drivers/ide/pci/cs5520.c @@ -66,32 +66,13 @@ static struct pio_clocks cs5520_pio_clocks[]={ {1, 2, 1} }; -static int cs5520_tune_chipset(ide_drive_t *drive, u8 xferspeed) +static void cs5520_set_pio_mode(ide_drive_t *drive, const u8 pio) { ide_hwif_t *hwif = HWIF(drive); struct pci_dev *pdev = hwif->pci_dev; - u8 speed = min((u8)XFER_PIO_4, xferspeed); - int pio = speed; - u8 reg; int controller = drive->dn > 1 ? 1 : 0; - int error; - - switch(speed) - { - case XFER_PIO_4: - case XFER_PIO_3: - case XFER_PIO_2: - case XFER_PIO_1: - case XFER_PIO_0: - pio -= XFER_PIO_0; - break; - default: - pio = 0; - printk(KERN_ERR "cs55x0: bad ide timing.\n"); - } - - printk("PIO clocking = %d\n", pio); - + u8 reg; + /* FIXME: if DMA = 1 do we need to set the DMA bit here ? */ /* 8bit CAT/CRT - 8bit command timing for channel */ @@ -115,40 +96,13 @@ static int cs5520_tune_chipset(ide_drive_t *drive, u8 xferspeed) reg = inb(hwif->dma_base + 0x02 + 8*controller); reg |= 1<<((drive->dn&1)+5); outb(reg, hwif->dma_base + 0x02 + 8*controller); - - error = ide_config_drive_speed(drive, speed); - /* ATAPI is harder so leave it for now */ - if(!error && drive->media == ide_disk) - error = hwif->ide_dma_on(drive); - - return error; -} - -static void cs5520_tune_drive(ide_drive_t *drive, u8 pio) -{ - pio = ide_get_best_pio_mode(drive, pio, 4); - cs5520_tune_chipset(drive, (XFER_PIO_0 + pio)); } -static int cs5520_config_drive_xfer_rate(ide_drive_t *drive) +static void cs5520_set_dma_mode(ide_drive_t *drive, const u8 speed) { - /* Tune the drive for PIO modes up to PIO 4 */ - cs5520_tune_drive(drive, 255); - - /* Then tell the core to use DMA operations */ - return 0; -} + printk(KERN_ERR "cs55x0: bad ide timing.\n"); -/* - * We provide a callback for our nonstandard DMA location - */ - -static void __devinit cs5520_init_setup_dma(struct pci_dev *dev, ide_pci_device_t *d, ide_hwif_t *hwif) -{ - unsigned long bmide = pci_resource_start(dev, 2); /* Not the usual 4 */ - if(hwif->mate && hwif->mate->dma_base) /* Second channel at primary + 8 */ - bmide += 8; - ide_setup_dma(hwif, bmide, 8); + cs5520_set_pio_mode(drive, 0); } /* @@ -159,44 +113,31 @@ static void __devinit cs5520_init_setup_dma(struct pci_dev *dev, ide_pci_device_ static int cs5520_dma_on(ide_drive_t *drive) { + /* ATAPI is harder so leave it for now */ drive->vdma = 1; return 0; } static void __devinit init_hwif_cs5520(ide_hwif_t *hwif) { - hwif->tuneproc = &cs5520_tune_drive; - hwif->speedproc = &cs5520_tune_chipset; - hwif->ide_dma_check = &cs5520_config_drive_xfer_rate; - hwif->ide_dma_on = &cs5520_dma_on; + hwif->set_pio_mode = &cs5520_set_pio_mode; + hwif->set_dma_mode = &cs5520_set_dma_mode; - if(!noautodma) - hwif->autodma = 1; - - if(!hwif->dma_base) - { - hwif->drives[0].autotune = 1; - hwif->drives[1].autotune = 1; + if (hwif->dma_base == 0) return; - } - - hwif->atapi_dma = 0; - hwif->ultra_mask = 0; - hwif->swdma_mask = 0; - hwif->mwdma_mask = 0; - - hwif->drives[0].autodma = hwif->autodma; - hwif->drives[1].autodma = hwif->autodma; + + hwif->ide_dma_on = &cs5520_dma_on; } #define DECLARE_CS_DEV(name_str) \ { \ .name = name_str, \ - .init_setup_dma = cs5520_init_setup_dma, \ .init_hwif = init_hwif_cs5520, \ - .autodma = AUTODMA, \ - .bootable = ON_BOARD, \ - .host_flags = IDE_HFLAG_ISA_PORTS, \ + .host_flags = IDE_HFLAG_ISA_PORTS | \ + IDE_HFLAG_CS5520 | \ + IDE_HFLAG_VDMA | \ + IDE_HFLAG_NO_ATAPI_DMA | \ + IDE_HFLAG_BOOTABLE, \ .pio_mask = ATA_PIO4, \ } @@ -258,9 +199,9 @@ static int __devinit cs5520_init_one(struct pci_dev *dev, const struct pci_devic return 0; } -static struct pci_device_id cs5520_pci_tbl[] = { - { PCI_VENDOR_ID_CYRIX, PCI_DEVICE_ID_CYRIX_5510, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, - { PCI_VENDOR_ID_CYRIX, PCI_DEVICE_ID_CYRIX_5520, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 1}, +static const struct pci_device_id cs5520_pci_tbl[] = { + { PCI_VDEVICE(CYRIX, PCI_DEVICE_ID_CYRIX_5510), 0 }, + { PCI_VDEVICE(CYRIX, PCI_DEVICE_ID_CYRIX_5520), 1 }, { 0, }, }; MODULE_DEVICE_TABLE(pci, cs5520_pci_tbl); diff --git a/drivers/ide/pci/cs5530.c b/drivers/ide/pci/cs5530.c index e5949b1d3fb..ba0c6eba024 100644 --- a/drivers/ide/pci/cs5530.c +++ b/drivers/ide/pci/cs5530.c @@ -1,5 +1,5 @@ /* - * linux/drivers/ide/pci/cs5530.c Version 0.74 Jul 28 2007 + * linux/drivers/ide/pci/cs5530.c Version 0.76 Aug 3 2007 * * Copyright (C) 2000 Andre Hedrick <andre@linux-ide.org> * Copyright (C) 2000 Mark Lord <mlord@pobox.com> @@ -30,22 +30,6 @@ #include <asm/io.h> #include <asm/irq.h> -/** - * cs5530_xfer_set_mode - set a new transfer mode at the drive - * @drive: drive to tune - * @mode: new mode - * - * Logging wrapper to the IDE driver speed configuration. This can - * probably go away now. - */ - -static int cs5530_set_xfer_mode (ide_drive_t *drive, u8 mode) -{ - printk(KERN_DEBUG "%s: cs5530_set_xfer_mode(%s)\n", - drive->name, ide_xfer_verbose(mode)); - return (ide_config_drive_speed(drive, mode)); -} - /* * Here are the standard PIO mode 0-4 timings for each "format". * Format-0 uses fast data reg timings, with slower command reg timings. @@ -62,30 +46,23 @@ static unsigned int cs5530_pio_timings[2][5] = { #define CS5530_BAD_PIO(timings) (((timings)&~0x80000000)==0x0000e132) #define CS5530_BASEREG(hwif) (((hwif)->dma_base & ~0xf) + ((hwif)->channel ? 0x30 : 0x20)) -static void cs5530_tunepio(ide_drive_t *drive, u8 pio) -{ - unsigned long basereg = CS5530_BASEREG(drive->hwif); - unsigned int format = (inl(basereg + 4) >> 31) & 1; - - outl(cs5530_pio_timings[format][pio], basereg + ((drive->dn & 1)<<3)); -} - /** - * cs5530_tuneproc - select/set PIO modes + * cs5530_set_pio_mode - set host controller for PIO mode + * @drive: drive + * @pio: PIO mode number * - * cs5530_tuneproc() handles selection/setting of PIO modes - * for both the chipset and drive. + * Handles setting of PIO mode for the chipset. * - * The ide_init_cs5530() routine guarantees that all drives + * The init_hwif_cs5530() routine guarantees that all drives * will have valid default PIO timings set up before we get here. */ -static void cs5530_tuneproc (ide_drive_t *drive, u8 pio) /* pio=255 means "autotune" */ +static void cs5530_set_pio_mode(ide_drive_t *drive, const u8 pio) { - pio = ide_get_best_pio_mode(drive, pio, 4); + unsigned long basereg = CS5530_BASEREG(drive->hwif); + unsigned int format = (inl(basereg + 4) >> 31) & 1; - if (cs5530_set_xfer_mode(drive, XFER_PIO_0 + pio) == 0) - cs5530_tunepio(drive, pio); + outl(cs5530_pio_timings[format][pio], basereg + ((drive->dn & 1)<<3)); } /** @@ -127,38 +104,11 @@ out: return mask; } -/** - * cs5530_config_dma - set DMA/UDMA mode - * @drive: drive to tune - * - * cs5530_config_dma() handles setting of DMA/UDMA mode - * for both the chipset and drive. - */ - -static int cs5530_config_dma(ide_drive_t *drive) -{ - if (ide_tune_dma(drive)) - return 0; - - return 1; -} - -static int cs5530_tune_chipset(ide_drive_t *drive, u8 mode) +static void cs5530_set_dma_mode(ide_drive_t *drive, const u8 mode) { unsigned long basereg; unsigned int reg, timings = 0; - mode = ide_rate_filter(drive, mode); - - /* - * Tell the drive to switch to the new mode; abort on failure. - */ - if (cs5530_set_xfer_mode(drive, mode)) - return 1; /* failure */ - - /* - * Now tune the chipset to match the drive: - */ switch (mode) { case XFER_UDMA_0: timings = 0x00921250; break; case XFER_UDMA_1: timings = 0x00911140; break; @@ -166,13 +116,6 @@ static int cs5530_tune_chipset(ide_drive_t *drive, u8 mode) case XFER_MW_DMA_0: timings = 0x00077771; break; case XFER_MW_DMA_1: timings = 0x00012121; break; case XFER_MW_DMA_2: timings = 0x00002020; break; - case XFER_PIO_4: - case XFER_PIO_3: - case XFER_PIO_2: - case XFER_PIO_1: - case XFER_PIO_0: - cs5530_tunepio(drive, mode - XFER_PIO_0); - return 0; default: BUG(); break; @@ -190,8 +133,6 @@ static int cs5530_tune_chipset(ide_drive_t *drive, u8 mode) outl(reg, basereg + 4); /* write drive0 config register */ outl(timings, basereg + 12); /* write drive1 config register */ } - - return 0; /* success */ } /** @@ -303,53 +244,33 @@ static void __devinit init_hwif_cs5530 (ide_hwif_t *hwif) { unsigned long basereg; u32 d0_timings; - hwif->autodma = 0; - if (hwif->mate) - hwif->serialized = hwif->mate->serialized = 1; - - hwif->tuneproc = &cs5530_tuneproc; - hwif->speedproc = &cs5530_tune_chipset; + hwif->set_pio_mode = &cs5530_set_pio_mode; + hwif->set_dma_mode = &cs5530_set_dma_mode; basereg = CS5530_BASEREG(hwif); d0_timings = inl(basereg + 0); - if (CS5530_BAD_PIO(d0_timings)) { - /* PIO timings not initialized? */ + if (CS5530_BAD_PIO(d0_timings)) outl(cs5530_pio_timings[(d0_timings >> 31) & 1][0], basereg + 0); - if (!hwif->drives[0].autotune) - hwif->drives[0].autotune = 1; - /* needs autotuning later */ - } - if (CS5530_BAD_PIO(inl(basereg + 8))) { - /* PIO timings not initialized? */ + if (CS5530_BAD_PIO(inl(basereg + 8))) outl(cs5530_pio_timings[(d0_timings >> 31) & 1][0], basereg + 8); - if (!hwif->drives[1].autotune) - hwif->drives[1].autotune = 1; - /* needs autotuning later */ - } if (hwif->dma_base == 0) return; - hwif->atapi_dma = 1; - hwif->ultra_mask = 0x07; - hwif->mwdma_mask = 0x07; - hwif->udma_filter = cs5530_udma_filter; - hwif->ide_dma_check = &cs5530_config_dma; - if (!noautodma) - hwif->autodma = 1; - hwif->drives[0].autodma = hwif->autodma; - hwif->drives[1].autodma = hwif->autodma; } static ide_pci_device_t cs5530_chipset __devinitdata = { .name = "CS5530", .init_chipset = init_chipset_cs5530, .init_hwif = init_hwif_cs5530, - .autodma = AUTODMA, - .bootable = ON_BOARD, + .host_flags = IDE_HFLAG_SERIALIZE | + IDE_HFLAG_POST_SET_MODE | + IDE_HFLAG_BOOTABLE, .pio_mask = ATA_PIO4, + .mwdma_mask = ATA_MWDMA2, + .udma_mask = ATA_UDMA2, }; static int __devinit cs5530_init_one(struct pci_dev *dev, const struct pci_device_id *id) @@ -357,8 +278,8 @@ static int __devinit cs5530_init_one(struct pci_dev *dev, const struct pci_devic return ide_setup_pci_device(dev, &cs5530_chipset); } -static struct pci_device_id cs5530_pci_tbl[] = { - { PCI_VENDOR_ID_CYRIX, PCI_DEVICE_ID_CYRIX_5530_IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, +static const struct pci_device_id cs5530_pci_tbl[] = { + { PCI_VDEVICE(CYRIX, PCI_DEVICE_ID_CYRIX_5530_IDE), 0 }, { 0, }, }; MODULE_DEVICE_TABLE(pci, cs5530_pci_tbl); diff --git a/drivers/ide/pci/cs5535.c b/drivers/ide/pci/cs5535.c index 082ca7da2cb..5ac82ffa5c0 100644 --- a/drivers/ide/pci/cs5535.c +++ b/drivers/ide/pci/cs5535.c @@ -75,7 +75,7 @@ static unsigned int cs5535_udma_timings[5] = * * cs5535_set_speed() configures the chipset to a new speed. */ -static void cs5535_set_speed(ide_drive_t *drive, u8 speed) +static void cs5535_set_speed(ide_drive_t *drive, const u8 speed) { u32 reg = 0, dummy; @@ -84,7 +84,7 @@ static void cs5535_set_speed(ide_drive_t *drive, u8 speed) /* Set the PIO timings */ if ((speed & XFER_MODE) == XFER_PIO) { - ide_drive_t *pair = &drive->hwif->drives[drive->dn ^ 1]; + ide_drive_t *pair = ide_get_paired_drive(drive); u8 cmd, pioa; cmd = pioa = speed - XFER_PIO_0; @@ -131,48 +131,30 @@ static void cs5535_set_speed(ide_drive_t *drive, u8 speed) } } -/**** - * cs5535_set_drive - Configure the drive to the new speed - * @drive: Drive to set up - * @speed: desired speed +/** + * cs5535_set_dma_mode - set host controller for DMA mode + * @drive: drive + * @speed: DMA mode * - * cs5535_set_drive() configures the drive and the chipset to a - * new speed. It also can be called by upper layers. + * Programs the chipset for DMA mode. */ -static int cs5535_set_drive(ide_drive_t *drive, u8 speed) + +static void cs5535_set_dma_mode(ide_drive_t *drive, const u8 speed) { - speed = ide_rate_filter(drive, speed); - ide_config_drive_speed(drive, speed); cs5535_set_speed(drive, speed); - - return 0; } -/**** - * cs5535_tuneproc - PIO setup - * @drive: drive to set up - * @pio: mode to use (255 for 'best possible') +/** + * cs5535_set_pio_mode - set host controller for PIO mode + * @drive: drive + * @pio: PIO mode number * * A callback from the upper layers for PIO-only tuning. */ -static void cs5535_tuneproc(ide_drive_t *drive, u8 pio) -{ - pio = ide_get_best_pio_mode(drive, pio, 4); - ide_config_drive_speed(drive, XFER_PIO_0 + pio); - cs5535_set_speed(drive, XFER_PIO_0 + pio); -} -static int cs5535_dma_check(ide_drive_t *drive) +static void cs5535_set_pio_mode(ide_drive_t *drive, const u8 pio) { - drive->init_speed = 0; - - if (ide_tune_dma(drive)) - return 0; - - if (ide_use_fast_pio(drive)) - cs5535_tuneproc(drive, 255); - - return -1; + cs5535_set_speed(drive, XFER_PIO_0 + pio); } static u8 __devinit cs5535_cable_detect(struct pci_dev *dev) @@ -195,37 +177,23 @@ static u8 __devinit cs5535_cable_detect(struct pci_dev *dev) */ static void __devinit init_hwif_cs5535(ide_hwif_t *hwif) { - int i; - - hwif->autodma = 0; - - hwif->tuneproc = &cs5535_tuneproc; - hwif->speedproc = &cs5535_set_drive; - hwif->ide_dma_check = &cs5535_dma_check; + hwif->set_pio_mode = &cs5535_set_pio_mode; + hwif->set_dma_mode = &cs5535_set_dma_mode; - hwif->atapi_dma = 1; - hwif->ultra_mask = 0x1F; - hwif->mwdma_mask = 0x07; + if (hwif->dma_base == 0) + return; hwif->cbl = cs5535_cable_detect(hwif->pci_dev); - - if (!noautodma) - hwif->autodma = 1; - - /* just setting autotune and not worrying about bios timings */ - for (i = 0; i < 2; i++) { - hwif->drives[i].autotune = 1; - hwif->drives[i].autodma = hwif->autodma; - } } static ide_pci_device_t cs5535_chipset __devinitdata = { .name = "CS5535", .init_hwif = init_hwif_cs5535, - .autodma = AUTODMA, - .bootable = ON_BOARD, - .host_flags = IDE_HFLAG_SINGLE, + .host_flags = IDE_HFLAG_SINGLE | IDE_HFLAG_POST_SET_MODE | + IDE_HFLAG_BOOTABLE, .pio_mask = ATA_PIO4, + .mwdma_mask = ATA_MWDMA2, + .udma_mask = ATA_UDMA4, }; static int __devinit cs5535_init_one(struct pci_dev *dev, @@ -234,10 +202,8 @@ static int __devinit cs5535_init_one(struct pci_dev *dev, return ide_setup_pci_device(dev, &cs5535_chipset); } -static struct pci_device_id cs5535_pci_tbl[] = -{ - { PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_CS5535_IDE, PCI_ANY_ID, - PCI_ANY_ID, 0, 0, 0}, +static const struct pci_device_id cs5535_pci_tbl[] = { + { PCI_VDEVICE(NS, PCI_DEVICE_ID_NS_CS5535_IDE), 0 }, { 0, }, }; diff --git a/drivers/ide/pci/cy82c693.c b/drivers/ide/pci/cy82c693.c index daa36fcbc8e..efc20bd97fd 100644 --- a/drivers/ide/pci/cy82c693.c +++ b/drivers/ide/pci/cy82c693.c @@ -1,5 +1,5 @@ /* - * linux/drivers/ide/pci/cy82c693.c Version 0.40 Sep. 10, 2002 + * linux/drivers/ide/pci/cy82c693.c Version 0.41 Aug 27, 2007 * * Copyright (C) 1998-2000 Andreas S. Krebs (akrebs@altavista.net), Maintainer * Copyright (C) 1998-2002 Andre Hedrick <andre@linux-ide.org>, Integrator @@ -97,9 +97,6 @@ #define CY82_INDEX_CHANNEL1 0x31 #define CY82_INDEX_TIMEOUT 0x32 -/* the max PIO mode - from datasheet */ -#define CY82C693_MAX_PIO 4 - /* the min and max PCI bus speed in MHz - from datasheet */ #define CY82C963_MIN_BUS_SPEED 25 #define CY82C963_MAX_BUS_SPEED 33 @@ -148,9 +145,6 @@ static void compute_clocks (u8 pio, pio_clocks_t *p_pclk) * so you can play with the idebus=xx parameter */ - if (pio > CY82C693_MAX_PIO) - pio = CY82C693_MAX_PIO; - /* let's calc the address setup time clocks */ p_pclk->address_time = (u8)calc_clk(ide_pio_timings[pio].setup_time, bus_speed); @@ -269,10 +263,7 @@ static int cy82c693_ide_dma_on (ide_drive_t *drive) return __ide_dma_on(drive); } -/* - * tune ide drive - set PIO mode - */ -static void cy82c693_tune_drive (ide_drive_t *drive, u8 pio) +static void cy82c693_set_pio_mode(ide_drive_t *drive, const u8 pio) { ide_hwif_t *hwif = HWIF(drive); struct pci_dev *dev = hwif->pci_dev; @@ -329,13 +320,6 @@ static void cy82c693_tune_drive (ide_drive_t *drive, u8 pio) addrCtrl, pclk.time_16r, pclk.time_16w, pclk.time_8); #endif /* CY82C693_DEBUG_LOGS */ - /* first let's calc the pio modes */ - pio = ide_get_best_pio_mode(drive, pio, CY82C693_MAX_PIO); - -#if CY82C693_DEBUG_INFO - printk (KERN_INFO "%s: Selected PIO mode %d\n", drive->name, pio); -#endif /* CY82C693_DEBUG_INFO */ - /* let's calc the values for this PIO mode */ compute_clocks(pio, &pclk); @@ -444,26 +428,13 @@ static unsigned int __devinit init_chipset_cy82c693(struct pci_dev *dev, const c */ static void __devinit init_hwif_cy82c693(ide_hwif_t *hwif) { - hwif->autodma = 0; - hwif->chipset = ide_cy82c693; - hwif->tuneproc = &cy82c693_tune_drive; + hwif->set_pio_mode = &cy82c693_set_pio_mode; - if (!hwif->dma_base) { - hwif->drives[0].autotune = 1; - hwif->drives[1].autotune = 1; + if (hwif->dma_base == 0) return; - } - - hwif->atapi_dma = 1; - hwif->mwdma_mask = 0x04; - hwif->swdma_mask = 0x04; hwif->ide_dma_on = &cy82c693_ide_dma_on; - if (!noautodma) - hwif->autodma = 1; - hwif->drives[0].autodma = hwif->autodma; - hwif->drives[1].autodma = hwif->autodma; } static __devinitdata ide_hwif_t *primary; @@ -483,10 +454,11 @@ static ide_pci_device_t cy82c693_chipset __devinitdata = { .init_chipset = init_chipset_cy82c693, .init_iops = init_iops_cy82c693, .init_hwif = init_hwif_cy82c693, - .autodma = AUTODMA, - .bootable = ON_BOARD, - .host_flags = IDE_HFLAG_SINGLE, + .host_flags = IDE_HFLAG_SINGLE | IDE_HFLAG_TRUST_BIOS_FOR_DMA | + IDE_HFLAG_BOOTABLE, .pio_mask = ATA_PIO4, + .swdma_mask = ATA_SWDMA2_ONLY, + .mwdma_mask = ATA_MWDMA2_ONLY, }; static int __devinit cy82c693_init_one(struct pci_dev *dev, const struct pci_device_id *id) @@ -505,8 +477,8 @@ static int __devinit cy82c693_init_one(struct pci_dev *dev, const struct pci_dev return ret; } -static struct pci_device_id cy82c693_pci_tbl[] = { - { PCI_VENDOR_ID_CONTAQ, PCI_DEVICE_ID_CONTAQ_82C693, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, +static const struct pci_device_id cy82c693_pci_tbl[] = { + { PCI_VDEVICE(CONTAQ, PCI_DEVICE_ID_CONTAQ_82C693), 0 }, { 0, }, }; MODULE_DEVICE_TABLE(pci, cy82c693_pci_tbl); diff --git a/drivers/ide/pci/generic.c b/drivers/ide/pci/generic.c index 48caa468b76..51165832e7f 100644 --- a/drivers/ide/pci/generic.c +++ b/drivers/ide/pci/generic.c @@ -65,109 +65,65 @@ static void __devinit init_hwif_generic (ide_hwif_t *hwif) default: break; } - - if (!(hwif->dma_base)) - return; - - hwif->atapi_dma = 1; - hwif->ultra_mask = 0x7f; - hwif->mwdma_mask = 0x07; - hwif->swdma_mask = 0x07; - - if (!noautodma) - hwif->autodma = 1; - hwif->drives[0].autodma = hwif->autodma; - hwif->drives[1].autodma = hwif->autodma; } -#if 0 - /* Logic to add back later on */ - - if ((dev->class >> 8) == PCI_CLASS_STORAGE_IDE) { - ide_pci_device_t *unknown = unknown_chipset; - init_setup_unknown(dev, unknown); - return 1; +#define DECLARE_GENERIC_PCI_DEV(name_str, dma_setting) \ + { \ + .name = name_str, \ + .init_hwif = init_hwif_generic, \ + .host_flags = IDE_HFLAG_TRUST_BIOS_FOR_DMA | \ + dma_setting | \ + IDE_HFLAG_BOOTABLE, \ + .swdma_mask = ATA_SWDMA2, \ + .mwdma_mask = ATA_MWDMA2, \ + .udma_mask = ATA_UDMA6, \ } - return 0; -#endif static ide_pci_device_t generic_chipsets[] __devinitdata = { - { /* 0 */ - .name = "Unknown", - .init_hwif = init_hwif_generic, - .autodma = AUTODMA, - .bootable = ON_BOARD, - },{ /* 1 */ + /* 0 */ DECLARE_GENERIC_PCI_DEV("Unknown", 0), + + { /* 1 */ .name = "NS87410", .init_hwif = init_hwif_generic, - .autodma = AUTODMA, .enablebits = {{0x43,0x08,0x08}, {0x47,0x08,0x08}}, - .bootable = ON_BOARD, - },{ /* 2 */ - .name = "SAMURAI", - .init_hwif = init_hwif_generic, - .autodma = AUTODMA, - .bootable = ON_BOARD, - },{ /* 3 */ - .name = "HT6565", - .init_hwif = init_hwif_generic, - .autodma = AUTODMA, - .bootable = ON_BOARD, - },{ /* 4 */ - .name = "UM8673F", - .init_hwif = init_hwif_generic, - .autodma = NODMA, - .bootable = ON_BOARD, - },{ /* 5 */ - .name = "UM8886A", - .init_hwif = init_hwif_generic, - .autodma = NODMA, - .bootable = ON_BOARD, - },{ /* 6 */ - .name = "UM8886BF", - .init_hwif = init_hwif_generic, - .autodma = NODMA, - .bootable = ON_BOARD, - },{ /* 7 */ - .name = "HINT_IDE", - .init_hwif = init_hwif_generic, - .autodma = AUTODMA, - .bootable = ON_BOARD, - },{ /* 8 */ - .name = "VIA_IDE", - .init_hwif = init_hwif_generic, - .autodma = NOAUTODMA, - .bootable = ON_BOARD, - },{ /* 9 */ - .name = "OPTI621V", - .init_hwif = init_hwif_generic, - .autodma = NOAUTODMA, - .bootable = ON_BOARD, - },{ /* 10 */ + .host_flags = IDE_HFLAG_TRUST_BIOS_FOR_DMA | + IDE_HFLAG_BOOTABLE, + .swdma_mask = ATA_SWDMA2, + .mwdma_mask = ATA_MWDMA2, + .udma_mask = ATA_UDMA6, + }, + + /* 2 */ DECLARE_GENERIC_PCI_DEV("SAMURAI", 0), + /* 3 */ DECLARE_GENERIC_PCI_DEV("HT6565", 0), + /* 4 */ DECLARE_GENERIC_PCI_DEV("UM8673F", IDE_HFLAG_NO_DMA), + /* 5 */ DECLARE_GENERIC_PCI_DEV("UM8886A", IDE_HFLAG_NO_DMA), + /* 6 */ DECLARE_GENERIC_PCI_DEV("UM8886BF", IDE_HFLAG_NO_DMA), + /* 7 */ DECLARE_GENERIC_PCI_DEV("HINT_IDE", 0), + /* 8 */ DECLARE_GENERIC_PCI_DEV("VIA_IDE", IDE_HFLAG_NO_AUTODMA), + /* 9 */ DECLARE_GENERIC_PCI_DEV("OPTI621V", IDE_HFLAG_NO_AUTODMA), + + { /* 10 */ .name = "VIA8237SATA", .init_hwif = init_hwif_generic, - .autodma = AUTODMA, - .bootable = OFF_BOARD, - },{ /* 11 */ - .name = "Piccolo0102", - .init_hwif = init_hwif_generic, - .autodma = NOAUTODMA, - .bootable = ON_BOARD, - },{ /* 12 */ - .name = "Piccolo0103", - .init_hwif = init_hwif_generic, - .autodma = NOAUTODMA, - .bootable = ON_BOARD, - },{ /* 13 */ - .name = "Piccolo0105", - .init_hwif = init_hwif_generic, - .autodma = NOAUTODMA, - .bootable = ON_BOARD, - },{ /* 14 */ + .host_flags = IDE_HFLAG_TRUST_BIOS_FOR_DMA | + IDE_HFLAG_OFF_BOARD, + .swdma_mask = ATA_SWDMA2, + .mwdma_mask = ATA_MWDMA2, + .udma_mask = ATA_UDMA6, + }, + + /* 11 */ DECLARE_GENERIC_PCI_DEV("Piccolo0102", IDE_HFLAG_NO_AUTODMA), + /* 12 */ DECLARE_GENERIC_PCI_DEV("Piccolo0103", IDE_HFLAG_NO_AUTODMA), + /* 13 */ DECLARE_GENERIC_PCI_DEV("Piccolo0105", IDE_HFLAG_NO_AUTODMA), + + { /* 14 */ .name = "Revolution", .init_hwif = init_hwif_generic, - .autodma = AUTODMA, - .bootable = OFF_BOARD, + .host_flags = IDE_HFLAG_TRUST_BIOS_FOR_DMA | + IDE_HFLAG_OFF_BOARD, + .swdma_mask = ATA_SWDMA2, + .mwdma_mask = ATA_MWDMA2, + .udma_mask = ATA_UDMA6, } }; @@ -226,25 +182,28 @@ out: return ret; } -static struct pci_device_id generic_pci_tbl[] = { - { PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_87410, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 1}, - { PCI_VENDOR_ID_PCTECH, PCI_DEVICE_ID_PCTECH_SAMURAI_IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 2}, - { PCI_VENDOR_ID_HOLTEK, PCI_DEVICE_ID_HOLTEK_6565, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 3}, - { PCI_VENDOR_ID_UMC, PCI_DEVICE_ID_UMC_UM8673F, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 4}, - { PCI_VENDOR_ID_UMC, PCI_DEVICE_ID_UMC_UM8886A, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 5}, - { PCI_VENDOR_ID_UMC, PCI_DEVICE_ID_UMC_UM8886BF, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 6}, - { PCI_VENDOR_ID_HINT, PCI_DEVICE_ID_HINT_VXPROII_IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 7}, - { PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C561, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 8}, - { PCI_VENDOR_ID_OPTI, PCI_DEVICE_ID_OPTI_82C558, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 9}, +static const struct pci_device_id generic_pci_tbl[] = { + { PCI_VDEVICE(NS, PCI_DEVICE_ID_NS_87410), 1 }, + { PCI_VDEVICE(PCTECH, PCI_DEVICE_ID_PCTECH_SAMURAI_IDE), 2 }, + { PCI_VDEVICE(HOLTEK, PCI_DEVICE_ID_HOLTEK_6565), 3 }, + { PCI_VDEVICE(UMC, PCI_DEVICE_ID_UMC_UM8673F), 4 }, + { PCI_VDEVICE(UMC, PCI_DEVICE_ID_UMC_UM8886A), 5 }, + { PCI_VDEVICE(UMC, PCI_DEVICE_ID_UMC_UM8886BF), 6 }, + { PCI_VDEVICE(HINT, PCI_DEVICE_ID_HINT_VXPROII_IDE), 7 }, + { PCI_VDEVICE(VIA, PCI_DEVICE_ID_VIA_82C561), 8 }, + { PCI_VDEVICE(OPTI, PCI_DEVICE_ID_OPTI_82C558), 9 }, #ifdef CONFIG_BLK_DEV_IDE_SATA - { PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8237_SATA, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 10}, + { PCI_VDEVICE(VIA, PCI_DEVICE_ID_VIA_8237_SATA), 10 }, #endif - { PCI_VENDOR_ID_TOSHIBA,PCI_DEVICE_ID_TOSHIBA_PICCOLO, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 11}, - { PCI_VENDOR_ID_TOSHIBA,PCI_DEVICE_ID_TOSHIBA_PICCOLO_1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 12}, - { PCI_VENDOR_ID_TOSHIBA,PCI_DEVICE_ID_TOSHIBA_PICCOLO_2, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 13}, - { PCI_VENDOR_ID_NETCELL,PCI_DEVICE_ID_REVOLUTION, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 14}, - /* Must come last. If you add entries adjust this table appropriately and the init_one code */ - { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_STORAGE_IDE << 8, 0xFFFFFF00UL, 0}, + { PCI_VDEVICE(TOSHIBA, PCI_DEVICE_ID_TOSHIBA_PICCOLO), 11 }, + { PCI_VDEVICE(TOSHIBA, PCI_DEVICE_ID_TOSHIBA_PICCOLO_1), 12 }, + { PCI_VDEVICE(TOSHIBA, PCI_DEVICE_ID_TOSHIBA_PICCOLO_2), 13 }, + { PCI_VDEVICE(NETCELL, PCI_DEVICE_ID_REVOLUTION), 14 }, + /* + * Must come last. If you add entries adjust + * this table and generic_chipsets[] appropriately. + */ + { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_STORAGE_IDE << 8, 0xFFFFFF00UL, 0 }, { 0, }, }; MODULE_DEVICE_TABLE(pci, generic_pci_tbl); diff --git a/drivers/ide/pci/hpt34x.c b/drivers/ide/pci/hpt34x.c index cb8fe5643d3..67af1a7dde3 100644 --- a/drivers/ide/pci/hpt34x.c +++ b/drivers/ide/pci/hpt34x.c @@ -43,10 +43,9 @@ #define HPT343_DEBUG_DRIVE_INFO 0 -static int hpt34x_tune_chipset (ide_drive_t *drive, u8 xferspeed) +static void hpt34x_set_mode(ide_drive_t *drive, const u8 speed) { struct pci_dev *dev = HWIF(drive)->pci_dev; - u8 speed = ide_rate_filter(drive, xferspeed); u32 reg1= 0, tmp1 = 0, reg2 = 0, tmp2 = 0; u8 hi_speed, lo_speed; @@ -74,27 +73,11 @@ static int hpt34x_tune_chipset (ide_drive_t *drive, u8 xferspeed) drive->dn, reg1, tmp1, reg2, tmp2, hi_speed, lo_speed); #endif /* HPT343_DEBUG_DRIVE_INFO */ - - return(ide_config_drive_speed(drive, speed)); } -static void hpt34x_tune_drive (ide_drive_t *drive, u8 pio) +static void hpt34x_set_pio_mode(ide_drive_t *drive, const u8 pio) { - pio = ide_get_best_pio_mode(drive, pio, 5); - (void) hpt34x_tune_chipset(drive, (XFER_PIO_0 + pio)); -} - -static int hpt34x_config_drive_xfer_rate (ide_drive_t *drive) -{ - drive->init_speed = 0; - - if (ide_tune_dma(drive)) - return -1; - - if (ide_use_fast_pio(drive)) - hpt34x_tune_drive(drive, 255); - - return -1; + hpt34x_set_mode(drive, XFER_PIO_0 + pio); } /* @@ -142,59 +125,51 @@ static unsigned int __devinit init_chipset_hpt34x(struct pci_dev *dev, const cha static void __devinit init_hwif_hpt34x(ide_hwif_t *hwif) { - u16 pcicmd = 0; - - hwif->autodma = 0; - - hwif->tuneproc = &hpt34x_tune_drive; - hwif->speedproc = &hpt34x_tune_chipset; - hwif->drives[0].autotune = 1; - hwif->drives[1].autotune = 1; - - pci_read_config_word(hwif->pci_dev, PCI_COMMAND, &pcicmd); - - if (!hwif->dma_base) - return; + hwif->set_pio_mode = &hpt34x_set_pio_mode; + hwif->set_dma_mode = &hpt34x_set_mode; +} +static ide_pci_device_t hpt34x_chipsets[] __devinitdata = { + { /* 0 */ + .name = "HPT343", + .init_chipset = init_chipset_hpt34x, + .init_hwif = init_hwif_hpt34x, + .extra = 16, + .host_flags = IDE_HFLAG_NO_ATAPI_DMA | + IDE_HFLAG_NO_AUTODMA, + .pio_mask = ATA_PIO5, + }, + { /* 1 */ + .name = "HPT345", + .init_chipset = init_chipset_hpt34x, + .init_hwif = init_hwif_hpt34x, + .extra = 16, + .host_flags = IDE_HFLAG_NO_ATAPI_DMA | + IDE_HFLAG_NO_AUTODMA | + IDE_HFLAG_OFF_BOARD, + .pio_mask = ATA_PIO5, #ifdef CONFIG_HPT34X_AUTODMA - hwif->ultra_mask = 0x07; - hwif->mwdma_mask = 0x07; - hwif->swdma_mask = 0x07; + .swdma_mask = ATA_SWDMA2, + .mwdma_mask = ATA_MWDMA2, + .udma_mask = ATA_UDMA2, #endif - - hwif->ide_dma_check = &hpt34x_config_drive_xfer_rate; - if (!noautodma) - hwif->autodma = (pcicmd & PCI_COMMAND_MEMORY) ? 1 : 0; - hwif->drives[0].autodma = hwif->autodma; - hwif->drives[1].autodma = hwif->autodma; -} - -static ide_pci_device_t hpt34x_chipset __devinitdata = { - .name = "HPT34X", - .init_chipset = init_chipset_hpt34x, - .init_hwif = init_hwif_hpt34x, - .autodma = NOAUTODMA, - .bootable = NEVER_BOARD, - .extra = 16, - .pio_mask = ATA_PIO5, + } }; static int __devinit hpt34x_init_one(struct pci_dev *dev, const struct pci_device_id *id) { - ide_pci_device_t *d = &hpt34x_chipset; - static char *chipset_names[] = {"HPT343", "HPT345"}; + ide_pci_device_t *d; u16 pcicmd = 0; pci_read_config_word(dev, PCI_COMMAND, &pcicmd); - d->name = chipset_names[(pcicmd & PCI_COMMAND_MEMORY) ? 1 : 0]; - d->bootable = (pcicmd & PCI_COMMAND_MEMORY) ? OFF_BOARD : NEVER_BOARD; + d = &hpt34x_chipsets[(pcicmd & PCI_COMMAND_MEMORY) ? 1 : 0]; return ide_setup_pci_device(dev, d); } -static struct pci_device_id hpt34x_pci_tbl[] = { - { PCI_VENDOR_ID_TTI, PCI_DEVICE_ID_TTI_HPT343, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, +static const struct pci_device_id hpt34x_pci_tbl[] = { + { PCI_VDEVICE(TTI, PCI_DEVICE_ID_TTI_HPT343), 0 }, { 0, }, }; MODULE_DEVICE_TABLE(pci, hpt34x_pci_tbl); diff --git a/drivers/ide/pci/hpt366.c b/drivers/ide/pci/hpt366.c index 39f1c89f7c8..18f5b7ddaee 100644 --- a/drivers/ide/pci/hpt366.c +++ b/drivers/ide/pci/hpt366.c @@ -1,9 +1,10 @@ /* - * linux/drivers/ide/pci/hpt366.c Version 1.12 Aug 19, 2007 + * linux/drivers/ide/pci/hpt366.c Version 1.20 Oct 1, 2007 * * Copyright (C) 1999-2003 Andre Hedrick <andre@linux-ide.org> * Portions Copyright (C) 2001 Sun Microsystems, Inc. * Portions Copyright (C) 2003 Red Hat Inc + * Portions Copyright (C) 2007 Bartlomiej Zolnierkiewicz * Portions Copyright (C) 2005-2007 MontaVista Software, Inc. * * Thanks to HighPoint Technologies for their assistance, and hardware. @@ -114,7 +115,7 @@ * unify HPT36x/37x timing setup code and the speedproc handlers by joining * the register setting lists into the table indexed by the clock selected * - set the correct hwif->ultra_mask for each individual chip - * - add UltraDMA mode filtering for the HPT37[24] based SATA cards + * - add Ultra and MW DMA mode filtering for the HPT37[24] based SATA cards * Sergei Shtylyov, <sshtylyov@ru.mvista.com> or <source@mvista.com> */ @@ -393,8 +394,9 @@ enum ata_clock { */ struct hpt_info { + char *chip_name; /* Chip name */ u8 chip_type; /* Chip type */ - u8 max_ultra; /* Max. UltraDMA mode allowed */ + u8 udma_mask; /* Allowed UltraDMA modes mask. */ u8 dpll_clk; /* DPLL clock in MHz */ u8 pci_clk; /* PCI clock in MHz */ u32 **settings; /* Chipset settings table */ @@ -432,78 +434,89 @@ static u32 *hpt37x_settings[NUM_ATA_CLOCKS] = { }; static struct hpt_info hpt36x __devinitdata = { + .chip_name = "HPT36x", .chip_type = HPT36x, - .max_ultra = HPT366_ALLOW_ATA66_3 ? (HPT366_ALLOW_ATA66_4 ? 4 : 3) : 2, + .udma_mask = HPT366_ALLOW_ATA66_3 ? (HPT366_ALLOW_ATA66_4 ? ATA_UDMA4 : ATA_UDMA3) : ATA_UDMA2, .dpll_clk = 0, /* no DPLL */ .settings = hpt36x_settings }; static struct hpt_info hpt370 __devinitdata = { + .chip_name = "HPT370", .chip_type = HPT370, - .max_ultra = HPT370_ALLOW_ATA100_5 ? 5 : 4, + .udma_mask = HPT370_ALLOW_ATA100_5 ? ATA_UDMA5 : ATA_UDMA4, .dpll_clk = 48, .settings = hpt37x_settings }; static struct hpt_info hpt370a __devinitdata = { + .chip_name = "HPT370A", .chip_type = HPT370A, - .max_ultra = HPT370_ALLOW_ATA100_5 ? 5 : 4, + .udma_mask = HPT370_ALLOW_ATA100_5 ? ATA_UDMA5 : ATA_UDMA4, .dpll_clk = 48, .settings = hpt37x_settings }; static struct hpt_info hpt374 __devinitdata = { + .chip_name = "HPT374", .chip_type = HPT374, - .max_ultra = 5, + .udma_mask = ATA_UDMA5, .dpll_clk = 48, .settings = hpt37x_settings }; static struct hpt_info hpt372 __devinitdata = { + .chip_name = "HPT372", .chip_type = HPT372, - .max_ultra = HPT372_ALLOW_ATA133_6 ? 6 : 5, + .udma_mask = HPT372_ALLOW_ATA133_6 ? ATA_UDMA6 : ATA_UDMA5, .dpll_clk = 55, .settings = hpt37x_settings }; static struct hpt_info hpt372a __devinitdata = { + .chip_name = "HPT372A", .chip_type = HPT372A, - .max_ultra = HPT372_ALLOW_ATA133_6 ? 6 : 5, + .udma_mask = HPT372_ALLOW_ATA133_6 ? ATA_UDMA6 : ATA_UDMA5, .dpll_clk = 66, .settings = hpt37x_settings }; static struct hpt_info hpt302 __devinitdata = { + .chip_name = "HPT302", .chip_type = HPT302, - .max_ultra = HPT372_ALLOW_ATA133_6 ? 6 : 5, + .udma_mask = HPT302_ALLOW_ATA133_6 ? ATA_UDMA6 : ATA_UDMA5, .dpll_clk = 66, .settings = hpt37x_settings }; static struct hpt_info hpt371 __devinitdata = { + .chip_name = "HPT371", .chip_type = HPT371, - .max_ultra = HPT371_ALLOW_ATA133_6 ? 6 : 5, + .udma_mask = HPT371_ALLOW_ATA133_6 ? ATA_UDMA6 : ATA_UDMA5, .dpll_clk = 66, .settings = hpt37x_settings }; static struct hpt_info hpt372n __devinitdata = { + .chip_name = "HPT372N", .chip_type = HPT372N, - .max_ultra = HPT372_ALLOW_ATA133_6 ? 6 : 5, + .udma_mask = HPT372_ALLOW_ATA133_6 ? ATA_UDMA6 : ATA_UDMA5, .dpll_clk = 77, .settings = hpt37x_settings }; static struct hpt_info hpt302n __devinitdata = { + .chip_name = "HPT302N", .chip_type = HPT302N, - .max_ultra = HPT302_ALLOW_ATA133_6 ? 6 : 5, + .udma_mask = HPT302_ALLOW_ATA133_6 ? ATA_UDMA6 : ATA_UDMA5, .dpll_clk = 77, .settings = hpt37x_settings }; static struct hpt_info hpt371n __devinitdata = { + .chip_name = "HPT371N", .chip_type = HPT371N, - .max_ultra = HPT371_ALLOW_ATA133_6 ? 6 : 5, + .udma_mask = HPT371_ALLOW_ATA133_6 ? ATA_UDMA6 : ATA_UDMA5, .dpll_clk = 77, .settings = hpt37x_settings }; @@ -562,6 +575,24 @@ static u8 hpt3xx_udma_filter(ide_drive_t *drive) return check_in_drive_list(drive, bad_ata33) ? 0x00 : mask; } +static u8 hpt3xx_mdma_filter(ide_drive_t *drive) +{ + ide_hwif_t *hwif = HWIF(drive); + struct hpt_info *info = pci_get_drvdata(hwif->pci_dev); + + switch (info->chip_type) { + case HPT372 : + case HPT372A: + case HPT372N: + case HPT374 : + if (ide_dev_is_sata(drive->id)) + return 0x00; + /* Fall thru */ + default: + return 0x07; + } +} + static u32 get_speed_setting(u8 speed, struct hpt_info *info) { int i; @@ -582,20 +613,15 @@ static u32 get_speed_setting(u8 speed, struct hpt_info *info) return (*info->settings)[i]; } -static int hpt36x_tune_chipset(ide_drive_t *drive, u8 xferspeed) +static void hpt36x_set_mode(ide_drive_t *drive, const u8 speed) { ide_hwif_t *hwif = HWIF(drive); struct pci_dev *dev = hwif->pci_dev; struct hpt_info *info = pci_get_drvdata(dev); - u8 speed = ide_rate_filter(drive, xferspeed); u8 itr_addr = drive->dn ? 0x44 : 0x40; u32 old_itr = 0; u32 itr_mask, new_itr; - /* TODO: move this to ide_rate_filter() [ check ->atapi_dma ] */ - if (drive->media != ide_disk) - speed = min_t(u8, speed, XFER_PIO_4); - itr_mask = speed < XFER_MW_DMA_0 ? 0x30070000 : (speed < XFER_UDMA_0 ? 0xc0070000 : 0xc03800ff); @@ -610,24 +636,17 @@ static int hpt36x_tune_chipset(ide_drive_t *drive, u8 xferspeed) new_itr &= ~0xc0000000; pci_write_config_dword(dev, itr_addr, new_itr); - - return ide_config_drive_speed(drive, speed); } -static int hpt37x_tune_chipset(ide_drive_t *drive, u8 xferspeed) +static void hpt37x_set_mode(ide_drive_t *drive, const u8 speed) { ide_hwif_t *hwif = HWIF(drive); struct pci_dev *dev = hwif->pci_dev; struct hpt_info *info = pci_get_drvdata(dev); - u8 speed = ide_rate_filter(drive, xferspeed); u8 itr_addr = 0x40 + (drive->dn * 4); u32 old_itr = 0; u32 itr_mask, new_itr; - /* TODO: move this to ide_rate_filter() [ check ->atapi_dma ] */ - if (drive->media != ide_disk) - speed = min_t(u8, speed, XFER_PIO_4); - itr_mask = speed < XFER_MW_DMA_0 ? 0x303c0000 : (speed < XFER_UDMA_0 ? 0xc03c0000 : 0xc1c001ff); @@ -639,25 +658,22 @@ static int hpt37x_tune_chipset(ide_drive_t *drive, u8 xferspeed) if (speed < XFER_MW_DMA_0) new_itr &= ~0x80000000; /* Disable on-chip PIO FIFO/buffer */ pci_write_config_dword(dev, itr_addr, new_itr); - - return ide_config_drive_speed(drive, speed); } -static int hpt3xx_tune_chipset(ide_drive_t *drive, u8 speed) +static void hpt3xx_set_mode(ide_drive_t *drive, const u8 speed) { ide_hwif_t *hwif = HWIF(drive); struct hpt_info *info = pci_get_drvdata(hwif->pci_dev); if (info->chip_type >= HPT370) - return hpt37x_tune_chipset(drive, speed); + hpt37x_set_mode(drive, speed); else /* hpt368: hpt_minimum_revision(dev, 2) */ - return hpt36x_tune_chipset(drive, speed); + hpt36x_set_mode(drive, speed); } -static void hpt3xx_tune_drive(ide_drive_t *drive, u8 pio) +static void hpt3xx_set_pio_mode(ide_drive_t *drive, const u8 pio) { - pio = ide_get_best_pio_mode(drive, pio, 4); - (void) hpt3xx_tune_chipset (drive, XFER_PIO_0 + pio); + hpt3xx_set_mode(drive, XFER_PIO_0 + pio); } static int hpt3xx_quirkproc(ide_drive_t *drive) @@ -673,12 +689,11 @@ static int hpt3xx_quirkproc(ide_drive_t *drive) static void hpt3xx_intrproc(ide_drive_t *drive) { - ide_hwif_t *hwif = HWIF(drive); - if (drive->quirk_list) return; + /* drives in the quirk_list may not like intr setups/cleanups */ - hwif->OUTB(drive->ctl | 2, IDE_CONTROL_REG); + outb(drive->ctl | 2, IDE_CONTROL_REG); } static void hpt3xx_maskproc(ide_drive_t *drive, int mask) @@ -706,21 +721,8 @@ static void hpt3xx_maskproc(ide_drive_t *drive, int mask) enable_irq (hwif->irq); } } else - hwif->OUTB(mask ? (drive->ctl | 2) : (drive->ctl & ~2), - IDE_CONTROL_REG); -} - -static int hpt366_config_drive_xfer_rate(ide_drive_t *drive) -{ - drive->init_speed = 0; - - if (ide_tune_dma(drive)) - return 0; - - if (ide_use_fast_pio(drive)) - hpt3xx_tune_drive(drive, 255); - - return -1; + outb(mask ? (drive->ctl | 2) : (drive->ctl & ~2), + IDE_CONTROL_REG); } /* @@ -760,9 +762,9 @@ static void hpt370_irq_timeout(ide_drive_t *drive) printk(KERN_DEBUG "%s: %d bytes in FIFO\n", drive->name, bfifo & 0x1ff); /* get DMA command mode */ - dma_cmd = hwif->INB(hwif->dma_command); + dma_cmd = inb(hwif->dma_command); /* stop DMA */ - hwif->OUTB(dma_cmd & ~0x1, hwif->dma_command); + outb(dma_cmd & ~0x1, hwif->dma_command); hpt370_clear_engine(drive); } @@ -777,12 +779,12 @@ static void hpt370_ide_dma_start(ide_drive_t *drive) static int hpt370_ide_dma_end(ide_drive_t *drive) { ide_hwif_t *hwif = HWIF(drive); - u8 dma_stat = hwif->INB(hwif->dma_status); + u8 dma_stat = inb(hwif->dma_status); if (dma_stat & 0x01) { /* wait a little */ udelay(20); - dma_stat = hwif->INB(hwif->dma_status); + dma_stat = inb(hwif->dma_status); if (dma_stat & 0x01) hpt370_irq_timeout(drive); } @@ -843,34 +845,32 @@ static int hpt374_ide_dma_end(ide_drive_t *drive) static void hpt3xxn_set_clock(ide_hwif_t *hwif, u8 mode) { - u8 scr2 = hwif->INB(hwif->dma_master + 0x7b); + u8 scr2 = inb(hwif->dma_master + 0x7b); if ((scr2 & 0x7f) == mode) return; /* Tristate the bus */ - hwif->OUTB(0x80, hwif->dma_master + 0x73); - hwif->OUTB(0x80, hwif->dma_master + 0x77); + outb(0x80, hwif->dma_master + 0x73); + outb(0x80, hwif->dma_master + 0x77); /* Switch clock and reset channels */ - hwif->OUTB(mode, hwif->dma_master + 0x7b); - hwif->OUTB(0xc0, hwif->dma_master + 0x79); + outb(mode, hwif->dma_master + 0x7b); + outb(0xc0, hwif->dma_master + 0x79); /* * Reset the state machines. * NOTE: avoid accidentally enabling the disabled channels. */ - hwif->OUTB(hwif->INB(hwif->dma_master + 0x70) | 0x32, - hwif->dma_master + 0x70); - hwif->OUTB(hwif->INB(hwif->dma_master + 0x74) | 0x32, - hwif->dma_master + 0x74); + outb(inb(hwif->dma_master + 0x70) | 0x32, hwif->dma_master + 0x70); + outb(inb(hwif->dma_master + 0x74) | 0x32, hwif->dma_master + 0x74); /* Complete reset */ - hwif->OUTB(0x00, hwif->dma_master + 0x79); + outb(0x00, hwif->dma_master + 0x79); /* Reconnect channels to bus */ - hwif->OUTB(0x00, hwif->dma_master + 0x73); - hwif->OUTB(0x00, hwif->dma_master + 0x77); + outb(0x00, hwif->dma_master + 0x73); + outb(0x00, hwif->dma_master + 0x77); } /** @@ -1149,7 +1149,7 @@ static unsigned int __devinit init_chipset_hpt366(struct pci_dev *dev, const cha * Select 66 MHz DPLL clock only if UltraATA/133 mode is * supported/enabled, use 50 MHz DPLL clock otherwise... */ - if (info->max_ultra == 6) { + if (info->udma_mask == ATA_UDMA6) { dpll_clk = 66; clock = ATA_CLOCK_66MHZ; } else if (dpll_clk) { /* HPT36x chips don't have DPLL */ @@ -1249,14 +1249,15 @@ static void __devinit init_hwif_hpt366(ide_hwif_t *hwif) /* Cache the channel's MISC. control registers' offset */ hwif->select_data = hwif->channel ? 0x54 : 0x50; - hwif->tuneproc = &hpt3xx_tune_drive; - hwif->speedproc = &hpt3xx_tune_chipset; + hwif->set_pio_mode = &hpt3xx_set_pio_mode; + hwif->set_dma_mode = &hpt3xx_set_mode; hwif->quirkproc = &hpt3xx_quirkproc; hwif->intrproc = &hpt3xx_intrproc; hwif->maskproc = &hpt3xx_maskproc; hwif->busproc = &hpt3xx_busproc; hwif->udma_filter = &hpt3xx_udma_filter; + hwif->mdma_filter = &hpt3xx_mdma_filter; /* * HPT3xxN chips have some complications: @@ -1300,13 +1301,8 @@ static void __devinit init_hwif_hpt366(ide_hwif_t *hwif) if (new_mcr != old_mcr) pci_write_config_byte(dev, hwif->select_data + 1, new_mcr); - if (!hwif->dma_base) { - hwif->drives[0].autotune = hwif->drives[1].autotune = 1; + if (hwif->dma_base == 0) return; - } - - hwif->ultra_mask = hwif->cds->udma_mask; - hwif->mwdma_mask = 0x07; /* * The HPT37x uses the CBLID pins as outputs for MA15/MA16 @@ -1345,8 +1341,6 @@ static void __devinit init_hwif_hpt366(ide_hwif_t *hwif) if (hwif->cbl != ATA_CBL_PATA40_SHORT) hwif->cbl = (scr1 & ata66) ? ATA_CBL_PATA40 : ATA_CBL_PATA80; - hwif->ide_dma_check = &hpt366_config_drive_xfer_rate; - if (chip_type >= HPT374) { hwif->ide_dma_test_irq = &hpt374_ide_dma_test_irq; hwif->ide_dma_end = &hpt374_ide_dma_end; @@ -1356,10 +1350,6 @@ static void __devinit init_hwif_hpt366(ide_hwif_t *hwif) hwif->dma_timeout = &hpt370_dma_timeout; } else hwif->dma_lost_irq = &hpt366_dma_lost_irq; - - if (!noautodma) - hwif->autodma = 1; - hwif->drives[0].autodma = hwif->drives[1].autodma = hwif->autodma; } static void __devinit init_dma_hpt366(ide_hwif_t *hwif, unsigned long dmabase) @@ -1369,7 +1359,7 @@ static void __devinit init_dma_hpt366(ide_hwif_t *hwif, unsigned long dmabase) u8 dma_new = 0, dma_old = 0; unsigned long flags; - dma_old = hwif->INB(dmabase + 2); + dma_old = inb(dmabase + 2); local_irq_save(flags); @@ -1380,60 +1370,26 @@ static void __devinit init_dma_hpt366(ide_hwif_t *hwif, unsigned long dmabase) if (masterdma & 0x30) dma_new |= 0x20; if ( slavedma & 0x30) dma_new |= 0x40; if (dma_new != dma_old) - hwif->OUTB(dma_new, dmabase + 2); + outb(dma_new, dmabase + 2); local_irq_restore(flags); ide_setup_dma(hwif, dmabase, 8); } -static int __devinit init_setup_hpt374(struct pci_dev *dev, ide_pci_device_t *d) +static void __devinit hpt374_init(struct pci_dev *dev, struct pci_dev *dev2) { - struct pci_dev *dev2; - - if (PCI_FUNC(dev->devfn) & 1) - return -ENODEV; - - pci_set_drvdata(dev, &hpt374); - - if ((dev2 = pci_get_slot(dev->bus, dev->devfn + 1)) != NULL) { - int ret; - - pci_set_drvdata(dev2, &hpt374); - - if (dev2->irq != dev->irq) { - /* FIXME: we need a core pci_set_interrupt() */ - dev2->irq = dev->irq; - printk(KERN_WARNING "%s: PCI config space interrupt " - "fixed.\n", d->name); - } - ret = ide_setup_pci_devices(dev, dev2, d); - if (ret < 0) - pci_dev_put(dev2); - return ret; + if (dev2->irq != dev->irq) { + /* FIXME: we need a core pci_set_interrupt() */ + dev2->irq = dev->irq; + printk(KERN_INFO "HPT374: PCI config space interrupt fixed\n"); } - return ide_setup_pci_device(dev, d); } -static int __devinit init_setup_hpt372n(struct pci_dev *dev, ide_pci_device_t *d) +static void __devinit hpt371_init(struct pci_dev *dev) { - pci_set_drvdata(dev, &hpt372n); - - return ide_setup_pci_device(dev, d); -} - -static int __devinit init_setup_hpt371(struct pci_dev *dev, ide_pci_device_t *d) -{ - struct hpt_info *info; u8 mcr1 = 0; - if (dev->revision > 1) { - d->name = "HPT371N"; - - info = &hpt371n; - } else - info = &hpt371; - /* * HPT371 chips physically have only one channel, the secondary one, * but the primary channel registers do exist! Go figure... @@ -1443,194 +1399,102 @@ static int __devinit init_setup_hpt371(struct pci_dev *dev, ide_pci_device_t *d) pci_read_config_byte(dev, 0x50, &mcr1); if (mcr1 & 0x04) pci_write_config_byte(dev, 0x50, mcr1 & ~0x04); - - pci_set_drvdata(dev, info); - - return ide_setup_pci_device(dev, d); } -static int __devinit init_setup_hpt372a(struct pci_dev *dev, ide_pci_device_t *d) +static int __devinit hpt36x_init(struct pci_dev *dev, struct pci_dev *dev2) { - struct hpt_info *info; + u8 mcr1 = 0, pin1 = 0, pin2 = 0; - if (dev->revision > 1) { - d->name = "HPT372N"; - - info = &hpt372n; - } else - info = &hpt372a; - pci_set_drvdata(dev, info); - - return ide_setup_pci_device(dev, d); -} - -static int __devinit init_setup_hpt302(struct pci_dev *dev, ide_pci_device_t *d) -{ - struct hpt_info *info; - - if (dev->revision > 1) { - d->name = "HPT302N"; - - info = &hpt302n; - } else - info = &hpt302; - pci_set_drvdata(dev, info); - - return ide_setup_pci_device(dev, d); -} - -static int __devinit init_setup_hpt366(struct pci_dev *dev, ide_pci_device_t *d) -{ - struct pci_dev *dev2; - u8 rev = dev->revision; - static char *chipset_names[] = { "HPT366", "HPT366", "HPT368", - "HPT370", "HPT370A", "HPT372", - "HPT372N" }; - static struct hpt_info *info[] = { &hpt36x, &hpt36x, &hpt36x, - &hpt370, &hpt370a, &hpt372, - &hpt372n }; - - if (PCI_FUNC(dev->devfn) & 1) - return -ENODEV; + /* + * Now we'll have to force both channels enabled if + * at least one of them has been enabled by BIOS... + */ + pci_read_config_byte(dev, 0x50, &mcr1); + if (mcr1 & 0x30) + pci_write_config_byte(dev, 0x50, mcr1 | 0x30); - switch (rev) { - case 0: - case 1: - case 2: - /* - * HPT36x chips have one channel per function and have - * both channel enable bits located differently and visible - * to both functions -- really stupid design decision... :-( - * Bit 4 is for the primary channel, bit 5 for the secondary. - */ - d->host_flags |= IDE_HFLAG_SINGLE; - d->enablebits[0].mask = d->enablebits[0].val = 0x10; + pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin1); + pci_read_config_byte(dev2, PCI_INTERRUPT_PIN, &pin2); - d->udma_mask = HPT366_ALLOW_ATA66_3 ? (HPT366_ALLOW_ATA66_4 ? - ATA_UDMA4 : ATA_UDMA3) : ATA_UDMA2; - break; - case 3: - case 4: - d->udma_mask = HPT370_ALLOW_ATA100_5 ? ATA_UDMA5 : ATA_UDMA4; - break; - default: - rev = 6; - /* fall thru */ - case 5: - case 6: - d->udma_mask = HPT372_ALLOW_ATA133_6 ? ATA_UDMA6 : ATA_UDMA5; - break; + if (pin1 != pin2 && dev->irq == dev2->irq) { + printk(KERN_INFO "HPT36x: onboard version of chipset, " + "pin1=%d pin2=%d\n", pin1, pin2); + return 1; } - d->name = chipset_names[rev]; - - pci_set_drvdata(dev, info[rev]); - - if (rev > 2) - goto init_single; - - if ((dev2 = pci_get_slot(dev->bus, dev->devfn + 1)) != NULL) { - u8 mcr1 = 0, pin1 = 0, pin2 = 0; - int ret; - - pci_set_drvdata(dev2, info[rev]); - - /* - * Now we'll have to force both channels enabled if - * at least one of them has been enabled by BIOS... - */ - pci_read_config_byte(dev, 0x50, &mcr1); - if (mcr1 & 0x30) - pci_write_config_byte(dev, 0x50, mcr1 | 0x30); - - pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin1); - pci_read_config_byte(dev2, PCI_INTERRUPT_PIN, &pin2); - if (pin1 != pin2 && dev->irq == dev2->irq) { - d->bootable = ON_BOARD; - printk("%s: onboard version of chipset, pin1=%d pin2=%d\n", - d->name, pin1, pin2); - } - ret = ide_setup_pci_devices(dev, dev2, d); - if (ret < 0) - pci_dev_put(dev2); - return ret; - } -init_single: - return ide_setup_pci_device(dev, d); + return 0; } static ide_pci_device_t hpt366_chipsets[] __devinitdata = { { /* 0 */ - .name = "HPT366", - .init_setup = init_setup_hpt366, + .name = "HPT36x", .init_chipset = init_chipset_hpt366, .init_hwif = init_hwif_hpt366, .init_dma = init_dma_hpt366, - .autodma = AUTODMA, - .enablebits = {{0x50,0x04,0x04}, {0x54,0x04,0x04}}, - .bootable = OFF_BOARD, + /* + * HPT36x chips have one channel per function and have + * both channel enable bits located differently and visible + * to both functions -- really stupid design decision... :-( + * Bit 4 is for the primary channel, bit 5 for the secondary. + */ + .enablebits = {{0x50,0x10,0x10}, {0x54,0x04,0x04}}, .extra = 240, + .host_flags = IDE_HFLAG_SINGLE | + IDE_HFLAG_NO_ATAPI_DMA | + IDE_HFLAG_OFF_BOARD, .pio_mask = ATA_PIO4, + .mwdma_mask = ATA_MWDMA2, },{ /* 1 */ .name = "HPT372A", - .init_setup = init_setup_hpt372a, .init_chipset = init_chipset_hpt366, .init_hwif = init_hwif_hpt366, .init_dma = init_dma_hpt366, - .autodma = AUTODMA, .enablebits = {{0x50,0x04,0x04}, {0x54,0x04,0x04}}, - .udma_mask = HPT372_ALLOW_ATA133_6 ? ATA_UDMA6 : ATA_UDMA5, - .bootable = OFF_BOARD, .extra = 240, + .host_flags = IDE_HFLAG_NO_ATAPI_DMA | IDE_HFLAG_OFF_BOARD, .pio_mask = ATA_PIO4, + .mwdma_mask = ATA_MWDMA2, },{ /* 2 */ .name = "HPT302", - .init_setup = init_setup_hpt302, .init_chipset = init_chipset_hpt366, .init_hwif = init_hwif_hpt366, .init_dma = init_dma_hpt366, - .autodma = AUTODMA, .enablebits = {{0x50,0x04,0x04}, {0x54,0x04,0x04}}, - .udma_mask = HPT302_ALLOW_ATA133_6 ? ATA_UDMA6 : ATA_UDMA5, - .bootable = OFF_BOARD, .extra = 240, + .host_flags = IDE_HFLAG_NO_ATAPI_DMA | IDE_HFLAG_OFF_BOARD, .pio_mask = ATA_PIO4, + .mwdma_mask = ATA_MWDMA2, },{ /* 3 */ .name = "HPT371", - .init_setup = init_setup_hpt371, .init_chipset = init_chipset_hpt366, .init_hwif = init_hwif_hpt366, .init_dma = init_dma_hpt366, - .autodma = AUTODMA, .enablebits = {{0x50,0x04,0x04}, {0x54,0x04,0x04}}, - .udma_mask = HPT371_ALLOW_ATA133_6 ? ATA_UDMA6 : ATA_UDMA5, - .bootable = OFF_BOARD, .extra = 240, + .host_flags = IDE_HFLAG_NO_ATAPI_DMA | IDE_HFLAG_OFF_BOARD, .pio_mask = ATA_PIO4, + .mwdma_mask = ATA_MWDMA2, },{ /* 4 */ .name = "HPT374", - .init_setup = init_setup_hpt374, .init_chipset = init_chipset_hpt366, .init_hwif = init_hwif_hpt366, .init_dma = init_dma_hpt366, - .autodma = AUTODMA, .enablebits = {{0x50,0x04,0x04}, {0x54,0x04,0x04}}, .udma_mask = ATA_UDMA5, - .bootable = OFF_BOARD, .extra = 240, + .host_flags = IDE_HFLAG_NO_ATAPI_DMA | IDE_HFLAG_OFF_BOARD, .pio_mask = ATA_PIO4, + .mwdma_mask = ATA_MWDMA2, },{ /* 5 */ .name = "HPT372N", - .init_setup = init_setup_hpt372n, .init_chipset = init_chipset_hpt366, .init_hwif = init_hwif_hpt366, .init_dma = init_dma_hpt366, - .autodma = AUTODMA, .enablebits = {{0x50,0x04,0x04}, {0x54,0x04,0x04}}, - .udma_mask = HPT372_ALLOW_ATA133_6 ? ATA_UDMA6 : ATA_UDMA5, - .bootable = OFF_BOARD, .extra = 240, + .host_flags = IDE_HFLAG_NO_ATAPI_DMA | IDE_HFLAG_OFF_BOARD, .pio_mask = ATA_PIO4, + .mwdma_mask = ATA_MWDMA2, } }; @@ -1641,25 +1505,86 @@ static ide_pci_device_t hpt366_chipsets[] __devinitdata = { * * Called when the PCI registration layer (or the IDE initialization) * finds a device matching our IDE device tables. - * - * NOTE: since we'll have to modify some fields of the ide_pci_device_t - * structure depending on the chip's revision, we'd better pass a local - * copy down the call chain... */ static int __devinit hpt366_init_one(struct pci_dev *dev, const struct pci_device_id *id) { - ide_pci_device_t d = hpt366_chipsets[id->driver_data]; + struct hpt_info *info = NULL; + struct pci_dev *dev2 = NULL; + ide_pci_device_t d; + u8 idx = id->driver_data; + u8 rev = dev->revision; + + if ((idx == 0 || idx == 4) && (PCI_FUNC(dev->devfn) & 1)) + return -ENODEV; + + switch (idx) { + case 0: + if (rev < 3) + info = &hpt36x; + else { + static struct hpt_info *hpt37x_info[] = + { &hpt370, &hpt370a, &hpt372, &hpt372n }; + + info = hpt37x_info[min_t(u8, rev, 6) - 3]; + idx++; + } + break; + case 1: + info = (rev > 1) ? &hpt372n : &hpt372a; + break; + case 2: + info = (rev > 1) ? &hpt302n : &hpt302; + break; + case 3: + hpt371_init(dev); + info = (rev > 1) ? &hpt371n : &hpt371; + break; + case 4: + info = &hpt374; + break; + case 5: + info = &hpt372n; + break; + } + + d = hpt366_chipsets[idx]; + + d.name = info->chip_name; + d.udma_mask = info->udma_mask; + + pci_set_drvdata(dev, info); + + if (info == &hpt36x || info == &hpt374) + dev2 = pci_get_slot(dev->bus, dev->devfn + 1); + + if (dev2) { + int ret; + + pci_set_drvdata(dev2, info); + + if (info == &hpt374) + hpt374_init(dev, dev2); + else { + if (hpt36x_init(dev, dev2)) + d.host_flags |= IDE_HFLAG_BOOTABLE; + } + + ret = ide_setup_pci_devices(dev, dev2, &d); + if (ret < 0) + pci_dev_put(dev2); + return ret; + } - return d.init_setup(dev, &d); + return ide_setup_pci_device(dev, &d); } -static struct pci_device_id hpt366_pci_tbl[] = { - { PCI_VENDOR_ID_TTI, PCI_DEVICE_ID_TTI_HPT366, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, - { PCI_VENDOR_ID_TTI, PCI_DEVICE_ID_TTI_HPT372, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 1}, - { PCI_VENDOR_ID_TTI, PCI_DEVICE_ID_TTI_HPT302, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 2}, - { PCI_VENDOR_ID_TTI, PCI_DEVICE_ID_TTI_HPT371, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 3}, - { PCI_VENDOR_ID_TTI, PCI_DEVICE_ID_TTI_HPT374, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 4}, - { PCI_VENDOR_ID_TTI, PCI_DEVICE_ID_TTI_HPT372N, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 5}, +static const struct pci_device_id hpt366_pci_tbl[] = { + { PCI_VDEVICE(TTI, PCI_DEVICE_ID_TTI_HPT366), 0 }, + { PCI_VDEVICE(TTI, PCI_DEVICE_ID_TTI_HPT372), 1 }, + { PCI_VDEVICE(TTI, PCI_DEVICE_ID_TTI_HPT302), 2 }, + { PCI_VDEVICE(TTI, PCI_DEVICE_ID_TTI_HPT371), 3 }, + { PCI_VDEVICE(TTI, PCI_DEVICE_ID_TTI_HPT374), 4 }, + { PCI_VDEVICE(TTI, PCI_DEVICE_ID_TTI_HPT372N), 5 }, { 0, }, }; MODULE_DEVICE_TABLE(pci, hpt366_pci_tbl); diff --git a/drivers/ide/pci/it8213.c b/drivers/ide/pci/it8213.c index 70b3245dbf6..dfbe605120c 100644 --- a/drivers/ide/pci/it8213.c +++ b/drivers/ide/pci/it8213.c @@ -18,45 +18,14 @@ #include <asm/io.h> /** - * it8213_dma_2_pio - return the PIO mode matching DMA - * @xfer_rate: transfer speed - * - * Returns the nearest equivalent PIO timing for the DMA - * mode requested by the controller. - */ - -static u8 it8213_dma_2_pio (u8 xfer_rate) { - switch(xfer_rate) { - case XFER_UDMA_6: - case XFER_UDMA_5: - case XFER_UDMA_4: - case XFER_UDMA_3: - case XFER_UDMA_2: - case XFER_UDMA_1: - case XFER_UDMA_0: - case XFER_MW_DMA_2: - return 4; - case XFER_MW_DMA_1: - return 3; - case XFER_SW_DMA_2: - return 2; - case XFER_MW_DMA_0: - case XFER_SW_DMA_1: - case XFER_SW_DMA_0: - default: - return 0; - } -} - -/* - * it8213_tune_pio - tune a drive - * @drive: drive to tune - * @pio: desired PIO mode + * it8213_set_pio_mode - set host controller for PIO mode + * @drive: drive + * @pio: PIO mode number * * Set the interface PIO mode. */ -static void it8213_tune_pio(ide_drive_t *drive, const u8 pio) +static void it8213_set_pio_mode(ide_drive_t *drive, const u8 pio) { ide_hwif_t *hwif = HWIF(drive); struct pci_dev *dev = hwif->pci_dev; @@ -105,30 +74,19 @@ static void it8213_tune_pio(ide_drive_t *drive, const u8 pio) spin_unlock_irqrestore(&tune_lock, flags); } -static void it8213_tuneproc(ide_drive_t *drive, u8 pio) -{ - pio = ide_get_best_pio_mode(drive, pio, 4); - it8213_tune_pio(drive, pio); - ide_config_drive_speed(drive, XFER_PIO_0 + pio); -} - /** - * it8213_tune_chipset - set controller timings - * @drive: Drive to set up - * @xferspeed: speed we want to achieve + * it8213_set_dma_mode - set host controller for DMA mode + * @drive: drive + * @speed: DMA mode * - * Tune the ITE chipset for the desired mode. If we can't achieve - * the desired mode then tune for a lower one, but ultimately - * make the thing work. + * Tune the ITE chipset for the DMA mode. */ -static int it8213_tune_chipset (ide_drive_t *drive, u8 xferspeed) +static void it8213_set_dma_mode(ide_drive_t *drive, const u8 speed) { - ide_hwif_t *hwif = HWIF(drive); struct pci_dev *dev = hwif->pci_dev; u8 maslave = 0x40; - u8 speed = ide_rate_filter(drive, xferspeed); int a_speed = 3 << (drive->dn * 4); int u_flag = 1 << drive->dn; int v_flag = 0x01 << drive->dn; @@ -156,14 +114,8 @@ static int it8213_tune_chipset (ide_drive_t *drive, u8 xferspeed) case XFER_MW_DMA_1: case XFER_SW_DMA_2: break; - case XFER_PIO_4: - case XFER_PIO_3: - case XFER_PIO_2: - case XFER_PIO_1: - case XFER_PIO_0: - break; default: - return -1; + return; } if (speed >= XFER_UDMA_0) { @@ -183,6 +135,9 @@ static int it8213_tune_chipset (ide_drive_t *drive, u8 xferspeed) } else pci_write_config_byte(dev, 0x54, reg54 & ~v_flag); } else { + const u8 mwdma_to_pio[] = { 0, 3, 4 }; + u8 pio; + if (reg48 & u_flag) pci_write_config_byte(dev, 0x48, reg48 & ~u_flag); if (reg4a & a_speed) @@ -191,81 +146,37 @@ static int it8213_tune_chipset (ide_drive_t *drive, u8 xferspeed) pci_write_config_byte(dev, 0x54, reg54 & ~v_flag); if (reg55 & w_flag) pci_write_config_byte(dev, 0x55, (u8) reg55 & ~w_flag); - } - - if (speed > XFER_PIO_4) - it8213_tune_pio(drive, it8213_dma_2_pio(speed)); - else - it8213_tune_pio(drive, speed - XFER_PIO_0); - - return ide_config_drive_speed(drive, speed); -} -/** - * it8213_configure_drive_for_dma - set up for DMA transfers - * @drive: drive we are going to set up - * - * Set up the drive for DMA, tune the controller and drive as - * required. If the drive isn't suitable for DMA or we hit - * other problems then we will drop down to PIO and set up - * PIO appropriately - */ - -static int it8213_config_drive_for_dma (ide_drive_t *drive) -{ - if (ide_tune_dma(drive)) - return 0; + if (speed >= XFER_MW_DMA_0) + pio = mwdma_to_pio[speed - XFER_MW_DMA_0]; + else + pio = 2; /* only SWDMA2 is allowed */ - it8213_tuneproc(drive, 255); - - return -1; + it8213_set_pio_mode(drive, pio); + } } /** * init_hwif_it8213 - set up hwif structs * @hwif: interface to set up * - * We do the basic set up of the interface structure. The IT8212 - * requires several custom handlers so we override the default - * ide DMA handlers appropriately + * We do the basic set up of the interface structure. */ static void __devinit init_hwif_it8213(ide_hwif_t *hwif) { u8 reg42h = 0; - hwif->speedproc = &it8213_tune_chipset; - hwif->tuneproc = &it8213_tuneproc; - - hwif->autodma = 0; - - hwif->drives[0].autotune = 1; - hwif->drives[1].autotune = 1; + hwif->set_dma_mode = &it8213_set_dma_mode; + hwif->set_pio_mode = &it8213_set_pio_mode; if (!hwif->dma_base) return; - hwif->atapi_dma = 1; - hwif->ultra_mask = 0x7f; - hwif->mwdma_mask = 0x06; - hwif->swdma_mask = 0x04; - pci_read_config_byte(hwif->pci_dev, 0x42, ®42h); - hwif->ide_dma_check = &it8213_config_drive_for_dma; - if (hwif->cbl != ATA_CBL_PATA40_SHORT) hwif->cbl = (reg42h & 0x02) ? ATA_CBL_PATA40 : ATA_CBL_PATA80; - - /* - * The BIOS often doesn't set up DMA on this controller - * so we always do it. - */ - if (!noautodma) - hwif->autodma = 1; - - hwif->drives[0].autodma = hwif->autodma; - hwif->drives[1].autodma = hwif->autodma; } @@ -273,11 +184,13 @@ static void __devinit init_hwif_it8213(ide_hwif_t *hwif) { \ .name = name_str, \ .init_hwif = init_hwif_it8213, \ - .autodma = AUTODMA, \ .enablebits = {{0x41,0x80,0x80}}, \ - .bootable = ON_BOARD, \ - .host_flags = IDE_HFLAG_SINGLE, \ + .host_flags = IDE_HFLAG_SINGLE | \ + IDE_HFLAG_BOOTABLE, \ .pio_mask = ATA_PIO4, \ + .swdma_mask = ATA_SWDMA2_ONLY, \ + .mwdma_mask = ATA_MWDMA12_ONLY, \ + .udma_mask = ATA_UDMA6, \ } static ide_pci_device_t it8213_chipsets[] __devinitdata = { @@ -301,9 +214,8 @@ static int __devinit it8213_init_one(struct pci_dev *dev, const struct pci_devic return 0; } - -static struct pci_device_id it8213_pci_tbl[] = { - { PCI_VENDOR_ID_ITE, 0x8213, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, +static const struct pci_device_id it8213_pci_tbl[] = { + { PCI_VDEVICE(ITE, PCI_DEVICE_ID_ITE_8213), 0 }, { 0, }, }; diff --git a/drivers/ide/pci/it821x.c b/drivers/ide/pci/it821x.c index 9286c99e2ff..ec45b724720 100644 --- a/drivers/ide/pci/it821x.c +++ b/drivers/ide/pci/it821x.c @@ -229,24 +229,24 @@ static void it821x_clock_strategy(ide_drive_t *drive) } /** - * it821x_tunepio - tune a drive - * @drive: drive to tune - * @pio: the desired PIO mode + * it821x_set_pio_mode - set host controller for PIO mode + * @drive: drive + * @pio: PIO mode number * - * Try to tune the drive/host to the desired PIO mode taking into - * the consideration the maximum PIO mode supported by the other - * device on the cable. + * Tune the host to the desired PIO mode taking into the consideration + * the maximum PIO mode supported by the other device on the cable. */ -static int it821x_tunepio(ide_drive_t *drive, u8 set_pio) +static void it821x_set_pio_mode(ide_drive_t *drive, const u8 pio) { ide_hwif_t *hwif = drive->hwif; struct it821x_dev *itdev = ide_get_hwifdata(hwif); int unit = drive->select.b.unit; ide_drive_t *pair = &hwif->drives[1 - unit]; + u8 set_pio = pio; /* Spec says 89 ref driver uses 88 */ - static u16 pio[] = { 0xAA88, 0xA382, 0xA181, 0x3332, 0x3121 }; + static u16 pio_timings[]= { 0xAA88, 0xA382, 0xA181, 0x3332, 0x3121 }; static u8 pio_want[] = { ATA_66, ATA_66, ATA_66, ATA_66, ATA_ANY }; /* @@ -261,23 +261,12 @@ static int it821x_tunepio(ide_drive_t *drive, u8 set_pio) set_pio = pair_pio; } - if (itdev->smart) - return 0; - /* We prefer 66Mhz clock for PIO 0-3, don't care for PIO4 */ itdev->want[unit][1] = pio_want[set_pio]; itdev->want[unit][0] = 1; /* PIO is lowest priority */ - itdev->pio[unit] = pio[set_pio]; + itdev->pio[unit] = pio_timings[set_pio]; it821x_clock_strategy(drive); it821x_program(drive, itdev->pio[unit]); - - return ide_config_drive_speed(drive, XFER_PIO_0 + set_pio); -} - -static void it821x_tuneproc(ide_drive_t *drive, u8 pio) -{ - pio = ide_get_best_pio_mode(drive, pio, 4); - (void)it821x_tunepio(drive, pio); } /** @@ -405,81 +394,25 @@ static int it821x_dma_end(ide_drive_t *drive) return ret; } - /** - * it821x_tune_chipset - set controller timings - * @drive: Drive to set up - * @xferspeed: speed we want to achieve + * it821x_set_dma_mode - set host controller for DMA mode + * @drive: drive + * @speed: DMA mode * - * Tune the ITE chipset for the desired mode. If we can't achieve - * the desired mode then tune for a lower one, but ultimately - * make the thing work. + * Tune the ITE chipset for the desired DMA mode. */ -static int it821x_tune_chipset (ide_drive_t *drive, byte xferspeed) +static void it821x_set_dma_mode(ide_drive_t *drive, const u8 speed) { - - ide_hwif_t *hwif = drive->hwif; - struct it821x_dev *itdev = ide_get_hwifdata(hwif); - u8 speed = ide_rate_filter(drive, xferspeed); - - switch (speed) { - case XFER_PIO_4: - case XFER_PIO_3: - case XFER_PIO_2: - case XFER_PIO_1: - case XFER_PIO_0: - return it821x_tunepio(drive, speed - XFER_PIO_0); - } - - if (itdev->smart == 0) { - switch (speed) { - /* MWDMA tuning is really hard because our MWDMA and PIO - timings are kept in the same place. We can switch in the - host dma on/off callbacks */ - case XFER_MW_DMA_2: - case XFER_MW_DMA_1: - case XFER_MW_DMA_0: - it821x_tune_mwdma(drive, (speed - XFER_MW_DMA_0)); - break; - case XFER_UDMA_6: - case XFER_UDMA_5: - case XFER_UDMA_4: - case XFER_UDMA_3: - case XFER_UDMA_2: - case XFER_UDMA_1: - case XFER_UDMA_0: - it821x_tune_udma(drive, (speed - XFER_UDMA_0)); - break; - default: - return 1; - } - - return ide_config_drive_speed(drive, speed); - } - - /* don't touch anything in the smart mode */ - return 0; -} - -/** - * it821x_configure_drive_for_dma - set up for DMA transfers - * @drive: drive we are going to set up - * - * Set up the drive for DMA, tune the controller and drive as - * required. If the drive isn't suitable for DMA or we hit - * other problems then we will drop down to PIO and set up - * PIO appropriately - */ - -static int it821x_config_drive_for_dma (ide_drive_t *drive) -{ - if (ide_tune_dma(drive)) - return 0; - - it821x_tuneproc(drive, 255); - - return -1; + /* + * MWDMA tuning is really hard because our MWDMA and PIO + * timings are kept in the same place. We can switch in the + * host dma on/off callbacks. + */ + if (speed >= XFER_UDMA_0 && speed <= XFER_UDMA_6) + it821x_tune_udma(drive, speed - XFER_UDMA_0); + else if (speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2) + it821x_tune_mwdma(drive, speed - XFER_MW_DMA_0); } /** @@ -604,18 +537,17 @@ static void __devinit init_hwif_it821x(ide_hwif_t *hwif) struct it821x_dev *idev = kzalloc(sizeof(struct it821x_dev), GFP_KERNEL); u8 conf; - if(idev == NULL) { + if (idev == NULL) { printk(KERN_ERR "it821x: out of memory, falling back to legacy behaviour.\n"); - goto fallback; + return; } - ide_set_hwifdata(hwif, idev); - hwif->atapi_dma = 1; + ide_set_hwifdata(hwif, idev); pci_read_config_byte(hwif->pci_dev, 0x50, &conf); - if(conf & 1) { + if (conf & 1) { idev->smart = 1; - hwif->atapi_dma = 0; + hwif->host_flags |= IDE_HFLAG_NO_ATAPI_DMA; /* Long I/O's although allowed in LBA48 space cause the onboard firmware to enter the twighlight zone */ hwif->rqsize = 256; @@ -636,48 +568,31 @@ static void __devinit init_hwif_it821x(ide_hwif_t *hwif) */ pci_read_config_byte(hwif->pci_dev, 0x08, &conf); - if(conf == 0x10) { + if (conf == 0x10) { idev->timing10 = 1; - hwif->atapi_dma = 0; - if(!idev->smart) + hwif->host_flags |= IDE_HFLAG_NO_ATAPI_DMA; + if (idev->smart == 0) printk(KERN_WARNING "it821x: Revision 0x10, workarounds activated.\n"); } - hwif->speedproc = &it821x_tune_chipset; - hwif->tuneproc = &it821x_tuneproc; + if (idev->smart == 0) { + hwif->set_pio_mode = &it821x_set_pio_mode; + hwif->set_dma_mode = &it821x_set_dma_mode; - /* MWDMA/PIO clock switching for pass through mode */ - if(!idev->smart) { + /* MWDMA/PIO clock switching for pass through mode */ hwif->dma_start = &it821x_dma_start; hwif->ide_dma_end = &it821x_dma_end; - } - - hwif->drives[0].autotune = 1; - hwif->drives[1].autotune = 1; + } else + hwif->host_flags |= IDE_HFLAG_NO_SET_MODE; - if (!hwif->dma_base) - goto fallback; - - hwif->ultra_mask = 0x7f; - hwif->mwdma_mask = 0x07; + if (hwif->dma_base == 0) + return; - hwif->ide_dma_check = &it821x_config_drive_for_dma; + hwif->ultra_mask = ATA_UDMA6; + hwif->mwdma_mask = ATA_MWDMA2; if (hwif->cbl != ATA_CBL_PATA40_SHORT) hwif->cbl = ata66_it821x(hwif); - - /* - * The BIOS often doesn't set up DMA on this controller - * so we always do it. - */ - - hwif->autodma = 1; - hwif->drives[0].autodma = hwif->autodma; - hwif->drives[1].autodma = hwif->autodma; - return; -fallback: - hwif->autodma = 0; - return; } static void __devinit it8212_disable_raid(struct pci_dev *dev) @@ -718,9 +633,8 @@ static unsigned int __devinit init_chipset_it821x(struct pci_dev *dev, const cha .name = name_str, \ .init_chipset = init_chipset_it821x, \ .init_hwif = init_hwif_it821x, \ - .autodma = AUTODMA, \ - .bootable = ON_BOARD, \ .fixup = it821x_fixups, \ + .host_flags = IDE_HFLAG_BOOTABLE, \ .pio_mask = ATA_PIO4, \ } @@ -743,9 +657,9 @@ static int __devinit it821x_init_one(struct pci_dev *dev, const struct pci_devic return 0; } -static struct pci_device_id it821x_pci_tbl[] = { - { PCI_VENDOR_ID_ITE, PCI_DEVICE_ID_ITE_8211, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, - { PCI_VENDOR_ID_ITE, PCI_DEVICE_ID_ITE_8212, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, +static const struct pci_device_id it821x_pci_tbl[] = { + { PCI_VDEVICE(ITE, PCI_DEVICE_ID_ITE_8211), 0 }, + { PCI_VDEVICE(ITE, PCI_DEVICE_ID_ITE_8212), 0 }, { 0, }, }; diff --git a/drivers/ide/pci/jmicron.c b/drivers/ide/pci/jmicron.c index 65a0ff352b9..2eeff670d9a 100644 --- a/drivers/ide/pci/jmicron.c +++ b/drivers/ide/pci/jmicron.c @@ -83,45 +83,20 @@ static u8 __devinit ata66_jmicron(ide_hwif_t *hwif) return ATA_CBL_PATA80; } -static void jmicron_tuneproc(ide_drive_t *drive, u8 pio) +static void jmicron_set_pio_mode(ide_drive_t *drive, const u8 pio) { - pio = ide_get_best_pio_mode(drive, pio, 5); - ide_config_drive_speed(drive, XFER_PIO_0 + pio); } /** - * jmicron_tune_chipset - set controller timings - * @drive: Drive to set up - * @xferspeed: speed we want to achieve + * jmicron_set_dma_mode - set host controller for DMA mode + * @drive: drive + * @mode: DMA mode * - * As the JMicron snoops for timings all we actually need to do is - * make sure we don't set an invalid mode. We do need to honour - * the cable detect here. + * As the JMicron snoops for timings we don't need to do anything here. */ -static int jmicron_tune_chipset (ide_drive_t *drive, byte xferspeed) +static void jmicron_set_dma_mode(ide_drive_t *drive, const u8 mode) { - u8 speed = ide_rate_filter(drive, xferspeed); - - return ide_config_drive_speed(drive, speed); -} - -/** - * jmicron_configure_drive_for_dma - set up for DMA transfers - * @drive: drive we are going to set up - * - * As the JMicron snoops for timings all we actually need to do is - * make sure we don't set an invalid mode. - */ - -static int jmicron_config_drive_for_dma (ide_drive_t *drive) -{ - if (ide_tune_dma(drive)) - return 0; - - jmicron_tuneproc(drive, 255); - - return -1; } /** @@ -133,49 +108,24 @@ static int jmicron_config_drive_for_dma (ide_drive_t *drive) static void __devinit init_hwif_jmicron(ide_hwif_t *hwif) { - hwif->speedproc = &jmicron_tune_chipset; - hwif->tuneproc = &jmicron_tuneproc; + hwif->set_pio_mode = &jmicron_set_pio_mode; + hwif->set_dma_mode = &jmicron_set_dma_mode; - hwif->drives[0].autotune = 1; - hwif->drives[1].autotune = 1; - - if (!hwif->dma_base) - goto fallback; - - hwif->atapi_dma = 1; - hwif->ultra_mask = 0x7f; - hwif->mwdma_mask = 0x07; - - hwif->ide_dma_check = &jmicron_config_drive_for_dma; + if (hwif->dma_base == 0) + return; if (hwif->cbl != ATA_CBL_PATA40_SHORT) hwif->cbl = ata66_jmicron(hwif); - - hwif->autodma = 1; - hwif->drives[0].autodma = hwif->autodma; - hwif->drives[1].autodma = hwif->autodma; - return; -fallback: - hwif->autodma = 0; - return; } -#define DECLARE_JMB_DEV(name_str) \ - { \ - .name = name_str, \ - .init_hwif = init_hwif_jmicron, \ - .autodma = AUTODMA, \ - .bootable = ON_BOARD, \ - .enablebits = { {0x40, 1, 1}, {0x40, 0x10, 0x10} }, \ - .pio_mask = ATA_PIO5, \ - } - -static ide_pci_device_t jmicron_chipsets[] __devinitdata = { - /* 0 */ DECLARE_JMB_DEV("JMB361"), - /* 1 */ DECLARE_JMB_DEV("JMB363"), - /* 2 */ DECLARE_JMB_DEV("JMB365"), - /* 3 */ DECLARE_JMB_DEV("JMB366"), - /* 4 */ DECLARE_JMB_DEV("JMB368"), +static ide_pci_device_t jmicron_chipset __devinitdata = { + .name = "JMB", + .init_hwif = init_hwif_jmicron, + .host_flags = IDE_HFLAG_BOOTABLE, + .enablebits = { { 0x40, 0x01, 0x01 }, { 0x40, 0x10, 0x10 } }, + .pio_mask = ATA_PIO5, + .mwdma_mask = ATA_MWDMA2, + .udma_mask = ATA_UDMA6, }; /** @@ -189,35 +139,29 @@ static ide_pci_device_t jmicron_chipsets[] __devinitdata = { static int __devinit jmicron_init_one(struct pci_dev *dev, const struct pci_device_id *id) { - ide_setup_pci_device(dev, &jmicron_chipsets[id->driver_data]); + ide_setup_pci_device(dev, &jmicron_chipset); return 0; } -/* If libata is configured, jmicron PCI quirk will configure it such - * that the SATA ports are in AHCI function while the PATA ports are - * in a separate IDE function. In such cases, match device class and - * attach only to IDE. If libata isn't configured, keep the old - * behavior for backward compatibility. +/* All JMB PATA controllers have and will continue to have the same + * interface. Matching vendor and device class is enough for all + * current and future controllers if the controller is programmed + * properly. + * + * If libata is configured, jmicron PCI quirk programs the controller + * into the correct mode. If libata isn't configured, match known + * device IDs too to maintain backward compatibility. */ -#if defined(CONFIG_ATA) || defined(CONFIG_ATA_MODULE) -#define JMB_CLASS PCI_CLASS_STORAGE_IDE << 8 -#define JMB_CLASS_MASK 0xffff00 -#else -#define JMB_CLASS 0 -#define JMB_CLASS_MASK 0 -#endif - static struct pci_device_id jmicron_pci_tbl[] = { - { PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB361, - PCI_ANY_ID, PCI_ANY_ID, JMB_CLASS, JMB_CLASS_MASK, 0}, - { PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB363, - PCI_ANY_ID, PCI_ANY_ID, JMB_CLASS, JMB_CLASS_MASK, 1}, - { PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB365, - PCI_ANY_ID, PCI_ANY_ID, JMB_CLASS, JMB_CLASS_MASK, 2}, - { PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB366, - PCI_ANY_ID, PCI_ANY_ID, JMB_CLASS, JMB_CLASS_MASK, 3}, - { PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB368, - PCI_ANY_ID, PCI_ANY_ID, JMB_CLASS, JMB_CLASS_MASK, 4}, +#if !defined(CONFIG_ATA) && !defined(CONFIG_ATA_MODULE) + { PCI_VDEVICE(JMICRON, PCI_DEVICE_ID_JMICRON_JMB361) }, + { PCI_VDEVICE(JMICRON, PCI_DEVICE_ID_JMICRON_JMB363) }, + { PCI_VDEVICE(JMICRON, PCI_DEVICE_ID_JMICRON_JMB365) }, + { PCI_VDEVICE(JMICRON, PCI_DEVICE_ID_JMICRON_JMB366) }, + { PCI_VDEVICE(JMICRON, PCI_DEVICE_ID_JMICRON_JMB368) }, +#endif + { PCI_VENDOR_ID_JMICRON, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, + PCI_CLASS_STORAGE_IDE << 8, 0xffff00, 0 }, { 0, }, }; diff --git a/drivers/ide/pci/ns87415.c b/drivers/ide/pci/ns87415.c index 465c935fdf2..d21b5892382 100644 --- a/drivers/ide/pci/ns87415.c +++ b/drivers/ide/pci/ns87415.c @@ -197,7 +197,6 @@ static void __devinit init_hwif_ns87415 (ide_hwif_t *hwif) u8 stat; #endif - hwif->autodma = 0; hwif->selectproc = &ns87415_selectproc; /* @@ -259,11 +258,6 @@ static void __devinit init_hwif_ns87415 (ide_hwif_t *hwif) outb(0x60, hwif->dma_status); hwif->dma_setup = &ns87415_ide_dma_setup; hwif->ide_dma_end = &ns87415_ide_dma_end; - - if (!noautodma) - hwif->autodma = 1; - hwif->drives[0].autodma = hwif->autodma; - hwif->drives[1].autodma = hwif->autodma; } static ide_pci_device_t ns87415_chipset __devinitdata = { @@ -272,8 +266,9 @@ static ide_pci_device_t ns87415_chipset __devinitdata = { .init_iops = init_iops_ns87415, #endif .init_hwif = init_hwif_ns87415, - .autodma = AUTODMA, - .bootable = ON_BOARD, + .host_flags = IDE_HFLAG_TRUST_BIOS_FOR_DMA | + IDE_HFLAG_NO_ATAPI_DMA | + IDE_HFLAG_BOOTABLE, }; static int __devinit ns87415_init_one(struct pci_dev *dev, const struct pci_device_id *id) @@ -281,8 +276,8 @@ static int __devinit ns87415_init_one(struct pci_dev *dev, const struct pci_devi return ide_setup_pci_device(dev, &ns87415_chipset); } -static struct pci_device_id ns87415_pci_tbl[] = { - { PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_87415, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, +static const struct pci_device_id ns87415_pci_tbl[] = { + { PCI_VDEVICE(NS, PCI_DEVICE_ID_NS_87415), 0 }, { 0, }, }; MODULE_DEVICE_TABLE(pci, ns87415_pci_tbl); diff --git a/drivers/ide/pci/opti621.c b/drivers/ide/pci/opti621.c index 3a2bb272351..3573ffeaaa3 100644 --- a/drivers/ide/pci/opti621.c +++ b/drivers/ide/pci/opti621.c @@ -1,5 +1,5 @@ /* - * linux/drivers/ide/pci/opti621.c Version 0.7 Sept 10, 2002 + * linux/drivers/ide/pci/opti621.c Version 0.8 Aug 27, 2007 * * Copyright (C) 1996-1998 Linus Torvalds & authors (see below) */ @@ -47,7 +47,7 @@ * The main problem with OPTi is that some timings for master * and slave must be the same. For example, if you have master * PIO 3 and slave PIO 0, driver have to set some timings of - * master for PIO 0. Second problem is that opti621_tune_drive + * master for PIO 0. Second problem is that opti621_set_pio_mode * got only one drive to set, but have to set both drives. * This is solved in compute_pios. If you don't set * the second drive, compute_pios use ide_get_best_pio_mode @@ -57,9 +57,6 @@ * There is a 25/33MHz switch in configuration * register, but driver is written for use at any frequency which get * (use idebus=xx to select PCI bus speed). - * Use hda=autotune and hdb=autotune for automatical tune of the PIO modes. - * If you get strange results, do not use this and set PIO manually - * by hdparm. * * Version 0.1, Nov 8, 1996 * by Jaromir Koutek, for 2.1.8. @@ -103,7 +100,7 @@ #include <asm/io.h> -#define OPTI621_MAX_PIO 3 +//#define OPTI621_MAX_PIO 3 /* In fact, I do not have any PIO 4 drive * (address: 25 ns, data: 70 ns, recovery: 35 ns), * but OPTi 82C621 is programmable and it can do (minimal values): @@ -136,8 +133,8 @@ static int reg_base; #define PIO_NOT_EXIST 254 #define PIO_DONT_KNOW 255 -/* there are stored pio numbers from other calls of opti621_tune_drive */ -static void compute_pios(ide_drive_t *drive, u8 pio) +/* there are stored pio numbers from other calls of opti621_set_pio_mode */ +static void compute_pios(ide_drive_t *drive, const u8 pio) /* Store values into drive->drive_data * second_contr - 0 for primary controller, 1 for secondary * slave_drive - 0 -> pio is for master, 1 -> pio is for slave @@ -147,12 +144,13 @@ static void compute_pios(ide_drive_t *drive, u8 pio) int d; ide_hwif_t *hwif = HWIF(drive); - drive->drive_data = ide_get_best_pio_mode(drive, pio, OPTI621_MAX_PIO); + drive->drive_data = pio; + for (d = 0; d < 2; ++d) { drive = &hwif->drives[d]; if (drive->present) { if (drive->drive_data == PIO_DONT_KNOW) - drive->drive_data = ide_get_best_pio_mode(drive, 255, OPTI621_MAX_PIO); + drive->drive_data = ide_get_best_pio_mode(drive, 255, 3); #ifdef OPTI621_DEBUG printk("%s: Selected PIO mode %d\n", drive->name, drive->drive_data); @@ -240,8 +238,7 @@ static void compute_clocks(int pio, pio_clocks_t *clks) } -/* Main tune procedure, called from tuneproc. */ -static void opti621_tune_drive (ide_drive_t *drive, u8 pio) +static void opti621_set_pio_mode(ide_drive_t *drive, const u8 pio) { /* primary and secondary drives share some registers, * so we have to program both drives @@ -328,39 +325,31 @@ static void opti621_tune_drive (ide_drive_t *drive, u8 pio) */ static void __devinit init_hwif_opti621 (ide_hwif_t *hwif) { - hwif->autodma = 0; hwif->drives[0].drive_data = PIO_DONT_KNOW; hwif->drives[1].drive_data = PIO_DONT_KNOW; - hwif->tuneproc = &opti621_tune_drive; - - if (!(hwif->dma_base)) - return; - - hwif->atapi_dma = 1; - hwif->mwdma_mask = 0x07; - hwif->swdma_mask = 0x07; - if (!noautodma) - hwif->autodma = 1; - hwif->drives[0].autodma = hwif->autodma; - hwif->drives[1].autodma = hwif->autodma; + hwif->set_pio_mode = &opti621_set_pio_mode; } static ide_pci_device_t opti621_chipsets[] __devinitdata = { { /* 0 */ .name = "OPTI621", .init_hwif = init_hwif_opti621, - .autodma = AUTODMA, .enablebits = {{0x45,0x80,0x00}, {0x40,0x08,0x00}}, - .bootable = ON_BOARD, + .host_flags = IDE_HFLAG_TRUST_BIOS_FOR_DMA | + IDE_HFLAG_BOOTABLE, .pio_mask = ATA_PIO3, + .swdma_mask = ATA_SWDMA2, + .mwdma_mask = ATA_MWDMA2, },{ /* 1 */ .name = "OPTI621X", .init_hwif = init_hwif_opti621, - .autodma = AUTODMA, .enablebits = {{0x45,0x80,0x00}, {0x40,0x08,0x00}}, - .bootable = ON_BOARD, + .host_flags = IDE_HFLAG_TRUST_BIOS_FOR_DMA | + IDE_HFLAG_BOOTABLE, .pio_mask = ATA_PIO3, + .swdma_mask = ATA_SWDMA2, + .mwdma_mask = ATA_MWDMA2, } }; @@ -369,9 +358,9 @@ static int __devinit opti621_init_one(struct pci_dev *dev, const struct pci_devi return ide_setup_pci_device(dev, &opti621_chipsets[id->driver_data]); } -static struct pci_device_id opti621_pci_tbl[] = { - { PCI_VENDOR_ID_OPTI, PCI_DEVICE_ID_OPTI_82C621, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, - { PCI_VENDOR_ID_OPTI, PCI_DEVICE_ID_OPTI_82C825, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 1}, +static const struct pci_device_id opti621_pci_tbl[] = { + { PCI_VDEVICE(OPTI, PCI_DEVICE_ID_OPTI_82C621), 0 }, + { PCI_VDEVICE(OPTI, PCI_DEVICE_ID_OPTI_82C825), 1 }, { 0, }, }; MODULE_DEVICE_TABLE(pci, opti621_pci_tbl); diff --git a/drivers/ide/pci/pdc202xx_new.c b/drivers/ide/pci/pdc202xx_new.c index 7b0e479c355..d1e7823454f 100644 --- a/drivers/ide/pci/pdc202xx_new.c +++ b/drivers/ide/pci/pdc202xx_new.c @@ -146,21 +146,16 @@ static struct udma_timing { { 0x1a, 0x01, 0xcb }, /* UDMA mode 6 */ }; -static int pdcnew_tune_chipset(ide_drive_t *drive, u8 speed) +static void pdcnew_set_mode(ide_drive_t *drive, const u8 speed) { ide_hwif_t *hwif = HWIF(drive); u8 adj = (drive->dn & 1) ? 0x08 : 0x00; - int err; - - speed = ide_rate_filter(drive, speed); /* - * Issue SETFEATURES_XFER to the drive first. PDC202xx hardware will + * IDE core issues SETFEATURES_XFER to the drive first (thanks to + * IDE_HFLAG_POST_SET_MODE in ->host_flags). PDC202xx hardware will * automatically set the timing registers based on 100 MHz PLL output. - */ - err = ide_config_drive_speed(drive, speed); - - /* + * * As we set up the PLL to output 133 MHz for UltraDMA/133 capable * chips, we must override the default register settings... */ @@ -213,14 +208,11 @@ static int pdcnew_tune_chipset(ide_drive_t *drive, u8 speed) set_indexed_reg(hwif, 0x10 + adj, tmp & 0x7f); } - - return err; } -static void pdcnew_tune_drive(ide_drive_t *drive, u8 pio) +static void pdcnew_set_pio_mode(ide_drive_t *drive, const u8 pio) { - pio = ide_get_best_pio_mode(drive, pio, 4); - (void)pdcnew_tune_chipset(drive, XFER_PIO_0 + pio); + pdcnew_set_mode(drive, XFER_PIO_0 + pio); } static u8 pdcnew_cable_detect(ide_hwif_t *hwif) @@ -231,19 +223,6 @@ static u8 pdcnew_cable_detect(ide_hwif_t *hwif) return ATA_CBL_PATA80; } -static int pdcnew_config_drive_xfer_rate(ide_drive_t *drive) -{ - drive->init_speed = 0; - - if (ide_tune_dma(drive)) - return 0; - - if (ide_use_fast_pio(drive)) - pdcnew_tune_drive(drive, 255); - - return -1; -} - static int pdcnew_quirkproc(ide_drive_t *drive) { const char **list, *model = drive->id->model; @@ -353,16 +332,12 @@ static long __devinit detect_pll_input_clock(unsigned long dma_base) static void __devinit apple_kiwi_init(struct pci_dev *pdev) { struct device_node *np = pci_device_to_OF_node(pdev); - unsigned int class_rev = 0; u8 conf; if (np == NULL || !of_device_is_compatible(np, "kiwi-root")) return; - pci_read_config_dword(pdev, PCI_CLASS_REVISION, &class_rev); - class_rev &= 0xff; - - if (class_rev >= 0x03) { + if (pdev->revision >= 0x03) { /* Setup chip magic config stuff (from darwin) */ pci_read_config_byte (pdev, 0x40, &conf); pci_write_config_byte(pdev, 0x40, (conf | 0x01)); @@ -490,148 +465,62 @@ static unsigned int __devinit init_chipset_pdcnew(struct pci_dev *dev, const cha static void __devinit init_hwif_pdc202new(ide_hwif_t *hwif) { - hwif->autodma = 0; + hwif->set_pio_mode = &pdcnew_set_pio_mode; + hwif->set_dma_mode = &pdcnew_set_mode; - hwif->tuneproc = &pdcnew_tune_drive; hwif->quirkproc = &pdcnew_quirkproc; - hwif->speedproc = &pdcnew_tune_chipset; hwif->resetproc = &pdcnew_reset; - hwif->err_stops_fifo = 1; - - hwif->drives[0].autotune = hwif->drives[1].autotune = 1; - if (hwif->dma_base == 0) return; - hwif->atapi_dma = 1; - - hwif->ultra_mask = hwif->cds->udma_mask; - hwif->mwdma_mask = 0x07; - - hwif->ide_dma_check = &pdcnew_config_drive_xfer_rate; - if (hwif->cbl != ATA_CBL_PATA40_SHORT) hwif->cbl = pdcnew_cable_detect(hwif); - - if (!noautodma) - hwif->autodma = 1; - hwif->drives[0].autodma = hwif->drives[1].autodma = hwif->autodma; } -static int __devinit init_setup_pdcnew(struct pci_dev *dev, ide_pci_device_t *d) +static struct pci_dev * __devinit pdc20270_get_dev2(struct pci_dev *dev) { - return ide_setup_pci_device(dev, d); -} - -static int __devinit init_setup_pdc20270(struct pci_dev *dev, - ide_pci_device_t *d) -{ - struct pci_dev *findev = NULL; - int ret; - - if ((dev->bus->self && - dev->bus->self->vendor == PCI_VENDOR_ID_DEC) && - (dev->bus->self->device == PCI_DEVICE_ID_DEC_21150)) { - if (PCI_SLOT(dev->devfn) & 2) - return -ENODEV; - - while ((findev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, findev)) != NULL) { - if ((findev->vendor == dev->vendor) && - (findev->device == dev->device) && - (PCI_SLOT(findev->devfn) & 2)) { - if (findev->irq != dev->irq) { - findev->irq = dev->irq; - } - ret = ide_setup_pci_devices(dev, findev, d); - if (ret < 0) - pci_dev_put(findev); - return ret; - } + struct pci_dev *dev2; + + dev2 = pci_get_slot(dev->bus, PCI_DEVFN(PCI_SLOT(dev->devfn) + 2, + PCI_FUNC(dev->devfn))); + if (dev2 && + dev2->vendor == dev->vendor && + dev2->device == dev->device) { + + if (dev2->irq != dev->irq) { + dev2->irq = dev->irq; + printk(KERN_INFO "PDC20270: PCI config space " + "interrupt fixed\n"); } + + return dev2; } - return ide_setup_pci_device(dev, d); + + return NULL; } -static int __devinit init_setup_pdc20276(struct pci_dev *dev, - ide_pci_device_t *d) -{ - if ((dev->bus->self) && - (dev->bus->self->vendor == PCI_VENDOR_ID_INTEL) && - ((dev->bus->self->device == PCI_DEVICE_ID_INTEL_I960) || - (dev->bus->self->device == PCI_DEVICE_ID_INTEL_I960RM))) { - printk(KERN_INFO "ide: Skipping Promise PDC20276 " - "attached to I2O RAID controller.\n"); - return -ENODEV; +#define DECLARE_PDCNEW_DEV(name_str, udma) \ + { \ + .name = name_str, \ + .init_chipset = init_chipset_pdcnew, \ + .init_hwif = init_hwif_pdc202new, \ + .host_flags = IDE_HFLAG_POST_SET_MODE | \ + IDE_HFLAG_ERROR_STOPS_FIFO | \ + IDE_HFLAG_OFF_BOARD, \ + .pio_mask = ATA_PIO4, \ + .mwdma_mask = ATA_MWDMA2, \ + .udma_mask = udma, \ } - return ide_setup_pci_device(dev, d); -} static ide_pci_device_t pdcnew_chipsets[] __devinitdata = { - { /* 0 */ - .name = "PDC20268", - .init_setup = init_setup_pdcnew, - .init_chipset = init_chipset_pdcnew, - .init_hwif = init_hwif_pdc202new, - .autodma = AUTODMA, - .bootable = OFF_BOARD, - .pio_mask = ATA_PIO4, - .udma_mask = 0x3f, /* udma0-5 */ - },{ /* 1 */ - .name = "PDC20269", - .init_setup = init_setup_pdcnew, - .init_chipset = init_chipset_pdcnew, - .init_hwif = init_hwif_pdc202new, - .autodma = AUTODMA, - .bootable = OFF_BOARD, - .pio_mask = ATA_PIO4, - .udma_mask = 0x7f, /* udma0-6*/ - },{ /* 2 */ - .name = "PDC20270", - .init_setup = init_setup_pdc20270, - .init_chipset = init_chipset_pdcnew, - .init_hwif = init_hwif_pdc202new, - .autodma = AUTODMA, - .bootable = OFF_BOARD, - .pio_mask = ATA_PIO4, - .udma_mask = 0x3f, /* udma0-5 */ - },{ /* 3 */ - .name = "PDC20271", - .init_setup = init_setup_pdcnew, - .init_chipset = init_chipset_pdcnew, - .init_hwif = init_hwif_pdc202new, - .autodma = AUTODMA, - .bootable = OFF_BOARD, - .pio_mask = ATA_PIO4, - .udma_mask = 0x7f, /* udma0-6*/ - },{ /* 4 */ - .name = "PDC20275", - .init_setup = init_setup_pdcnew, - .init_chipset = init_chipset_pdcnew, - .init_hwif = init_hwif_pdc202new, - .autodma = AUTODMA, - .bootable = OFF_BOARD, - .pio_mask = ATA_PIO4, - .udma_mask = 0x7f, /* udma0-6*/ - },{ /* 5 */ - .name = "PDC20276", - .init_setup = init_setup_pdc20276, - .init_chipset = init_chipset_pdcnew, - .init_hwif = init_hwif_pdc202new, - .autodma = AUTODMA, - .bootable = OFF_BOARD, - .pio_mask = ATA_PIO4, - .udma_mask = 0x7f, /* udma0-6*/ - },{ /* 6 */ - .name = "PDC20277", - .init_setup = init_setup_pdcnew, - .init_chipset = init_chipset_pdcnew, - .init_hwif = init_hwif_pdc202new, - .autodma = AUTODMA, - .bootable = OFF_BOARD, - .pio_mask = ATA_PIO4, - .udma_mask = 0x7f, /* udma0-6*/ - } + /* 0 */ DECLARE_PDCNEW_DEV("PDC20268", ATA_UDMA5), + /* 1 */ DECLARE_PDCNEW_DEV("PDC20269", ATA_UDMA6), + /* 2 */ DECLARE_PDCNEW_DEV("PDC20270", ATA_UDMA5), + /* 3 */ DECLARE_PDCNEW_DEV("PDC20271", ATA_UDMA6), + /* 4 */ DECLARE_PDCNEW_DEV("PDC20275", ATA_UDMA6), + /* 5 */ DECLARE_PDCNEW_DEV("PDC20276", ATA_UDMA6), + /* 6 */ DECLARE_PDCNEW_DEV("PDC20277", ATA_UDMA6), }; /** @@ -645,19 +534,50 @@ static ide_pci_device_t pdcnew_chipsets[] __devinitdata = { static int __devinit pdc202new_init_one(struct pci_dev *dev, const struct pci_device_id *id) { - ide_pci_device_t *d = &pdcnew_chipsets[id->driver_data]; + ide_pci_device_t *d; + struct pci_dev *bridge = dev->bus->self; + u8 idx = id->driver_data; + + d = &pdcnew_chipsets[idx]; + + if (idx == 2 && bridge && + bridge->vendor == PCI_VENDOR_ID_DEC && + bridge->device == PCI_DEVICE_ID_DEC_21150) { + struct pci_dev *dev2; - return d->init_setup(dev, d); + if (PCI_SLOT(dev->devfn) & 2) + return -ENODEV; + + dev2 = pdc20270_get_dev2(dev); + + if (dev2) { + int ret = ide_setup_pci_devices(dev, dev2, d); + if (ret < 0) + pci_dev_put(dev2); + return ret; + } + } + + if (idx == 5 && bridge && + bridge->vendor == PCI_VENDOR_ID_INTEL && + (bridge->device == PCI_DEVICE_ID_INTEL_I960 || + bridge->device == PCI_DEVICE_ID_INTEL_I960RM)) { + printk(KERN_INFO "PDC20276: attached to I2O RAID controller, " + "skipping\n"); + return -ENODEV; + } + + return ide_setup_pci_device(dev, d); } -static struct pci_device_id pdc202new_pci_tbl[] = { - { PCI_VENDOR_ID_PROMISE, PCI_DEVICE_ID_PROMISE_20268, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, - { PCI_VENDOR_ID_PROMISE, PCI_DEVICE_ID_PROMISE_20269, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 1}, - { PCI_VENDOR_ID_PROMISE, PCI_DEVICE_ID_PROMISE_20270, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 2}, - { PCI_VENDOR_ID_PROMISE, PCI_DEVICE_ID_PROMISE_20271, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 3}, - { PCI_VENDOR_ID_PROMISE, PCI_DEVICE_ID_PROMISE_20275, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 4}, - { PCI_VENDOR_ID_PROMISE, PCI_DEVICE_ID_PROMISE_20276, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 5}, - { PCI_VENDOR_ID_PROMISE, PCI_DEVICE_ID_PROMISE_20277, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 6}, +static const struct pci_device_id pdc202new_pci_tbl[] = { + { PCI_VDEVICE(PROMISE, PCI_DEVICE_ID_PROMISE_20268), 0 }, + { PCI_VDEVICE(PROMISE, PCI_DEVICE_ID_PROMISE_20269), 1 }, + { PCI_VDEVICE(PROMISE, PCI_DEVICE_ID_PROMISE_20270), 2 }, + { PCI_VDEVICE(PROMISE, PCI_DEVICE_ID_PROMISE_20271), 3 }, + { PCI_VDEVICE(PROMISE, PCI_DEVICE_ID_PROMISE_20275), 4 }, + { PCI_VDEVICE(PROMISE, PCI_DEVICE_ID_PROMISE_20276), 5 }, + { PCI_VDEVICE(PROMISE, PCI_DEVICE_ID_PROMISE_20277), 6 }, { 0, }, }; MODULE_DEVICE_TABLE(pci, pdc202new_pci_tbl); diff --git a/drivers/ide/pci/pdc202xx_old.c b/drivers/ide/pci/pdc202xx_old.c index e19a891171c..29306121dc4 100644 --- a/drivers/ide/pci/pdc202xx_old.c +++ b/drivers/ide/pci/pdc202xx_old.c @@ -1,5 +1,5 @@ /* - * linux/drivers/ide/pci/pdc202xx_old.c Version 0.51 Jul 27, 2007 + * linux/drivers/ide/pci/pdc202xx_old.c Version 0.52 Aug 27, 2007 * * Copyright (C) 1998-2002 Andre Hedrick <andre@linux-ide.org> * Copyright (C) 2006-2007 MontaVista Software, Inc. @@ -63,12 +63,11 @@ static const char *pdc_quirk_drives[] = { static void pdc_old_disable_66MHz_clock(ide_hwif_t *); -static int pdc202xx_tune_chipset (ide_drive_t *drive, u8 xferspeed) +static void pdc202xx_set_mode(ide_drive_t *drive, const u8 speed) { ide_hwif_t *hwif = HWIF(drive); struct pci_dev *dev = hwif->pci_dev; u8 drive_pci = 0x60 + (drive->dn << 2); - u8 speed = ide_rate_filter(drive, xferspeed); u8 AP = 0, BP = 0, CP = 0; u8 TA = 0, TB = 0, TC = 0; @@ -98,9 +97,6 @@ static int pdc202xx_tune_chipset (ide_drive_t *drive, u8 xferspeed) case XFER_MW_DMA_2: TB = 0x60; TC = 0x03; break; case XFER_MW_DMA_1: TB = 0x60; TC = 0x04; break; case XFER_MW_DMA_0: TB = 0xE0; TC = 0x0F; break; - case XFER_SW_DMA_2: TB = 0x60; TC = 0x05; break; - case XFER_SW_DMA_1: TB = 0x80; TC = 0x06; break; - case XFER_SW_DMA_0: TB = 0xC0; TC = 0x0B; break; case XFER_PIO_4: TA = 0x01; TB = 0x04; break; case XFER_PIO_3: TA = 0x02; TB = 0x06; break; case XFER_PIO_2: TA = 0x03; TB = 0x08; break; @@ -139,14 +135,11 @@ static int pdc202xx_tune_chipset (ide_drive_t *drive, u8 xferspeed) pci_read_config_dword(dev, drive_pci, &drive_conf); printk("0x%08x\n", drive_conf); #endif - - return ide_config_drive_speed(drive, speed); } -static void pdc202xx_tune_drive(ide_drive_t *drive, u8 pio) +static void pdc202xx_set_pio_mode(ide_drive_t *drive, const u8 pio) { - pio = ide_get_best_pio_mode(drive, pio, 4); - pdc202xx_tune_chipset(drive, XFER_PIO_0 + pio); + pdc202xx_set_mode(drive, XFER_PIO_0 + pio); } static u8 pdc202xx_old_cable_detect (ide_hwif_t *hwif) @@ -183,19 +176,6 @@ static void pdc_old_disable_66MHz_clock(ide_hwif_t *hwif) outb(clock & ~(hwif->channel ? 0x08 : 0x02), clock_reg); } -static int pdc202xx_config_drive_xfer_rate (ide_drive_t *drive) -{ - drive->init_speed = 0; - - if (ide_tune_dma(drive)) - return 0; - - if (ide_use_fast_pio(drive)) - pdc202xx_tune_drive(drive, 255); - - return -1; -} - static int pdc202xx_quirkproc (ide_drive_t *drive) { const char **list, *model = drive->id->model; @@ -307,10 +287,11 @@ static void pdc202xx_reset (ide_drive_t *drive) { ide_hwif_t *hwif = HWIF(drive); ide_hwif_t *mate = hwif->mate; - + pdc202xx_reset_host(hwif); pdc202xx_reset_host(mate); - pdc202xx_tune_drive(drive, 255); + + ide_set_max_pio(drive); } static unsigned int __devinit init_chipset_pdc202xx(struct pci_dev *dev, @@ -328,28 +309,17 @@ static void __devinit init_hwif_pdc202xx(ide_hwif_t *hwif) (dev->device == PCI_DEVICE_ID_PROMISE_20265)) hwif->rqsize = 256; - hwif->autodma = 0; - hwif->tuneproc = &pdc202xx_tune_drive; + hwif->set_pio_mode = &pdc202xx_set_pio_mode; + hwif->set_dma_mode = &pdc202xx_set_mode; + hwif->quirkproc = &pdc202xx_quirkproc; if (hwif->pci_dev->device != PCI_DEVICE_ID_PROMISE_20246) hwif->resetproc = &pdc202xx_reset; - hwif->speedproc = &pdc202xx_tune_chipset; - - hwif->err_stops_fifo = 1; - - hwif->drives[0].autotune = hwif->drives[1].autotune = 1; - if (hwif->dma_base == 0) return; - hwif->ultra_mask = hwif->cds->udma_mask; - hwif->mwdma_mask = 0x07; - hwif->swdma_mask = 0x07; - hwif->atapi_dma = 1; - - hwif->ide_dma_check = &pdc202xx_config_drive_xfer_rate; hwif->dma_lost_irq = &pdc202xx_dma_lost_irq; hwif->dma_timeout = &pdc202xx_dma_timeout; @@ -361,10 +331,6 @@ static void __devinit init_hwif_pdc202xx(ide_hwif_t *hwif) hwif->ide_dma_end = &pdc202xx_old_ide_dma_end; } hwif->ide_dma_test_irq = &pdc202xx_old_ide_dma_test_irq; - - if (!noautodma) - hwif->autodma = 1; - hwif->drives[0].autodma = hwif->drives[1].autodma = hwif->autodma; } static void __devinit init_dma_pdc202xx(ide_hwif_t *hwif, unsigned long dmabase) @@ -399,8 +365,8 @@ static void __devinit init_dma_pdc202xx(ide_hwif_t *hwif, unsigned long dmabase) ide_setup_dma(hwif, dmabase, 8); } -static int __devinit init_setup_pdc202ata4(struct pci_dev *dev, - ide_pci_device_t *d) +static void __devinit pdc202ata4_fixup_irq(struct pci_dev *dev, + const char *name) { if ((dev->class >> 8) != PCI_CLASS_STORAGE_IDE) { u8 irq = 0, irq2 = 0; @@ -410,90 +376,44 @@ static int __devinit init_setup_pdc202ata4(struct pci_dev *dev, if (irq != irq2) { pci_write_config_byte(dev, (PCI_INTERRUPT_LINE)|0x80, irq); /* 0xbc */ - printk(KERN_INFO "%s: pci-config space interrupt " - "mirror fixed.\n", d->name); + printk(KERN_INFO "%s: PCI config space interrupt " + "mirror fixed\n", name); } } - return ide_setup_pci_device(dev, d); } -static int __devinit init_setup_pdc20265(struct pci_dev *dev, - ide_pci_device_t *d) -{ - if ((dev->bus->self) && - (dev->bus->self->vendor == PCI_VENDOR_ID_INTEL) && - ((dev->bus->self->device == PCI_DEVICE_ID_INTEL_I960) || - (dev->bus->self->device == PCI_DEVICE_ID_INTEL_I960RM))) { - printk(KERN_INFO "ide: Skipping Promise PDC20265 " - "attached to I2O RAID controller.\n"); - return -ENODEV; +#define DECLARE_PDC2026X_DEV(name_str, udma) \ + { \ + .name = name_str, \ + .init_chipset = init_chipset_pdc202xx, \ + .init_hwif = init_hwif_pdc202xx, \ + .init_dma = init_dma_pdc202xx, \ + .extra = 48, \ + .host_flags = IDE_HFLAG_ERROR_STOPS_FIFO | \ + IDE_HFLAG_OFF_BOARD, \ + .pio_mask = ATA_PIO4, \ + .mwdma_mask = ATA_MWDMA2, \ + .udma_mask = udma, \ } - return ide_setup_pci_device(dev, d); -} - -static int __devinit init_setup_pdc202xx(struct pci_dev *dev, - ide_pci_device_t *d) -{ - return ide_setup_pci_device(dev, d); -} static ide_pci_device_t pdc202xx_chipsets[] __devinitdata = { { /* 0 */ .name = "PDC20246", - .init_setup = init_setup_pdc202ata4, .init_chipset = init_chipset_pdc202xx, .init_hwif = init_hwif_pdc202xx, .init_dma = init_dma_pdc202xx, - .autodma = AUTODMA, - .bootable = OFF_BOARD, .extra = 16, + .host_flags = IDE_HFLAG_ERROR_STOPS_FIFO | + IDE_HFLAG_OFF_BOARD, .pio_mask = ATA_PIO4, - .udma_mask = 0x07, /* udma0-2 */ - },{ /* 1 */ - .name = "PDC20262", - .init_setup = init_setup_pdc202ata4, - .init_chipset = init_chipset_pdc202xx, - .init_hwif = init_hwif_pdc202xx, - .init_dma = init_dma_pdc202xx, - .autodma = AUTODMA, - .bootable = OFF_BOARD, - .extra = 48, - .pio_mask = ATA_PIO4, - .udma_mask = 0x1f, /* udma0-4 */ - },{ /* 2 */ - .name = "PDC20263", - .init_setup = init_setup_pdc202ata4, - .init_chipset = init_chipset_pdc202xx, - .init_hwif = init_hwif_pdc202xx, - .init_dma = init_dma_pdc202xx, - .autodma = AUTODMA, - .bootable = OFF_BOARD, - .extra = 48, - .pio_mask = ATA_PIO4, - .udma_mask = 0x1f, /* udma0-4 */ - },{ /* 3 */ - .name = "PDC20265", - .init_setup = init_setup_pdc20265, - .init_chipset = init_chipset_pdc202xx, - .init_hwif = init_hwif_pdc202xx, - .init_dma = init_dma_pdc202xx, - .autodma = AUTODMA, - .bootable = OFF_BOARD, - .extra = 48, - .pio_mask = ATA_PIO4, - .udma_mask = 0x3f, /* udma0-5 */ - },{ /* 4 */ - .name = "PDC20267", - .init_setup = init_setup_pdc202xx, - .init_chipset = init_chipset_pdc202xx, - .init_hwif = init_hwif_pdc202xx, - .init_dma = init_dma_pdc202xx, - .autodma = AUTODMA, - .bootable = OFF_BOARD, - .extra = 48, - .pio_mask = ATA_PIO4, - .udma_mask = 0x3f, /* udma0-5 */ - } + .mwdma_mask = ATA_MWDMA2, + .udma_mask = ATA_UDMA2, + }, + + /* 1 */ DECLARE_PDC2026X_DEV("PDC20262", ATA_UDMA4), + /* 2 */ DECLARE_PDC2026X_DEV("PDC20263", ATA_UDMA4), + /* 3 */ DECLARE_PDC2026X_DEV("PDC20265", ATA_UDMA5), + /* 4 */ DECLARE_PDC2026X_DEV("PDC20267", ATA_UDMA5), }; /** @@ -507,17 +427,36 @@ static ide_pci_device_t pdc202xx_chipsets[] __devinitdata = { static int __devinit pdc202xx_init_one(struct pci_dev *dev, const struct pci_device_id *id) { - ide_pci_device_t *d = &pdc202xx_chipsets[id->driver_data]; + ide_pci_device_t *d; + u8 idx = id->driver_data; + + d = &pdc202xx_chipsets[idx]; + + if (idx < 3) + pdc202ata4_fixup_irq(dev, d->name); - return d->init_setup(dev, d); + if (idx == 3) { + struct pci_dev *bridge = dev->bus->self; + + if (bridge && + bridge->vendor == PCI_VENDOR_ID_INTEL && + (bridge->device == PCI_DEVICE_ID_INTEL_I960 || + bridge->device == PCI_DEVICE_ID_INTEL_I960RM)) { + printk(KERN_INFO "ide: Skipping Promise PDC20265 " + "attached to I2O RAID controller\n"); + return -ENODEV; + } + } + + return ide_setup_pci_device(dev, d); } -static struct pci_device_id pdc202xx_pci_tbl[] = { - { PCI_VENDOR_ID_PROMISE, PCI_DEVICE_ID_PROMISE_20246, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, - { PCI_VENDOR_ID_PROMISE, PCI_DEVICE_ID_PROMISE_20262, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 1}, - { PCI_VENDOR_ID_PROMISE, PCI_DEVICE_ID_PROMISE_20263, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 2}, - { PCI_VENDOR_ID_PROMISE, PCI_DEVICE_ID_PROMISE_20265, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 3}, - { PCI_VENDOR_ID_PROMISE, PCI_DEVICE_ID_PROMISE_20267, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 4}, +static const struct pci_device_id pdc202xx_pci_tbl[] = { + { PCI_VDEVICE(PROMISE, PCI_DEVICE_ID_PROMISE_20246), 0 }, + { PCI_VDEVICE(PROMISE, PCI_DEVICE_ID_PROMISE_20262), 1 }, + { PCI_VDEVICE(PROMISE, PCI_DEVICE_ID_PROMISE_20263), 2 }, + { PCI_VDEVICE(PROMISE, PCI_DEVICE_ID_PROMISE_20265), 3 }, + { PCI_VDEVICE(PROMISE, PCI_DEVICE_ID_PROMISE_20267), 4 }, { 0, }, }; MODULE_DEVICE_TABLE(pci, pdc202xx_pci_tbl); diff --git a/drivers/ide/pci/piix.c b/drivers/ide/pci/piix.c index 5cfa9378bbb..ec0c6e96a21 100644 --- a/drivers/ide/pci/piix.c +++ b/drivers/ide/pci/piix.c @@ -1,5 +1,5 @@ /* - * linux/drivers/ide/pci/piix.c Version 0.51 Jul 6, 2007 + * linux/drivers/ide/pci/piix.c Version 0.54 Sep 5, 2007 * * Copyright (C) 1998-1999 Andrzej Krzysztofowicz, Author and Maintainer * Copyright (C) 1998-2000 Andre Hedrick <andre@linux-ide.org> @@ -17,11 +17,11 @@ * 41 * 43 * - * | PIO 0 | c0 | 80 | 0 | piix_tune_drive(drive, 0); - * | PIO 2 | SW2 | d0 | 90 | 4 | piix_tune_drive(drive, 2); - * | PIO 3 | MW1 | e1 | a1 | 9 | piix_tune_drive(drive, 3); - * | PIO 4 | MW2 | e3 | a3 | b | piix_tune_drive(drive, 4); - * + * | PIO 0 | c0 | 80 | 0 | + * | PIO 2 | SW2 | d0 | 90 | 4 | + * | PIO 3 | MW1 | e1 | a1 | 9 | + * | PIO 4 | MW2 | e3 | a3 | b | + * * sitre = word40 & 0x4000; primary * sitre = word42 & 0x4000; secondary * @@ -106,44 +106,14 @@ static int no_piix_dma; /** - * piix_dma_2_pio - return the PIO mode matching DMA - * @xfer_rate: transfer speed - * - * Returns the nearest equivalent PIO timing for the DMA - * mode requested by the controller. - */ - -static u8 piix_dma_2_pio (u8 xfer_rate) { - switch(xfer_rate) { - case XFER_UDMA_6: - case XFER_UDMA_5: - case XFER_UDMA_4: - case XFER_UDMA_3: - case XFER_UDMA_2: - case XFER_UDMA_1: - case XFER_UDMA_0: - case XFER_MW_DMA_2: - return 4; - case XFER_MW_DMA_1: - return 3; - case XFER_SW_DMA_2: - return 2; - case XFER_MW_DMA_0: - case XFER_SW_DMA_1: - case XFER_SW_DMA_0: - default: - return 0; - } -} - -/** - * piix_tune_pio - tune PIIX for PIO mode - * @drive: drive to tune - * @pio: desired PIO mode + * piix_set_pio_mode - set host controller for PIO mode + * @drive: drive + * @pio: PIO mode number * * Set the interface PIO mode based upon the settings done by AMI BIOS. */ -static void piix_tune_pio (ide_drive_t *drive, u8 pio) + +static void piix_set_pio_mode(ide_drive_t *drive, const u8 pio) { ide_hwif_t *hwif = HWIF(drive); struct pci_dev *dev = hwif->pci_dev; @@ -204,36 +174,19 @@ static void piix_tune_pio (ide_drive_t *drive, u8 pio) } /** - * piix_tune_drive - tune a drive attached to PIIX - * @drive: drive to tune - * @pio: desired PIO mode + * piix_set_dma_mode - set host controller for DMA mode + * @drive: drive + * @speed: DMA mode * - * Set the drive's PIO mode (might be useful if drive is not registered - * in CMOS for any reason). + * Set a PIIX host controller to the desired DMA mode. This involves + * programming the right timing data into the PCI configuration space. */ -static void piix_tune_drive (ide_drive_t *drive, u8 pio) -{ - pio = ide_get_best_pio_mode(drive, pio, 4); - piix_tune_pio(drive, pio); - (void) ide_config_drive_speed(drive, XFER_PIO_0 + pio); -} -/** - * piix_tune_chipset - tune a PIIX interface - * @drive: IDE drive to tune - * @xferspeed: speed to configure - * - * Set a PIIX interface channel to the desired speeds. This involves - * requires the right timing data into the PIIX configuration space - * then setting the drive parameters appropriately - */ - -static int piix_tune_chipset (ide_drive_t *drive, u8 xferspeed) +static void piix_set_dma_mode(ide_drive_t *drive, const u8 speed) { ide_hwif_t *hwif = HWIF(drive); struct pci_dev *dev = hwif->pci_dev; u8 maslave = hwif->channel ? 0x42 : 0x40; - u8 speed = ide_rate_filter(drive, xferspeed); int a_speed = 3 << (drive->dn * 4); int u_flag = 1 << drive->dn; int v_flag = 0x01 << drive->dn; @@ -260,12 +213,7 @@ static int piix_tune_chipset (ide_drive_t *drive, u8 xferspeed) case XFER_MW_DMA_2: case XFER_MW_DMA_1: case XFER_SW_DMA_2: break; - case XFER_PIO_4: - case XFER_PIO_3: - case XFER_PIO_2: - case XFER_PIO_1: - case XFER_PIO_0: break; - default: return -1; + default: return; } if (speed >= XFER_UDMA_0) { @@ -284,6 +232,9 @@ static int piix_tune_chipset (ide_drive_t *drive, u8 xferspeed) } else pci_write_config_byte(dev, 0x54, reg54 & ~v_flag); } else { + const u8 mwdma_to_pio[] = { 0, 3, 4 }; + u8 pio; + if (reg48 & u_flag) pci_write_config_byte(dev, 0x48, reg48 & ~u_flag); if (reg4a & a_speed) @@ -292,85 +243,31 @@ static int piix_tune_chipset (ide_drive_t *drive, u8 xferspeed) pci_write_config_byte(dev, 0x54, reg54 & ~v_flag); if (reg55 & w_flag) pci_write_config_byte(dev, 0x55, (u8) reg55 & ~w_flag); - } - - if (speed > XFER_PIO_4) - piix_tune_pio(drive, piix_dma_2_pio(speed)); - else - piix_tune_pio(drive, speed - XFER_PIO_0); - - return ide_config_drive_speed(drive, speed); -} - -/** - * piix_config_drive_xfer_rate - set up an IDE device - * @drive: IDE drive to configure - * - * Set up the PIIX interface for the best available speed on this - * interface, preferring DMA to PIO. - */ - -static int piix_config_drive_xfer_rate (ide_drive_t *drive) -{ - drive->init_speed = 0; - if (ide_tune_dma(drive)) - return 0; + if (speed >= XFER_MW_DMA_0) + pio = mwdma_to_pio[speed - XFER_MW_DMA_0]; + else + pio = 2; /* only SWDMA2 is allowed */ - if (ide_use_fast_pio(drive)) - piix_tune_drive(drive, 255); - - return -1; -} - -/** - * piix_is_ichx - check if ICHx - * @dev: PCI device to check - * - * returns 1 if ICHx, 0 otherwise. - */ -static int piix_is_ichx(struct pci_dev *dev) -{ - switch (dev->device) { - case PCI_DEVICE_ID_INTEL_82801EB_1: - case PCI_DEVICE_ID_INTEL_82801AA_1: - case PCI_DEVICE_ID_INTEL_82801AB_1: - case PCI_DEVICE_ID_INTEL_82801BA_8: - case PCI_DEVICE_ID_INTEL_82801BA_9: - case PCI_DEVICE_ID_INTEL_82801CA_10: - case PCI_DEVICE_ID_INTEL_82801CA_11: - case PCI_DEVICE_ID_INTEL_82801DB_1: - case PCI_DEVICE_ID_INTEL_82801DB_10: - case PCI_DEVICE_ID_INTEL_82801DB_11: - case PCI_DEVICE_ID_INTEL_82801EB_11: - case PCI_DEVICE_ID_INTEL_82801E_11: - case PCI_DEVICE_ID_INTEL_ESB_2: - case PCI_DEVICE_ID_INTEL_ICH6_19: - case PCI_DEVICE_ID_INTEL_ICH7_21: - case PCI_DEVICE_ID_INTEL_ESB2_18: - case PCI_DEVICE_ID_INTEL_ICH8_6: - return 1; + piix_set_pio_mode(drive, pio); } - - return 0; } /** - * init_chipset_piix - set up the PIIX chipset + * init_chipset_ich - set up the ICH chipset * @dev: PCI device to set up * @name: Name of the device * - * Initialize the PCI device as required. For the PIIX this turns - * out to be nice and simple + * Initialize the PCI device as required. For the ICH this turns + * out to be nice and simple. */ -static unsigned int __devinit init_chipset_piix (struct pci_dev *dev, const char *name) +static unsigned int __devinit init_chipset_ich(struct pci_dev *dev, const char *name) { - if (piix_is_ichx(dev)) { - unsigned int extra = 0; - pci_read_config_dword(dev, 0x54, &extra); - pci_write_config_dword(dev, 0x54, extra|0x400); - } + u32 extra = 0; + + pci_read_config_dword(dev, 0x54, &extra); + pci_write_config_dword(dev, 0x54, extra | 0x400); return 0; } @@ -388,9 +285,9 @@ static void piix_dma_clear_irq(ide_drive_t *drive) u8 dma_stat; /* clear the INTR & ERROR bits */ - dma_stat = hwif->INB(hwif->dma_status); + dma_stat = inb(hwif->dma_status); /* Should we force the bit as well ? */ - hwif->OUTB(dma_stat, hwif->dma_status); + outb(dma_stat, hwif->dma_status); } struct ich_laptop { @@ -444,35 +341,12 @@ static u8 __devinit piix_cable_detect(ide_hwif_t *hwif) static void __devinit init_hwif_piix(ide_hwif_t *hwif) { -#ifndef CONFIG_IA64 - if (!hwif->irq) - hwif->irq = hwif->channel ? 15 : 14; -#endif /* CONFIG_IA64 */ - - if (hwif->pci_dev->device == PCI_DEVICE_ID_INTEL_82371MX) { - /* This is a painful system best to let it self tune for now */ - return; - } - - hwif->autodma = 0; - hwif->tuneproc = &piix_tune_drive; - hwif->speedproc = &piix_tune_chipset; - hwif->drives[0].autotune = 1; - hwif->drives[1].autotune = 1; + hwif->set_pio_mode = &piix_set_pio_mode; + hwif->set_dma_mode = &piix_set_dma_mode; if (!hwif->dma_base) return; - /* ICHx need to clear the bmdma status for all interrupts */ - if (piix_is_ichx(hwif->pci_dev)) - hwif->ide_dma_clear_irq = &piix_dma_clear_irq; - - hwif->atapi_dma = 1; - - hwif->ultra_mask = hwif->cds->udma_mask; - hwif->mwdma_mask = 0x06; - hwif->swdma_mask = 0x04; - if (hwif->ultra_mask & 0x78) { if (hwif->cbl != ATA_CBL_PATA40_SHORT) hwif->cbl = piix_cable_detect(hwif); @@ -480,30 +354,51 @@ static void __devinit init_hwif_piix(ide_hwif_t *hwif) if (no_piix_dma) hwif->ultra_mask = hwif->mwdma_mask = hwif->swdma_mask = 0; +} - hwif->ide_dma_check = &piix_config_drive_xfer_rate; - if (!noautodma) - hwif->autodma = 1; +static void __devinit init_hwif_ich(ide_hwif_t *hwif) +{ + init_hwif_piix(hwif); - hwif->drives[1].autodma = hwif->autodma; - hwif->drives[0].autodma = hwif->autodma; + /* ICHx need to clear the BMDMA status for all interrupts */ + if (hwif->dma_base) + hwif->ide_dma_clear_irq = &piix_dma_clear_irq; } +#ifndef CONFIG_IA64 + #define IDE_HFLAGS_PIIX (IDE_HFLAG_LEGACY_IRQS | IDE_HFLAG_BOOTABLE) +#else + #define IDE_HFLAGS_PIIX IDE_HFLAG_BOOTABLE +#endif + #define DECLARE_PIIX_DEV(name_str, udma) \ { \ .name = name_str, \ - .init_chipset = init_chipset_piix, \ .init_hwif = init_hwif_piix, \ - .autodma = AUTODMA, \ .enablebits = {{0x41,0x80,0x80}, {0x43,0x80,0x80}}, \ - .bootable = ON_BOARD, \ + .host_flags = IDE_HFLAGS_PIIX, \ .pio_mask = ATA_PIO4, \ + .swdma_mask = ATA_SWDMA2_ONLY, \ + .mwdma_mask = ATA_MWDMA12_ONLY, \ .udma_mask = udma, \ } +#define DECLARE_ICH_DEV(name_str, udma) \ + { \ + .name = name_str, \ + .init_chipset = init_chipset_ich, \ + .init_hwif = init_hwif_ich, \ + .enablebits = {{0x41,0x80,0x80}, {0x43,0x80,0x80}}, \ + .host_flags = IDE_HFLAGS_PIIX, \ + .pio_mask = ATA_PIO4, \ + .swdma_mask = ATA_SWDMA2_ONLY, \ + .mwdma_mask = ATA_MWDMA12_ONLY, \ + .udma_mask = udma, \ + } + static ide_pci_device_t piix_pci_info[] __devinitdata = { - /* 0 */ DECLARE_PIIX_DEV("PIIXa", 0x00), /* no udma */ - /* 1 */ DECLARE_PIIX_DEV("PIIXb", 0x00), /* no udma */ + /* 0 */ DECLARE_PIIX_DEV("PIIXa", 0x00), /* no udma */ + /* 1 */ DECLARE_PIIX_DEV("PIIXb", 0x00), /* no udma */ /* 2 */ { /* @@ -512,36 +407,35 @@ static ide_pci_device_t piix_pci_info[] __devinitdata = { * of the bit 14 of the IDETIM register at offset 0x6c */ .name = "MPIIX", - .init_hwif = init_hwif_piix, - .autodma = NODMA, .enablebits = {{0x6d,0xc0,0x80}, {0x6d,0xc0,0xc0}}, - .bootable = ON_BOARD, - .host_flags = IDE_HFLAG_ISA_PORTS, + .host_flags = IDE_HFLAG_ISA_PORTS | IDE_HFLAG_NO_DMA | + IDE_HFLAGS_PIIX, .pio_mask = ATA_PIO4, + /* This is a painful system best to let it self tune for now */ }, - /* 3 */ DECLARE_PIIX_DEV("PIIX3", 0x00), /* no udma */ - /* 4 */ DECLARE_PIIX_DEV("PIIX4", 0x07), /* udma0-2 */ - /* 5 */ DECLARE_PIIX_DEV("ICH0", 0x07), /* udma0-2 */ - /* 6 */ DECLARE_PIIX_DEV("PIIX4", 0x07), /* udma0-2 */ - /* 7 */ DECLARE_PIIX_DEV("ICH", 0x1f), /* udma0-4 */ - /* 8 */ DECLARE_PIIX_DEV("PIIX4", 0x1f), /* udma0-4 */ - /* 9 */ DECLARE_PIIX_DEV("PIIX4", 0x07), /* udma0-2 */ - /* 10 */ DECLARE_PIIX_DEV("ICH2", 0x3f), /* udma0-5 */ - /* 11 */ DECLARE_PIIX_DEV("ICH2M", 0x3f), /* udma0-5 */ - /* 12 */ DECLARE_PIIX_DEV("ICH3M", 0x3f), /* udma0-5 */ - /* 13 */ DECLARE_PIIX_DEV("ICH3", 0x3f), /* udma0-5 */ - /* 14 */ DECLARE_PIIX_DEV("ICH4", 0x3f), /* udma0-5 */ - /* 15 */ DECLARE_PIIX_DEV("ICH5", 0x3f), /* udma0-5 */ - /* 16 */ DECLARE_PIIX_DEV("C-ICH", 0x3f), /* udma0-5 */ - /* 17 */ DECLARE_PIIX_DEV("ICH4", 0x3f), /* udma0-5 */ - /* 18 */ DECLARE_PIIX_DEV("ICH5-SATA", 0x3f), /* udma0-5 */ - /* 19 */ DECLARE_PIIX_DEV("ICH5", 0x3f), /* udma0-5 */ - /* 20 */ DECLARE_PIIX_DEV("ICH6", 0x3f), /* udma0-5 */ - /* 21 */ DECLARE_PIIX_DEV("ICH7", 0x3f), /* udma0-5 */ - /* 22 */ DECLARE_PIIX_DEV("ICH4", 0x3f), /* udma0-5 */ - /* 23 */ DECLARE_PIIX_DEV("ESB2", 0x3f), /* udma0-5 */ - /* 24 */ DECLARE_PIIX_DEV("ICH8M", 0x3f), /* udma0-5 */ + /* 3 */ DECLARE_PIIX_DEV("PIIX3", 0x00), /* no udma */ + /* 4 */ DECLARE_PIIX_DEV("PIIX4", ATA_UDMA2), + /* 5 */ DECLARE_ICH_DEV("ICH0", ATA_UDMA2), + /* 6 */ DECLARE_PIIX_DEV("PIIX4", ATA_UDMA2), + /* 7 */ DECLARE_ICH_DEV("ICH", ATA_UDMA4), + /* 8 */ DECLARE_PIIX_DEV("PIIX4", ATA_UDMA4), + /* 9 */ DECLARE_PIIX_DEV("PIIX4", ATA_UDMA2), + /* 10 */ DECLARE_ICH_DEV("ICH2", ATA_UDMA5), + /* 11 */ DECLARE_ICH_DEV("ICH2M", ATA_UDMA5), + /* 12 */ DECLARE_ICH_DEV("ICH3M", ATA_UDMA5), + /* 13 */ DECLARE_ICH_DEV("ICH3", ATA_UDMA5), + /* 14 */ DECLARE_ICH_DEV("ICH4", ATA_UDMA5), + /* 15 */ DECLARE_ICH_DEV("ICH5", ATA_UDMA5), + /* 16 */ DECLARE_ICH_DEV("C-ICH", ATA_UDMA5), + /* 17 */ DECLARE_ICH_DEV("ICH4", ATA_UDMA5), + /* 18 */ DECLARE_ICH_DEV("ICH5-SATA", ATA_UDMA5), + /* 19 */ DECLARE_ICH_DEV("ICH5", ATA_UDMA5), + /* 20 */ DECLARE_ICH_DEV("ICH6", ATA_UDMA5), + /* 21 */ DECLARE_ICH_DEV("ICH7", ATA_UDMA5), + /* 22 */ DECLARE_ICH_DEV("ICH4", ATA_UDMA5), + /* 23 */ DECLARE_ICH_DEV("ESB2", ATA_UDMA5), + /* 24 */ DECLARE_ICH_DEV("ICH8M", ATA_UDMA5), }; /** @@ -589,34 +483,34 @@ static void __devinit piix_check_450nx(void) printk(KERN_WARNING "piix: A BIOS update may resolve this.\n"); } -static struct pci_device_id piix_pci_tbl[] = { - { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371FB_0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, - { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371FB_1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 1}, - { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371MX, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 2}, - { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371SB_1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 3}, - { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371AB, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 4}, - { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801AB_1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 5}, - { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82443MX_1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 6}, - { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801AA_1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 7}, - { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82372FB_1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 8}, - { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82451NX, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 9}, - { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801BA_9, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 10}, - { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801BA_8, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 11}, - { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801CA_10,PCI_ANY_ID, PCI_ANY_ID, 0, 0, 12}, - { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801CA_11,PCI_ANY_ID, PCI_ANY_ID, 0, 0, 13}, - { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801DB_11,PCI_ANY_ID, PCI_ANY_ID, 0, 0, 14}, - { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801EB_11,PCI_ANY_ID, PCI_ANY_ID, 0, 0, 15}, - { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801E_11, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 16}, - { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801DB_10,PCI_ANY_ID, PCI_ANY_ID, 0, 0, 17}, +static const struct pci_device_id piix_pci_tbl[] = { + { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_82371FB_0), 0 }, + { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_82371FB_1), 1 }, + { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_82371MX), 2 }, + { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_82371SB_1), 3 }, + { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_82371AB), 4 }, + { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_82801AB_1), 5 }, + { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_82443MX_1), 6 }, + { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_82801AA_1), 7 }, + { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_82372FB_1), 8 }, + { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_82451NX), 9 }, + { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_82801BA_9), 10 }, + { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_82801BA_8), 11 }, + { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_82801CA_10), 12 }, + { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_82801CA_11), 13 }, + { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_82801DB_11), 14 }, + { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_82801EB_11), 15 }, + { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_82801E_11), 16 }, + { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_82801DB_10), 17 }, #ifdef CONFIG_BLK_DEV_IDE_SATA - { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801EB_1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 18}, + { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_82801EB_1), 18 }, #endif - { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ESB_2, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 19}, - { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH6_19, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 20}, - { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH7_21, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 21}, - { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801DB_1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 22}, - { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ESB2_18, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 23}, - { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH8_6, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 24}, + { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_ESB_2), 19 }, + { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_ICH6_19), 20 }, + { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_ICH7_21), 21 }, + { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_82801DB_1), 22 }, + { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_ESB2_18), 23 }, + { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_ICH8_6), 24 }, { 0, }, }; MODULE_DEVICE_TABLE(pci, piix_pci_tbl); diff --git a/drivers/ide/pci/rz1000.c b/drivers/ide/pci/rz1000.c index 10e1ae7a4a0..dd2583ef1ad 100644 --- a/drivers/ide/pci/rz1000.c +++ b/drivers/ide/pci/rz1000.c @@ -52,8 +52,7 @@ static void __devinit init_hwif_rz1000 (ide_hwif_t *hwif) static ide_pci_device_t rz1000_chipset __devinitdata = { .name = "RZ100x", .init_hwif = init_hwif_rz1000, - .autodma = NODMA, - .bootable = ON_BOARD, + .host_flags = IDE_HFLAG_NO_DMA | IDE_HFLAG_BOOTABLE, }; static int __devinit rz1000_init_one(struct pci_dev *dev, const struct pci_device_id *id) @@ -61,9 +60,9 @@ static int __devinit rz1000_init_one(struct pci_dev *dev, const struct pci_devic return ide_setup_pci_device(dev, &rz1000_chipset); } -static struct pci_device_id rz1000_pci_tbl[] = { - { PCI_VENDOR_ID_PCTECH, PCI_DEVICE_ID_PCTECH_RZ1000, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, - { PCI_VENDOR_ID_PCTECH, PCI_DEVICE_ID_PCTECH_RZ1001, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, +static const struct pci_device_id rz1000_pci_tbl[] = { + { PCI_VDEVICE(PCTECH, PCI_DEVICE_ID_PCTECH_RZ1000), 0 }, + { PCI_VDEVICE(PCTECH, PCI_DEVICE_ID_PCTECH_RZ1001), 0 }, { 0, }, }; MODULE_DEVICE_TABLE(pci, rz1000_pci_tbl); diff --git a/drivers/ide/pci/sc1200.c b/drivers/ide/pci/sc1200.c index 9bdc9694d50..b2423e03bf3 100644 --- a/drivers/ide/pci/sc1200.c +++ b/drivers/ide/pci/sc1200.c @@ -1,5 +1,5 @@ /* - * linux/drivers/ide/pci/sc1200.c Version 0.95 Jun 16 2007 + * linux/drivers/ide/pci/sc1200.c Version 0.97 Aug 3 2007 * * Copyright (C) 2000-2002 Mark Lord <mlord@pobox.com> * Copyright (C) 2007 Bartlomiej Zolnierkiewicz @@ -68,17 +68,6 @@ static unsigned short sc1200_get_pci_clock (void) return pci_clock; } -extern char *ide_xfer_verbose (byte xfer_rate); - -/* - * Set a new transfer mode at the drive - */ -static int sc1200_set_xfer_mode (ide_drive_t *drive, byte mode) -{ - printk("%s: sc1200_set_xfer_mode(%s)\n", drive->name, ide_xfer_verbose(mode)); - return ide_config_drive_speed(drive, mode); -} - /* * Here are the standard PIO mode 0-4 timings for each "format". * Format-0 uses fast data reg timings, with slower command reg timings. @@ -138,7 +127,7 @@ out: return mask; } -static int sc1200_tune_chipset(ide_drive_t *drive, u8 mode) +static void sc1200_set_dma_mode(ide_drive_t *drive, const u8 mode) { ide_hwif_t *hwif = HWIF(drive); int unit = drive->select.b.unit; @@ -146,31 +135,9 @@ static int sc1200_tune_chipset(ide_drive_t *drive, u8 mode) unsigned short pci_clock; unsigned int basereg = hwif->channel ? 0x50 : 0x40; - mode = ide_rate_filter(drive, mode); - - /* - * Tell the drive to switch to the new mode; abort on failure. - */ - if (sc1200_set_xfer_mode(drive, mode)) { - printk("SC1200: set xfer mode failure\n"); - return 1; /* failure */ - } - - switch (mode) { - case XFER_PIO_4: - case XFER_PIO_3: - case XFER_PIO_2: - case XFER_PIO_1: - case XFER_PIO_0: - sc1200_tunepio(drive, mode - XFER_PIO_0); - return 0; - } - pci_clock = sc1200_get_pci_clock(); /* - * Now tune the chipset to match the drive: - * * Note that each DMA mode has several timings associated with it. * The correct timing depends on the fast PCI clock freq. */ @@ -230,23 +197,8 @@ static int sc1200_tune_chipset(ide_drive_t *drive, u8 mode) } else { pci_write_config_dword(hwif->pci_dev, basereg+12, timings); } - - return 0; /* success */ -} - -/* - * sc1200_config_dma() handles selection/setting of DMA/UDMA modes - * for both the chipset and drive. - */ -static int sc1200_config_dma (ide_drive_t *drive) -{ - if (ide_tune_dma(drive)) - return 0; - - return 1; } - /* Replacement for the standard ide_dma_end action in * dma_proc. * @@ -274,19 +226,20 @@ static int sc1200_ide_dma_end (ide_drive_t *drive) } /* - * sc1200_tuneproc() handles selection/setting of PIO modes + * sc1200_set_pio_mode() handles setting of PIO modes * for both the chipset and drive. * * All existing BIOSs for this chipset guarantee that all drives * will have valid default PIO timings set up before we get here. */ -static void sc1200_tuneproc (ide_drive_t *drive, byte pio) /* mode=255 means "autotune" */ + +static void sc1200_set_pio_mode(ide_drive_t *drive, const u8 pio) { ide_hwif_t *hwif = HWIF(drive); int mode = -1; /* - * bad abuse of ->tuneproc interface + * bad abuse of ->set_pio_mode interface */ switch (pio) { case 200: mode = XFER_UDMA_0; break; @@ -299,16 +252,12 @@ static void sc1200_tuneproc (ide_drive_t *drive, byte pio) /* mode=255 means "au if (mode != -1) { printk("SC1200: %s: changing (U)DMA mode\n", drive->name); hwif->dma_off_quietly(drive); - if (sc1200_tune_chipset(drive, mode) == 0) + if (ide_set_dma_mode(drive, mode) == 0) hwif->dma_host_on(drive); return; } - pio = ide_get_best_pio_mode(drive, pio, 4); - printk("SC1200: %s: setting PIO mode%d\n", drive->name, pio); - - if (sc1200_set_xfer_mode(drive, XFER_PIO_0 + pio) == 0) - sc1200_tunepio(drive, pio); + sc1200_tunepio(drive, pio); } #ifdef CONFIG_PM @@ -413,32 +362,26 @@ static int sc1200_resume (struct pci_dev *dev) */ static void __devinit init_hwif_sc1200 (ide_hwif_t *hwif) { - if (hwif->mate) - hwif->serialized = hwif->mate->serialized = 1; - hwif->autodma = 0; - if (hwif->dma_base) { - hwif->udma_filter = sc1200_udma_filter; - hwif->ide_dma_check = &sc1200_config_dma; - hwif->ide_dma_end = &sc1200_ide_dma_end; - if (!noautodma) - hwif->autodma = 1; - hwif->tuneproc = &sc1200_tuneproc; - hwif->speedproc = &sc1200_tune_chipset; - } - hwif->atapi_dma = 1; - hwif->ultra_mask = 0x07; - hwif->mwdma_mask = 0x07; + hwif->set_pio_mode = &sc1200_set_pio_mode; + hwif->set_dma_mode = &sc1200_set_dma_mode; + + if (hwif->dma_base == 0) + return; - hwif->drives[0].autodma = hwif->autodma; - hwif->drives[1].autodma = hwif->autodma; + hwif->udma_filter = sc1200_udma_filter; + hwif->ide_dma_end = &sc1200_ide_dma_end; } static ide_pci_device_t sc1200_chipset __devinitdata = { .name = "SC1200", .init_hwif = init_hwif_sc1200, - .autodma = AUTODMA, - .bootable = ON_BOARD, + .host_flags = IDE_HFLAG_SERIALIZE | + IDE_HFLAG_POST_SET_MODE | + IDE_HFLAG_ABUSE_DMA_MODES | + IDE_HFLAG_BOOTABLE, .pio_mask = ATA_PIO4, + .mwdma_mask = ATA_MWDMA2, + .udma_mask = ATA_UDMA2, }; static int __devinit sc1200_init_one(struct pci_dev *dev, const struct pci_device_id *id) @@ -446,8 +389,8 @@ static int __devinit sc1200_init_one(struct pci_dev *dev, const struct pci_devic return ide_setup_pci_device(dev, &sc1200_chipset); } -static struct pci_device_id sc1200_pci_tbl[] = { - { PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_SCx200_IDE), 0}, +static const struct pci_device_id sc1200_pci_tbl[] = { + { PCI_VDEVICE(NS, PCI_DEVICE_ID_NS_SCx200_IDE), 0}, { 0, }, }; MODULE_DEVICE_TABLE(pci, sc1200_pci_tbl); diff --git a/drivers/ide/pci/scc_pata.c b/drivers/ide/pci/scc_pata.c index eeb0a6d434a..ae9b50331d2 100644 --- a/drivers/ide/pci/scc_pata.c +++ b/drivers/ide/pci/scc_pata.c @@ -190,15 +190,15 @@ scc_ide_outsl(unsigned long port, void *addr, u32 count) } /** - * scc_tune_pio - tune a drive PIO mode - * @drive: drive to tune - * @mode_wanted: the target operating mode + * scc_set_pio_mode - set host controller for PIO mode + * @drive: drive + * @pio: PIO mode number * * Load the timing settings for this device mode into the * controller. */ -static void scc_tune_pio(ide_drive_t *drive, const u8 pio) +static void scc_set_pio_mode(ide_drive_t *drive, const u8 pio) { ide_hwif_t *hwif = HWIF(drive); struct scc_ports *ports = ide_get_hwifdata(hwif); @@ -221,26 +221,18 @@ static void scc_tune_pio(ide_drive_t *drive, const u8 pio) out_be32((void __iomem *)pioct_port, reg); } -static void scc_tuneproc(ide_drive_t *drive, u8 pio) -{ - pio = ide_get_best_pio_mode(drive, pio, 4); - scc_tune_pio(drive, pio); - ide_config_drive_speed(drive, XFER_PIO_0 + pio); -} - /** - * scc_tune_chipset - tune a drive DMA mode - * @drive: Drive to set up - * @xferspeed: speed we want to achieve + * scc_set_dma_mode - set host controller for DMA mode + * @drive: drive + * @speed: DMA mode * * Load the timing settings for this device mode into the * controller. */ -static int scc_tune_chipset(ide_drive_t *drive, byte xferspeed) +static void scc_set_dma_mode(ide_drive_t *drive, const u8 speed) { ide_hwif_t *hwif = HWIF(drive); - u8 speed = ide_rate_filter(drive, xferspeed); struct scc_ports *ports = ide_get_hwifdata(hwif); unsigned long ctl_base = ports->ctl; unsigned long cckctrl_port = ctl_base + 0xff0; @@ -272,15 +264,8 @@ static int scc_tune_chipset(ide_drive_t *drive, byte xferspeed) case XFER_UDMA_0: idx = speed - XFER_UDMA_0; break; - case XFER_PIO_4: - case XFER_PIO_3: - case XFER_PIO_2: - case XFER_PIO_1: - case XFER_PIO_0: - scc_tune_pio(drive, speed - XFER_PIO_0); - return ide_config_drive_speed(drive, speed); default: - return 1; + return; } jcactsel = JCACTSELtbl[offset][idx]; @@ -296,30 +281,6 @@ static int scc_tune_chipset(ide_drive_t *drive, byte xferspeed) } reg = JCTSStbl[offset][idx] << 16 | JCENVTtbl[offset][idx]; out_be32((void __iomem *)udenvt_port, reg); - - return ide_config_drive_speed(drive, speed); -} - -/** - * scc_configure_drive_for_dma - set up for DMA transfers - * @drive: drive we are going to set up - * - * Set up the drive for DMA, tune the controller and drive as - * required. - * If the drive isn't suitable for DMA or we hit other problems - * then we will drop down to PIO and set up PIO appropriately. - * (return -1) - */ - -static int scc_config_drive_for_dma(ide_drive_t *drive) -{ - if (ide_tune_dma(drive)) - return 0; - - if (ide_use_fast_pio(drive)) - scc_tuneproc(drive, 255); - - return -1; } /** @@ -511,7 +472,7 @@ static u8 scc_udma_filter(ide_drive_t *drive) if ((drive->media != ide_disk) && (mask & 0xE0)) { printk(KERN_INFO "%s: limit %s to UDMA4\n", SCC_PATA_NAME, drive->name); - mask = 0x1F; + mask = ATA_UDMA4; } return mask; @@ -717,43 +678,27 @@ static void __devinit init_hwif_scc(ide_hwif_t *hwif) hwif->dma_setup = scc_dma_setup; hwif->ide_dma_end = scc_ide_dma_end; - hwif->speedproc = scc_tune_chipset; - hwif->tuneproc = scc_tuneproc; - hwif->ide_dma_check = scc_config_drive_for_dma; + hwif->set_pio_mode = scc_set_pio_mode; + hwif->set_dma_mode = scc_set_dma_mode; hwif->ide_dma_test_irq = scc_dma_test_irq; hwif->udma_filter = scc_udma_filter; - hwif->drives[0].autotune = IDE_TUNE_AUTO; - hwif->drives[1].autotune = IDE_TUNE_AUTO; - - if (in_be32((void __iomem *)(hwif->config_data + 0xff0)) & CCKCTRL_ATACLKOEN) { - hwif->ultra_mask = 0x7f; /* 133MHz */ - } else { - hwif->ultra_mask = 0x3f; /* 100MHz */ - } - hwif->mwdma_mask = 0x00; - hwif->swdma_mask = 0x00; - hwif->atapi_dma = 1; + if (in_be32((void __iomem *)(hwif->config_data + 0xff0)) & CCKCTRL_ATACLKOEN) + hwif->ultra_mask = ATA_UDMA6; /* 133MHz */ + else + hwif->ultra_mask = ATA_UDMA5; /* 100MHz */ /* we support 80c cable only. */ hwif->cbl = ATA_CBL_PATA80; - - hwif->autodma = 0; - if (!noautodma) - hwif->autodma = 1; - hwif->drives[0].autodma = hwif->autodma; - hwif->drives[1].autodma = hwif->autodma; } #define DECLARE_SCC_DEV(name_str) \ { \ .name = name_str, \ - .init_setup = init_setup_scc, \ .init_iops = init_iops_scc, \ .init_hwif = init_hwif_scc, \ - .autodma = AUTODMA, \ - .bootable = ON_BOARD, \ - .host_flags = IDE_HFLAG_SINGLE, \ + .host_flags = IDE_HFLAG_SINGLE | \ + IDE_HFLAG_BOOTABLE, \ .pio_mask = ATA_PIO4, \ } @@ -773,7 +718,8 @@ static ide_pci_device_t scc_chipsets[] __devinitdata = { static int __devinit scc_init_one(struct pci_dev *dev, const struct pci_device_id *id) { ide_pci_device_t *d = &scc_chipsets[id->driver_data]; - return d->init_setup(dev, d); + + return init_setup_scc(dev, d); } /** @@ -810,8 +756,8 @@ static void __devexit scc_remove(struct pci_dev *dev) memset(ports, 0, sizeof(*ports)); } -static struct pci_device_id scc_pci_tbl[] = { - { PCI_VENDOR_ID_TOSHIBA_2, PCI_DEVICE_ID_TOSHIBA_SCC_ATA, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, +static const struct pci_device_id scc_pci_tbl[] = { + { PCI_VDEVICE(TOSHIBA_2, PCI_DEVICE_ID_TOSHIBA_SCC_ATA), 0 }, { 0, }, }; MODULE_DEVICE_TABLE(pci, scc_pci_tbl); diff --git a/drivers/ide/pci/serverworks.c b/drivers/ide/pci/serverworks.c index 9fead2e7d4c..a3d880e21d0 100644 --- a/drivers/ide/pci/serverworks.c +++ b/drivers/ide/pci/serverworks.c @@ -97,6 +97,7 @@ static u8 svwks_udma_filter(ide_drive_t *drive) mode = 2; switch(mode) { + case 3: mask = 0x3f; break; case 2: mask = 0x1f; break; case 1: mask = 0x07; break; default: mask = 0x00; break; @@ -124,7 +125,7 @@ static u8 svwks_csb_check (struct pci_dev *dev) return 0; } -static void svwks_tune_pio(ide_drive_t *drive, const u8 pio) +static void svwks_set_pio_mode(ide_drive_t *drive, const u8 pio) { static const u8 pio_modes[] = { 0x5d, 0x47, 0x34, 0x22, 0x20 }; static const u8 drive_pci[] = { 0x41, 0x40, 0x43, 0x42 }; @@ -145,7 +146,7 @@ static void svwks_tune_pio(ide_drive_t *drive, const u8 pio) } } -static int svwks_tune_chipset (ide_drive_t *drive, u8 xferspeed) +static void svwks_set_dma_mode(ide_drive_t *drive, const u8 speed) { static const u8 udma_modes[] = { 0x00, 0x01, 0x02, 0x03, 0x04, 0x05 }; static const u8 dma_modes[] = { 0x77, 0x21, 0x20 }; @@ -153,16 +154,10 @@ static int svwks_tune_chipset (ide_drive_t *drive, u8 xferspeed) ide_hwif_t *hwif = HWIF(drive); struct pci_dev *dev = hwif->pci_dev; - u8 speed = ide_rate_filter(drive, xferspeed); u8 unit = (drive->select.b.unit & 0x01); u8 ultra_enable = 0, ultra_timing = 0, dma_timing = 0; - if (speed >= XFER_PIO_0 && speed <= XFER_PIO_4) { - svwks_tune_pio(drive, speed - XFER_PIO_0); - return ide_config_drive_speed(drive, speed); - } - /* If we are about to put a disk into UDMA mode we screwed up. Our code assumes we never _ever_ do this on an OSB4 */ @@ -199,28 +194,6 @@ static int svwks_tune_chipset (ide_drive_t *drive, u8 xferspeed) pci_write_config_byte(dev, drive_pci2[drive->dn], dma_timing); pci_write_config_byte(dev, (0x56|hwif->channel), ultra_timing); pci_write_config_byte(dev, 0x54, ultra_enable); - - return (ide_config_drive_speed(drive, speed)); -} - -static void svwks_tune_drive (ide_drive_t *drive, u8 pio) -{ - pio = ide_get_best_pio_mode(drive, pio, 4); - svwks_tune_pio(drive, pio); - (void)ide_config_drive_speed(drive, XFER_PIO_0 + pio); -} - -static int svwks_config_drive_xfer_rate (ide_drive_t *drive) -{ - drive->init_speed = 0; - - if (ide_tune_dma(drive)) - return 0; - - if (ide_use_fast_pio(drive)) - svwks_tune_drive(drive, 255); - - return -1; } static unsigned int __devinit init_chipset_svwks (struct pci_dev *dev, const char *name) @@ -387,105 +360,62 @@ static u8 __devinit ata66_svwks(ide_hwif_t *hwif) static void __devinit init_hwif_svwks (ide_hwif_t *hwif) { - if (!hwif->irq) - hwif->irq = hwif->channel ? 15 : 14; - - hwif->tuneproc = &svwks_tune_drive; - hwif->speedproc = &svwks_tune_chipset; + hwif->set_pio_mode = &svwks_set_pio_mode; + hwif->set_dma_mode = &svwks_set_dma_mode; hwif->udma_filter = &svwks_udma_filter; - hwif->atapi_dma = 1; - - if (hwif->pci_dev->device != PCI_DEVICE_ID_SERVERWORKS_OSB4IDE) - hwif->ultra_mask = 0x3f; - - hwif->mwdma_mask = 0x07; - - hwif->autodma = 0; - - hwif->drives[0].autotune = 1; - hwif->drives[1].autotune = 1; - if (!hwif->dma_base) return; - hwif->ide_dma_check = &svwks_config_drive_xfer_rate; if (hwif->pci_dev->device != PCI_DEVICE_ID_SERVERWORKS_OSB4IDE) { if (hwif->cbl != ATA_CBL_PATA40_SHORT) hwif->cbl = ata66_svwks(hwif); } - if (!noautodma) - hwif->autodma = 1; - - hwif->drives[0].autodma = hwif->drives[1].autodma = 1; -} - -static int __devinit init_setup_svwks (struct pci_dev *dev, ide_pci_device_t *d) -{ - return ide_setup_pci_device(dev, d); -} - -static int __devinit init_setup_csb6 (struct pci_dev *dev, ide_pci_device_t *d) -{ - if (!(PCI_FUNC(dev->devfn) & 1)) { - d->bootable = NEVER_BOARD; - if (dev->resource[0].start == 0x01f1) - d->bootable = ON_BOARD; - } - - if ((dev->device == PCI_DEVICE_ID_SERVERWORKS_CSB6IDE || - dev->device == PCI_DEVICE_ID_SERVERWORKS_CSB6IDE2) && - (!(PCI_FUNC(dev->devfn) & 1))) - d->host_flags |= IDE_HFLAG_SINGLE; - else - d->host_flags &= ~IDE_HFLAG_SINGLE; - - return ide_setup_pci_device(dev, d); } static ide_pci_device_t serverworks_chipsets[] __devinitdata = { { /* 0 */ .name = "SvrWks OSB4", - .init_setup = init_setup_svwks, .init_chipset = init_chipset_svwks, .init_hwif = init_hwif_svwks, - .autodma = AUTODMA, - .bootable = ON_BOARD, + .host_flags = IDE_HFLAG_LEGACY_IRQS | IDE_HFLAG_BOOTABLE, .pio_mask = ATA_PIO4, + .mwdma_mask = ATA_MWDMA2, + .udma_mask = 0x00, /* UDMA is problematic on OSB4 */ },{ /* 1 */ .name = "SvrWks CSB5", - .init_setup = init_setup_svwks, .init_chipset = init_chipset_svwks, .init_hwif = init_hwif_svwks, - .autodma = AUTODMA, - .bootable = ON_BOARD, + .host_flags = IDE_HFLAG_LEGACY_IRQS | IDE_HFLAG_BOOTABLE, .pio_mask = ATA_PIO4, + .mwdma_mask = ATA_MWDMA2, + .udma_mask = ATA_UDMA5, },{ /* 2 */ .name = "SvrWks CSB6", - .init_setup = init_setup_csb6, .init_chipset = init_chipset_svwks, .init_hwif = init_hwif_svwks, - .autodma = AUTODMA, - .bootable = ON_BOARD, + .host_flags = IDE_HFLAG_LEGACY_IRQS | IDE_HFLAG_BOOTABLE, .pio_mask = ATA_PIO4, + .mwdma_mask = ATA_MWDMA2, + .udma_mask = ATA_UDMA5, },{ /* 3 */ .name = "SvrWks CSB6", - .init_setup = init_setup_csb6, .init_chipset = init_chipset_svwks, .init_hwif = init_hwif_svwks, - .autodma = AUTODMA, - .bootable = ON_BOARD, - .host_flags = IDE_HFLAG_SINGLE, + .host_flags = IDE_HFLAG_LEGACY_IRQS | IDE_HFLAG_SINGLE | + IDE_HFLAG_BOOTABLE, .pio_mask = ATA_PIO4, + .mwdma_mask = ATA_MWDMA2, + .udma_mask = ATA_UDMA5, },{ /* 4 */ .name = "SvrWks HT1000", - .init_setup = init_setup_svwks, .init_chipset = init_chipset_svwks, .init_hwif = init_hwif_svwks, - .autodma = AUTODMA, - .bootable = ON_BOARD, - .host_flags = IDE_HFLAG_SINGLE, + .host_flags = IDE_HFLAG_LEGACY_IRQS | IDE_HFLAG_SINGLE | + IDE_HFLAG_BOOTABLE, .pio_mask = ATA_PIO4, + .mwdma_mask = ATA_MWDMA2, + .udma_mask = ATA_UDMA5, } }; @@ -500,17 +430,29 @@ static ide_pci_device_t serverworks_chipsets[] __devinitdata = { static int __devinit svwks_init_one(struct pci_dev *dev, const struct pci_device_id *id) { - ide_pci_device_t *d = &serverworks_chipsets[id->driver_data]; + ide_pci_device_t d; + u8 idx = id->driver_data; + + d = serverworks_chipsets[idx]; + + if (idx == 2 || idx == 3) { + if ((PCI_FUNC(dev->devfn) & 1) == 0) { + if (pci_resource_start(dev, 0) != 0x01f1) + d.host_flags &= ~IDE_HFLAG_BOOTABLE; + d.host_flags |= IDE_HFLAG_SINGLE; + } else + d.host_flags &= ~IDE_HFLAG_SINGLE; + } - return d->init_setup(dev, d); + return ide_setup_pci_device(dev, &d); } -static struct pci_device_id svwks_pci_tbl[] = { - { PCI_VENDOR_ID_SERVERWORKS, PCI_DEVICE_ID_SERVERWORKS_OSB4IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, - { PCI_VENDOR_ID_SERVERWORKS, PCI_DEVICE_ID_SERVERWORKS_CSB5IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 1}, - { PCI_VENDOR_ID_SERVERWORKS, PCI_DEVICE_ID_SERVERWORKS_CSB6IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 2}, - { PCI_VENDOR_ID_SERVERWORKS, PCI_DEVICE_ID_SERVERWORKS_CSB6IDE2, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 3}, - { PCI_VENDOR_ID_SERVERWORKS, PCI_DEVICE_ID_SERVERWORKS_HT1000IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 4}, +static const struct pci_device_id svwks_pci_tbl[] = { + { PCI_VDEVICE(SERVERWORKS, PCI_DEVICE_ID_SERVERWORKS_OSB4IDE), 0 }, + { PCI_VDEVICE(SERVERWORKS, PCI_DEVICE_ID_SERVERWORKS_CSB5IDE), 1 }, + { PCI_VDEVICE(SERVERWORKS, PCI_DEVICE_ID_SERVERWORKS_CSB6IDE), 2 }, + { PCI_VDEVICE(SERVERWORKS, PCI_DEVICE_ID_SERVERWORKS_CSB6IDE2), 3 }, + { PCI_VDEVICE(SERVERWORKS, PCI_DEVICE_ID_SERVERWORKS_HT1000IDE), 4 }, { 0, }, }; MODULE_DEVICE_TABLE(pci, svwks_pci_tbl); diff --git a/drivers/ide/pci/sgiioc4.c b/drivers/ide/pci/sgiioc4.c index 57145767c3d..5af74ea1d46 100644 --- a/drivers/ide/pci/sgiioc4.c +++ b/drivers/ide/pci/sgiioc4.c @@ -29,11 +29,14 @@ #include <linux/mm.h> #include <linux/ioport.h> #include <linux/blkdev.h> +#include <linux/scatterlist.h> #include <linux/ioc4.h> #include <asm/io.h> #include <linux/ide.h> +#define DRV_NAME "SGIIOC4" + /* IOC4 Specific Definitions */ #define IOC4_CMD_OFFSET 0x100 #define IOC4_CTRL_OFFSET 0x120 @@ -289,15 +292,8 @@ static void sgiioc4_dma_off_quietly(ide_drive_t *drive) drive->hwif->dma_host_off(drive); } -static int sgiioc4_ide_dma_check(ide_drive_t *drive) +static void sgiioc4_set_dma_mode(ide_drive_t *drive, const u8 speed) { - /* FIXME: check for available DMA modes */ - if (ide_config_drive_speed(drive, XFER_MW_DMA_2) != 0) { - printk(KERN_WARNING "%s: couldn't set MWDMA2 mode, " - "using PIO instead\n", drive->name); - return -1; - } else - return 0; } /* returns 1 if dma irq issued, 0 otherwise */ @@ -353,7 +349,7 @@ sgiioc4_INB(unsigned long port) } /* Creates a dma map for the scatter-gather list entries */ -static void __devinit +static int __devinit ide_dma_sgiioc4(ide_hwif_t * hwif, unsigned long dma_base) { void __iomem *virt_dma_base; @@ -369,7 +365,7 @@ ide_dma_sgiioc4(ide_hwif_t * hwif, unsigned long dma_base) "ALREADY in use\n", __FUNCTION__, hwif->name, (void *) dma_base, (void *) dma_base + num_ports - 1); - goto dma_alloc_failure; + return -1; } virt_dma_base = ioremap(dma_base, num_ports); @@ -395,7 +391,7 @@ ide_dma_sgiioc4(ide_hwif_t * hwif, unsigned long dma_base) if (pad) { ide_set_hwifdata(hwif, pad); - return; + return 0; } pci_free_consistent(hwif->pci_dev, @@ -413,10 +409,7 @@ dma_pci_alloc_failure: dma_remap_failure: release_mem_region(dma_base, num_ports); -dma_alloc_failure: - /* Disable DMA because we couldnot allocate any DMA maps */ - hwif->autodma = 0; - hwif->atapi_dma = 0; + return -1; } /* Initializes the IOC4 DMA Engine */ @@ -531,7 +524,7 @@ sgiioc4_build_dma_table(ide_drive_t * drive, struct request *rq, int ddir) } } - sg++; + sg = sg_next(sg); i--; } @@ -581,14 +574,9 @@ static void __devinit ide_init_sgiioc4(ide_hwif_t * hwif) { hwif->mmio = 1; - hwif->autodma = 1; - hwif->atapi_dma = 1; - hwif->ultra_mask = 0x0; /* Disable Ultra DMA */ - hwif->mwdma_mask = 0x2; /* Multimode-2 DMA */ - hwif->swdma_mask = 0x2; hwif->pio_mask = 0x00; - hwif->tuneproc = NULL; /* Sets timing for PIO mode */ - hwif->speedproc = NULL; /* Sets timing for DMA &/or PIO modes */ + hwif->set_pio_mode = NULL; /* Sets timing for PIO mode */ + hwif->set_dma_mode = &sgiioc4_set_dma_mode; hwif->selectproc = NULL;/* Use the default routine to select drive */ hwif->reset_poll = NULL;/* No HBA specific reset_poll needed */ hwif->pre_reset = NULL; /* No HBA specific pre_set needed */ @@ -599,10 +587,16 @@ ide_init_sgiioc4(ide_hwif_t * hwif) hwif->quirkproc = NULL; hwif->busproc = NULL; + hwif->INB = &sgiioc4_INB; + + if (hwif->dma_base == 0) + return; + + hwif->mwdma_mask = ATA_MWDMA2_ONLY; + hwif->dma_setup = &sgiioc4_ide_dma_setup; hwif->dma_start = &sgiioc4_ide_dma_start; hwif->ide_dma_end = &sgiioc4_ide_dma_end; - hwif->ide_dma_check = &sgiioc4_ide_dma_check; hwif->ide_dma_on = &sgiioc4_ide_dma_on; hwif->dma_off_quietly = &sgiioc4_dma_off_quietly; hwif->ide_dma_test_irq = &sgiioc4_ide_dma_test_irq; @@ -610,12 +604,10 @@ ide_init_sgiioc4(ide_hwif_t * hwif) hwif->dma_host_off = &sgiioc4_dma_host_off; hwif->dma_lost_irq = &sgiioc4_dma_lost_irq; hwif->dma_timeout = &ide_dma_timeout; - - hwif->INB = &sgiioc4_INB; } static int __devinit -sgiioc4_ide_setup_pci_device(struct pci_dev *dev, ide_pci_device_t * d) +sgiioc4_ide_setup_pci_device(struct pci_dev *dev) { unsigned long cmd_base, dma_base, irqport; unsigned long bar0, cmd_phys_base, ctl; @@ -632,7 +624,8 @@ sgiioc4_ide_setup_pci_device(struct pci_dev *dev, ide_pci_device_t * d) break; } if (h == MAX_HWIFS) { - printk(KERN_ERR "%s: too many IDE interfaces, no room in table\n", d->name); + printk(KERN_ERR "%s: too many IDE interfaces, no room in table\n", + DRV_NAME); return -ENOMEM; } @@ -641,7 +634,7 @@ sgiioc4_ide_setup_pci_device(struct pci_dev *dev, ide_pci_device_t * d) virt_base = ioremap(bar0, pci_resource_len(dev, 0)); if (virt_base == NULL) { printk(KERN_ERR "%s: Unable to remap BAR 0 address: 0x%lx\n", - d->name, bar0); + DRV_NAME, bar0); return -ENOMEM; } cmd_base = (unsigned long) virt_base + IOC4_CMD_OFFSET; @@ -672,7 +665,6 @@ sgiioc4_ide_setup_pci_device(struct pci_dev *dev, ide_pci_device_t * d) hwif->chipset = ide_pci; hwif->pci_dev = dev; hwif->channel = 0; /* Single Channel chip */ - hwif->cds = (struct ide_pci_device_s *) d; hwif->gendev.parent = &dev->dev;/* setup proper ancestral information */ /* The IOC4 uses MMIO rather than Port IO. */ @@ -681,13 +673,11 @@ sgiioc4_ide_setup_pci_device(struct pci_dev *dev, ide_pci_device_t * d) /* Initializing chipset IRQ Registers */ writel(0x03, (void __iomem *)(irqport + IOC4_INTR_SET * 4)); - ide_init_sgiioc4(hwif); - - if (dma_base) - ide_dma_sgiioc4(hwif, dma_base); - else + if (dma_base == 0 || ide_dma_sgiioc4(hwif, dma_base)) printk(KERN_INFO "%s: %s Bus-Master DMA disabled\n", - hwif->name, d->name); + hwif->name, DRV_NAME); + + ide_init_sgiioc4(hwif); if (probe_hwif_init(hwif)) return -EIO; @@ -699,38 +689,26 @@ sgiioc4_ide_setup_pci_device(struct pci_dev *dev, ide_pci_device_t * d) } static unsigned int __devinit -pci_init_sgiioc4(struct pci_dev *dev, ide_pci_device_t * d) +pci_init_sgiioc4(struct pci_dev *dev) { - unsigned int class_rev; int ret; - pci_read_config_dword(dev, PCI_CLASS_REVISION, &class_rev); - class_rev &= 0xff; printk(KERN_INFO "%s: IDE controller at PCI slot %s, revision %d\n", - d->name, pci_name(dev), class_rev); - if (class_rev < IOC4_SUPPORTED_FIRMWARE_REV) { + DRV_NAME, pci_name(dev), dev->revision); + + if (dev->revision < IOC4_SUPPORTED_FIRMWARE_REV) { printk(KERN_ERR "Skipping %s IDE controller in slot %s: " - "firmware is obsolete - please upgrade to revision" - "46 or higher\n", d->name, pci_name(dev)); + "firmware is obsolete - please upgrade to " + "revision46 or higher\n", + DRV_NAME, pci_name(dev)); ret = -EAGAIN; goto out; } - ret = sgiioc4_ide_setup_pci_device(dev, d); + ret = sgiioc4_ide_setup_pci_device(dev); out: return ret; } -static ide_pci_device_t sgiioc4_chipset __devinitdata = { - /* Channel 0 */ - .name = "SGIIOC4", - .init_hwif = ide_init_sgiioc4, - .init_dma = ide_dma_sgiioc4, - .autodma = AUTODMA, - /* SGI IOC4 doesn't have enablebits. */ - .bootable = ON_BOARD, - .host_flags = IDE_HFLAG_SINGLE, -}; - int ioc4_ide_attach_one(struct ioc4_driver_data *idd) { @@ -740,7 +718,7 @@ ioc4_ide_attach_one(struct ioc4_driver_data *idd) if (idd->idd_variant == IOC4_VARIANT_PCI_RT) return 0; - return pci_init_sgiioc4(idd->idd_pdev, &sgiioc4_chipset); + return pci_init_sgiioc4(idd->idd_pdev); } static struct ioc4_submodule ioc4_ide_submodule = { diff --git a/drivers/ide/pci/siimage.c b/drivers/ide/pci/siimage.c index 50f6d172ef7..689786df1ed 100644 --- a/drivers/ide/pci/siimage.c +++ b/drivers/ide/pci/siimage.c @@ -1,5 +1,5 @@ /* - * linux/drivers/ide/pci/siimage.c Version 1.15 Jun 29 2007 + * linux/drivers/ide/pci/siimage.c Version 1.17 Oct 18 2007 * * Copyright (C) 2001-2002 Andre Hedrick <andre@linux-ide.org> * Copyright (C) 2003 Red Hat <alan@redhat.com> @@ -165,27 +165,32 @@ out: } /** - * sil_tune_pio - tune a drive - * @drive: drive to tune - * @pio: the desired PIO mode + * sil_set_pio_mode - set host controller for PIO mode + * @drive: drive + * @pio: PIO mode number * * Load the timing settings for this device mode into the * controller. If we are in PIO mode 3 or 4 turn on IORDY * monitoring (bit 9). The TF timing is bits 31:16 */ -static void sil_tune_pio(ide_drive_t *drive, u8 pio) +static void sil_set_pio_mode(ide_drive_t *drive, u8 pio) { const u16 tf_speed[] = { 0x328a, 0x2283, 0x1281, 0x10c3, 0x10c1 }; const u16 data_speed[] = { 0x328a, 0x2283, 0x1104, 0x10c3, 0x10c1 }; ide_hwif_t *hwif = HWIF(drive); - ide_drive_t *pair = &hwif->drives[drive->dn ^ 1]; + ide_drive_t *pair = ide_get_paired_drive(drive); u32 speedt = 0; u16 speedp = 0; unsigned long addr = siimage_seldev(drive, 0x04); unsigned long tfaddr = siimage_selreg(hwif, 0x02); + unsigned long base = (unsigned long)hwif->hwif_data; u8 tf_pio = pio; + u8 addr_mask = hwif->channel ? (hwif->mmio ? 0xF4 : 0x84) + : (hwif->mmio ? 0xB4 : 0x80); + u8 mode = 0; + u8 unit = drive->select.b.unit; /* trim *taskfile* PIO to the slowest of the master/slave */ if (pair->present) { @@ -207,6 +212,11 @@ static void sil_tune_pio(ide_drive_t *drive, u8 pio) hwif->OUTW(hwif->INW(tfaddr-2)|0x200, tfaddr-2); else hwif->OUTW(hwif->INW(tfaddr-2)&~0x200, tfaddr-2); + + mode = hwif->INB(base + addr_mask); + mode &= ~(unit ? 0x30 : 0x03); + mode |= (unit ? 0x10 : 0x01); + hwif->OUTB(mode, base + addr_mask); } else { pci_write_config_word(hwif->pci_dev, addr, speedp); pci_write_config_word(hwif->pci_dev, tfaddr, speedt); @@ -216,27 +226,23 @@ static void sil_tune_pio(ide_drive_t *drive, u8 pio) if (pio > 2) speedp |= 0x200; pci_write_config_word(hwif->pci_dev, tfaddr-2, speedp); - } -} -static void sil_tuneproc(ide_drive_t *drive, u8 pio) -{ - pio = ide_get_best_pio_mode(drive, pio, 4); - sil_tune_pio(drive, pio); - (void)ide_config_drive_speed(drive, XFER_PIO_0 + pio); + pci_read_config_byte(hwif->pci_dev, addr_mask, &mode); + mode &= ~(unit ? 0x30 : 0x03); + mode |= (unit ? 0x10 : 0x01); + pci_write_config_byte(hwif->pci_dev, addr_mask, mode); + } } /** - * siimage_tune_chipset - set controller timings - * @drive: Drive to set up - * @xferspeed: speed we want to achieve + * sil_set_dma_mode - set host controller for DMA mode + * @drive: drive + * @speed: DMA mode * - * Tune the SII chipset for the desired mode. If we can't achieve - * the desired mode then tune for a lower one, but ultimately - * make the thing work. + * Tune the SiI chipset for the desired DMA mode. */ - -static int siimage_tune_chipset (ide_drive_t *drive, byte xferspeed) + +static void sil_set_dma_mode(ide_drive_t *drive, const u8 speed) { u8 ultra6[] = { 0x0F, 0x0B, 0x07, 0x05, 0x03, 0x02, 0x01 }; u8 ultra5[] = { 0x0C, 0x07, 0x05, 0x04, 0x02, 0x01 }; @@ -245,7 +251,6 @@ static int siimage_tune_chipset (ide_drive_t *drive, byte xferspeed) ide_hwif_t *hwif = HWIF(drive); u16 ultra = 0, multi = 0; u8 mode = 0, unit = drive->select.b.unit; - u8 speed = ide_rate_filter(drive, xferspeed); unsigned long base = (unsigned long)hwif->hwif_data; u8 scsc = 0, addr_mask = ((hwif->channel) ? ((hwif->mmio) ? 0xF4 : 0x84) : @@ -273,14 +278,6 @@ static int siimage_tune_chipset (ide_drive_t *drive, byte xferspeed) scsc = is_sata(hwif) ? 1 : scsc; switch(speed) { - case XFER_PIO_4: - case XFER_PIO_3: - case XFER_PIO_2: - case XFER_PIO_1: - case XFER_PIO_0: - sil_tune_pio(drive, speed - XFER_PIO_0); - mode |= ((unit) ? 0x10 : 0x01); - break; case XFER_MW_DMA_2: case XFER_MW_DMA_1: case XFER_MW_DMA_0: @@ -300,7 +297,7 @@ static int siimage_tune_chipset (ide_drive_t *drive, byte xferspeed) mode |= ((unit) ? 0x30 : 0x03); break; default: - return 1; + return; } if (hwif->mmio) { @@ -312,28 +309,6 @@ static int siimage_tune_chipset (ide_drive_t *drive, byte xferspeed) pci_write_config_word(hwif->pci_dev, ma, multi); pci_write_config_word(hwif->pci_dev, ua, ultra); } - return (ide_config_drive_speed(drive, speed)); -} - -/** - * siimage_configure_drive_for_dma - set up for DMA transfers - * @drive: drive we are going to set up - * - * Set up the drive for DMA, tune the controller and drive as - * required. If the drive isn't suitable for DMA or we hit - * other problems then we will drop down to PIO and set up - * PIO appropriately - */ - -static int siimage_config_drive_for_dma (ide_drive_t *drive) -{ - if (ide_tune_dma(drive)) - return 0; - - if (ide_use_fast_pio(drive)) - sil_tuneproc(drive, 255); - - return -1; } /* returns 1 if dma irq issued, 0 otherwise */ @@ -665,13 +640,9 @@ static unsigned int setup_mmio_siimage (struct pci_dev *dev, const char *name) static unsigned int __devinit init_chipset_siimage(struct pci_dev *dev, const char *name) { - u32 class_rev = 0; - u8 tmpbyte = 0; - u8 BA5_EN = 0; + u8 rev = dev->revision, tmpbyte = 0, BA5_EN = 0; - pci_read_config_dword(dev, PCI_CLASS_REVISION, &class_rev); - class_rev &= 0xff; - pci_write_config_byte(dev, PCI_CACHE_LINE_SIZE, (class_rev) ? 1 : 255); + pci_write_config_byte(dev, PCI_CACHE_LINE_SIZE, rev ? 1 : 255); pci_read_config_byte(dev, 0x8A, &BA5_EN); if ((BA5_EN & 0x01) || (pci_resource_start(dev, 5))) { @@ -850,19 +821,14 @@ static void __devinit siimage_fixup(ide_hwif_t *hwif) static void __devinit init_iops_siimage(ide_hwif_t *hwif) { - struct pci_dev *dev = hwif->pci_dev; - u32 class_rev = 0; - - pci_read_config_dword(dev, PCI_CLASS_REVISION, &class_rev); - class_rev &= 0xff; - hwif->hwif_data = NULL; /* Pessimal until we finish probing */ hwif->rqsize = 15; - if (pci_get_drvdata(dev) == NULL) + if (pci_get_drvdata(hwif->pci_dev) == NULL) return; + init_mmio_iops_siimage(hwif); } @@ -898,11 +864,9 @@ static u8 __devinit ata66_siimage(ide_hwif_t *hwif) static void __devinit init_hwif_siimage(ide_hwif_t *hwif) { - hwif->autodma = 0; - hwif->resetproc = &siimage_reset; - hwif->speedproc = &siimage_tune_chipset; - hwif->tuneproc = &sil_tuneproc; + hwif->set_pio_mode = &sil_set_pio_mode; + hwif->set_dma_mode = &sil_set_dma_mode; hwif->reset_poll = &siimage_reset_poll; hwif->pre_reset = &siimage_pre_reset; hwif->udma_filter = &sil_udma_filter; @@ -918,18 +882,11 @@ static void __devinit init_hwif_siimage(ide_hwif_t *hwif) } } - hwif->drives[0].autotune = hwif->drives[1].autotune = 1; - if (hwif->dma_base == 0) return; - hwif->ultra_mask = 0x7f; - hwif->mwdma_mask = 0x07; - - if (!is_sata(hwif)) - hwif->atapi_dma = 1; - - hwif->ide_dma_check = &siimage_config_drive_for_dma; + if (is_sata(hwif)) + hwif->host_flags |= IDE_HFLAG_NO_ATAPI_DMA; if (hwif->cbl != ATA_CBL_PATA40_SHORT) hwif->cbl = ata66_siimage(hwif); @@ -939,15 +896,6 @@ static void __devinit init_hwif_siimage(ide_hwif_t *hwif) } else { hwif->ide_dma_test_irq = & siimage_io_ide_dma_test_irq; } - - /* - * The BIOS often doesn't set up DMA on this controller - * so we always do it. - */ - - hwif->autodma = 1; - hwif->drives[0].autodma = hwif->autodma; - hwif->drives[1].autodma = hwif->autodma; } #define DECLARE_SII_DEV(name_str) \ @@ -957,9 +905,10 @@ static void __devinit init_hwif_siimage(ide_hwif_t *hwif) .init_iops = init_iops_siimage, \ .init_hwif = init_hwif_siimage, \ .fixup = siimage_fixup, \ - .autodma = AUTODMA, \ - .bootable = ON_BOARD, \ + .host_flags = IDE_HFLAG_BOOTABLE, \ .pio_mask = ATA_PIO4, \ + .mwdma_mask = ATA_MWDMA2, \ + .udma_mask = ATA_UDMA6, \ } static ide_pci_device_t siimage_chipsets[] __devinitdata = { @@ -982,11 +931,11 @@ static int __devinit siimage_init_one(struct pci_dev *dev, const struct pci_devi return ide_setup_pci_device(dev, &siimage_chipsets[id->driver_data]); } -static struct pci_device_id siimage_pci_tbl[] = { - { PCI_VENDOR_ID_CMD, PCI_DEVICE_ID_SII_680, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, +static const struct pci_device_id siimage_pci_tbl[] = { + { PCI_VDEVICE(CMD, PCI_DEVICE_ID_SII_680), 0 }, #ifdef CONFIG_BLK_DEV_IDE_SATA - { PCI_VENDOR_ID_CMD, PCI_DEVICE_ID_SII_3112, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 1}, - { PCI_VENDOR_ID_CMD, PCI_DEVICE_ID_SII_1210SA, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 2}, + { PCI_VDEVICE(CMD, PCI_DEVICE_ID_SII_3112), 1 }, + { PCI_VDEVICE(CMD, PCI_DEVICE_ID_SII_1210SA), 2 }, #endif { 0, }, }; diff --git a/drivers/ide/pci/sis5513.c b/drivers/ide/pci/sis5513.c index 26f24802d3e..c1d280b0639 100644 --- a/drivers/ide/pci/sis5513.c +++ b/drivers/ide/pci/sis5513.c @@ -1,5 +1,5 @@ /* - * linux/drivers/ide/pci/sis5513.c Version 0.25 Jun 10, 2007 + * linux/drivers/ide/pci/sis5513.c Version 0.31 Aug 9, 2007 * * Copyright (C) 1999-2000 Andre Hedrick <andre@linux-ide.org> * Copyright (C) 2002 Lionel Bouton <Lionel.Bouton@inet6.fr>, Maintainer @@ -65,8 +65,6 @@ #include "ide-timing.h" -#define DISPLAY_SIS_TIMINGS - /* registers layout and init values are chipset family dependant */ #define ATA_16 0x01 @@ -193,378 +191,125 @@ static char* chipset_capability[] = { "ATA 133 (1st gen)", "ATA 133 (2nd gen)" }; -#if defined(DISPLAY_SIS_TIMINGS) && defined(CONFIG_IDE_PROC_FS) -#include <linux/stat.h> -#include <linux/proc_fs.h> - -static u8 sis_proc = 0; - -static struct pci_dev *bmide_dev; - -static char* cable_type[] = { - "80 pins", - "40 pins" -}; +/* + * Configuration functions + */ -static char* recovery_time[] ={ - "12 PCICLK", "1 PCICLK", - "2 PCICLK", "3 PCICLK", - "4 PCICLK", "5 PCICLCK", - "6 PCICLK", "7 PCICLCK", - "8 PCICLK", "9 PCICLCK", - "10 PCICLK", "11 PCICLK", - "13 PCICLK", "14 PCICLK", - "15 PCICLK", "15 PCICLK" -}; +static u8 sis_ata133_get_base(ide_drive_t *drive) +{ + struct pci_dev *dev = drive->hwif->pci_dev; + u32 reg54 = 0; -static char* active_time[] = { - "8 PCICLK", "1 PCICLCK", - "2 PCICLK", "3 PCICLK", - "4 PCICLK", "5 PCICLK", - "6 PCICLK", "12 PCICLK" -}; + pci_read_config_dword(dev, 0x54, ®54); -static char* cycle_time[] = { - "Reserved", "2 CLK", - "3 CLK", "4 CLK", - "5 CLK", "6 CLK", - "7 CLK", "8 CLK", - "9 CLK", "10 CLK", - "11 CLK", "12 CLK", - "13 CLK", "14 CLK", - "15 CLK", "16 CLK" -}; + return ((reg54 & 0x40000000) ? 0x70 : 0x40) + drive->dn * 4; +} -/* Generic add master or slave info function */ -static char* get_drives_info (char *buffer, u8 pos) +static void sis_ata16_program_timings(ide_drive_t *drive, const u8 mode) { - u8 reg00, reg01, reg10, reg11; /* timing registers */ - u32 regdw0, regdw1; - char* p = buffer; - -/* Postwrite/Prefetch */ - if (chipset_family < ATA_133) { - pci_read_config_byte(bmide_dev, 0x4b, ®00); - p += sprintf(p, "Drive %d: Postwrite %s \t \t Postwrite %s\n", - pos, (reg00 & (0x10 << pos)) ? "Enabled" : "Disabled", - (reg00 & (0x40 << pos)) ? "Enabled" : "Disabled"); - p += sprintf(p, " Prefetch %s \t \t Prefetch %s\n", - (reg00 & (0x01 << pos)) ? "Enabled" : "Disabled", - (reg00 & (0x04 << pos)) ? "Enabled" : "Disabled"); - pci_read_config_byte(bmide_dev, 0x40+2*pos, ®00); - pci_read_config_byte(bmide_dev, 0x41+2*pos, ®01); - pci_read_config_byte(bmide_dev, 0x44+2*pos, ®10); - pci_read_config_byte(bmide_dev, 0x45+2*pos, ®11); - } else { - u32 reg54h; - u8 drive_pci = 0x40; - pci_read_config_dword(bmide_dev, 0x54, ®54h); - if (reg54h & 0x40000000) { - // Configuration space remapped to 0x70 - drive_pci = 0x70; - } - pci_read_config_dword(bmide_dev, (unsigned long)drive_pci+4*pos, ®dw0); - pci_read_config_dword(bmide_dev, (unsigned long)drive_pci+4*pos+8, ®dw1); + struct pci_dev *dev = drive->hwif->pci_dev; + u16 t1 = 0; + u8 drive_pci = 0x40 + drive->dn * 2; - p += sprintf(p, "Drive %d:\n", pos); - } + const u16 pio_timings[] = { 0x000, 0x607, 0x404, 0x303, 0x301 }; + const u16 mwdma_timings[] = { 0x008, 0x302, 0x301 }; + pci_read_config_word(dev, drive_pci, &t1); -/* UDMA */ - if (chipset_family >= ATA_133) { - p += sprintf(p, " UDMA %s \t \t \t UDMA %s\n", - (regdw0 & 0x04) ? "Enabled" : "Disabled", - (regdw1 & 0x04) ? "Enabled" : "Disabled"); - p += sprintf(p, " UDMA Cycle Time %s \t UDMA Cycle Time %s\n", - cycle_time[(regdw0 & 0xF0) >> 4], - cycle_time[(regdw1 & 0xF0) >> 4]); - } else if (chipset_family >= ATA_33) { - p += sprintf(p, " UDMA %s \t \t \t UDMA %s\n", - (reg01 & 0x80) ? "Enabled" : "Disabled", - (reg11 & 0x80) ? "Enabled" : "Disabled"); - - p += sprintf(p, " UDMA Cycle Time "); - switch(chipset_family) { - case ATA_33: p += sprintf(p, cycle_time[(reg01 & 0x60) >> 5]); break; - case ATA_66: - case ATA_100a: p += sprintf(p, cycle_time[(reg01 & 0x70) >> 4]); break; - case ATA_100: - case ATA_133a: p += sprintf(p, cycle_time[reg01 & 0x0F]); break; - default: p += sprintf(p, "?"); break; - } - p += sprintf(p, " \t UDMA Cycle Time "); - switch(chipset_family) { - case ATA_33: p += sprintf(p, cycle_time[(reg11 & 0x60) >> 5]); break; - case ATA_66: - case ATA_100a: p += sprintf(p, cycle_time[(reg11 & 0x70) >> 4]); break; - case ATA_100: - case ATA_133a: p += sprintf(p, cycle_time[reg11 & 0x0F]); break; - default: p += sprintf(p, "?"); break; - } - p += sprintf(p, "\n"); - } + /* clear active/recovery timings */ + t1 &= ~0x070f; + if (mode >= XFER_MW_DMA_0) { + if (chipset_family > ATA_16) + t1 &= ~0x8000; /* disable UDMA */ + t1 |= mwdma_timings[mode - XFER_MW_DMA_0]; + } else + t1 |= pio_timings[mode - XFER_PIO_0]; + pci_write_config_word(dev, drive_pci, t1); +} - if (chipset_family < ATA_133) { /* else case TODO */ +static void sis_ata100_program_timings(ide_drive_t *drive, const u8 mode) +{ + struct pci_dev *dev = drive->hwif->pci_dev; + u8 t1, drive_pci = 0x40 + drive->dn * 2; -/* Data Active */ - p += sprintf(p, " Data Active Time "); - switch(chipset_family) { - case ATA_16: /* confirmed */ - case ATA_33: - case ATA_66: - case ATA_100a: p += sprintf(p, active_time[reg01 & 0x07]); break; - case ATA_100: - case ATA_133a: p += sprintf(p, active_time[(reg00 & 0x70) >> 4]); break; - default: p += sprintf(p, "?"); break; - } - p += sprintf(p, " \t Data Active Time "); - switch(chipset_family) { - case ATA_16: - case ATA_33: - case ATA_66: - case ATA_100a: p += sprintf(p, active_time[reg11 & 0x07]); break; - case ATA_100: - case ATA_133a: p += sprintf(p, active_time[(reg10 & 0x70) >> 4]); break; - default: p += sprintf(p, "?"); break; - } - p += sprintf(p, "\n"); + /* timing bits: 7:4 active 3:0 recovery */ + const u8 pio_timings[] = { 0x00, 0x67, 0x44, 0x33, 0x31 }; + const u8 mwdma_timings[] = { 0x08, 0x32, 0x31 }; -/* Data Recovery */ - /* warning: may need (reg&0x07) for pre ATA66 chips */ - p += sprintf(p, " Data Recovery Time %s \t Data Recovery Time %s\n", - recovery_time[reg00 & 0x0f], recovery_time[reg10 & 0x0f]); - } + if (mode >= XFER_MW_DMA_0) { + u8 t2 = 0; - return p; -} + pci_read_config_byte(dev, drive_pci, &t2); + t2 &= ~0x80; /* disable UDMA */ + pci_write_config_byte(dev, drive_pci, t2); -static char* get_masters_info(char* buffer) -{ - return get_drives_info(buffer, 0); -} + t1 = mwdma_timings[mode - XFER_MW_DMA_0]; + } else + t1 = pio_timings[mode - XFER_PIO_0]; -static char* get_slaves_info(char* buffer) -{ - return get_drives_info(buffer, 1); + pci_write_config_byte(dev, drive_pci + 1, t1); } -/* Main get_info, called on /proc/ide/sis reads */ -static int sis_get_info (char *buffer, char **addr, off_t offset, int count) +static void sis_ata133_program_timings(ide_drive_t *drive, const u8 mode) { - char *p = buffer; - int len; - u8 reg; - u16 reg2, reg3; - - p += sprintf(p, "\nSiS 5513 "); - switch(chipset_family) { - case ATA_16: p += sprintf(p, "DMA 16"); break; - case ATA_33: p += sprintf(p, "Ultra 33"); break; - case ATA_66: p += sprintf(p, "Ultra 66"); break; - case ATA_100a: - case ATA_100: p += sprintf(p, "Ultra 100"); break; - case ATA_133a: - case ATA_133: p += sprintf(p, "Ultra 133"); break; - default: p+= sprintf(p, "Unknown???"); break; - } - p += sprintf(p, " chipset\n"); - p += sprintf(p, "--------------- Primary Channel " - "---------------- Secondary Channel " - "-------------\n"); - -/* Status */ - pci_read_config_byte(bmide_dev, 0x4a, ®); - if (chipset_family == ATA_133) { - pci_read_config_word(bmide_dev, 0x50, ®2); - pci_read_config_word(bmide_dev, 0x52, ®3); - } - p += sprintf(p, "Channel Status: "); - if (chipset_family < ATA_66) { - p += sprintf(p, "%s \t \t \t \t %s\n", - (reg & 0x04) ? "On" : "Off", - (reg & 0x02) ? "On" : "Off"); - } else if (chipset_family < ATA_133) { - p += sprintf(p, "%s \t \t \t \t %s \n", - (reg & 0x02) ? "On" : "Off", - (reg & 0x04) ? "On" : "Off"); - } else { /* ATA_133 */ - p += sprintf(p, "%s \t \t \t \t %s \n", - (reg2 & 0x02) ? "On" : "Off", - (reg3 & 0x02) ? "On" : "Off"); - } - -/* Operation Mode */ - pci_read_config_byte(bmide_dev, 0x09, ®); - p += sprintf(p, "Operation Mode: %s \t \t \t %s \n", - (reg & 0x01) ? "Native" : "Compatible", - (reg & 0x04) ? "Native" : "Compatible"); + struct pci_dev *dev = drive->hwif->pci_dev; + u32 t1 = 0; + u8 drive_pci = sis_ata133_get_base(drive), clk, idx; -/* 80-pin cable ? */ - if (chipset_family >= ATA_133) { - p += sprintf(p, "Cable Type: %s \t \t \t %s\n", - (reg2 & 0x01) ? cable_type[1] : cable_type[0], - (reg3 & 0x01) ? cable_type[1] : cable_type[0]); - } else if (chipset_family > ATA_33) { - pci_read_config_byte(bmide_dev, 0x48, ®); - p += sprintf(p, "Cable Type: %s \t \t \t %s\n", - (reg & 0x10) ? cable_type[1] : cable_type[0], - (reg & 0x20) ? cable_type[1] : cable_type[0]); - } + pci_read_config_dword(dev, drive_pci, &t1); -/* Prefetch Count */ - if (chipset_family < ATA_133) { - pci_read_config_word(bmide_dev, 0x4c, ®2); - pci_read_config_word(bmide_dev, 0x4e, ®3); - p += sprintf(p, "Prefetch Count: %d \t \t \t \t %d\n", - reg2, reg3); + t1 &= 0xc0c00fff; + clk = (t1 & 0x08) ? ATA_133 : ATA_100; + if (mode >= XFER_MW_DMA_0) { + t1 &= ~0x04; /* disable UDMA */ + idx = mode - XFER_MW_DMA_0 + 5; } + idx = mode - XFER_PIO_0; + t1 |= ini_time_value[clk][idx] << 12; + t1 |= act_time_value[clk][idx] << 16; + t1 |= rco_time_value[clk][idx] << 24; - p = get_masters_info(p); - p = get_slaves_info(p); - - len = (p - buffer) - offset; - *addr = buffer + offset; + pci_write_config_dword(dev, drive_pci, t1); +} - return len > count ? count : len; +static void sis_program_timings(ide_drive_t *drive, const u8 mode) +{ + if (chipset_family < ATA_100) /* ATA_16/33/66/100a */ + sis_ata16_program_timings(drive, mode); + else if (chipset_family < ATA_133) /* ATA_100/133a */ + sis_ata100_program_timings(drive, mode); + else /* ATA_133 */ + sis_ata133_program_timings(drive, mode); } -#endif /* defined(DISPLAY_SIS_TIMINGS) && defined(CONFIG_IDE_PROC_FS) */ -/* - * Configuration functions - */ -/* Enables per-drive prefetch and postwrite */ static void config_drive_art_rwp (ide_drive_t *drive) { ide_hwif_t *hwif = HWIF(drive); struct pci_dev *dev = hwif->pci_dev; - u8 reg4bh = 0; - u8 rw_prefetch = (0x11 << drive->dn); + u8 rw_prefetch = 0; - if (drive->media != ide_disk) - return; pci_read_config_byte(dev, 0x4b, ®4bh); - if ((reg4bh & rw_prefetch) != rw_prefetch) + if (drive->media == ide_disk) + rw_prefetch = 0x11 << drive->dn; + + if ((reg4bh & (0x11 << drive->dn)) != rw_prefetch) pci_write_config_byte(dev, 0x4b, reg4bh|rw_prefetch); } -/* Set per-drive active and recovery time */ -static void config_art_rwp_pio (ide_drive_t *drive, u8 pio) +static void sis_set_pio_mode(ide_drive_t *drive, const u8 pio) { - ide_hwif_t *hwif = HWIF(drive); - struct pci_dev *dev = hwif->pci_dev; - - u8 drive_pci, test1, test2; - config_drive_art_rwp(drive); - - /* In pre ATA_133 case, drives sit at 0x40 + 4*drive->dn */ - drive_pci = 0x40; - /* In SiS962 case drives sit at (0x40 or 0x70) + 8*drive->dn) */ - if (chipset_family >= ATA_133) { - u32 reg54h; - pci_read_config_dword(dev, 0x54, ®54h); - if (reg54h & 0x40000000) drive_pci = 0x70; - drive_pci += ((drive->dn)*0x4); - } else { - drive_pci += ((drive->dn)*0x2); - } - - /* register layout changed with newer ATA100 chips */ - if (chipset_family < ATA_100) { - pci_read_config_byte(dev, drive_pci, &test1); - pci_read_config_byte(dev, drive_pci+1, &test2); - - /* Clear active and recovery timings */ - test1 &= ~0x0F; - test2 &= ~0x07; - - switch(pio) { - case 4: test1 |= 0x01; test2 |= 0x03; break; - case 3: test1 |= 0x03; test2 |= 0x03; break; - case 2: test1 |= 0x04; test2 |= 0x04; break; - case 1: test1 |= 0x07; test2 |= 0x06; break; - case 0: /* PIO0: register setting == X000 */ - default: break; - } - pci_write_config_byte(dev, drive_pci, test1); - pci_write_config_byte(dev, drive_pci+1, test2); - } else if (chipset_family < ATA_133) { - switch(pio) { /* active recovery - v v */ - case 4: test1 = 0x30|0x01; break; - case 3: test1 = 0x30|0x03; break; - case 2: test1 = 0x40|0x04; break; - case 1: test1 = 0x60|0x07; break; - case 0: test1 = 0x00; break; - default: break; - } - pci_write_config_byte(dev, drive_pci, test1); - } else { /* ATA_133 */ - u32 test3; - pci_read_config_dword(dev, drive_pci, &test3); - test3 &= 0xc0c00fff; - if (test3 & 0x08) { - test3 |= ini_time_value[ATA_133][pio] << 12; - test3 |= act_time_value[ATA_133][pio] << 16; - test3 |= rco_time_value[ATA_133][pio] << 24; - } else { - test3 |= ini_time_value[ATA_100][pio] << 12; - test3 |= act_time_value[ATA_100][pio] << 16; - test3 |= rco_time_value[ATA_100][pio] << 24; - } - pci_write_config_dword(dev, drive_pci, test3); - } -} - -static int sis5513_tune_drive(ide_drive_t *drive, u8 pio) -{ - pio = ide_get_best_pio_mode(drive, pio, 4); - config_art_rwp_pio(drive, pio); - return ide_config_drive_speed(drive, XFER_PIO_0 + pio); + sis_program_timings(drive, XFER_PIO_0 + pio); } -static void sis5513_tuneproc(ide_drive_t *drive, u8 pio) -{ - (void)sis5513_tune_drive(drive, pio); -} - -static int sis5513_tune_chipset (ide_drive_t *drive, u8 xferspeed) +static void sis_set_dma_mode(ide_drive_t *drive, const u8 speed) { ide_hwif_t *hwif = HWIF(drive); struct pci_dev *dev = hwif->pci_dev; - u8 drive_pci, reg, speed; - u32 regdw; - - speed = ide_rate_filter(drive, xferspeed); - - /* See config_art_rwp_pio for drive pci config registers */ - drive_pci = 0x40; - if (chipset_family >= ATA_133) { - u32 reg54h; - pci_read_config_dword(dev, 0x54, ®54h); - if (reg54h & 0x40000000) drive_pci = 0x70; - drive_pci += ((drive->dn)*0x4); - pci_read_config_dword(dev, (unsigned long)drive_pci, ®dw); - /* Disable UDMA bit for non UDMA modes on UDMA chips */ - if (speed < XFER_UDMA_0) { - regdw &= 0xfffffffb; - pci_write_config_dword(dev, (unsigned long)drive_pci, regdw); - } - - } else { - drive_pci += ((drive->dn)*0x2); - pci_read_config_byte(dev, drive_pci+1, ®); - /* Disable UDMA bit for non UDMA modes on UDMA chips */ - if ((speed < XFER_UDMA_0) && (chipset_family > ATA_16)) { - reg &= 0x7F; - pci_write_config_byte(dev, drive_pci+1, reg); - } - } - /* Config chip for mode */ switch(speed) { case XFER_UDMA_6: @@ -575,6 +320,10 @@ static int sis5513_tune_chipset (ide_drive_t *drive, u8 xferspeed) case XFER_UDMA_1: case XFER_UDMA_0: if (chipset_family >= ATA_133) { + u32 regdw = 0; + u8 drive_pci = sis_ata133_get_base(drive); + + pci_read_config_dword(dev, drive_pci, ®dw); regdw |= 0x04; regdw &= 0xfffff00f; /* check if ATA133 enable */ @@ -582,14 +331,14 @@ static int sis5513_tune_chipset (ide_drive_t *drive, u8 xferspeed) regdw |= (unsigned long)cycle_time_value[ATA_133][speed-XFER_UDMA_0] << 4; regdw |= (unsigned long)cvs_time_value[ATA_133][speed-XFER_UDMA_0] << 8; } else { - /* if ATA133 disable, we should not set speed above UDMA5 */ - if (speed > XFER_UDMA_5) - speed = XFER_UDMA_5; regdw |= (unsigned long)cycle_time_value[ATA_100][speed-XFER_UDMA_0] << 4; regdw |= (unsigned long)cvs_time_value[ATA_100][speed-XFER_UDMA_0] << 8; } pci_write_config_dword(dev, (unsigned long)drive_pci, regdw); } else { + u8 drive_pci = 0x40 + drive->dn * 2, reg = 0; + + pci_read_config_byte(dev, drive_pci+1, ®); /* Force the UDMA bit on if we want to use UDMA */ reg |= 0x80; /* clean reg cycle time bits */ @@ -604,40 +353,24 @@ static int sis5513_tune_chipset (ide_drive_t *drive, u8 xferspeed) case XFER_MW_DMA_2: case XFER_MW_DMA_1: case XFER_MW_DMA_0: - case XFER_SW_DMA_2: - case XFER_SW_DMA_1: - case XFER_SW_DMA_0: + sis_program_timings(drive, speed); break; - case XFER_PIO_4: - case XFER_PIO_3: - case XFER_PIO_2: - case XFER_PIO_1: - case XFER_PIO_0: - return sis5513_tune_drive(drive, speed - XFER_PIO_0); default: BUG(); break; } - - return ide_config_drive_speed(drive, speed); } -static int sis5513_config_xfer_rate(ide_drive_t *drive) +static u8 sis5513_ata133_udma_filter(ide_drive_t *drive) { - /* - * TODO: always set PIO mode and remove this - */ - sis5513_tuneproc(drive, 255); + struct pci_dev *dev = drive->hwif->pci_dev; + u32 regdw = 0; + u8 drive_pci = sis_ata133_get_base(drive); - drive->init_speed = 0; + pci_read_config_dword(dev, drive_pci, ®dw); - if (ide_tune_dma(drive)) - return 0; - - if (ide_use_fast_pio(drive)) - sis5513_tuneproc(drive, 255); - - return -1; + /* if ATA133 disable, we should not set speed above UDMA5 */ + return (regdw & 0x08) ? ATA_UDMA6 : ATA_UDMA5; } /* Chip detection and general config */ @@ -779,14 +512,6 @@ static unsigned int __devinit init_chipset_sis5513 (struct pci_dev *dev, const c } break; } - -#if defined(DISPLAY_SIS_TIMINGS) && defined(CONFIG_IDE_PROC_FS) - if (!sis_proc) { - sis_proc = 1; - bmide_dev = dev; - ide_pci_create_host_proc("sis", sis_get_info); - } -#endif } return 0; @@ -839,50 +564,30 @@ static void __devinit init_hwif_sis5513 (ide_hwif_t *hwif) { u8 udma_rates[] = { 0x00, 0x00, 0x07, 0x1f, 0x3f, 0x3f, 0x7f, 0x7f }; - hwif->autodma = 0; - - if (!hwif->irq) - hwif->irq = hwif->channel ? 15 : 14; + hwif->set_pio_mode = &sis_set_pio_mode; + hwif->set_dma_mode = &sis_set_dma_mode; - hwif->tuneproc = &sis5513_tuneproc; - hwif->speedproc = &sis5513_tune_chipset; + if (chipset_family >= ATA_133) + hwif->udma_filter = sis5513_ata133_udma_filter; - if (!(hwif->dma_base)) { - hwif->drives[0].autotune = 1; - hwif->drives[1].autotune = 1; + if (hwif->dma_base == 0) return; - } - - hwif->atapi_dma = 1; hwif->ultra_mask = udma_rates[chipset_family]; - hwif->mwdma_mask = 0x07; - hwif->swdma_mask = 0x07; - - if (!chipset_family) - return; if (hwif->cbl != ATA_CBL_PATA40_SHORT) hwif->cbl = ata66_sis5513(hwif); - - if (chipset_family > ATA_16) { - hwif->ide_dma_check = &sis5513_config_xfer_rate; - if (!noautodma) - hwif->autodma = 1; - } - hwif->drives[0].autodma = hwif->autodma; - hwif->drives[1].autodma = hwif->autodma; - return; } static ide_pci_device_t sis5513_chipset __devinitdata = { .name = "SIS5513", .init_chipset = init_chipset_sis5513, .init_hwif = init_hwif_sis5513, - .autodma = NOAUTODMA, .enablebits = {{0x4a,0x02,0x02}, {0x4a,0x04,0x04}}, - .bootable = ON_BOARD, + .host_flags = IDE_HFLAG_LEGACY_IRQS | IDE_HFLAG_NO_AUTODMA | + IDE_HFLAG_BOOTABLE, .pio_mask = ATA_PIO4, + .mwdma_mask = ATA_MWDMA2, }; static int __devinit sis5513_init_one(struct pci_dev *dev, const struct pci_device_id *id) @@ -890,10 +595,10 @@ static int __devinit sis5513_init_one(struct pci_dev *dev, const struct pci_devi return ide_setup_pci_device(dev, &sis5513_chipset); } -static struct pci_device_id sis5513_pci_tbl[] = { - { PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_5513, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, - { PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_5518, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, - { PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_1180, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, +static const struct pci_device_id sis5513_pci_tbl[] = { + { PCI_VDEVICE(SI, PCI_DEVICE_ID_SI_5513), 0 }, + { PCI_VDEVICE(SI, PCI_DEVICE_ID_SI_5518), 0 }, + { PCI_VDEVICE(SI, PCI_DEVICE_ID_SI_1180), 0 }, { 0, }, }; MODULE_DEVICE_TABLE(pci, sis5513_pci_tbl); diff --git a/drivers/ide/pci/sl82c105.c b/drivers/ide/pci/sl82c105.c index 0947cab0059..0dce459b126 100644 --- a/drivers/ide/pci/sl82c105.c +++ b/drivers/ide/pci/sl82c105.c @@ -75,16 +75,12 @@ static unsigned int get_pio_timings(ide_drive_t *drive, u8 pio) /* * Configure the chipset for PIO mode. */ -static u8 sl82c105_tune_pio(ide_drive_t *drive, u8 pio) +static void sl82c105_set_pio_mode(ide_drive_t *drive, const u8 pio) { struct pci_dev *dev = HWIF(drive)->pci_dev; int reg = 0x44 + drive->dn * 4; u16 drv_ctrl; - DBG(("sl82c105_tune_pio(drive:%s, pio:%u)\n", drive->name, pio)); - - pio = ide_get_best_pio_mode(drive, pio, 5); - drv_ctrl = get_pio_timings(drive, pio); /* @@ -106,14 +102,12 @@ static u8 sl82c105_tune_pio(ide_drive_t *drive, u8 pio) printk(KERN_DEBUG "%s: selected %s (%dns) (%04X)\n", drive->name, ide_xfer_verbose(pio + XFER_PIO_0), ide_pio_cycle_time(drive, pio), drv_ctrl); - - return pio; } /* - * Configure the drive and chipset for a new transfer speed. + * Configure the chipset for DMA mode. */ -static int sl82c105_tune_chipset(ide_drive_t *drive, u8 speed) +static void sl82c105_set_dma_mode(ide_drive_t *drive, const u8 speed) { static u16 mwdma_timings[] = {0x0707, 0x0201, 0x0200}; u16 drv_ctrl; @@ -121,8 +115,6 @@ static int sl82c105_tune_chipset(ide_drive_t *drive, u8 speed) DBG(("sl82c105_tune_chipset(drive:%s, speed:%s)\n", drive->name, ide_xfer_verbose(speed))); - speed = ide_rate_filter(drive, speed); - switch (speed) { case XFER_MW_DMA_2: case XFER_MW_DMA_1: @@ -147,32 +139,9 @@ static int sl82c105_tune_chipset(ide_drive_t *drive, u8 speed) pci_write_config_word(dev, reg, drv_ctrl); } break; - case XFER_PIO_5: - case XFER_PIO_4: - case XFER_PIO_3: - case XFER_PIO_2: - case XFER_PIO_1: - case XFER_PIO_0: - (void) sl82c105_tune_pio(drive, speed - XFER_PIO_0); - break; default: - return -1; + return; } - - return ide_config_drive_speed(drive, speed); -} - -/* - * Check to see if the drive and chipset are capable of DMA mode. - */ -static int sl82c105_ide_dma_check(ide_drive_t *drive) -{ - DBG(("sl82c105_ide_dma_check(drive:%s)\n", drive->name)); - - if (ide_tune_dma(drive)) - return 0; - - return -1; } /* @@ -322,18 +291,6 @@ static void sl82c105_resetproc(ide_drive_t *drive) pci_read_config_dword(dev, 0x40, &val); pci_set_drvdata(dev, (void *)val); } - -/* - * We only deal with PIO mode here - DMA mode 'using_dma' is not - * initialised at the point that this function is called. - */ -static void sl82c105_tune_drive(ide_drive_t *drive, u8 pio) -{ - DBG(("sl82c105_tune_drive(drive:%s, pio:%u)\n", drive->name, pio)); - - pio = sl82c105_tune_pio(drive, pio); - (void) ide_config_drive_speed(drive, XFER_PIO_0 + pio); -} /* * Return the revision of the Winbond bridge @@ -399,8 +356,8 @@ static void __devinit init_hwif_sl82c105(ide_hwif_t *hwif) DBG(("init_hwif_sl82c105(hwif: ide%d)\n", hwif->index)); - hwif->tuneproc = &sl82c105_tune_drive; - hwif->speedproc = &sl82c105_tune_chipset; + hwif->set_pio_mode = &sl82c105_set_pio_mode; + hwif->set_dma_mode = &sl82c105_set_dma_mode; hwif->selectproc = &sl82c105_selectproc; hwif->resetproc = &sl82c105_resetproc; @@ -411,12 +368,6 @@ static void __devinit init_hwif_sl82c105(ide_hwif_t *hwif) hwif->drives[0].io_32bit = hwif->drives[1].io_32bit = 1; hwif->drives[0].unmask = hwif->drives[1].unmask = 1; - /* - * We always autotune PIO, this is done before DMA is checked, - * so there's no risk of accidentally disabling DMA - */ - hwif->drives[0].autotune = hwif->drives[1].autotune = 1; - if (!hwif->dma_base) return; @@ -431,20 +382,14 @@ static void __devinit init_hwif_sl82c105(ide_hwif_t *hwif) return; } - hwif->atapi_dma = 1; - hwif->mwdma_mask = 0x07; + hwif->mwdma_mask = ATA_MWDMA2; - hwif->ide_dma_check = &sl82c105_ide_dma_check; hwif->ide_dma_on = &sl82c105_ide_dma_on; hwif->dma_off_quietly = &sl82c105_dma_off_quietly; hwif->dma_lost_irq = &sl82c105_dma_lost_irq; hwif->dma_start = &sl82c105_dma_start; hwif->dma_timeout = &sl82c105_dma_timeout; - if (!noautodma) - hwif->autodma = 1; - hwif->drives[0].autodma = hwif->drives[1].autodma = hwif->autodma; - if (hwif->mate) hwif->serialized = hwif->mate->serialized = 1; } @@ -453,9 +398,8 @@ static ide_pci_device_t sl82c105_chipset __devinitdata = { .name = "W82C105", .init_chipset = init_chipset_sl82c105, .init_hwif = init_hwif_sl82c105, - .autodma = NOAUTODMA, .enablebits = {{0x40,0x01,0x01}, {0x40,0x10,0x10}}, - .bootable = ON_BOARD, + .host_flags = IDE_HFLAG_NO_AUTODMA | IDE_HFLAG_BOOTABLE, .pio_mask = ATA_PIO5, }; @@ -464,8 +408,8 @@ static int __devinit sl82c105_init_one(struct pci_dev *dev, const struct pci_dev return ide_setup_pci_device(dev, &sl82c105_chipset); } -static struct pci_device_id sl82c105_pci_tbl[] = { - { PCI_DEVICE(PCI_VENDOR_ID_WINBOND, PCI_DEVICE_ID_WINBOND_82C105), 0}, +static const struct pci_device_id sl82c105_pci_tbl[] = { + { PCI_VDEVICE(WINBOND, PCI_DEVICE_ID_WINBOND_82C105), 0 }, { 0, }, }; MODULE_DEVICE_TABLE(pci, sl82c105_pci_tbl); diff --git a/drivers/ide/pci/slc90e66.c b/drivers/ide/pci/slc90e66.c index 628b0664f57..4f22dffdf8e 100644 --- a/drivers/ide/pci/slc90e66.c +++ b/drivers/ide/pci/slc90e66.c @@ -1,5 +1,5 @@ /* - * linux/drivers/ide/pci/slc90e66.c Version 0.15 Jul 6, 2007 + * linux/drivers/ide/pci/slc90e66.c Version 0.18 Aug 9, 2007 * * Copyright (C) 2000-2002 Andre Hedrick <andre@linux-ide.org> * Copyright (C) 2006-2007 MontaVista Software, Inc. <source@mvista.com> @@ -21,28 +21,7 @@ #include <asm/io.h> -static u8 slc90e66_dma_2_pio (u8 xfer_rate) { - switch(xfer_rate) { - case XFER_UDMA_4: - case XFER_UDMA_3: - case XFER_UDMA_2: - case XFER_UDMA_1: - case XFER_UDMA_0: - case XFER_MW_DMA_2: - return 4; - case XFER_MW_DMA_1: - return 3; - case XFER_SW_DMA_2: - return 2; - case XFER_MW_DMA_0: - case XFER_SW_DMA_1: - case XFER_SW_DMA_0: - default: - return 0; - } -} - -static void slc90e66_tune_pio (ide_drive_t *drive, u8 pio) +static void slc90e66_set_pio_mode(ide_drive_t *drive, const u8 pio) { ide_hwif_t *hwif = HWIF(drive); struct pci_dev *dev = hwif->pci_dev; @@ -95,19 +74,11 @@ static void slc90e66_tune_pio (ide_drive_t *drive, u8 pio) spin_unlock_irqrestore(&ide_lock, flags); } -static void slc90e66_tune_drive (ide_drive_t *drive, u8 pio) -{ - pio = ide_get_best_pio_mode(drive, pio, 4); - slc90e66_tune_pio(drive, pio); - (void) ide_config_drive_speed(drive, XFER_PIO_0 + pio); -} - -static int slc90e66_tune_chipset (ide_drive_t *drive, u8 xferspeed) +static void slc90e66_set_dma_mode(ide_drive_t *drive, const u8 speed) { ide_hwif_t *hwif = HWIF(drive); struct pci_dev *dev = hwif->pci_dev; u8 maslave = hwif->channel ? 0x42 : 0x40; - u8 speed = ide_rate_filter(drive, xferspeed); int sitre = 0, a_speed = 7 << (drive->dn * 4); int u_speed = 0, u_flag = 1 << drive->dn; u16 reg4042, reg44, reg48, reg4a; @@ -127,12 +98,7 @@ static int slc90e66_tune_chipset (ide_drive_t *drive, u8 xferspeed) case XFER_MW_DMA_2: case XFER_MW_DMA_1: case XFER_SW_DMA_2: break; - case XFER_PIO_4: - case XFER_PIO_3: - case XFER_PIO_2: - case XFER_PIO_1: - case XFER_PIO_0: break; - default: return -1; + default: return; } if (speed >= XFER_UDMA_0) { @@ -145,31 +111,21 @@ static int slc90e66_tune_chipset (ide_drive_t *drive, u8 xferspeed) pci_write_config_word(dev, 0x4a, reg4a|u_speed); } } else { + const u8 mwdma_to_pio[] = { 0, 3, 4 }; + u8 pio; + if (reg48 & u_flag) pci_write_config_word(dev, 0x48, reg48 & ~u_flag); if (reg4a & a_speed) pci_write_config_word(dev, 0x4a, reg4a & ~a_speed); - } - - if (speed > XFER_PIO_4) - slc90e66_tune_pio(drive, slc90e66_dma_2_pio(speed)); - else - slc90e66_tune_pio(drive, speed - XFER_PIO_0); - return ide_config_drive_speed(drive, speed); -} + if (speed >= XFER_MW_DMA_0) + pio = mwdma_to_pio[speed - XFER_MW_DMA_0]; + else + pio = 2; /* only SWDMA2 is allowed */ -static int slc90e66_config_drive_xfer_rate (ide_drive_t *drive) -{ - drive->init_speed = 0; - - if (ide_tune_dma(drive)) - return 0; - - if (ide_use_fast_pio(drive)) - slc90e66_tune_drive(drive, 255); - - return -1; + slc90e66_set_pio_mode(drive, pio); + } } static void __devinit init_hwif_slc90e66 (ide_hwif_t *hwif) @@ -177,46 +133,28 @@ static void __devinit init_hwif_slc90e66 (ide_hwif_t *hwif) u8 reg47 = 0; u8 mask = hwif->channel ? 0x01 : 0x02; /* bit0:Primary */ - hwif->autodma = 0; - - if (!hwif->irq) - hwif->irq = hwif->channel ? 15 : 14; - - hwif->speedproc = &slc90e66_tune_chipset; - hwif->tuneproc = &slc90e66_tune_drive; + hwif->set_pio_mode = &slc90e66_set_pio_mode; + hwif->set_dma_mode = &slc90e66_set_dma_mode; pci_read_config_byte(hwif->pci_dev, 0x47, ®47); - if (!hwif->dma_base) { - hwif->drives[0].autotune = 1; - hwif->drives[1].autotune = 1; + if (hwif->dma_base == 0) return; - } - - hwif->atapi_dma = 1; - hwif->ultra_mask = 0x1f; - hwif->mwdma_mask = 0x06; - hwif->swdma_mask = 0x04; if (hwif->cbl != ATA_CBL_PATA40_SHORT) /* bit[0(1)]: 0:80, 1:40 */ hwif->cbl = (reg47 & mask) ? ATA_CBL_PATA40 : ATA_CBL_PATA80; - - hwif->ide_dma_check = &slc90e66_config_drive_xfer_rate; - - if (!noautodma) - hwif->autodma = 1; - hwif->drives[0].autodma = hwif->autodma; - hwif->drives[1].autodma = hwif->autodma; } static ide_pci_device_t slc90e66_chipset __devinitdata = { .name = "SLC90E66", .init_hwif = init_hwif_slc90e66, - .autodma = AUTODMA, .enablebits = {{0x41,0x80,0x80}, {0x43,0x80,0x80}}, - .bootable = ON_BOARD, + .host_flags = IDE_HFLAG_LEGACY_IRQS | IDE_HFLAG_BOOTABLE, .pio_mask = ATA_PIO4, + .swdma_mask = ATA_SWDMA2_ONLY, + .mwdma_mask = ATA_MWDMA12_ONLY, + .udma_mask = ATA_UDMA4, }; static int __devinit slc90e66_init_one(struct pci_dev *dev, const struct pci_device_id *id) @@ -224,8 +162,8 @@ static int __devinit slc90e66_init_one(struct pci_dev *dev, const struct pci_dev return ide_setup_pci_device(dev, &slc90e66_chipset); } -static struct pci_device_id slc90e66_pci_tbl[] = { - { PCI_DEVICE(PCI_VENDOR_ID_EFAR, PCI_DEVICE_ID_EFAR_SLC90E66_1), 0}, +static const struct pci_device_id slc90e66_pci_tbl[] = { + { PCI_VDEVICE(EFAR, PCI_DEVICE_ID_EFAR_SLC90E66_1), 0 }, { 0, }, }; MODULE_DEVICE_TABLE(pci, slc90e66_pci_tbl); diff --git a/drivers/ide/pci/tc86c001.c b/drivers/ide/pci/tc86c001.c index ec79bacc30c..631506e9b5d 100644 --- a/drivers/ide/pci/tc86c001.c +++ b/drivers/ide/pci/tc86c001.c @@ -1,5 +1,5 @@ /* - * drivers/ide/pci/tc86c001.c Version 1.00 Dec 12, 2006 + * drivers/ide/pci/tc86c001.c Version 1.01 Sep 5, 2007 * * Copyright (C) 2002 Toshiba Corporation * Copyright (C) 2005-2006 MontaVista Software, Inc. <source@mvista.com> @@ -13,13 +13,11 @@ #include <linux/pci.h> #include <linux/ide.h> -static int tc86c001_tune_chipset(ide_drive_t *drive, u8 speed) +static void tc86c001_set_mode(ide_drive_t *drive, const u8 speed) { ide_hwif_t *hwif = HWIF(drive); unsigned long scr_port = hwif->config_data + (drive->dn ? 0x02 : 0x00); - u16 mode, scr = hwif->INW(scr_port); - - speed = ide_rate_filter(drive, speed); + u16 mode, scr = inw(scr_port); switch (speed) { case XFER_UDMA_4: mode = 0x00c0; break; @@ -41,14 +39,11 @@ static int tc86c001_tune_chipset(ide_drive_t *drive, u8 speed) scr &= (speed < XFER_MW_DMA_0) ? 0xf8ff : 0xff0f; scr |= mode; outw(scr, scr_port); - - return ide_config_drive_speed(drive, speed); } -static void tc86c001_tune_drive(ide_drive_t *drive, u8 pio) +static void tc86c001_set_pio_mode(ide_drive_t *drive, const u8 pio) { - pio = ide_get_best_pio_mode(drive, pio, 4); - (void) tc86c001_tune_chipset(drive, XFER_PIO_0 + pio); + tc86c001_set_mode(drive, XFER_PIO_0 + pio); } /* @@ -70,7 +65,7 @@ static int tc86c001_timer_expiry(ide_drive_t *drive) ide_hwif_t *hwif = HWIF(drive); ide_expiry_t *expiry = ide_get_hwifdata(hwif); ide_hwgroup_t *hwgroup = HWGROUP(drive); - u8 dma_stat = hwif->INB(hwif->dma_status); + u8 dma_stat = inb(hwif->dma_status); /* Restore a higher level driver's expiry handler first. */ hwgroup->expiry = expiry; @@ -78,7 +73,7 @@ static int tc86c001_timer_expiry(ide_drive_t *drive) if ((dma_stat & 5) == 1) { /* DMA active and no interrupt */ unsigned long sc_base = hwif->config_data; unsigned long twcr_port = sc_base + (drive->dn ? 0x06 : 0x04); - u8 dma_cmd = hwif->INB(hwif->dma_command); + u8 dma_cmd = inb(hwif->dma_command); printk(KERN_WARNING "%s: DMA interrupt possibly stuck, " "attempting recovery...\n", drive->name); @@ -140,7 +135,7 @@ static int tc86c001_busproc(ide_drive_t *drive, int state) u16 scr1; /* System Control 1 Register bit 11 (ATA Hard Reset) read */ - scr1 = hwif->INW(sc_base + 0x00); + scr1 = inw(sc_base + 0x00); switch (state) { case BUSSTATE_ON: @@ -167,21 +162,10 @@ static int tc86c001_busproc(ide_drive_t *drive, int state) return 0; } -static int tc86c001_config_drive_xfer_rate(ide_drive_t *drive) -{ - if (ide_tune_dma(drive)) - return 0; - - if (ide_use_fast_pio(drive)) - tc86c001_tune_drive(drive, 255); - - return -1; -} - static void __devinit init_hwif_tc86c001(ide_hwif_t *hwif) { unsigned long sc_base = pci_resource_start(hwif->pci_dev, 5); - u16 scr1 = hwif->INW(sc_base + 0x00);; + u16 scr1 = inw(sc_base + 0x00); /* System Control 1 Register bit 15 (Soft Reset) set */ outw(scr1 | 0x8000, sc_base + 0x00); @@ -195,11 +179,10 @@ static void __devinit init_hwif_tc86c001(ide_hwif_t *hwif) /* Store the system control register base for convenience... */ hwif->config_data = sc_base; - hwif->tuneproc = &tc86c001_tune_drive; - hwif->speedproc = &tc86c001_tune_chipset; - hwif->busproc = &tc86c001_busproc; + hwif->set_pio_mode = &tc86c001_set_pio_mode; + hwif->set_dma_mode = &tc86c001_set_mode; - hwif->drives[0].autotune = hwif->drives[1].autotune = 1; + hwif->busproc = &tc86c001_busproc; if (!hwif->dma_base) return; @@ -213,11 +196,6 @@ static void __devinit init_hwif_tc86c001(ide_hwif_t *hwif) /* Sector Count Register limit */ hwif->rqsize = 0xffff; - hwif->atapi_dma = 1; - hwif->ultra_mask = 0x1f; - hwif->mwdma_mask = 0x07; - - hwif->ide_dma_check = &tc86c001_config_drive_xfer_rate; hwif->dma_start = &tc86c001_dma_start; if (hwif->cbl != ATA_CBL_PATA40_SHORT) { @@ -225,13 +203,9 @@ static void __devinit init_hwif_tc86c001(ide_hwif_t *hwif) * System Control 1 Register bit 13 (PDIAGN): * 0=80-pin cable, 1=40-pin cable */ - scr1 = hwif->INW(sc_base + 0x00); + scr1 = inw(sc_base + 0x00); hwif->cbl = (scr1 & 0x2000) ? ATA_CBL_PATA40 : ATA_CBL_PATA80; } - - if (!noautodma) - hwif->autodma = 1; - hwif->drives[0].autodma = hwif->drives[1].autodma = hwif->autodma; } static unsigned int __devinit init_chipset_tc86c001(struct pci_dev *dev, @@ -248,10 +222,10 @@ static ide_pci_device_t tc86c001_chipset __devinitdata = { .name = "TC86C001", .init_chipset = init_chipset_tc86c001, .init_hwif = init_hwif_tc86c001, - .autodma = AUTODMA, - .bootable = OFF_BOARD, - .host_flags = IDE_HFLAG_SINGLE, + .host_flags = IDE_HFLAG_SINGLE | IDE_HFLAG_OFF_BOARD, .pio_mask = ATA_PIO4, + .mwdma_mask = ATA_MWDMA2, + .udma_mask = ATA_UDMA4, }; static int __devinit tc86c001_init_one(struct pci_dev *dev, @@ -260,9 +234,8 @@ static int __devinit tc86c001_init_one(struct pci_dev *dev, return ide_setup_pci_device(dev, &tc86c001_chipset); } -static struct pci_device_id tc86c001_pci_tbl[] = { - { PCI_VENDOR_ID_TOSHIBA_2, PCI_DEVICE_ID_TOSHIBA_TC86C001_IDE, - PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, +static const struct pci_device_id tc86c001_pci_tbl[] = { + { PCI_VDEVICE(TOSHIBA_2, PCI_DEVICE_ID_TOSHIBA_TC86C001_IDE), 0 }, { 0, } }; MODULE_DEVICE_TABLE(pci, tc86c001_pci_tbl); diff --git a/drivers/ide/pci/triflex.c b/drivers/ide/pci/triflex.c index 098692a6d61..30b52f62699 100644 --- a/drivers/ide/pci/triflex.c +++ b/drivers/ide/pci/triflex.c @@ -40,7 +40,7 @@ #include <linux/ide.h> #include <linux/init.h> -static int triflex_tune_chipset(ide_drive_t *drive, u8 xferspeed) +static void triflex_set_mode(ide_drive_t *drive, const u8 speed) { ide_hwif_t *hwif = HWIF(drive); struct pci_dev *dev = hwif->pci_dev; @@ -48,7 +48,6 @@ static int triflex_tune_chipset(ide_drive_t *drive, u8 xferspeed) u16 timing = 0; u32 triflex_timings = 0; u8 unit = (drive->select.b.unit & 0x01); - u8 speed = ide_rate_filter(drive, xferspeed); pci_read_config_dword(dev, channel_offset, &triflex_timings); @@ -83,59 +82,34 @@ static int triflex_tune_chipset(ide_drive_t *drive, u8 xferspeed) timing = 0x0808; break; default: - return -1; + return; } triflex_timings &= ~(0xFFFF << (16 * unit)); triflex_timings |= (timing << (16 * unit)); pci_write_config_dword(dev, channel_offset, triflex_timings); - - return (ide_config_drive_speed(drive, speed)); } -static void triflex_tune_drive(ide_drive_t *drive, u8 pio) +static void triflex_set_pio_mode(ide_drive_t *drive, const u8 pio) { - int use_pio = ide_get_best_pio_mode(drive, pio, 4); - (void) triflex_tune_chipset(drive, (XFER_PIO_0 + use_pio)); -} - -static int triflex_config_drive_xfer_rate(ide_drive_t *drive) -{ - if (ide_tune_dma(drive)) - return 0; - - triflex_tune_drive(drive, 255); - - return -1; + triflex_set_mode(drive, XFER_PIO_0 + pio); } static void __devinit init_hwif_triflex(ide_hwif_t *hwif) { - hwif->tuneproc = &triflex_tune_drive; - hwif->speedproc = &triflex_tune_chipset; - - if (hwif->dma_base == 0) - return; - - hwif->atapi_dma = 1; - hwif->mwdma_mask = 0x07; - hwif->swdma_mask = 0x07; - hwif->ide_dma_check = &triflex_config_drive_xfer_rate; - - if (!noautodma) - hwif->autodma = 1; - hwif->drives[0].autodma = hwif->autodma; - hwif->drives[1].autodma = hwif->autodma; + hwif->set_pio_mode = &triflex_set_pio_mode; + hwif->set_dma_mode = &triflex_set_mode; } static ide_pci_device_t triflex_device __devinitdata = { .name = "TRIFLEX", .init_hwif = init_hwif_triflex, - .autodma = AUTODMA, .enablebits = {{0x80, 0x01, 0x01}, {0x80, 0x02, 0x02}}, - .bootable = ON_BOARD, + .host_flags = IDE_HFLAG_BOOTABLE, .pio_mask = ATA_PIO4, + .swdma_mask = ATA_SWDMA2, + .mwdma_mask = ATA_MWDMA2, }; static int __devinit triflex_init_one(struct pci_dev *dev, @@ -144,9 +118,8 @@ static int __devinit triflex_init_one(struct pci_dev *dev, return ide_setup_pci_device(dev, &triflex_device); } -static struct pci_device_id triflex_pci_tbl[] = { - { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_TRIFLEX_IDE, - PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, +static const struct pci_device_id triflex_pci_tbl[] = { + { PCI_VDEVICE(COMPAQ, PCI_DEVICE_ID_COMPAQ_TRIFLEX_IDE), 0 }, { 0, }, }; MODULE_DEVICE_TABLE(pci, triflex_pci_tbl); diff --git a/drivers/ide/pci/trm290.c b/drivers/ide/pci/trm290.c index dc4f4e298e0..140d486f623 100644 --- a/drivers/ide/pci/trm290.c +++ b/drivers/ide/pci/trm290.c @@ -250,7 +250,6 @@ static void __devinit init_hwif_trm290(ide_hwif_t *hwif) u8 reg = 0; struct pci_dev *dev = hwif->pci_dev; - hwif->no_lba48 = 1; hwif->chipset = ide_trm290; cfgbase = pci_resource_start(dev, 4); if ((dev->class & 5) && cfgbase) { @@ -292,9 +291,6 @@ static void __devinit init_hwif_trm290(ide_hwif_t *hwif) hwif->ide_dma_test_irq = &trm290_ide_dma_test_irq; hwif->selectproc = &trm290_selectproc; - hwif->autodma = 0; /* play it safe for now */ - hwif->drives[0].autodma = hwif->autodma; - hwif->drives[1].autodma = hwif->autodma; #if 1 { /* @@ -327,8 +323,13 @@ static void __devinit init_hwif_trm290(ide_hwif_t *hwif) static ide_pci_device_t trm290_chipset __devinitdata = { .name = "TRM290", .init_hwif = init_hwif_trm290, - .autodma = NOAUTODMA, - .bootable = ON_BOARD, + .host_flags = IDE_HFLAG_NO_ATAPI_DMA | +#if 0 /* play it safe for now */ + IDE_HFLAG_TRUST_BIOS_FOR_DMA | +#endif + IDE_HFLAG_NO_AUTODMA | + IDE_HFLAG_BOOTABLE | + IDE_HFLAG_NO_LBA48, }; static int __devinit trm290_init_one(struct pci_dev *dev, const struct pci_device_id *id) @@ -336,8 +337,8 @@ static int __devinit trm290_init_one(struct pci_dev *dev, const struct pci_devic return ide_setup_pci_device(dev, &trm290_chipset); } -static struct pci_device_id trm290_pci_tbl[] = { - { PCI_VENDOR_ID_TEKRAM, PCI_DEVICE_ID_TEKRAM_DC290, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, +static const struct pci_device_id trm290_pci_tbl[] = { + { PCI_VDEVICE(TEKRAM, PCI_DEVICE_ID_TEKRAM_DC290), 0 }, { 0, }, }; MODULE_DEVICE_TABLE(pci, trm290_pci_tbl); diff --git a/drivers/ide/pci/via82cxxx.c b/drivers/ide/pci/via82cxxx.c index a7be7795e6a..c8022a92a0e 100644 --- a/drivers/ide/pci/via82cxxx.c +++ b/drivers/ide/pci/via82cxxx.c @@ -1,6 +1,6 @@ /* * - * Version 3.47 + * Version 3.49 * * VIA IDE driver for Linux. Supported southbridges: * @@ -153,21 +153,17 @@ static void via_set_speed(ide_hwif_t *hwif, u8 dn, struct ide_timing *timing) * @drive: Drive to set up * @speed: desired speed * - * via_set_drive() computes timing values configures the drive and - * the chipset to a desired transfer mode. It also can be called - * by upper layers. + * via_set_drive() computes timing values configures the chipset to + * a desired transfer mode. It also can be called by upper layers. */ -static int via_set_drive(ide_drive_t *drive, u8 speed) +static void via_set_drive(ide_drive_t *drive, const u8 speed) { ide_drive_t *peer = HWIF(drive)->drives + (~drive->dn & 1); struct via82cxxx_dev *vdev = pci_get_drvdata(drive->hwif->pci_dev); struct ide_timing t, p; unsigned int T, UT; - if (speed != XFER_PIO_SLOW) - ide_config_drive_speed(drive, speed); - T = 1000000000 / via_clock; switch (vdev->via_config->udma_mask) { @@ -186,53 +182,19 @@ static int via_set_drive(ide_drive_t *drive, u8 speed) } via_set_speed(HWIF(drive), drive->dn, &t); - - if (!drive->init_speed) - drive->init_speed = speed; - drive->current_speed = speed; - - return 0; } /** - * via82cxxx_tune_drive - PIO setup - * @drive: drive to set up - * @pio: mode to use (255 for 'best possible') + * via_set_pio_mode - set host controller for PIO mode + * @drive: drive + * @pio: PIO mode number * * A callback from the upper layers for PIO-only tuning. */ -static void via82cxxx_tune_drive(ide_drive_t *drive, u8 pio) -{ - if (pio == 255) - pio = ide_get_best_pio_mode(drive, 255, 5); - - via_set_drive(drive, XFER_PIO_0 + min_t(u8, pio, 5)); -} - -/** - * via82cxxx_ide_dma_check - set up for DMA if possible - * @drive: IDE drive to set up - * - * Set up the drive for the highest supported speed considering the - * driver, controller and cable - */ - -static int via82cxxx_ide_dma_check (ide_drive_t *drive) +static void via_set_pio_mode(ide_drive_t *drive, const u8 pio) { - u8 speed = ide_max_dma_mode(drive); - - if (speed == 0) { - via82cxxx_tune_drive(drive, 255); - return -1; - } - - via_set_drive(drive, speed); - - if (drive->autodma) - return 0; - - return -1; + via_set_drive(drive, XFER_PIO_0 + pio); } static struct via_isa_bridge *via_config_find(struct pci_dev **isa) @@ -419,7 +381,7 @@ static unsigned int __devinit init_chipset_via82cxxx(struct pci_dev *dev, const * Cable special cases */ -static struct dmi_system_id cable_dmi_table[] = { +static const struct dmi_system_id cable_dmi_table[] = { { .ident = "Acer Ferrari 3400", .matches = { @@ -463,11 +425,8 @@ static void __devinit init_hwif_via82cxxx(ide_hwif_t *hwif) struct via82cxxx_dev *vdev = pci_get_drvdata(hwif->pci_dev); int i; - hwif->autodma = 0; - - hwif->tuneproc = &via82cxxx_tune_drive; - hwif->speedproc = &via_set_drive; - + hwif->set_pio_mode = &via_set_pio_mode; + hwif->set_dma_mode = &via_set_drive; #ifdef CONFIG_PPC_CHRP if(machine_is(chrp) && _chrp_type == _CHRP_Pegasos) { @@ -478,27 +437,15 @@ static void __devinit init_hwif_via82cxxx(ide_hwif_t *hwif) for (i = 0; i < 2; i++) { hwif->drives[i].io_32bit = 1; hwif->drives[i].unmask = (vdev->via_config->flags & VIA_NO_UNMASK) ? 0 : 1; - hwif->drives[i].autotune = 1; - hwif->drives[i].dn = hwif->channel * 2 + i; } if (!hwif->dma_base) return; - hwif->atapi_dma = 1; - hwif->ultra_mask = vdev->via_config->udma_mask; - hwif->mwdma_mask = 0x07; - hwif->swdma_mask = 0x07; if (hwif->cbl != ATA_CBL_PATA40_SHORT) hwif->cbl = via82cxxx_cable_detect(hwif); - - hwif->ide_dma_check = &via82cxxx_ide_dma_check; - if (!noautodma) - hwif->autodma = 1; - hwif->drives[0].autodma = hwif->autodma; - hwif->drives[1].autodma = hwif->autodma; } static ide_pci_device_t via82cxxx_chipsets[] __devinitdata = { @@ -506,22 +453,27 @@ static ide_pci_device_t via82cxxx_chipsets[] __devinitdata = { .name = "VP_IDE", .init_chipset = init_chipset_via82cxxx, .init_hwif = init_hwif_via82cxxx, - .autodma = NOAUTODMA, .enablebits = {{0x40,0x02,0x02}, {0x40,0x01,0x01}}, - .bootable = ON_BOARD, - .host_flags = IDE_HFLAG_PIO_NO_BLACKLIST - | IDE_HFLAG_PIO_NO_DOWNGRADE, + .host_flags = IDE_HFLAG_PIO_NO_BLACKLIST | + IDE_HFLAG_PIO_NO_DOWNGRADE | + IDE_HFLAG_POST_SET_MODE | + IDE_HFLAG_NO_AUTODMA | + IDE_HFLAG_BOOTABLE, .pio_mask = ATA_PIO5, + .swdma_mask = ATA_SWDMA2, + .mwdma_mask = ATA_MWDMA2, },{ /* 1 */ .name = "VP_IDE", .init_chipset = init_chipset_via82cxxx, .init_hwif = init_hwif_via82cxxx, - .autodma = AUTODMA, .enablebits = {{0x00,0x00,0x00}, {0x00,0x00,0x00}}, - .bootable = ON_BOARD, - .host_flags = IDE_HFLAG_PIO_NO_BLACKLIST - | IDE_HFLAG_PIO_NO_DOWNGRADE, + .host_flags = IDE_HFLAG_PIO_NO_BLACKLIST | + IDE_HFLAG_PIO_NO_DOWNGRADE | + IDE_HFLAG_POST_SET_MODE | + IDE_HFLAG_BOOTABLE, .pio_mask = ATA_PIO5, + .swdma_mask = ATA_SWDMA2, + .mwdma_mask = ATA_MWDMA2, } }; @@ -541,11 +493,11 @@ static int __devinit via_init_one(struct pci_dev *dev, const struct pci_device_i return ide_setup_pci_device(dev, &via82cxxx_chipsets[id->driver_data]); } -static struct pci_device_id via_pci_tbl[] = { - { PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C576_1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, - { PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C586_1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, - { PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_6410, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 1}, - { PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_SATA_EIDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 1}, +static const struct pci_device_id via_pci_tbl[] = { + { PCI_VDEVICE(VIA, PCI_DEVICE_ID_VIA_82C576_1), 0 }, + { PCI_VDEVICE(VIA, PCI_DEVICE_ID_VIA_82C586_1), 0 }, + { PCI_VDEVICE(VIA, PCI_DEVICE_ID_VIA_6410), 1 }, + { PCI_VDEVICE(VIA, PCI_DEVICE_ID_VIA_SATA_EIDE), 1 }, { 0, }, }; MODULE_DEVICE_TABLE(pci, via_pci_tbl); diff --git a/drivers/ide/ppc/mpc8xx.c b/drivers/ide/ppc/mpc8xx.c index dab79afa9b2..df2e92034f5 100644 --- a/drivers/ide/ppc/mpc8xx.c +++ b/drivers/ide/ppc/mpc8xx.c @@ -45,7 +45,7 @@ static void print_funcid (int func); static int check_ide_device (unsigned long base); static void ide_interrupt_ack (void *dev); -static void m8xx_ide_tuneproc(ide_drive_t *drive, u8 pio); +static void m8xx_ide_set_pio_mode(ide_drive_t *drive, const u8 pio); typedef struct ide_ioport_desc { unsigned long base_off; /* Offset to PCMCIA memory */ @@ -314,9 +314,8 @@ m8xx_ide_init_hwif_ports(hw_regs_t *hw, unsigned long data_port, #endif /* CONFIG_IDE_8xx_PCCARD */ } - /* register routine to tune PIO mode */ ide_hwifs[data_port].pio_mask = ATA_PIO4; - ide_hwifs[data_port].tuneproc = m8xx_ide_tuneproc; + ide_hwifs[data_port].set_pio_mode = m8xx_ide_set_pio_mode; hw->ack_intr = (ide_ack_intr_t *) ide_interrupt_ack; /* Enable Harddisk Interrupt, @@ -401,9 +400,8 @@ void m8xx_ide_init_hwif_ports (hw_regs_t *hw, *irq = ioport_dsc[data_port].irq; } - /* register routine to tune PIO mode */ ide_hwifs[data_port].pio_mask = ATA_PIO4; - ide_hwifs[data_port].tuneproc = m8xx_ide_tuneproc; + ide_hwifs[data_port].set_pio_mode = m8xx_ide_set_pio_mode; hw->ack_intr = (ide_ack_intr_t *) ide_interrupt_ack; /* Enable Harddisk Interrupt, @@ -427,24 +425,13 @@ void m8xx_ide_init_hwif_ports (hw_regs_t *hw, #define PCMCIA_SL(t) ((t==32) ? 0 : ((t & 0x1F)<<7)) /* Strobe Length */ #endif - /* Calculate PIO timings */ -static void -m8xx_ide_tuneproc(ide_drive_t *drive, u8 pio) +static void m8xx_ide_set_pio_mode(ide_drive_t *drive, const u8 pio) { #if defined(CONFIG_IDE_8xx_PCCARD) || defined(CONFIG_IDE_8xx_DIRECT) volatile pcmconf8xx_t *pcmp; ulong timing, mask, reg; -#endif - - pio = ide_get_best_pio_mode(drive, pio, 4); -#if 1 - printk("%s[%d] %s: best PIO mode: %d\n", - __FILE__,__LINE__,__FUNCTION__, pio); -#endif - -#if defined(CONFIG_IDE_8xx_PCCARD) || defined(CONFIG_IDE_8xx_DIRECT) pcmp = (pcmconf8xx_t *)(&(((immap_t *)IMAP_ADDR)->im_pcmcia)); mask = ~(PCMCIA_SHT(0xFF) | PCMCIA_SST(0xFF) | PCMCIA_SL(0xFF)); diff --git a/drivers/ide/ppc/pmac.c b/drivers/ide/ppc/pmac.c index 2fb047b898a..c5547935676 100644 --- a/drivers/ide/ppc/pmac.c +++ b/drivers/ide/ppc/pmac.c @@ -6,6 +6,7 @@ * for doing DMA. * * Copyright (C) 1998-2003 Paul Mackerras & Ben. Herrenschmidt + * Copyright (C) 2007 Bartlomiej Zolnierkiewicz * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License @@ -311,7 +312,8 @@ static struct kauai_timing kauai_pio_timings[] = { 240 , 0x0800038b }, { 239 , 0x0800030c }, { 180 , 0x05000249 }, - { 120 , 0x04000148 } + { 120 , 0x04000148 }, + { 0 , 0 }, }; static struct kauai_timing kauai_mdma_timings[] = @@ -351,7 +353,8 @@ static struct kauai_timing shasta_pio_timings[] = { 240 , 0x040003cd }, { 239 , 0x040003cd }, { 180 , 0x0400028b }, - { 120 , 0x0400010a } + { 120 , 0x0400010a }, + { 0 , 0 }, }; static struct kauai_timing shasta_mdma_timings[] = @@ -389,6 +392,7 @@ kauai_lookup_timing(struct kauai_timing* table, int cycle_time) for (i=0; table[i].cycle_time; i++) if (cycle_time > table[i+1].cycle_time) return table[i].timing_reg; + BUG(); return 0; } @@ -411,8 +415,6 @@ kauai_lookup_timing(struct kauai_timing* table, int cycle_time) static void pmac_ide_setup_dma(pmac_ide_hwif_t *pmif, ide_hwif_t *hwif); static int pmac_ide_build_dmatable(ide_drive_t *drive, struct request *rq); -static int pmac_ide_tune_chipset(ide_drive_t *drive, u8 speed); -static void pmac_ide_tuneproc(ide_drive_t *drive, u8 pio); static void pmac_ide_selectproc(ide_drive_t *drive); static void pmac_ide_kauai_selectproc(ide_drive_t *drive); @@ -528,97 +530,12 @@ pmac_outbsync(ide_drive_t *drive, u8 value, unsigned long port) } /* - * Send the SET_FEATURE IDE command to the drive and update drive->id with - * the new state. We currently don't use the generic routine as it used to - * cause various trouble, especially with older mediabays. - * This code is sometimes triggering a spurrious interrupt though, I need - * to sort that out sooner or later and see if I can finally get the - * common version to work properly in all cases - */ -static int -pmac_ide_do_setfeature(ide_drive_t *drive, u8 command) -{ - ide_hwif_t *hwif = HWIF(drive); - int result = 1; - - disable_irq_nosync(hwif->irq); - udelay(1); - SELECT_DRIVE(drive); - SELECT_MASK(drive, 0); - udelay(1); - /* Get rid of pending error state */ - (void) hwif->INB(IDE_STATUS_REG); - /* Timeout bumped for some powerbooks */ - if (wait_for_ready(drive, 2000)) { - /* Timeout bumped for some powerbooks */ - printk(KERN_ERR "%s: pmac_ide_do_setfeature disk not ready " - "before SET_FEATURE!\n", drive->name); - goto out; - } - udelay(10); - hwif->OUTB(drive->ctl | 2, IDE_CONTROL_REG); - hwif->OUTB(command, IDE_NSECTOR_REG); - hwif->OUTB(SETFEATURES_XFER, IDE_FEATURE_REG); - hwif->OUTBSYNC(drive, WIN_SETFEATURES, IDE_COMMAND_REG); - udelay(1); - /* Timeout bumped for some powerbooks */ - result = wait_for_ready(drive, 2000); - hwif->OUTB(drive->ctl, IDE_CONTROL_REG); - if (result) - printk(KERN_ERR "%s: pmac_ide_do_setfeature disk not ready " - "after SET_FEATURE !\n", drive->name); -out: - SELECT_MASK(drive, 0); - if (result == 0) { - drive->id->dma_ultra &= ~0xFF00; - drive->id->dma_mword &= ~0x0F00; - drive->id->dma_1word &= ~0x0F00; - switch(command) { - case XFER_UDMA_7: - drive->id->dma_ultra |= 0x8080; break; - case XFER_UDMA_6: - drive->id->dma_ultra |= 0x4040; break; - case XFER_UDMA_5: - drive->id->dma_ultra |= 0x2020; break; - case XFER_UDMA_4: - drive->id->dma_ultra |= 0x1010; break; - case XFER_UDMA_3: - drive->id->dma_ultra |= 0x0808; break; - case XFER_UDMA_2: - drive->id->dma_ultra |= 0x0404; break; - case XFER_UDMA_1: - drive->id->dma_ultra |= 0x0202; break; - case XFER_UDMA_0: - drive->id->dma_ultra |= 0x0101; break; - case XFER_MW_DMA_2: - drive->id->dma_mword |= 0x0404; break; - case XFER_MW_DMA_1: - drive->id->dma_mword |= 0x0202; break; - case XFER_MW_DMA_0: - drive->id->dma_mword |= 0x0101; break; - case XFER_SW_DMA_2: - drive->id->dma_1word |= 0x0404; break; - case XFER_SW_DMA_1: - drive->id->dma_1word |= 0x0202; break; - case XFER_SW_DMA_0: - drive->id->dma_1word |= 0x0101; break; - default: break; - } - if (!drive->init_speed) - drive->init_speed = command; - drive->current_speed = command; - } - enable_irq(hwif->irq); - return result; -} - -/* * Old tuning functions (called on hdparm -p), sets up drive PIO timings */ static void -pmac_ide_tuneproc(ide_drive_t *drive, u8 pio) +pmac_ide_set_pio_mode(ide_drive_t *drive, const u8 pio) { - u32 *timings; + u32 *timings, t; unsigned accessTicks, recTicks; unsigned accessTime, recTime; pmac_ide_hwif_t* pmif = (pmac_ide_hwif_t *)HWIF(drive)->hwif_data; @@ -629,26 +546,22 @@ pmac_ide_tuneproc(ide_drive_t *drive, u8 pio) /* which drive is it ? */ timings = &pmif->timings[drive->select.b.unit & 0x01]; + t = *timings; - pio = ide_get_best_pio_mode(drive, pio, 4); cycle_time = ide_pio_cycle_time(drive, pio); switch (pmif->kind) { case controller_sh_ata6: { /* 133Mhz cell */ u32 tr = kauai_lookup_timing(shasta_pio_timings, cycle_time); - if (tr == 0) - return; - *timings = ((*timings) & ~TR_133_PIOREG_PIO_MASK) | tr; + t = (t & ~TR_133_PIOREG_PIO_MASK) | tr; break; } case controller_un_ata6: case controller_k2_ata6: { /* 100Mhz cell */ u32 tr = kauai_lookup_timing(kauai_pio_timings, cycle_time); - if (tr == 0) - return; - *timings = ((*timings) & ~TR_100_PIOREG_PIO_MASK) | tr; + t = (t & ~TR_100_PIOREG_PIO_MASK) | tr; break; } case controller_kl_ata4: @@ -662,9 +575,9 @@ pmac_ide_tuneproc(ide_drive_t *drive, u8 pio) accessTicks = min(accessTicks, 0x1fU); recTicks = SYSCLK_TICKS_66(recTime); recTicks = min(recTicks, 0x1fU); - *timings = ((*timings) & ~TR_66_PIO_MASK) | - (accessTicks << TR_66_PIO_ACCESS_SHIFT) | - (recTicks << TR_66_PIO_RECOVERY_SHIFT); + t = (t & ~TR_66_PIO_MASK) | + (accessTicks << TR_66_PIO_ACCESS_SHIFT) | + (recTicks << TR_66_PIO_RECOVERY_SHIFT); break; default: { /* 33Mhz cell */ @@ -684,11 +597,11 @@ pmac_ide_tuneproc(ide_drive_t *drive, u8 pio) recTicks--; /* guess, but it's only for PIO0, so... */ ebit = 1; } - *timings = ((*timings) & ~TR_33_PIO_MASK) | + t = (t & ~TR_33_PIO_MASK) | (accessTicks << TR_33_PIO_ACCESS_SHIFT) | (recTicks << TR_33_PIO_RECOVERY_SHIFT); if (ebit) - *timings |= TR_33_PIO_E; + t |= TR_33_PIO_E; break; } } @@ -698,8 +611,8 @@ pmac_ide_tuneproc(ide_drive_t *drive, u8 pio) drive->name, pio, *timings); #endif - if (drive->select.all == HWIF(drive)->INB(IDE_SELECT_REG)) - pmac_ide_do_update_timings(drive); + *timings = t; + pmac_ide_do_update_timings(drive); } #ifdef CONFIG_BLK_DEV_IDEDMA_PMAC @@ -744,8 +657,6 @@ set_timings_udma_ata6(u32 *pio_timings, u32 *ultra_timings, u8 speed) if (speed > XFER_UDMA_5 || t == NULL) return 1; tr = kauai_lookup_timing(kauai_udma_timings, (int)t->udma); - if (tr == 0) - return 1; *ultra_timings = ((*ultra_timings) & ~TR_100_UDMAREG_UDMA_MASK) | tr; *ultra_timings = (*ultra_timings) | TR_100_UDMAREG_UDMA_EN; @@ -764,8 +675,6 @@ set_timings_udma_shasta(u32 *pio_timings, u32 *ultra_timings, u8 speed) if (speed > XFER_UDMA_6 || t == NULL) return 1; tr = kauai_lookup_timing(shasta_udma133_timings, (int)t->udma); - if (tr == 0) - return 1; *ultra_timings = ((*ultra_timings) & ~TR_133_UDMAREG_UDMA_MASK) | tr; *ultra_timings = (*ultra_timings) | TR_133_UDMAREG_UDMA_EN; @@ -775,12 +684,13 @@ set_timings_udma_shasta(u32 *pio_timings, u32 *ultra_timings, u8 speed) /* * Calculate MDMA timings for all cells */ -static int +static void set_timings_mdma(ide_drive_t *drive, int intf_type, u32 *timings, u32 *timings2, - u8 speed, int drive_cycle_time) + u8 speed) { int cycleTime, accessTime = 0, recTime = 0; unsigned accessTicks, recTicks; + struct hd_driveid *id = drive->id; struct mdma_timings_t* tm = NULL; int i; @@ -790,11 +700,14 @@ set_timings_mdma(ide_drive_t *drive, int intf_type, u32 *timings, u32 *timings2, case 1: cycleTime = 150; break; case 2: cycleTime = 120; break; default: - return 1; + BUG(); + break; } - /* Adjust for drive */ - if (drive_cycle_time && drive_cycle_time > cycleTime) - cycleTime = drive_cycle_time; + + /* Check if drive provides explicit DMA cycle time */ + if ((id->field_valid & 2) && id->eide_dma_time) + cycleTime = max_t(int, id->eide_dma_time, cycleTime); + /* OHare limits according to some old Apple sources */ if ((intf_type == controller_ohare) && (cycleTime < 150)) cycleTime = 150; @@ -822,8 +735,6 @@ set_timings_mdma(ide_drive_t *drive, int intf_type, u32 *timings, u32 *timings2, break; i++; } - if (i < 0) - return 1; cycleTime = tm[i].cycleTime; accessTime = tm[i].accessTime; recTime = tm[i].recoveryTime; @@ -837,8 +748,6 @@ set_timings_mdma(ide_drive_t *drive, int intf_type, u32 *timings, u32 *timings2, case controller_sh_ata6: { /* 133Mhz cell */ u32 tr = kauai_lookup_timing(shasta_mdma_timings, cycleTime); - if (tr == 0) - return 1; *timings = ((*timings) & ~TR_133_PIOREG_MDMA_MASK) | tr; *timings2 = (*timings2) & ~TR_133_UDMAREG_UDMA_EN; } @@ -846,8 +755,6 @@ set_timings_mdma(ide_drive_t *drive, int intf_type, u32 *timings, u32 *timings2, case controller_k2_ata6: { /* 100Mhz cell */ u32 tr = kauai_lookup_timing(kauai_mdma_timings, cycleTime); - if (tr == 0) - return 1; *timings = ((*timings) & ~TR_100_PIOREG_MDMA_MASK) | tr; *timings2 = (*timings2) & ~TR_100_UDMAREG_UDMA_EN; } @@ -909,88 +816,63 @@ set_timings_mdma(ide_drive_t *drive, int intf_type, u32 *timings, u32 *timings2, printk(KERN_ERR "%s: Set MDMA timing for mode %d, reg: 0x%08x\n", drive->name, speed & 0xf, *timings); #endif - return 0; } #endif /* #ifdef CONFIG_BLK_DEV_IDEDMA_PMAC */ -/* - * Speedproc. This function is called by the core to set any of the standard - * timing (PIO, MDMA or UDMA) to both the drive and the controller. - * You may notice we don't use this function on normal "dma check" operation, - * our dedicated function is more precise as it uses the drive provided - * cycle time value. We should probably fix this one to deal with that too... - */ -static int -pmac_ide_tune_chipset (ide_drive_t *drive, byte speed) +static void pmac_ide_set_dma_mode(ide_drive_t *drive, const u8 speed) { int unit = (drive->select.b.unit & 0x01); int ret = 0; pmac_ide_hwif_t* pmif = (pmac_ide_hwif_t *)HWIF(drive)->hwif_data; - u32 *timings, *timings2; + u32 *timings, *timings2, tl[2]; - if (pmif == NULL) - return 1; - timings = &pmif->timings[unit]; timings2 = &pmif->timings[unit+2]; - + + /* Copy timings to local image */ + tl[0] = *timings; + tl[1] = *timings2; + switch(speed) { #ifdef CONFIG_BLK_DEV_IDEDMA_PMAC case XFER_UDMA_6: - if (pmif->kind != controller_sh_ata6) - return 1; case XFER_UDMA_5: - if (pmif->kind != controller_un_ata6 && - pmif->kind != controller_k2_ata6 && - pmif->kind != controller_sh_ata6) - return 1; case XFER_UDMA_4: case XFER_UDMA_3: - if (drive->hwif->cbl != ATA_CBL_PATA80) - return 1; case XFER_UDMA_2: case XFER_UDMA_1: case XFER_UDMA_0: if (pmif->kind == controller_kl_ata4) - ret = set_timings_udma_ata4(timings, speed); + ret = set_timings_udma_ata4(&tl[0], speed); else if (pmif->kind == controller_un_ata6 || pmif->kind == controller_k2_ata6) - ret = set_timings_udma_ata6(timings, timings2, speed); + ret = set_timings_udma_ata6(&tl[0], &tl[1], speed); else if (pmif->kind == controller_sh_ata6) - ret = set_timings_udma_shasta(timings, timings2, speed); + ret = set_timings_udma_shasta(&tl[0], &tl[1], speed); else - ret = 1; + ret = 1; break; case XFER_MW_DMA_2: case XFER_MW_DMA_1: case XFER_MW_DMA_0: - ret = set_timings_mdma(drive, pmif->kind, timings, timings2, speed, 0); + set_timings_mdma(drive, pmif->kind, &tl[0], &tl[1], speed); break; case XFER_SW_DMA_2: case XFER_SW_DMA_1: case XFER_SW_DMA_0: - return 1; + return; #endif /* CONFIG_BLK_DEV_IDEDMA_PMAC */ - case XFER_PIO_4: - case XFER_PIO_3: - case XFER_PIO_2: - case XFER_PIO_1: - case XFER_PIO_0: - pmac_ide_tuneproc(drive, speed & 0x07); - break; default: ret = 1; } if (ret) - return ret; + return; - ret = pmac_ide_do_setfeature(drive, speed); - if (ret) - return ret; - - pmac_ide_do_update_timings(drive); + /* Apply timings to controller */ + *timings = tl[0]; + *timings2 = tl[1]; - return 0; + pmac_ide_do_update_timings(drive); } /* @@ -1250,15 +1132,19 @@ pmac_ide_setup_device(pmac_ide_hwif_t *pmif, ide_hwif_t *hwif) hwif->cbl = pmif->cable_80 ? ATA_CBL_PATA80 : ATA_CBL_PATA40; hwif->drives[0].unmask = 1; hwif->drives[1].unmask = 1; + hwif->drives[0].autotune = IDE_TUNE_AUTO; + hwif->drives[1].autotune = IDE_TUNE_AUTO; + hwif->host_flags = IDE_HFLAG_SET_PIO_MODE_KEEP_DMA | + IDE_HFLAG_POST_SET_MODE; hwif->pio_mask = ATA_PIO4; - hwif->tuneproc = pmac_ide_tuneproc; + hwif->set_pio_mode = pmac_ide_set_pio_mode; if (pmif->kind == controller_un_ata6 || pmif->kind == controller_k2_ata6 || pmif->kind == controller_sh_ata6) hwif->selectproc = pmac_ide_kauai_selectproc; else hwif->selectproc = pmac_ide_selectproc; - hwif->speedproc = pmac_ide_tune_chipset; + hwif->set_dma_mode = pmac_ide_set_dma_mode; printk(KERN_INFO "ide%d: Found Apple %s controller, bus ID %d%s, irq %d\n", hwif->index, model_name[pmif->kind], pmif->aapl_bus_id, @@ -1535,17 +1421,12 @@ static struct macio_driver pmac_ide_macio_driver = .resume = pmac_ide_macio_resume, }; -static struct pci_device_id pmac_ide_pci_match[] = { - { PCI_VENDOR_ID_APPLE, PCI_DEVICE_ID_APPLE_UNI_N_ATA, - PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, - { PCI_VENDOR_ID_APPLE, PCI_DEVICE_ID_APPLE_IPID_ATA100, - PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, - { PCI_VENDOR_ID_APPLE, PCI_DEVICE_ID_APPLE_K2_ATA100, - PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, - { PCI_VENDOR_ID_APPLE, PCI_DEVICE_ID_APPLE_SH_ATA, - PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, - { PCI_VENDOR_ID_APPLE, PCI_DEVICE_ID_APPLE_IPID2_ATA, - PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, +static const struct pci_device_id pmac_ide_pci_match[] = { + { PCI_VDEVICE(APPLE, PCI_DEVICE_ID_APPLE_UNI_N_ATA), 0 }, + { PCI_VDEVICE(APPLE, PCI_DEVICE_ID_APPLE_IPID_ATA100), 0 }, + { PCI_VDEVICE(APPLE, PCI_DEVICE_ID_APPLE_K2_ATA100), 0 }, + { PCI_VDEVICE(APPLE, PCI_DEVICE_ID_APPLE_SH_ATA), 0 }, + { PCI_VDEVICE(APPLE, PCI_DEVICE_ID_APPLE_IPID2_ATA), 0 }, {}, }; @@ -1653,7 +1534,7 @@ pmac_ide_build_dmatable(ide_drive_t *drive, struct request *rq) cur_len -= tc; ++table; } - sg++; + sg = sg_next(sg); i--; } @@ -1693,141 +1574,6 @@ pmac_ide_destroy_dmatable (ide_drive_t *drive) } /* - * Pick up best MDMA timing for the drive and apply it - */ -static int -pmac_ide_mdma_enable(ide_drive_t *drive, u16 mode) -{ - ide_hwif_t *hwif = HWIF(drive); - pmac_ide_hwif_t* pmif = (pmac_ide_hwif_t *)hwif->hwif_data; - int drive_cycle_time; - struct hd_driveid *id = drive->id; - u32 *timings, *timings2; - u32 timing_local[2]; - int ret; - - /* which drive is it ? */ - timings = &pmif->timings[drive->select.b.unit & 0x01]; - timings2 = &pmif->timings[(drive->select.b.unit & 0x01) + 2]; - - /* Check if drive provide explicit cycle time */ - if ((id->field_valid & 2) && (id->eide_dma_time)) - drive_cycle_time = id->eide_dma_time; - else - drive_cycle_time = 0; - - /* Copy timings to local image */ - timing_local[0] = *timings; - timing_local[1] = *timings2; - - /* Calculate controller timings */ - ret = set_timings_mdma( drive, pmif->kind, - &timing_local[0], - &timing_local[1], - mode, - drive_cycle_time); - if (ret) - return 0; - - /* Set feature on drive */ - printk(KERN_INFO "%s: Enabling MultiWord DMA %d\n", drive->name, mode & 0xf); - ret = pmac_ide_do_setfeature(drive, mode); - if (ret) { - printk(KERN_WARNING "%s: Failed !\n", drive->name); - return 0; - } - - /* Apply timings to controller */ - *timings = timing_local[0]; - *timings2 = timing_local[1]; - - return 1; -} - -/* - * Pick up best UDMA timing for the drive and apply it - */ -static int -pmac_ide_udma_enable(ide_drive_t *drive, u16 mode) -{ - ide_hwif_t *hwif = HWIF(drive); - pmac_ide_hwif_t* pmif = (pmac_ide_hwif_t *)hwif->hwif_data; - u32 *timings, *timings2; - u32 timing_local[2]; - int ret; - - /* which drive is it ? */ - timings = &pmif->timings[drive->select.b.unit & 0x01]; - timings2 = &pmif->timings[(drive->select.b.unit & 0x01) + 2]; - - /* Copy timings to local image */ - timing_local[0] = *timings; - timing_local[1] = *timings2; - - /* Calculate timings for interface */ - if (pmif->kind == controller_un_ata6 - || pmif->kind == controller_k2_ata6) - ret = set_timings_udma_ata6( &timing_local[0], - &timing_local[1], - mode); - else if (pmif->kind == controller_sh_ata6) - ret = set_timings_udma_shasta( &timing_local[0], - &timing_local[1], - mode); - else - ret = set_timings_udma_ata4(&timing_local[0], mode); - if (ret) - return 0; - - /* Set feature on drive */ - printk(KERN_INFO "%s: Enabling Ultra DMA %d\n", drive->name, mode & 0x0f); - ret = pmac_ide_do_setfeature(drive, mode); - if (ret) { - printk(KERN_WARNING "%s: Failed !\n", drive->name); - return 0; - } - - /* Apply timings to controller */ - *timings = timing_local[0]; - *timings2 = timing_local[1]; - - return 1; -} - -/* - * Check what is the best DMA timing setting for the drive and - * call appropriate functions to apply it. - */ -static int -pmac_ide_dma_check(ide_drive_t *drive) -{ - struct hd_driveid *id = drive->id; - ide_hwif_t *hwif = HWIF(drive); - int enable = 1; - drive->using_dma = 0; - - if (drive->media == ide_floppy) - enable = 0; - if (((id->capability & 1) == 0) && !__ide_dma_good_drive(drive)) - enable = 0; - if (__ide_dma_bad_drive(drive)) - enable = 0; - - if (enable) { - u8 mode = ide_max_dma_mode(drive); - - if (mode >= XFER_UDMA_0) - drive->using_dma = pmac_ide_udma_enable(drive, mode); - else if (mode >= XFER_MW_DMA_0) - drive->using_dma = pmac_ide_mdma_enable(drive, mode); - hwif->OUTB(0, IDE_CONTROL_REG); - /* Apply settings to controller */ - pmac_ide_do_update_timings(drive); - } - return 0; -} - -/* * Prepare a DMA transfer. We build the DMA table, adjust the timings for * a read on KeyLargo ATA/66 and mark us as waiting for DMA completion */ @@ -2024,7 +1770,6 @@ pmac_ide_setup_dma(pmac_ide_hwif_t *pmif, ide_hwif_t *hwif) hwif->dma_off_quietly = &ide_dma_off_quietly; hwif->ide_dma_on = &__ide_dma_on; - hwif->ide_dma_check = &pmac_ide_dma_check; hwif->dma_setup = &pmac_ide_dma_setup; hwif->dma_exec_cmd = &pmac_ide_dma_exec_cmd; hwif->dma_start = &pmac_ide_dma_start; @@ -2035,7 +1780,6 @@ pmac_ide_setup_dma(pmac_ide_hwif_t *pmif, ide_hwif_t *hwif) hwif->dma_timeout = &ide_dma_timeout; hwif->dma_lost_irq = &pmac_ide_dma_lost_irq; - hwif->atapi_dma = 1; switch(pmif->kind) { case controller_sh_ata6: hwif->ultra_mask = pmif->cable_80 ? 0x7f : 0x07; @@ -2058,7 +1802,7 @@ pmac_ide_setup_dma(pmac_ide_hwif_t *pmif, ide_hwif_t *hwif) hwif->mwdma_mask = 0x07; hwif->swdma_mask = 0x00; break; - } + } } #endif /* CONFIG_BLK_DEV_IDEDMA_PMAC */ diff --git a/drivers/ide/setup-pci.c b/drivers/ide/setup-pci.c index 1129f8c3084..fff567bcedb 100644 --- a/drivers/ide/setup-pci.c +++ b/drivers/ide/setup-pci.c @@ -145,74 +145,36 @@ static int ide_setup_pci_baseregs (struct pci_dev *dev, const char *name) } #ifdef CONFIG_BLK_DEV_IDEDMA_PCI - -#ifdef CONFIG_BLK_DEV_IDEDMA_FORCED -/* - * Long lost data from 2.0.34 that is now in 2.0.39 - * - * This was used in ./drivers/block/triton.c to do DMA Base address setup - * when PnP failed. Oh the things we forget. I believe this was part - * of SFF-8038i that has been withdrawn from public access... :-(( - */ -#define DEFAULT_BMIBA 0xe800 /* in case BIOS did not init it */ -#define DEFAULT_BMCRBA 0xcc00 /* VIA's default value */ -#define DEFAULT_BMALIBA 0xd400 /* ALI's default value */ -#endif /* CONFIG_BLK_DEV_IDEDMA_FORCED */ - /** * ide_get_or_set_dma_base - setup BMIBA + * @d: IDE pci device data * @hwif: Interface * - * Fetch the DMA Bus-Master-I/O-Base-Address (BMIBA) from PCI space: - * If need be we set up the DMA base. Where a device has a partner that - * is already in DMA mode we check and enforce IDE simplex rules. + * Fetch the DMA Bus-Master-I/O-Base-Address (BMIBA) from PCI space. + * Where a device has a partner that is already in DMA mode we check + * and enforce IDE simplex rules. */ -static unsigned long ide_get_or_set_dma_base (ide_hwif_t *hwif) +static unsigned long ide_get_or_set_dma_base(ide_pci_device_t *d, ide_hwif_t *hwif) { unsigned long dma_base = 0; struct pci_dev *dev = hwif->pci_dev; -#ifdef CONFIG_BLK_DEV_IDEDMA_FORCED - int second_chance = 0; - -second_chance_to_dma: -#endif /* CONFIG_BLK_DEV_IDEDMA_FORCED */ - if (hwif->mmio) return hwif->dma_base; if (hwif->mate && hwif->mate->dma_base) { dma_base = hwif->mate->dma_base - (hwif->channel ? 0 : 8); } else { - dma_base = pci_resource_start(dev, 4); - if (!dma_base) { - printk(KERN_ERR "%s: dma_base is invalid\n", - hwif->cds->name); - } - } + u8 baridx = (d->host_flags & IDE_HFLAG_CS5520) ? 2 : 4; -#ifdef CONFIG_BLK_DEV_IDEDMA_FORCED - /* FIXME - should use pci_assign_resource surely */ - if ((!dma_base) && (!second_chance)) { - unsigned long set_bmiba = 0; - second_chance++; - switch(dev->vendor) { - case PCI_VENDOR_ID_AL: - set_bmiba = DEFAULT_BMALIBA; break; - case PCI_VENDOR_ID_VIA: - set_bmiba = DEFAULT_BMCRBA; break; - case PCI_VENDOR_ID_INTEL: - set_bmiba = DEFAULT_BMIBA; break; - default: - return dma_base; - } - pci_write_config_dword(dev, 0x20, set_bmiba|1); - goto second_chance_to_dma; + dma_base = pci_resource_start(dev, baridx); + + if (dma_base == 0) + printk(KERN_ERR "%s: DMA base is invalid\n", d->name); } -#endif /* CONFIG_BLK_DEV_IDEDMA_FORCED */ - if (dma_base) { + if ((d->host_flags & IDE_HFLAG_CS5520) == 0 && dma_base) { u8 simplex_stat = 0; dma_base += hwif->channel ? 8 : 0; @@ -223,13 +185,13 @@ second_chance_to_dma: case PCI_DEVICE_ID_CMD_643: case PCI_DEVICE_ID_SERVERWORKS_CSB5IDE: case PCI_DEVICE_ID_REVOLUTION: - simplex_stat = hwif->INB(dma_base + 2); - hwif->OUTB((simplex_stat&0x60),(dma_base + 2)); - simplex_stat = hwif->INB(dma_base + 2); + simplex_stat = inb(dma_base + 2); + outb(simplex_stat & 0x60, dma_base + 2); + simplex_stat = inb(dma_base + 2); if (simplex_stat & 0x80) { printk(KERN_INFO "%s: simplex device: " - "DMA forced\n", - hwif->cds->name); + "DMA forced\n", + d->name); } break; default: @@ -252,8 +214,8 @@ second_chance_to_dma: */ if (hwif->mate && hwif->mate->dma_base) { printk(KERN_INFO "%s: simplex device: " - "DMA disabled\n", - hwif->cds->name); + "DMA disabled\n", + d->name); dma_base = 0; } } @@ -400,6 +362,7 @@ static ide_hwif_t *ide_hwif_configure(struct pci_dev *dev, ide_pci_device_t *d, { unsigned long ctl = 0, base = 0; ide_hwif_t *hwif; + u8 bootable = (d->host_flags & IDE_HFLAG_BOOTABLE) ? 1 : 0; if ((d->host_flags & IDE_HFLAG_ISA_PORTS) == 0) { /* Possibly we should fail if these checks report true */ @@ -420,7 +383,7 @@ static ide_hwif_t *ide_hwif_configure(struct pci_dev *dev, ide_pci_device_t *d, ctl = port ? 0x374 : 0x3f4; base = port ? 0x170 : 0x1f0; } - if ((hwif = ide_match_hwif(base, d->bootable, d->name)) == NULL) + if ((hwif = ide_match_hwif(base, bootable, d->name)) == NULL) return NULL; /* no room in ide_hwifs[] */ if (hwif->io_ports[IDE_DATA_OFFSET] != base || hwif->io_ports[IDE_CONTROL_OFFSET] != (ctl | 2)) { @@ -467,19 +430,18 @@ static void ide_hwif_setup_dma(struct pci_dev *dev, ide_pci_device_t *d, ide_hwi static void ide_hwif_setup_dma(struct pci_dev *dev, ide_pci_device_t *d, ide_hwif_t *hwif) { u16 pcicmd; + pci_read_config_word(dev, PCI_COMMAND, &pcicmd); - if ((d->autodma == AUTODMA) || + if ((d->host_flags & IDE_HFLAG_NO_AUTODMA) == 0 || ((dev->class >> 8) == PCI_CLASS_STORAGE_IDE && (dev->class & 0x80))) { - unsigned long dma_base = ide_get_or_set_dma_base(hwif); + unsigned long dma_base = ide_get_or_set_dma_base(d, hwif); if (dma_base && !(pcicmd & PCI_COMMAND_MASTER)) { /* * Set up BM-DMA capability * (PnP BIOS should have done this) */ - /* default DMA off if we had to configure it here */ - hwif->autodma = 0; pci_set_master(dev); if (pci_read_config_word(dev, PCI_COMMAND, &pcicmd) || !(pcicmd & PCI_COMMAND_MASTER)) { printk(KERN_ERR "%s: %s error updating PCICMD\n", @@ -516,7 +478,6 @@ static void ide_hwif_setup_dma(struct pci_dev *dev, ide_pci_device_t *d, ide_hwi static int ide_setup_pci_controller(struct pci_dev *dev, ide_pci_device_t *d, int noisy, int *config) { int ret; - u32 class_rev; u16 pcicmd; if (noisy) @@ -539,10 +500,9 @@ static int ide_setup_pci_controller(struct pci_dev *dev, ide_pci_device_t *d, in printk(KERN_INFO "%s: device enabled (Linux)\n", d->name); } - pci_read_config_dword(dev, PCI_CLASS_REVISION, &class_rev); - class_rev &= 0xff; if (noisy) - printk(KERN_INFO "%s: chipset revision %d\n", d->name, class_rev); + printk(KERN_INFO "%s: chipset revision %d\n", + d->name, dev->revision); out: return ret; } @@ -599,17 +559,27 @@ void ide_pci_setup_ports(struct pci_dev *dev, ide_pci_device_t *d, int pciirq, a if (d->init_iops) d->init_iops(hwif); - if (d->autodma == NODMA) - goto bypass_legacy_dma; - - if(d->init_setup_dma) - d->init_setup_dma(dev, d, hwif); - else + if ((d->host_flags & IDE_HFLAG_NO_DMA) == 0) ide_hwif_setup_dma(dev, d, hwif); -bypass_legacy_dma: + + if ((d->host_flags & IDE_HFLAG_LEGACY_IRQS) && hwif->irq == 0) + hwif->irq = port ? 15 : 14; + hwif->host_flags = d->host_flags; hwif->pio_mask = d->pio_mask; + if ((d->host_flags & IDE_HFLAG_SERIALIZE) && hwif->mate) + hwif->mate->serialized = hwif->serialized = 1; + + if (hwif->dma_base) { + hwif->swdma_mask = d->swdma_mask; + hwif->mwdma_mask = d->mwdma_mask; + hwif->ultra_mask = d->udma_mask; + } + + hwif->drives[0].autotune = 1; + hwif->drives[1].autotune = 1; + if (d->init_hwif) /* Call chipset-specific routine * for each enabled hwif |