diff options
Diffstat (limited to 'drivers/ide')
71 files changed, 1310 insertions, 2020 deletions
diff --git a/drivers/ide/Kconfig b/drivers/ide/Kconfig index 6d9fd92763f..6eaece96524 100644 --- a/drivers/ide/Kconfig +++ b/drivers/ide/Kconfig @@ -1056,6 +1056,9 @@ endif config BLK_DEV_IDEDMA def_bool BLK_DEV_IDEDMA_PCI || BLK_DEV_IDEDMA_PMAC || BLK_DEV_IDEDMA_ICS || BLK_DEV_IDE_AU1XXX_MDMA2_DBDMA +config IDE_ARCH_OBSOLETE_INIT + def_bool ALPHA || (ARM && !ARCH_L7200) || BLACKFIN || X86 || IA64 || M32R || MIPS || PARISC || PPC || (SUPERH64 && BLK_DEV_IDEPCI) || SPARC + endif config BLK_DEV_HD_ONLY diff --git a/drivers/ide/arm/bast-ide.c b/drivers/ide/arm/bast-ide.c index f7449d04114..48db6167bb9 100644 --- a/drivers/ide/arm/bast-ide.c +++ b/drivers/ide/arm/bast-ide.c @@ -45,7 +45,7 @@ bastide_register(unsigned int base, unsigned int aux, int irq, hw.io_ports[IDE_CONTROL_OFFSET] = aux + (6 * 0x20); hw.irq = irq; - ide_register_hw(&hw, 0, hwif); + ide_register_hw(&hw, NULL, 0, hwif); return 0; } diff --git a/drivers/ide/arm/icside.c b/drivers/ide/arm/icside.c index e4875cef78b..410a0d13e35 100644 --- a/drivers/ide/arm/icside.c +++ b/drivers/ide/arm/icside.c @@ -316,27 +316,29 @@ static int icside_dma_end(ide_drive_t *drive) drive->waiting_for_dma = 0; - disable_dma(hwif->hw.dma); + disable_dma(state->dev->dma); /* Teardown mappings after DMA has completed. */ dma_unmap_sg(state->dev, hwif->sg_table, hwif->sg_nents, hwif->sg_dma_direction); - return get_dma_residue(hwif->hw.dma) != 0; + return get_dma_residue(state->dev->dma) != 0; } static void icside_dma_start(ide_drive_t *drive) { ide_hwif_t *hwif = HWIF(drive); + struct icside_state *state = hwif->hwif_data; /* We can not enable DMA on both channels simultaneously. */ - BUG_ON(dma_channel_active(hwif->hw.dma)); - enable_dma(hwif->hw.dma); + BUG_ON(dma_channel_active(state->dev->dma)); + enable_dma(state->dev->dma); } static int icside_dma_setup(ide_drive_t *drive) { ide_hwif_t *hwif = HWIF(drive); + struct icside_state *state = hwif->hwif_data; struct request *rq = hwif->hwgroup->rq; unsigned int dma_mode; @@ -348,7 +350,7 @@ static int icside_dma_setup(ide_drive_t *drive) /* * We can not enable DMA on both channels. */ - BUG_ON(dma_channel_active(hwif->hw.dma)); + BUG_ON(dma_channel_active(state->dev->dma)); icside_build_sglist(drive, rq); @@ -365,14 +367,14 @@ static int icside_dma_setup(ide_drive_t *drive) /* * Select the correct timing for this drive. */ - set_dma_speed(hwif->hw.dma, drive->drive_data); + set_dma_speed(state->dev->dma, drive->drive_data); /* * Tell the DMA engine about the SG table and * data direction. */ - set_dma_sg(hwif->hw.dma, hwif->sg_table, hwif->sg_nents); - set_dma_mode(hwif->hw.dma, dma_mode); + set_dma_sg(state->dev->dma, hwif->sg_table, hwif->sg_nents); + set_dma_mode(state->dev->dma, dma_mode); drive->waiting_for_dma = 1; @@ -415,7 +417,6 @@ static void icside_dma_lost_irq(ide_drive_t *drive) static void icside_dma_init(ide_hwif_t *hwif) { - hwif->atapi_dma = 1; hwif->mwdma_mask = 7; /* MW0..2 */ hwif->swdma_mask = 7; /* SW0..2 */ @@ -439,40 +440,16 @@ static void icside_dma_init(ide_hwif_t *hwif) #define icside_dma_init(hwif) (0) #endif -static ide_hwif_t *icside_find_hwif(unsigned long dataport) -{ - ide_hwif_t *hwif; - int index; - - for (index = 0; index < MAX_HWIFS; ++index) { - hwif = &ide_hwifs[index]; - if (hwif->io_ports[IDE_DATA_OFFSET] == dataport) - goto found; - } - - for (index = 0; index < MAX_HWIFS; ++index) { - hwif = &ide_hwifs[index]; - if (!hwif->io_ports[IDE_DATA_OFFSET]) - goto found; - } - - hwif = NULL; -found: - return hwif; -} - static ide_hwif_t * icside_setup(void __iomem *base, struct cardinfo *info, struct expansion_card *ec) { unsigned long port = (unsigned long)base + info->dataoffset; ide_hwif_t *hwif; - hwif = icside_find_hwif(port); + hwif = ide_find_port(port); if (hwif) { int i; - memset(&hwif->hw, 0, sizeof(hw_regs_t)); - /* * Ensure we're using MMIO */ @@ -480,13 +457,10 @@ icside_setup(void __iomem *base, struct cardinfo *info, struct expansion_card *e hwif->mmio = 1; for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++) { - hwif->hw.io_ports[i] = port; hwif->io_ports[i] = port; port += 1 << info->stepping; } - hwif->hw.io_ports[IDE_CONTROL_OFFSET] = (unsigned long)base + info->ctrloffset; hwif->io_ports[IDE_CONTROL_OFFSET] = (unsigned long)base + info->ctrloffset; - hwif->hw.irq = ec->irq; hwif->irq = ec->irq; hwif->noprobe = 0; hwif->chipset = ide_acorn; @@ -501,6 +475,7 @@ icside_register_v5(struct icside_state *state, struct expansion_card *ec) { ide_hwif_t *hwif; void __iomem *base; + u8 idx[4] = { 0xff, 0xff, 0xff, 0xff }; base = ecardm_iomap(ec, ECARD_RES_MEMC, 0, 0); if (!base) @@ -524,9 +499,9 @@ icside_register_v5(struct icside_state *state, struct expansion_card *ec) state->hwif[0] = hwif; - probe_hwif_init(hwif); + idx[0] = hwif->index; - ide_proc_register_port(hwif); + ide_device_add(idx); return 0; } @@ -538,6 +513,7 @@ icside_register_v6(struct icside_state *state, struct expansion_card *ec) void __iomem *ioc_base, *easi_base; unsigned int sel = 0; int ret; + u8 idx[4] = { 0xff, 0xff, 0xff, 0xff }; ioc_base = ecardm_iomap(ec, ECARD_RES_IOCFAST, 0, 0); if (!ioc_base) { @@ -593,7 +569,6 @@ icside_register_v6(struct icside_state *state, struct expansion_card *ec) hwif->serialized = 1; hwif->config_data = (unsigned long)ioc_base; hwif->select_data = sel; - hwif->hw.dma = ec->dma; mate->maskproc = icside_maskproc; mate->channel = 1; @@ -602,18 +577,16 @@ icside_register_v6(struct icside_state *state, struct expansion_card *ec) mate->serialized = 1; mate->config_data = (unsigned long)ioc_base; mate->select_data = sel | 1; - mate->hw.dma = ec->dma; if (ec->dma != NO_DMA && !request_dma(ec->dma, hwif->name)) { icside_dma_init(hwif); icside_dma_init(mate); } - probe_hwif_init(hwif); - probe_hwif_init(mate); + idx[0] = hwif->index; + idx[1] = mate->index; - ide_proc_register_port(hwif); - ide_proc_register_port(mate); + ide_device_add(idx); return 0; diff --git a/drivers/ide/arm/ide_arm.c b/drivers/ide/arm/ide_arm.c index bce2bec8141..8957cbadf5c 100644 --- a/drivers/ide/arm/ide_arm.c +++ b/drivers/ide/arm/ide_arm.c @@ -31,5 +31,5 @@ void __init ide_arm_init(void) memset(&hw, 0, sizeof(hw)); ide_std_init_ports(&hw, IDE_ARM_IO, IDE_ARM_IO + 0x206); hw.irq = IDE_ARM_IRQ; - ide_register_hw(&hw, 1, NULL); + ide_register_hw(&hw, NULL, 1, NULL); } diff --git a/drivers/ide/arm/rapide.c b/drivers/ide/arm/rapide.c index 83811af1161..0775a3afef4 100644 --- a/drivers/ide/arm/rapide.c +++ b/drivers/ide/arm/rapide.c @@ -13,42 +13,25 @@ #include <asm/ecard.h> -/* - * Something like this really should be in generic code, but isn't. - */ static ide_hwif_t * rapide_locate_hwif(void __iomem *base, void __iomem *ctrl, unsigned int sz, int irq) { unsigned long port = (unsigned long)base; - ide_hwif_t *hwif; - int index, i; - - for (index = 0; index < MAX_HWIFS; ++index) { - hwif = ide_hwifs + index; - if (hwif->io_ports[IDE_DATA_OFFSET] == port) - goto found; - } - - for (index = 0; index < MAX_HWIFS; ++index) { - hwif = ide_hwifs + index; - if (hwif->io_ports[IDE_DATA_OFFSET] == 0) - goto found; - } + ide_hwif_t *hwif = ide_find_port(port); + int i; - return NULL; + if (hwif == NULL) + goto out; - found: for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++) { - hwif->hw.io_ports[i] = port; hwif->io_ports[i] = port; port += sz; } - hwif->hw.io_ports[IDE_CONTROL_OFFSET] = (unsigned long)ctrl; hwif->io_ports[IDE_CONTROL_OFFSET] = (unsigned long)ctrl; - hwif->hw.irq = hwif->irq = irq; + hwif->irq = irq; hwif->mmio = 1; default_hwif_mmiops(hwif); - +out: return hwif; } @@ -58,6 +41,7 @@ rapide_probe(struct expansion_card *ec, const struct ecard_id *id) ide_hwif_t *hwif; void __iomem *base; int ret; + u8 idx[4] = { 0xff, 0xff, 0xff, 0xff }; ret = ecard_request_resources(ec); if (ret) @@ -74,8 +58,11 @@ rapide_probe(struct expansion_card *ec, const struct ecard_id *id) hwif->hwif_data = base; hwif->gendev.parent = &ec->dev; hwif->noprobe = 0; - probe_hwif_init(hwif); - ide_proc_register_port(hwif); + + idx[0] = hwif->index; + + ide_device_add(idx); + ecard_set_drvdata(ec, hwif); goto out; } diff --git a/drivers/ide/cris/ide-cris.c b/drivers/ide/cris/ide-cris.c index 06c75f18eb8..e196aefa207 100644 --- a/drivers/ide/cris/ide-cris.c +++ b/drivers/ide/cris/ide-cris.c @@ -782,7 +782,7 @@ init_e100_ide (void) ide_offsets, 0, 0, cris_ide_ack_intr, ide_default_irq(0)); - ide_register_hw(&hw, 1, &hwif); + ide_register_hw(&hw, NULL, 1, &hwif); hwif->mmio = 1; hwif->chipset = ide_etrax100; hwif->set_pio_mode = &cris_set_pio_mode; @@ -805,6 +805,7 @@ init_e100_ide (void) hwif->dma_host_on = &cris_dma_on; hwif->dma_off_quietly = &cris_dma_off; hwif->cbl = ATA_CBL_PATA40; + hwif->host_flags |= IDE_HFLAG_NO_ATAPI_DMA; hwif->pio_mask = ATA_PIO4, hwif->drives[0].autotune = 1; hwif->drives[1].autotune = 1; @@ -934,11 +935,11 @@ static int cris_ide_build_dmatable (ide_drive_t *drive) * than two possibly non-adjacent physical 4kB pages. */ /* group sequential buffers into one large buffer */ - addr = page_to_phys(sg->page) + sg->offset; + addr = sg_phys(sg); size = sg_dma_len(sg); while (--i) { sg = sg_next(sg); - if ((addr + size) != page_to_phys(sg->page) + sg->offset) + if ((addr + size) != sg_phys(sg)) break; size += sg_dma_len(sg); } diff --git a/drivers/ide/h8300/ide-h8300.c b/drivers/ide/h8300/ide-h8300.c index 6d26ad7360d..4a49b5c59ac 100644 --- a/drivers/ide/h8300/ide-h8300.c +++ b/drivers/ide/h8300/ide-h8300.c @@ -68,7 +68,6 @@ static inline void hw_setup(hw_regs_t *hw) hw->io_ports[i] = CONFIG_H8300_IDE_BASE + H8300_IDE_GAP*i; hw->io_ports[IDE_CONTROL_OFFSET] = CONFIG_H8300_IDE_ALT; hw->irq = EXT_IRQ0 + CONFIG_H8300_IDE_IRQ; - hw->dma = NO_DMA; hw->chipset = ide_generic; } @@ -101,7 +100,7 @@ void __init h8300_ide_init(void) hw_setup(&hw); /* register if */ - idx = ide_register_hw(&hw, 1, &hwif); + idx = ide_register_hw(&hw, NULL, 1, &hwif); if (idx == -1) { printk(KERN_ERR "ide-h8300: IDE I/F register failed\n"); return; diff --git a/drivers/ide/ide-acpi.c b/drivers/ide/ide-acpi.c index 1d5f6823101..89df48fdc69 100644 --- a/drivers/ide/ide-acpi.c +++ b/drivers/ide/ide-acpi.c @@ -350,7 +350,7 @@ static int taskfile_load_raw(ide_drive_t *drive, memset(&args, 0, sizeof(ide_task_t)); args.command_type = IDE_DRIVE_TASK_NO_DATA; - args.data_phase = TASKFILE_IN; + args.data_phase = TASKFILE_NO_DATA; args.handler = &task_no_data_intr; /* convert gtf to IDE Taskfile */ diff --git a/drivers/ide/ide-cd.c b/drivers/ide/ide-cd.c index ca843522f91..57a5f63d6ae 100644 --- a/drivers/ide/ide-cd.c +++ b/drivers/ide/ide-cd.c @@ -120,7 +120,7 @@ * Reformat to match kernel tabbing style. * Add CDROM_GET_UPC ioctl. * 3.10 Apr 10, 1996 -- Fix compilation error with STANDARD_ATAPI. - * 3.11 Apr 29, 1996 -- Patch from Heiko Eissfeldt <heiko@colossus.escape.de> + * 3.11 Apr 29, 1996 -- Patch from Heiko Eißfeldt <heiko@colossus.escape.de> * to remove redundant verify_area calls. * 3.12 May 7, 1996 -- Rudimentary changer support. Based on patches * from Gerhard Zuber <zuber@berlin.snafu.de>. @@ -256,7 +256,7 @@ * - Minimize the TOC reading - only do it when we * know a media change has occurred. * - Moved all the CDROMREADx ioctls to the Uniform layer. - * - Heiko Eissfeldt <heiko@colossus.escape.de> supplied + * - Heiko Eißfeldt <heiko@colossus.escape.de> supplied * some fixes for CDI. * - CD-ROM leaving door locked fix from Andries * Brouwer <Andries.Brouwer@cwi.nl> @@ -2341,7 +2341,7 @@ static int cdrom_read_toc(ide_drive_t *drive, struct request_sense *sense) If we get an error for the regular case, we assume a CDI without additional audio tracks. In this case the readable TOC is empty (CDI tracks are not included) - and only holds the Leadout entry. Heiko Eißfeldt */ + and only holds the Leadout entry. Heiko Eißfeldt */ ntracks = 0; stat = cdrom_read_tocentry(drive, CDROM_LEADOUT, 1, 0, (char *)&toc->hdr, diff --git a/drivers/ide/ide-disk.c b/drivers/ide/ide-disk.c index 92177ca48b4..00123d99527 100644 --- a/drivers/ide/ide-disk.c +++ b/drivers/ide/ide-disk.c @@ -169,7 +169,7 @@ static ide_startstop_t __ide_do_rw_disk(ide_drive_t *drive, struct request *rq, nsectors.all = (u16) rq->nr_sectors; - if (hwif->no_lba48_dma && lba48 && dma) { + if ((hwif->host_flags & IDE_HFLAG_NO_LBA48_DMA) && lba48 && dma) { if (block + rq->nr_sectors > 1ULL << 28) dma = 0; else @@ -593,28 +593,12 @@ static int smart_enable(ide_drive_t *drive) return ide_raw_taskfile(drive, &args, NULL); } -static int get_smart_values(ide_drive_t *drive, u8 *buf) +static int get_smart_data(ide_drive_t *drive, u8 *buf, u8 sub_cmd) { ide_task_t args; memset(&args, 0, sizeof(ide_task_t)); - args.tfRegister[IDE_FEATURE_OFFSET] = SMART_READ_VALUES; - args.tfRegister[IDE_NSECTOR_OFFSET] = 0x01; - args.tfRegister[IDE_LCYL_OFFSET] = SMART_LCYL_PASS; - args.tfRegister[IDE_HCYL_OFFSET] = SMART_HCYL_PASS; - args.tfRegister[IDE_COMMAND_OFFSET] = WIN_SMART; - args.command_type = IDE_DRIVE_TASK_IN; - args.data_phase = TASKFILE_IN; - args.handler = &task_in_intr; - (void) smart_enable(drive); - return ide_raw_taskfile(drive, &args, buf); -} - -static int get_smart_thresholds(ide_drive_t *drive, u8 *buf) -{ - ide_task_t args; - memset(&args, 0, sizeof(ide_task_t)); - args.tfRegister[IDE_FEATURE_OFFSET] = SMART_READ_THRESHOLDS; + args.tfRegister[IDE_FEATURE_OFFSET] = sub_cmd; args.tfRegister[IDE_NSECTOR_OFFSET] = 0x01; args.tfRegister[IDE_LCYL_OFFSET] = SMART_LCYL_PASS; args.tfRegister[IDE_HCYL_OFFSET] = SMART_HCYL_PASS; @@ -656,7 +640,7 @@ static int proc_idedisk_read_smart_thresholds ide_drive_t *drive = (ide_drive_t *)data; int len = 0, i = 0; - if (!get_smart_thresholds(drive, page)) { + if (get_smart_data(drive, page, SMART_READ_THRESHOLDS) == 0) { unsigned short *val = (unsigned short *) page; char *out = ((char *)val) + (SECTOR_WORDS * 4); page = out; @@ -675,7 +659,7 @@ static int proc_idedisk_read_smart_values ide_drive_t *drive = (ide_drive_t *)data; int len = 0, i = 0; - if (!get_smart_values(drive, page)) { + if (get_smart_data(drive, page, SMART_READ_VALUES) == 0) { unsigned short *val = (unsigned short *) page; char *out = ((char *)val) + (SECTOR_WORDS * 4); page = out; @@ -856,7 +840,7 @@ static int set_lba_addressing(ide_drive_t *drive, int arg) drive->addressing = 0; - if (HWIF(drive)->no_lba48) + if (drive->hwif->host_flags & IDE_HFLAG_NO_LBA48) return 0; if (!idedisk_supports_lba48(drive->id)) @@ -889,6 +873,7 @@ static inline void idedisk_add_settings(ide_drive_t *drive) { ; } static void idedisk_setup (ide_drive_t *drive) { + ide_hwif_t *hwif = drive->hwif; struct hd_driveid *id = drive->id; unsigned long long capacity; @@ -909,7 +894,6 @@ static void idedisk_setup (ide_drive_t *drive) (void)set_lba_addressing(drive, 1); if (drive->addressing == 1) { - ide_hwif_t *hwif = HWIF(drive); int max_s = 2048; if (max_s > hwif->rqsize) @@ -932,7 +916,7 @@ static void idedisk_setup (ide_drive_t *drive) drive->capacity64 = 1ULL << 28; } - if (drive->hwif->no_lba48_dma && drive->addressing) { + if ((hwif->host_flags & IDE_HFLAG_NO_LBA48_DMA) && drive->addressing) { if (drive->capacity64 > 1ULL << 28) { printk(KERN_INFO "%s: cannot use LBA48 DMA - PIO mode will" " be used for accessing sectors > %u\n", diff --git a/drivers/ide/ide-dma.c b/drivers/ide/ide-dma.c index bc57ce6bf0b..428f7a8a00b 100644 --- a/drivers/ide/ide-dma.c +++ b/drivers/ide/ide-dma.c @@ -338,8 +338,10 @@ static int config_drive_for_dma (ide_drive_t *drive) ide_hwif_t *hwif = drive->hwif; struct hd_driveid *id = drive->id; - if (drive->media != ide_disk && hwif->atapi_dma == 0) - return 0; + if (drive->media != ide_disk) { + if (hwif->host_flags & IDE_HFLAG_NO_ATAPI_DMA) + return -1; + } /* * Enable DMA on any drive that has @@ -726,8 +728,10 @@ u8 ide_find_dma_mode(ide_drive_t *drive, u8 req_mode) int x, i; u8 mode = 0; - if (drive->media != ide_disk && hwif->atapi_dma == 0) - return 0; + if (drive->media != ide_disk) { + if (hwif->host_flags & IDE_HFLAG_NO_ATAPI_DMA) + return 0; + } for (i = 0; i < ARRAY_SIZE(xfer_mode_bases); i++) { if (req_mode < xfer_mode_bases[i]) @@ -897,10 +901,7 @@ void ide_dma_timeout (ide_drive_t *drive) EXPORT_SYMBOL(ide_dma_timeout); -/* - * Needed for allowing full modular support of ide-driver - */ -static int ide_release_dma_engine(ide_hwif_t *hwif) +static void ide_release_dma_engine(ide_hwif_t *hwif) { if (hwif->dmatable_cpu) { pci_free_consistent(hwif->pci_dev, @@ -909,7 +910,6 @@ static int ide_release_dma_engine(ide_hwif_t *hwif) hwif->dmatable_dma); hwif->dmatable_cpu = NULL; } - return 1; } static int ide_release_iomio_dma(ide_hwif_t *hwif) @@ -952,12 +952,6 @@ static int ide_mapped_mmio_dma(ide_hwif_t *hwif, unsigned long base, unsigned in { printk(KERN_INFO " %s: MMIO-DMA ", hwif->name); - hwif->dma_base = base; - - if(hwif->mate) - hwif->dma_master = (hwif->channel) ? hwif->mate->dma_base : base; - else - hwif->dma_master = base; return 0; } @@ -971,8 +965,6 @@ static int ide_iomio_dma(ide_hwif_t *hwif, unsigned long base, unsigned int port return 1; } - hwif->dma_base = base; - if (hwif->cds->extra) { hwif->extra_base = base + (hwif->channel ? 8 : 16); @@ -987,10 +979,6 @@ static int ide_iomio_dma(ide_hwif_t *hwif, unsigned long base, unsigned int port } } - if(hwif->mate) - hwif->dma_master = (hwif->channel) ? hwif->mate->dma_base:base; - else - hwif->dma_master = base; return 0; } @@ -1002,12 +990,9 @@ static int ide_dma_iobase(ide_hwif_t *hwif, unsigned long base, unsigned int por return ide_iomio_dma(hwif, base, ports); } -/* - * This can be called for a dynamically installed interface. Don't __init it - */ -void ide_setup_dma (ide_hwif_t *hwif, unsigned long dma_base, unsigned int num_ports) +void ide_setup_dma(ide_hwif_t *hwif, unsigned long base, unsigned num_ports) { - if (ide_dma_iobase(hwif, dma_base, num_ports)) + if (ide_dma_iobase(hwif, base, num_ports)) return; if (ide_allocate_dma_engine(hwif)) { @@ -1015,6 +1000,13 @@ void ide_setup_dma (ide_hwif_t *hwif, unsigned long dma_base, unsigned int num_p return; } + hwif->dma_base = base; + + if (hwif->mate) + hwif->dma_master = hwif->channel ? hwif->mate->dma_base : base; + else + hwif->dma_master = base; + if (!(hwif->dma_command)) hwif->dma_command = hwif->dma_base; if (!(hwif->dma_vendor1)) diff --git a/drivers/ide/ide-io.c b/drivers/ide/ide-io.c index ec835e37e72..c89f0d3058e 100644 --- a/drivers/ide/ide-io.c +++ b/drivers/ide/ide-io.c @@ -47,15 +47,15 @@ #include <linux/device.h> #include <linux/kmod.h> #include <linux/scatterlist.h> +#include <linux/bitops.h> #include <asm/byteorder.h> #include <asm/irq.h> #include <asm/uaccess.h> #include <asm/io.h> -#include <asm/bitops.h> static int __ide_end_request(ide_drive_t *drive, struct request *rq, - int uptodate, unsigned int nr_bytes) + int uptodate, unsigned int nr_bytes, int dequeue) { int ret = 1; @@ -80,9 +80,11 @@ static int __ide_end_request(ide_drive_t *drive, struct request *rq, if (!end_that_request_chunk(rq, uptodate, nr_bytes)) { add_disk_randomness(rq->rq_disk); - if (!list_empty(&rq->queuelist)) - blkdev_dequeue_request(rq); - HWGROUP(drive)->rq = NULL; + if (dequeue) { + if (!list_empty(&rq->queuelist)) + blkdev_dequeue_request(rq); + HWGROUP(drive)->rq = NULL; + } end_that_request_last(rq, uptodate); ret = 0; } @@ -122,7 +124,7 @@ int ide_end_request (ide_drive_t *drive, int uptodate, int nr_sectors) nr_bytes = rq->hard_cur_sectors << 9; } - ret = __ide_end_request(drive, rq, uptodate, nr_bytes); + ret = __ide_end_request(drive, rq, uptodate, nr_bytes, 1); spin_unlock_irqrestore(&ide_lock, flags); return ret; @@ -255,39 +257,13 @@ int ide_end_dequeued_request(ide_drive_t *drive, struct request *rq, int uptodate, int nr_sectors) { unsigned long flags; - int ret = 1; + int ret; spin_lock_irqsave(&ide_lock, flags); - BUG_ON(!blk_rq_started(rq)); - - /* - * if failfast is set on a request, override number of sectors and - * complete the whole request right now - */ - if (blk_noretry_request(rq) && end_io_error(uptodate)) - nr_sectors = rq->hard_nr_sectors; - - if (!blk_fs_request(rq) && end_io_error(uptodate) && !rq->errors) - rq->errors = -EIO; - - /* - * decide whether to reenable DMA -- 3 is a random magic for now, - * if we DMA timeout more than 3 times, just stay in PIO - */ - if (drive->state == DMA_PIO_RETRY && drive->retry_pio <= 3) { - drive->state = 0; - HWGROUP(drive)->hwif->ide_dma_on(drive); - } - - if (!end_that_request_first(rq, uptodate, nr_sectors)) { - add_disk_randomness(rq->rq_disk); - if (blk_rq_tagged(rq)) - blk_queue_end_tag(drive->queue, rq); - end_that_request_last(rq, uptodate); - ret = 0; - } + ret = __ide_end_request(drive, rq, uptodate, nr_sectors << 9, 0); spin_unlock_irqrestore(&ide_lock, flags); + return ret; } EXPORT_SYMBOL_GPL(ide_end_dequeued_request); @@ -484,7 +460,8 @@ static ide_startstop_t ide_ata_error(ide_drive_t *drive, struct request *rq, u8 } } - if ((stat & DRQ_STAT) && rq_data_dir(rq) == READ && hwif->err_stops_fifo == 0) + if ((stat & DRQ_STAT) && rq_data_dir(rq) == READ && + (hwif->host_flags & IDE_HFLAG_ERROR_STOPS_FIFO) == 0) try_to_flush_leftover_data(drive); if (rq->errors >= ERROR_MAX || blk_noretry_request(rq)) { @@ -799,7 +776,20 @@ static ide_startstop_t do_special (ide_drive_t *drive) s->b.set_tune = 0; if (set_pio_mode_abuse(drive->hwif, req_pio)) { - if (hwif->set_pio_mode) + + if (hwif->set_pio_mode == NULL) + return ide_stopped; + + /* + * take ide_lock for drive->[no_]unmask/[no_]io_32bit + */ + if (req_pio == 8 || req_pio == 9) { + unsigned long flags; + + spin_lock_irqsave(&ide_lock, flags); + hwif->set_pio_mode(drive, req_pio); + spin_unlock_irqrestore(&ide_lock, flags); + } else hwif->set_pio_mode(drive, req_pio); } else { int keep_dma = drive->using_dma; diff --git a/drivers/ide/ide-iops.c b/drivers/ide/ide-iops.c index d4d790f91f9..95168833d06 100644 --- a/drivers/ide/ide-iops.c +++ b/drivers/ide/ide-iops.c @@ -693,35 +693,16 @@ static u8 ide_auto_reduce_xfer (ide_drive_t *drive) } #endif /* CONFIG_BLK_DEV_IDEDMA */ -/* - * Update the - */ -int ide_driveid_update (ide_drive_t *drive) +int ide_driveid_update(ide_drive_t *drive) { - ide_hwif_t *hwif = HWIF(drive); + ide_hwif_t *hwif = drive->hwif; struct hd_driveid *id; -#if 0 - id = kmalloc(SECTOR_WORDS*4, GFP_ATOMIC); - if (!id) - return 0; - - taskfile_lib_get_identify(drive, (char *)&id); + unsigned long timeout, flags; - ide_fix_driveid(id); - if (id) { - drive->id->dma_ultra = id->dma_ultra; - drive->id->dma_mword = id->dma_mword; - drive->id->dma_1word = id->dma_1word; - /* anything more ? */ - kfree(id); - } - return 1; -#else /* * Re-read drive->id for possible DMA mode * change (copied from ide-probe.c) */ - unsigned long timeout, flags; SELECT_MASK(drive, 1); if (IDE_CONTROL_REG) @@ -763,7 +744,6 @@ int ide_driveid_update (ide_drive_t *drive) } return 1; -#endif } int ide_config_drive_speed(ide_drive_t *drive, u8 speed) diff --git a/drivers/ide/ide-pnp.c b/drivers/ide/ide-pnp.c index 2b8009c50e9..e245521af7b 100644 --- a/drivers/ide/ide-pnp.c +++ b/drivers/ide/ide-pnp.c @@ -40,9 +40,8 @@ static int idepnp_probe(struct pnp_dev * dev, const struct pnp_device_id *dev_id ide_std_init_ports(&hw, pnp_port_start(dev, 0), pnp_port_start(dev, 1)); hw.irq = pnp_irq(dev, 0); - hw.dma = NO_DMA; - index = ide_register_hw(&hw, 1, &hwif); + index = ide_register_hw(&hw, NULL, 1, &hwif); if (index != -1) { printk(KERN_INFO "ide%d: generic PnP IDE interface\n", index); diff --git a/drivers/ide/ide-probe.c b/drivers/ide/ide-probe.c index 3c945d64d84..6a6f2e066b4 100644 --- a/drivers/ide/ide-probe.c +++ b/drivers/ide/ide-probe.c @@ -47,6 +47,7 @@ #include <linux/spinlock.h> #include <linux/kmod.h> #include <linux/pci.h> +#include <linux/scatterlist.h> #include <asm/byteorder.h> #include <asm/irq.h> @@ -717,7 +718,7 @@ EXPORT_SYMBOL_GPL(ide_undecoded_slave); * This routine only knows how to look for drive units 0 and 1 * on an interface, so any setting of MAX_DRIVES > 2 won't work here. */ -static void probe_hwif(ide_hwif_t *hwif, void (*fixup)(ide_hwif_t *hwif)) +static void probe_hwif(ide_hwif_t *hwif) { unsigned long flags; unsigned int irqd; @@ -819,8 +820,8 @@ static void probe_hwif(ide_hwif_t *hwif, void (*fixup)(ide_hwif_t *hwif)) return; } - if (fixup) - fixup(hwif); + if (hwif->fixup) + hwif->fixup(hwif); for (unit = 0; unit < MAX_DRIVES; ++unit) { ide_drive_t *drive = &hwif->drives[unit]; @@ -859,10 +860,11 @@ static void probe_hwif(ide_hwif_t *hwif, void (*fixup)(ide_hwif_t *hwif)) } static int hwif_init(ide_hwif_t *hwif); +static void hwif_register_devices(ide_hwif_t *hwif); -int probe_hwif_init_with_fixup(ide_hwif_t *hwif, void (*fixup)(ide_hwif_t *hwif)) +static int probe_hwif_init(ide_hwif_t *hwif) { - probe_hwif(hwif, fixup); + probe_hwif(hwif); if (!hwif_init(hwif)) { printk(KERN_INFO "%s: failed to initialize IDE interface\n", @@ -870,34 +872,12 @@ int probe_hwif_init_with_fixup(ide_hwif_t *hwif, void (*fixup)(ide_hwif_t *hwif) return -1; } - if (hwif->present) { - u16 unit = 0; - int ret; + if (hwif->present) + hwif_register_devices(hwif); - for (unit = 0; unit < MAX_DRIVES; ++unit) { - ide_drive_t *drive = &hwif->drives[unit]; - /* For now don't attach absent drives, we may - want them on default or a new "empty" class - for hotplug reprobing ? */ - if (drive->present) { - ret = device_register(&drive->gendev); - if (ret < 0) - printk(KERN_WARNING "IDE: %s: " - "device_register error: %d\n", - __FUNCTION__, ret); - } - } - } return 0; } -int probe_hwif_init(ide_hwif_t *hwif) -{ - return probe_hwif_init_with_fixup(hwif, NULL); -} - -EXPORT_SYMBOL(probe_hwif_init); - #if MAX_HWIFS > 1 /* * save_match() is used to simplify logic in init_irq() below. @@ -951,7 +931,8 @@ static int ide_init_queue(ide_drive_t *drive) blk_queue_segment_boundary(q, 0xffff); if (!hwif->rqsize) { - if (hwif->no_lba48 || hwif->no_lba48_dma) + if ((hwif->host_flags & IDE_HFLAG_NO_LBA48) || + (hwif->host_flags & IDE_HFLAG_NO_LBA48_DMA)) hwif->rqsize = 256; else hwif->rqsize = 65536; @@ -1337,12 +1318,14 @@ static int hwif_init(ide_hwif_t *hwif) if (!hwif->sg_max_nents) hwif->sg_max_nents = PRD_ENTRIES; - hwif->sg_table = kzalloc(sizeof(struct scatterlist)*hwif->sg_max_nents, + hwif->sg_table = kmalloc(sizeof(struct scatterlist)*hwif->sg_max_nents, GFP_KERNEL); if (!hwif->sg_table) { printk(KERN_ERR "%s: unable to allocate SG table.\n", hwif->name); goto out; } + + sg_init_table(hwif->sg_table, hwif->sg_max_nents); if (init_irq(hwif) == 0) goto done; @@ -1378,6 +1361,24 @@ out: return 0; } +static void hwif_register_devices(ide_hwif_t *hwif) +{ + unsigned int i; + + for (i = 0; i < MAX_DRIVES; i++) { + ide_drive_t *drive = &hwif->drives[i]; + + if (drive->present) { + int ret = device_register(&drive->gendev); + + if (ret < 0) + printk(KERN_WARNING "IDE: %s: " + "device_register error: %d\n", + __FUNCTION__, ret); + } + } +} + int ideprobe_init (void) { unsigned int index; @@ -1389,27 +1390,18 @@ int ideprobe_init (void) for (index = 0; index < MAX_HWIFS; ++index) if (probe[index]) - probe_hwif(&ide_hwifs[index], NULL); + probe_hwif(&ide_hwifs[index]); for (index = 0; index < MAX_HWIFS; ++index) if (probe[index]) hwif_init(&ide_hwifs[index]); for (index = 0; index < MAX_HWIFS; ++index) { if (probe[index]) { ide_hwif_t *hwif = &ide_hwifs[index]; - int unit; if (!hwif->present) continue; if (hwif->chipset == ide_unknown || hwif->chipset == ide_forced) hwif->chipset = ide_generic; - for (unit = 0; unit < MAX_DRIVES; ++unit) - if (hwif->drives[unit].present) { - int ret = device_register( - &hwif->drives[unit].gendev); - if (ret < 0) - printk(KERN_WARNING "IDE: %s: " - "device_register error: %d\n", - __FUNCTION__, ret); - } + hwif_register_devices(hwif); } } for (index = 0; index < MAX_HWIFS; ++index) @@ -1419,3 +1411,22 @@ int ideprobe_init (void) } EXPORT_SYMBOL_GPL(ideprobe_init); + +int ide_device_add(u8 idx[4]) +{ + int i, rc = 0; + + for (i = 0; i < 4; i++) { + if (idx[i] != 0xff) + rc |= probe_hwif_init(&ide_hwifs[idx[i]]); + } + + for (i = 0; i < 4; i++) { + if (idx[i] != 0xff) + ide_proc_register_port(&ide_hwifs[idx[i]]); + } + + return rc; +} + +EXPORT_SYMBOL_GPL(ide_device_add); diff --git a/drivers/ide/ide-proc.c b/drivers/ide/ide-proc.c index fc1d8ae6a80..a4007d30da5 100644 --- a/drivers/ide/ide-proc.c +++ b/drivers/ide/ide-proc.c @@ -804,8 +804,6 @@ void ide_proc_register_port(ide_hwif_t *hwif) create_proc_ide_drives(hwif); } -EXPORT_SYMBOL_GPL(ide_proc_register_port); - #ifdef CONFIG_BLK_DEV_IDEPCI void ide_pci_create_host_proc(const char *name, get_info_t *get_info) { diff --git a/drivers/ide/ide-tape.c b/drivers/ide/ide-tape.c index 1fa57947bca..7b9181b5469 100644 --- a/drivers/ide/ide-tape.c +++ b/drivers/ide/ide-tape.c @@ -565,7 +565,7 @@ typedef struct os_dat_s { * The following parameter is used to select the point in the internal * tape fifo in which we will start to refill the buffer. Decreasing * the following parameter will improve the system's latency and - * interactive response, while using a high value might improve sytem + * interactive response, while using a high value might improve system * throughput. */ #define IDETAPE_FIFO_THRESHOLD 2 @@ -621,7 +621,6 @@ typedef struct os_dat_s { */ #define USE_IOTRACE 0 #if USE_IOTRACE -#include <linux/io_trace.h> #define IO_IDETAPE_FIFO 500 #endif diff --git a/drivers/ide/ide-taskfile.c b/drivers/ide/ide-taskfile.c index 2a3c8d49834..d066546f283 100644 --- a/drivers/ide/ide-taskfile.c +++ b/drivers/ide/ide-taskfile.c @@ -8,23 +8,6 @@ * Copyright (C) 2003-2004 Bartlomiej Zolnierkiewicz * * The big the bad and the ugly. - * - * Problems to be fixed because of BH interface or the lack therefore. - * - * Fill me in stupid !!! - * - * HOST: - * General refers to the Controller and Driver "pair". - * DATA HANDLER: - * Under the context of Linux it generally refers to an interrupt handler. - * However, it correctly describes the 'HOST' - * DATA BLOCK: - * The amount of data needed to be transfered as predefined in the - * setup of the device. - * STORAGE ATOMIC: - * The 'DATA BLOCK' associated to the 'DATA HANDLER', and can be as - * small as a single sector or as large as the entire command block - * request. */ #include <linux/module.h> @@ -278,7 +261,7 @@ static void ide_pio_sector(ide_drive_t *drive, unsigned int write) hwif->cursg = sg; } - page = cursg->page; + page = sg_page(cursg); offset = cursg->offset + hwif->cursg_ofs * SECTOR_SIZE; /* get the current page and offset */ @@ -695,9 +678,6 @@ int ide_wait_cmd (ide_drive_t *drive, u8 cmd, u8 nsect, u8 feature, u8 sectors, return ide_do_drive_cmd(drive, &rq, ide_wait); } -/* - * FIXME : this needs to map into at taskfile. <andre@linux-ide.org> - */ int ide_cmd_ioctl (ide_drive_t *drive, unsigned int cmd, unsigned long arg) { int err = 0; @@ -761,9 +741,6 @@ static int ide_wait_cmd_task(ide_drive_t *drive, u8 *buf) return ide_do_drive_cmd(drive, &rq, ide_wait); } -/* - * FIXME : this needs to map into at taskfile. <andre@linux-ide.org> - */ int ide_task_ioctl (ide_drive_t *drive, unsigned int cmd, unsigned long arg) { void __user *p = (void __user *)arg; @@ -860,9 +837,14 @@ ide_startstop_t flagged_taskfile (ide_drive_t *drive, ide_task_t *task) case TASKFILE_OUT_DMA: case TASKFILE_IN_DMAQ: case TASKFILE_IN_DMA: - hwif->dma_setup(drive); - hwif->dma_exec_cmd(drive, taskfile->command); - hwif->dma_start(drive); + if (!drive->using_dma) + break; + + if (!hwif->dma_setup(drive)) { + hwif->dma_exec_cmd(drive, taskfile->command); + hwif->dma_start(drive); + return ide_started; + } break; default: @@ -876,7 +858,8 @@ ide_startstop_t flagged_taskfile (ide_drive_t *drive, ide_task_t *task) return task->prehandler(drive, task->rq); } ide_execute_command(drive, taskfile->command, task->handler, WAIT_WORSTCASE, NULL); + return ide_started; } - return ide_started; + return ide_stopped; } diff --git a/drivers/ide/ide.c b/drivers/ide/ide.c index 5b090662683..674a65c1a13 100644 --- a/drivers/ide/ide.c +++ b/drivers/ide/ide.c @@ -134,8 +134,6 @@ static void init_hwif_data(ide_hwif_t *hwif, unsigned int index) hwif->bus_state = BUSSTATE_ON; - hwif->atapi_dma = 0; /* disable all atapi dma */ - init_completion(&hwif->gendev_rel_comp); default_hwif_iops(hwif); @@ -170,7 +168,6 @@ static void init_hwif_default(ide_hwif_t *hwif, unsigned int index) ide_init_hwif_ports(&hw, ide_default_io_base(index), 0, &hwif->irq); - memcpy(&hwif->hw, &hw, sizeof(hw)); memcpy(hwif->io_ports, hw.io_ports, sizeof(hw.io_ports)); hwif->noprobe = !hwif->io_ports[IDE_DATA_OFFSET]; @@ -216,7 +213,7 @@ static void __init init_ide_data (void) init_hwif_data(hwif, index); init_hwif_default(hwif, index); #if !defined(CONFIG_PPC32) || !defined(CONFIG_PCI) - hwif->irq = hwif->hw.irq = + hwif->irq = ide_init_default_irq(hwif->io_ports[IDE_DATA_OFFSET]); #endif } @@ -267,6 +264,30 @@ static int ide_system_bus_speed(void) return system_bus_speed; } +ide_hwif_t * ide_find_port(unsigned long base) +{ + ide_hwif_t *hwif; + int i; + + for (i = 0; i < MAX_HWIFS; i++) { + hwif = &ide_hwifs[i]; + if (hwif->io_ports[IDE_DATA_OFFSET] == base) + goto found; + } + + for (i = 0; i < MAX_HWIFS; i++) { + hwif = &ide_hwifs[i]; + if (hwif->io_ports[IDE_DATA_OFFSET] == 0) + goto found; + } + + hwif = NULL; +found: + return hwif; +} + +EXPORT_SYMBOL_GPL(ide_find_port); + static struct resource* hwif_request_region(ide_hwif_t *hwif, unsigned long addr, int num) { @@ -379,7 +400,6 @@ static void ide_hwif_restore(ide_hwif_t *hwif, ide_hwif_t *tmp_hwif) hwif->pio_mask = tmp_hwif->pio_mask; - hwif->atapi_dma = tmp_hwif->atapi_dma; hwif->ultra_mask = tmp_hwif->ultra_mask; hwif->mwdma_mask = tmp_hwif->mwdma_mask; hwif->swdma_mask = tmp_hwif->swdma_mask; @@ -394,6 +414,8 @@ static void ide_hwif_restore(ide_hwif_t *hwif, ide_hwif_t *tmp_hwif) hwif->cds = tmp_hwif->cds; #endif + hwif->fixup = tmp_hwif->fixup; + hwif->set_pio_mode = tmp_hwif->set_pio_mode; hwif->set_dma_mode = tmp_hwif->set_dma_mode; hwif->mdma_filter = tmp_hwif->mdma_filter; @@ -440,7 +462,6 @@ static void ide_hwif_restore(ide_hwif_t *hwif, ide_hwif_t *tmp_hwif) hwif->mmio = tmp_hwif->mmio; hwif->rqsize = tmp_hwif->rqsize; - hwif->no_lba48 = tmp_hwif->no_lba48; #ifndef CONFIG_BLK_DEV_IDECS hwif->irq = tmp_hwif->irq; @@ -656,7 +677,6 @@ void ide_setup_ports ( hw_regs_t *hw, } } hw->irq = irq; - hw->dma = NO_DMA; hw->ack_intr = ack_intr; /* * hw->iops = iops; @@ -664,11 +684,11 @@ void ide_setup_ports ( hw_regs_t *hw, } /** - * ide_register_hw_with_fixup - register IDE interface + * ide_register_hw - register IDE interface * @hw: hardware registers + * @fixup: fixup function * @initializing: set while initializing built-in drivers * @hwifp: pointer to returned hwif - * @fixup: fixup function * * Register an IDE interface, specifying exactly the registers etc. * Set init=1 iff calling before probes have taken place. @@ -676,9 +696,8 @@ void ide_setup_ports ( hw_regs_t *hw, * Returns -1 on error. */ -int ide_register_hw_with_fixup(hw_regs_t *hw, int initializing, - ide_hwif_t **hwifp, - void(*fixup)(ide_hwif_t *hwif)) +int ide_register_hw(hw_regs_t *hw, void (*fixup)(ide_hwif_t *), + int initializing, ide_hwif_t **hwifp) { int index, retry = 1; ide_hwif_t *hwif; @@ -686,7 +705,7 @@ int ide_register_hw_with_fixup(hw_regs_t *hw, int initializing, do { for (index = 0; index < MAX_HWIFS; ++index) { hwif = &ide_hwifs[index]; - if (hwif->hw.io_ports[IDE_DATA_OFFSET] == hw->io_ports[IDE_DATA_OFFSET]) + if (hwif->io_ports[IDE_DATA_OFFSET] == hw->io_ports[IDE_DATA_OFFSET]) goto found; } for (index = 0; index < MAX_HWIFS; ++index) { @@ -694,7 +713,7 @@ int ide_register_hw_with_fixup(hw_regs_t *hw, int initializing, if (hwif->hold) continue; if ((!hwif->present && !hwif->mate && !initializing) || - (!hwif->hw.io_ports[IDE_DATA_OFFSET] && initializing)) + (!hwif->io_ports[IDE_DATA_OFFSET] && initializing)) goto found; } for (index = 0; index < MAX_HWIFS; index++) @@ -710,16 +729,18 @@ found: } if (hwif->present) return -1; - memcpy(&hwif->hw, hw, sizeof(*hw)); - memcpy(hwif->io_ports, hwif->hw.io_ports, sizeof(hwif->hw.io_ports)); + memcpy(hwif->io_ports, hw->io_ports, sizeof(hwif->io_ports)); hwif->irq = hw->irq; hwif->noprobe = 0; + hwif->fixup = fixup; hwif->chipset = hw->chipset; hwif->gendev.parent = hw->dev; + hwif->ack_intr = hw->ack_intr; + + if (initializing == 0) { + u8 idx[4] = { index, 0xff, 0xff, 0xff }; - if (!initializing) { - probe_hwif_init_with_fixup(hwif, fixup); - ide_proc_register_port(hwif); + ide_device_add(idx); } if (hwifp) @@ -728,13 +749,6 @@ found: return (initializing || hwif->present) ? index : -1; } -EXPORT_SYMBOL(ide_register_hw_with_fixup); - -int ide_register_hw(hw_regs_t *hw, int initializing, ide_hwif_t **hwifp) -{ - return ide_register_hw_with_fixup(hw, initializing, hwifp, NULL); -} - EXPORT_SYMBOL(ide_register_hw); /* @@ -1050,7 +1064,7 @@ int generic_ide_ioctl(ide_drive_t *drive, struct file *file, struct block_device ide_init_hwif_ports(&hw, (unsigned long) args[0], (unsigned long) args[1], NULL); hw.irq = args[2]; - if (ide_register_hw(&hw, 0, NULL) == -1) + if (ide_register_hw(&hw, NULL, 0, NULL) == -1) return -EIO; return 0; } @@ -1401,6 +1415,9 @@ static int __init ide_setup(char *s) "reset", "minus6", "ata66", "minus8", "minus9", "minus10", "four", "qd65xx", "ht6560b", "cmd640_vlb", "dtc2278", "umc8672", "ali14xx", NULL }; + + hw_regs_t hwregs; + hw = s[3] - '0'; hwif = &ide_hwifs[hw]; i = match_parm(&s[4], ide_words, vals, 3); @@ -1510,9 +1527,9 @@ static int __init ide_setup(char *s) case 2: /* base,ctl */ vals[2] = 0; /* default irq = probe for it */ case 3: /* base,ctl,irq */ - hwif->hw.irq = vals[2]; - ide_init_hwif_ports(&hwif->hw, (unsigned long) vals[0], (unsigned long) vals[1], &hwif->irq); - memcpy(hwif->io_ports, hwif->hw.io_ports, sizeof(hwif->io_ports)); + memset(&hwregs, 0, sizeof(hwregs)); + ide_init_hwif_ports(&hwregs, vals[0], vals[1], &hwif->irq); + memcpy(hwif->io_ports, hwregs.io_ports, sizeof(hwif->io_ports)); hwif->irq = vals[2]; hwif->noprobe = 0; hwif->chipset = ide_forced; diff --git a/drivers/ide/legacy/ali14xx.c b/drivers/ide/legacy/ali14xx.c index 2f0ef9b4403..10311ecc674 100644 --- a/drivers/ide/legacy/ali14xx.c +++ b/drivers/ide/legacy/ali14xx.c @@ -102,6 +102,8 @@ static void outReg (u8 data, u8 reg) outb_p(data, dataPort); } +static DEFINE_SPINLOCK(ali14xx_lock); + /* * Set PIO mode for the specified drive. * This function computes timing parameters @@ -129,14 +131,14 @@ static void ali14xx_set_pio_mode(ide_drive_t *drive, const u8 pio) /* stuff timing parameters into controller registers */ driveNum = (HWIF(drive)->index << 1) + drive->select.b.unit; - spin_lock_irqsave(&ide_lock, flags); + spin_lock_irqsave(&ali14xx_lock, flags); outb_p(regOn, basePort); outReg(param1, regTab[driveNum].reg1); outReg(param2, regTab[driveNum].reg2); outReg(param3, regTab[driveNum].reg3); outReg(param4, regTab[driveNum].reg4); outb_p(regOff, basePort); - spin_unlock_irqrestore(&ide_lock, flags); + spin_unlock_irqrestore(&ali14xx_lock, flags); } /* @@ -193,6 +195,7 @@ static int __init initRegisters (void) { static int __init ali14xx_probe(void) { ide_hwif_t *hwif, *mate; + static u8 idx[4] = { 0, 1, 0xff, 0xff }; printk(KERN_DEBUG "ali14xx: base=0x%03x, regOn=0x%02x.\n", basePort, regOn); @@ -217,11 +220,7 @@ static int __init ali14xx_probe(void) mate->mate = hwif; mate->channel = 1; - probe_hwif_init(hwif); - probe_hwif_init(mate); - - ide_proc_register_port(hwif); - ide_proc_register_port(mate); + ide_device_add(idx); return 0; } diff --git a/drivers/ide/legacy/buddha.c b/drivers/ide/legacy/buddha.c index 101aee1711c..4a0be251a05 100644 --- a/drivers/ide/legacy/buddha.c +++ b/drivers/ide/legacy/buddha.c @@ -212,8 +212,8 @@ fail_base2: // xsurf_iops, IRQ_AMIGA_PORTS); } - - index = ide_register_hw(&hw, 1, &hwif); + + index = ide_register_hw(&hw, NULL, 1, &hwif); if (index != -1) { hwif->mmio = 1; printk("ide%d: ", index); diff --git a/drivers/ide/legacy/dtc2278.c b/drivers/ide/legacy/dtc2278.c index f1652125486..24a845d45bd 100644 --- a/drivers/ide/legacy/dtc2278.c +++ b/drivers/ide/legacy/dtc2278.c @@ -67,20 +67,24 @@ static void sub22 (char b, char c) } } +static DEFINE_SPINLOCK(dtc2278_lock); + static void dtc2278_set_pio_mode(ide_drive_t *drive, const u8 pio) { unsigned long flags; if (pio >= 3) { - spin_lock_irqsave(&ide_lock, flags); + spin_lock_irqsave(&dtc2278_lock, flags); /* * This enables PIO mode4 (3?) on the first interface */ sub22(1,0xc3); sub22(0,0xa0); - spin_unlock_irqrestore(&ide_lock, flags); + spin_unlock_irqrestore(&dtc2278_lock, flags); } else { /* we don't know how to set it back again.. */ + /* Actually we do - there is a data sheet available for the + Winbond but does anyone actually care */ } /* @@ -94,6 +98,7 @@ static int __init dtc2278_probe(void) { unsigned long flags; ide_hwif_t *hwif, *mate; + static u8 idx[4] = { 0, 1, 0xff, 0xff }; hwif = &ide_hwifs[0]; mate = &ide_hwifs[1]; @@ -129,16 +134,13 @@ static int __init dtc2278_probe(void) mate->serialized = 1; mate->chipset = ide_dtc2278; + mate->pio_mask = ATA_PIO4; mate->drives[0].no_unmask = 1; mate->drives[1].no_unmask = 1; mate->mate = hwif; mate->channel = 1; - probe_hwif_init(hwif); - probe_hwif_init(mate); - - ide_proc_register_port(hwif); - ide_proc_register_port(mate); + ide_device_add(idx); return 0; } diff --git a/drivers/ide/legacy/falconide.c b/drivers/ide/legacy/falconide.c index f0829b83e97..7d7936f1b90 100644 --- a/drivers/ide/legacy/falconide.c +++ b/drivers/ide/legacy/falconide.c @@ -72,7 +72,7 @@ void __init falconide_init(void) 0, 0, NULL, // falconide_iops, IRQ_MFP_IDE); - index = ide_register_hw(&hw, 1, NULL); + index = ide_register_hw(&hw, NULL, 1, NULL); if (index != -1) printk("ide%d: Falcon IDE interface\n", index); diff --git a/drivers/ide/legacy/gayle.c b/drivers/ide/legacy/gayle.c index 0830a021bbb..53331ee1e95 100644 --- a/drivers/ide/legacy/gayle.c +++ b/drivers/ide/legacy/gayle.c @@ -165,7 +165,7 @@ found: // &gayle_iops, IRQ_AMIGA_PORTS); - index = ide_register_hw(&hw, 1, &hwif); + index = ide_register_hw(&hw, NULL, 1, &hwif); if (index != -1) { hwif->mmio = 1; switch (i) { diff --git a/drivers/ide/legacy/ht6560b.c b/drivers/ide/legacy/ht6560b.c index 2e5a9cc5c0f..a4245d13f11 100644 --- a/drivers/ide/legacy/ht6560b.c +++ b/drivers/ide/legacy/ht6560b.c @@ -247,6 +247,8 @@ static u8 ht_pio2timings(ide_drive_t *drive, const u8 pio) } } +static DEFINE_SPINLOCK(ht6560b_lock); + /* * Enable/Disable so called prefetch mode */ @@ -254,9 +256,9 @@ static void ht_set_prefetch(ide_drive_t *drive, u8 state) { unsigned long flags; int t = HT_PREFETCH_MODE << 8; - - spin_lock_irqsave(&ide_lock, flags); - + + spin_lock_irqsave(&ht6560b_lock, flags); + /* * Prefetch mode and unmask irq seems to conflict */ @@ -268,9 +270,9 @@ static void ht_set_prefetch(ide_drive_t *drive, u8 state) drive->drive_data &= ~t; /* disable prefetch mode */ drive->no_unmask = 0; } - - spin_unlock_irqrestore(&ide_lock, flags); - + + spin_unlock_irqrestore(&ht6560b_lock, flags); + #ifdef DEBUG printk("ht6560b: drive %s prefetch mode %sabled\n", drive->name, (state ? "en" : "dis")); #endif @@ -287,16 +289,14 @@ static void ht6560b_set_pio_mode(ide_drive_t *drive, const u8 pio) ht_set_prefetch(drive, pio & 1); return; } - + timing = ht_pio2timings(drive, pio); - - spin_lock_irqsave(&ide_lock, flags); - + + spin_lock_irqsave(&ht6560b_lock, flags); drive->drive_data &= 0xff00; drive->drive_data |= timing; - - spin_unlock_irqrestore(&ide_lock, flags); - + spin_unlock_irqrestore(&ht6560b_lock, flags); + #ifdef DEBUG printk("ht6560b: drive %s tuned to pio mode %#x timing=%#x\n", drive->name, pio, timing); #endif @@ -311,6 +311,7 @@ MODULE_PARM_DESC(probe, "probe for HT6560B chipset"); int __init ht6560b_init(void) { ide_hwif_t *hwif, *mate; + static u8 idx[4] = { 0, 1, 0xff, 0xff }; int t; if (probe_ht6560b == 0) @@ -359,11 +360,7 @@ int __init ht6560b_init(void) mate->drives[0].drive_data = t; mate->drives[1].drive_data = t; - probe_hwif_init(hwif); - probe_hwif_init(mate); - - ide_proc_register_port(hwif); - ide_proc_register_port(mate); + ide_device_add(idx); return 0; diff --git a/drivers/ide/legacy/ide-cs.c b/drivers/ide/legacy/ide-cs.c index e8e360c2619..03715c05866 100644 --- a/drivers/ide/legacy/ide-cs.c +++ b/drivers/ide/legacy/ide-cs.c @@ -153,7 +153,7 @@ static int idecs_register(unsigned long io, unsigned long ctl, unsigned long irq hw.irq = irq; hw.chipset = ide_pci; hw.dev = &handle->dev; - return ide_register_hw_with_fixup(&hw, 0, NULL, ide_undecoded_slave); + return ide_register_hw(&hw, &ide_undecoded_slave, 0, NULL); } /*====================================================================== diff --git a/drivers/ide/legacy/ide_platform.c b/drivers/ide/legacy/ide_platform.c index b992b2b91fe..7bb79f53dac 100644 --- a/drivers/ide/legacy/ide_platform.c +++ b/drivers/ide/legacy/ide_platform.c @@ -33,39 +33,24 @@ static ide_hwif_t *__devinit plat_ide_locate_hwif(void __iomem *base, int mmio) { unsigned long port = (unsigned long)base; - ide_hwif_t *hwif; - int index, i; - - for (index = 0; index < MAX_HWIFS; ++index) { - hwif = ide_hwifs + index; - if (hwif->io_ports[IDE_DATA_OFFSET] == port) - goto found; - } - - for (index = 0; index < MAX_HWIFS; ++index) { - hwif = ide_hwifs + index; - if (hwif->io_ports[IDE_DATA_OFFSET] == 0) - goto found; - } + ide_hwif_t *hwif = ide_find_port(port); + int i; - return NULL; - -found: + if (hwif == NULL) + goto out; - hwif->hw.io_ports[IDE_DATA_OFFSET] = port; + hwif->io_ports[IDE_DATA_OFFSET] = port; port += (1 << pdata->ioport_shift); for (i = IDE_ERROR_OFFSET; i <= IDE_STATUS_OFFSET; i++, port += (1 << pdata->ioport_shift)) - hwif->hw.io_ports[i] = port; + hwif->io_ports[i] = port; - hwif->hw.io_ports[IDE_CONTROL_OFFSET] = (unsigned long)ctrl; + hwif->io_ports[IDE_CONTROL_OFFSET] = (unsigned long)ctrl; - memcpy(hwif->io_ports, hwif->hw.io_ports, sizeof(hwif->hw.io_ports)); - hwif->hw.irq = hwif->irq = irq; + hwif->irq = irq; - hwif->hw.dma = NO_DMA; - hwif->chipset = hwif->hw.chipset = ide_generic; + hwif->chipset = ide_generic; if (mmio) { hwif->mmio = 1; @@ -73,8 +58,8 @@ found: } hwif_prop.hwif = hwif; - hwif_prop.index = index; - + hwif_prop.index = hwif->index; +out: return hwif; } @@ -83,6 +68,7 @@ static int __devinit plat_ide_probe(struct platform_device *pdev) struct resource *res_base, *res_alt, *res_irq; ide_hwif_t *hwif; struct pata_platform_info *pdata; + u8 idx[4] = { 0xff, 0xff, 0xff, 0xff }; int ret = 0; int mmio = 0; @@ -130,10 +116,11 @@ static int __devinit plat_ide_probe(struct platform_device *pdev) hwif->gendev.parent = &pdev->dev; hwif->noprobe = 0; - probe_hwif_init(hwif); + idx[0] = hwif->index; + + ide_device_add(idx); platform_set_drvdata(pdev, hwif); - ide_proc_register_port(hwif); return 0; diff --git a/drivers/ide/legacy/macide.c b/drivers/ide/legacy/macide.c index b557c45a5a9..e87cd2f1643 100644 --- a/drivers/ide/legacy/macide.c +++ b/drivers/ide/legacy/macide.c @@ -93,21 +93,21 @@ void macide_init(void) 0, 0, macide_ack_intr, // quadra_ide_iops, IRQ_NUBUS_F); - index = ide_register_hw(&hw, 1, &hwif); + index = ide_register_hw(&hw, NULL, 1, &hwif); break; case MAC_IDE_PB: ide_setup_ports(&hw, IDE_BASE, macide_offsets, 0, 0, macide_ack_intr, // macide_pb_iops, IRQ_NUBUS_C); - index = ide_register_hw(&hw, 1, &hwif); + index = ide_register_hw(&hw, NULL, 1, &hwif); break; case MAC_IDE_BABOON: ide_setup_ports(&hw, BABOON_BASE, macide_offsets, 0, 0, NULL, // macide_baboon_iops, IRQ_BABOON_1); - index = ide_register_hw(&hw, 1, &hwif); + index = ide_register_hw(&hw, NULL, 1, &hwif); if (index == -1) break; if (macintosh_config->ident == MAC_MODEL_PB190) { diff --git a/drivers/ide/legacy/q40ide.c b/drivers/ide/legacy/q40ide.c index e628a983ce3..a73db1bd482 100644 --- a/drivers/ide/legacy/q40ide.c +++ b/drivers/ide/legacy/q40ide.c @@ -89,9 +89,8 @@ void q40_ide_setup_ports ( hw_regs_t *hw, else hw->io_ports[i] = Q40_ISA_IO_B(base + offsets[i]); } - + hw->irq = irq; - hw->dma = NO_DMA; hw->ack_intr = ack_intr; /* * hw->iops = iops; @@ -102,7 +101,7 @@ void q40_ide_setup_ports ( hw_regs_t *hw, /* * the static array is needed to have the name reported in /proc/ioports, - * hwif->name unfortunately isn´t available yet + * hwif->name unfortunately isn't available yet */ static const char *q40_ide_names[Q40IDE_NUM_HWIFS]={ "ide0", "ide1" @@ -142,7 +141,7 @@ void q40ide_init(void) 0, NULL, // m68kide_iops, q40ide_default_irq(pcide_bases[i])); - index = ide_register_hw(&hw, 1, &hwif); + index = ide_register_hw(&hw, NULL, 1, &hwif); // **FIXME** if (index != -1) hwif->mmio = 1; diff --git a/drivers/ide/legacy/qd65xx.c b/drivers/ide/legacy/qd65xx.c index 0c81d2d0b94..912e73853fa 100644 --- a/drivers/ide/legacy/qd65xx.c +++ b/drivers/ide/legacy/qd65xx.c @@ -89,26 +89,6 @@ static int timings[4]={-1,-1,-1,-1}; /* stores current timing for each timer */ -static void qd_write_reg (u8 content, unsigned long reg) -{ - unsigned long flags; - - spin_lock_irqsave(&ide_lock, flags); - outb(content,reg); - spin_unlock_irqrestore(&ide_lock, flags); -} - -static u8 __init qd_read_reg (unsigned long reg) -{ - unsigned long flags; - u8 read; - - spin_lock_irqsave(&ide_lock, flags); - read = inb(reg); - spin_unlock_irqrestore(&ide_lock, flags); - return read; -} - /* * qd_select: * @@ -121,7 +101,7 @@ static void qd_select (ide_drive_t *drive) (QD_TIMREG(drive) & 0x02); if (timings[index] != QD_TIMING(drive)) - qd_write_reg(timings[index] = QD_TIMING(drive), QD_TIMREG(drive)); + outb(timings[index] = QD_TIMING(drive), QD_TIMREG(drive)); } /* @@ -284,7 +264,7 @@ static void qd6580_set_pio_mode(ide_drive_t *drive, const u8 pio) } if (!HWIF(drive)->channel && drive->media != ide_disk) { - qd_write_reg(0x5f, QD_CONTROL_PORT); + outb(0x5f, QD_CONTROL_PORT); printk(KERN_WARNING "%s: ATAPI: disabled read-ahead FIFO " "and post-write buffer on %s.\n", drive->name, HWIF(drive)->name); @@ -301,16 +281,15 @@ static void qd6580_set_pio_mode(ide_drive_t *drive, const u8 pio) static int __init qd_testreg(int port) { - u8 savereg; - u8 readreg; unsigned long flags; + u8 savereg, readreg; - spin_lock_irqsave(&ide_lock, flags); + local_irq_save(flags); savereg = inb_p(port); outb_p(QD_TESTVAL, port); /* safe value */ readreg = inb_p(port); outb(savereg, port); - spin_unlock_irqrestore(&ide_lock, flags); + local_irq_restore(flags); if (savereg == QD_TESTVAL) { printk(KERN_ERR "Outch ! the probe for qd65xx isn't reliable !\n"); @@ -364,13 +343,13 @@ static void __exit qd_unsetup(ide_hwif_t *hwif) if (set_pio_mode == (void *)qd6500_set_pio_mode) { // will do it for both - qd_write_reg(QD6500_DEF_DATA, QD_TIMREG(&hwif->drives[0])); + outb(QD6500_DEF_DATA, QD_TIMREG(&hwif->drives[0])); } else if (set_pio_mode == (void *)qd6580_set_pio_mode) { if (QD_CONTROL(hwif) & QD_CONTR_SEC_DISABLED) { - qd_write_reg(QD6580_DEF_DATA, QD_TIMREG(&hwif->drives[0])); - qd_write_reg(QD6580_DEF_DATA2, QD_TIMREG(&hwif->drives[1])); + outb(QD6580_DEF_DATA, QD_TIMREG(&hwif->drives[0])); + outb(QD6580_DEF_DATA2, QD_TIMREG(&hwif->drives[1])); } else { - qd_write_reg(hwif->channel ? QD6580_DEF_DATA2 : QD6580_DEF_DATA, QD_TIMREG(&hwif->drives[0])); + outb(hwif->channel ? QD6580_DEF_DATA2 : QD6580_DEF_DATA, QD_TIMREG(&hwif->drives[0])); } } else { printk(KERN_WARNING "Unknown qd65xx tuning fonction !\n"); @@ -389,10 +368,11 @@ static void __exit qd_unsetup(ide_hwif_t *hwif) static int __init qd_probe(int base) { ide_hwif_t *hwif; + u8 idx[4] = { 0xff, 0xff, 0xff, 0xff }; u8 config; u8 unit; - config = qd_read_reg(QD_CONFIG_PORT); + config = inb(QD_CONFIG_PORT); if (! ((config & QD_CONFIG_BASEPORT) >> 1 == (base == 0xb0)) ) return 1; @@ -419,9 +399,9 @@ static int __init qd_probe(int base) hwif->set_pio_mode = &qd6500_set_pio_mode; - probe_hwif_init(hwif); + idx[0] = unit; - ide_proc_register_port(hwif); + ide_device_add(idx); return 1; } @@ -436,7 +416,7 @@ static int __init qd_probe(int base) /* qd6580 found */ - control = qd_read_reg(QD_CONTROL_PORT); + control = inb(QD_CONTROL_PORT); printk(KERN_NOTICE "qd6580 at %#x\n", base); printk(KERN_DEBUG "qd6580: config=%#x, control=%#x, ID3=%u\n", @@ -453,11 +433,11 @@ static int __init qd_probe(int base) hwif->set_pio_mode = &qd6580_set_pio_mode; - probe_hwif_init(hwif); + idx[0] = unit; - qd_write_reg(QD_DEF_CONTR,QD_CONTROL_PORT); + ide_device_add(idx); - ide_proc_register_port(hwif); + outb(QD_DEF_CONTR, QD_CONTROL_PORT); return 1; } else { @@ -474,19 +454,17 @@ static int __init qd_probe(int base) hwif->set_pio_mode = &qd6580_set_pio_mode; - probe_hwif_init(hwif); - qd_setup(mate, base, config | (control << 8), QD6580_DEF_DATA2, QD6580_DEF_DATA2); mate->set_pio_mode = &qd6580_set_pio_mode; - probe_hwif_init(mate); + idx[0] = 0; + idx[1] = 1; - qd_write_reg(QD_DEF_CONTR,QD_CONTROL_PORT); + ide_device_add(idx); - ide_proc_register_port(hwif); - ide_proc_register_port(mate); + outb(QD_DEF_CONTR, QD_CONTROL_PORT); return 0; /* no other qd65xx possible */ } diff --git a/drivers/ide/legacy/umc8672.c b/drivers/ide/legacy/umc8672.c index 1151c92dd53..79577b91687 100644 --- a/drivers/ide/legacy/umc8672.c +++ b/drivers/ide/legacy/umc8672.c @@ -124,8 +124,9 @@ static void umc_set_pio_mode(ide_drive_t *drive, const u8 pio) static int __init umc8672_probe(void) { - unsigned long flags; ide_hwif_t *hwif, *mate; + unsigned long flags; + static u8 idx[4] = { 0, 1, 0xff, 0xff }; if (!request_region(0x108, 2, "umc8672")) { printk(KERN_ERR "umc8672: ports 0x108-0x109 already in use.\n"); @@ -158,11 +159,7 @@ static int __init umc8672_probe(void) mate->mate = hwif; mate->channel = 1; - probe_hwif_init(hwif); - probe_hwif_init(mate); - - ide_proc_register_port(hwif); - ide_proc_register_port(mate); + ide_device_add(idx); return 0; } diff --git a/drivers/ide/mips/au1xxx-ide.c b/drivers/ide/mips/au1xxx-ide.c index 47c035a550e..a4ce3ba15d6 100644 --- a/drivers/ide/mips/au1xxx-ide.c +++ b/drivers/ide/mips/au1xxx-ide.c @@ -276,8 +276,7 @@ static int auide_build_dmatable(ide_drive_t *drive) if (iswrite) { if(!put_source_flags(ahwif->tx_chan, - (void*)(page_address(sg->page) - + sg->offset), + (void*) sg_virt(sg), tc, flags)) { printk(KERN_ERR "%s failed %d\n", __FUNCTION__, __LINE__); @@ -285,8 +284,7 @@ static int auide_build_dmatable(ide_drive_t *drive) } else { if(!put_dest_flags(ahwif->rx_chan, - (void*)(page_address(sg->page) - + sg->offset), + (void*) sg_virt(sg), tc, flags)) { printk(KERN_ERR "%s failed %d\n", __FUNCTION__, __LINE__); @@ -601,8 +599,9 @@ static int au_ide_probe(struct device *dev) _auide_hwif *ahwif = &auide_hwif; ide_hwif_t *hwif; struct resource *res; - hw_regs_t *hw; int ret = 0; + u8 idx[4] = { 0xff, 0xff, 0xff, 0xff }; + hw_regs_t hw; #if defined(CONFIG_BLK_DEV_IDE_AU1XXX_MDMA2_DBDMA) char *mode = "MWDMA2"; @@ -644,12 +643,12 @@ static int au_ide_probe(struct device *dev) /* FIXME: This might possibly break PCMCIA IDE devices */ hwif = &ide_hwifs[pdev->id]; - hw = &hwif->hw; - hwif->irq = hw->irq = ahwif->irq; + hwif->irq = ahwif->irq; hwif->chipset = ide_au1xxx; - auide_setup_ports(hw, ahwif); - memcpy(hwif->io_ports, hw->io_ports, sizeof(hwif->io_ports)); + memset(&hw, 0, sizeof(hw)); + auide_setup_ports(&hw, ahwif); + memcpy(hwif->io_ports, hw.io_ports, sizeof(hwif->io_ports)); hwif->ultra_mask = 0x0; /* Disable Ultra DMA */ #ifdef CONFIG_BLK_DEV_IDE_AU1XXX_MDMA2_DBDMA @@ -699,9 +698,6 @@ static int au_ide_probe(struct device *dev) hwif->dma_host_on = &auide_dma_host_on; hwif->dma_lost_irq = &auide_dma_lost_irq; hwif->ide_dma_on = &auide_dma_on; - - hwif->atapi_dma = 1; - #else /* !CONFIG_BLK_DEV_IDE_AU1XXX_MDMA2_DBDMA */ hwif->channel = 0; hwif->hold = 1; @@ -709,8 +705,10 @@ static int au_ide_probe(struct device *dev) hwif->config_data = 0; /* no chipset-specific code */ hwif->drives[0].autotune = 1; /* 1=autotune, 2=noautotune, 0=default */ + hwif->drives[1].autotune = 1; #endif - hwif->drives[0].no_io_32bit = 1; + hwif->drives[0].no_io_32bit = 1; + hwif->drives[1].no_io_32bit = 1; auide_hwif.hwif = hwif; hwif->hwif_data = &auide_hwif; @@ -720,9 +718,9 @@ static int au_ide_probe(struct device *dev) dbdma_init_done = 1; #endif - probe_hwif_init(hwif); + idx[0] = hwif->index; - ide_proc_register_port(hwif); + ide_device_add(idx); dev_set_drvdata(dev, hwif); diff --git a/drivers/ide/mips/swarm.c b/drivers/ide/mips/swarm.c index c2e29571b00..521edd41b57 100644 --- a/drivers/ide/mips/swarm.c +++ b/drivers/ide/mips/swarm.c @@ -71,6 +71,7 @@ static int __devinit swarm_ide_probe(struct device *dev) u8 __iomem *base; phys_t offset, size; int i; + u8 idx[4] = { 0xff, 0xff, 0xff, 0xff }; if (!SIBYTE_HAVE_IDE) return -ENODEV; @@ -119,18 +120,15 @@ static int __devinit swarm_ide_probe(struct device *dev) hwif->noprobe = 0; for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++) - hwif->hw.io_ports[i] = + hwif->io_ports[i] = (unsigned long)(base + ((0x1f0 + i) << 5)); - hwif->hw.io_ports[IDE_CONTROL_OFFSET] = + hwif->io_ports[IDE_CONTROL_OFFSET] = (unsigned long)(base + (0x3f6 << 5)); - hwif->hw.irq = K_INT_GB_IDE; + hwif->irq = K_INT_GB_IDE; - memcpy(hwif->io_ports, hwif->hw.io_ports, sizeof(hwif->io_ports)); - hwif->irq = hwif->hw.irq; + idx[0] = hwif->index; - probe_hwif_init(hwif); - - ide_proc_register_port(hwif); + ide_device_add(idx); dev_set_drvdata(dev, hwif); diff --git a/drivers/ide/pci/aec62xx.c b/drivers/ide/pci/aec62xx.c index 3a4c2c26a77..19ec421f7b9 100644 --- a/drivers/ide/pci/aec62xx.c +++ b/drivers/ide/pci/aec62xx.c @@ -1,5 +1,5 @@ /* - * linux/drivers/ide/pci/aec62xx.c Version 0.25 Aug 1, 2007 + * linux/drivers/ide/pci/aec62xx.c Version 0.27 Sep 16, 2007 * * Copyright (C) 1999-2002 Andre Hedrick <andre@linux-ide.org> * Copyright (C) 2007 MontaVista Software, Inc. <source@mvista.com> @@ -141,19 +141,6 @@ static void aec_set_pio_mode(ide_drive_t *drive, const u8 pio) drive->hwif->set_dma_mode(drive, pio + XFER_PIO_0); } -static void aec62xx_dma_lost_irq (ide_drive_t *drive) -{ - switch (HWIF(drive)->pci_dev->device) { - case PCI_DEVICE_ID_ARTOP_ATP860: - case PCI_DEVICE_ID_ARTOP_ATP860R: - case PCI_DEVICE_ID_ARTOP_ATP865: - case PCI_DEVICE_ID_ARTOP_ATP865R: - printk(" AEC62XX time out "); - default: - break; - } -} - static unsigned int __devinit init_chipset_aec62xx(struct pci_dev *dev, const char *name) { int bus_speed = system_bus_clock(); @@ -184,34 +171,21 @@ static unsigned int __devinit init_chipset_aec62xx(struct pci_dev *dev, const ch static void __devinit init_hwif_aec62xx(ide_hwif_t *hwif) { struct pci_dev *dev = hwif->pci_dev; - u8 reg54 = 0, mask = hwif->channel ? 0xf0 : 0x0f; - unsigned long flags; hwif->set_pio_mode = &aec_set_pio_mode; - if (dev->device == PCI_DEVICE_ID_ARTOP_ATP850UF) { - if(hwif->mate) - hwif->mate->serialized = hwif->serialized = 1; + if (dev->device == PCI_DEVICE_ID_ARTOP_ATP850UF) hwif->set_dma_mode = &aec6210_set_mode; - } else + else hwif->set_dma_mode = &aec6260_set_mode; - hwif->drives[0].autotune = hwif->drives[1].autotune = 1; - if (hwif->dma_base == 0) return; - hwif->ultra_mask = hwif->cds->udma_mask; - hwif->mwdma_mask = 0x07; - - hwif->dma_lost_irq = &aec62xx_dma_lost_irq; + if (dev->device == PCI_DEVICE_ID_ARTOP_ATP850UF) + return; - if (dev->device == PCI_DEVICE_ID_ARTOP_ATP850UF) { - spin_lock_irqsave(&ide_lock, flags); - pci_read_config_byte (dev, 0x54, ®54); - pci_write_config_byte(dev, 0x54, (reg54 & ~mask)); - spin_unlock_irqrestore(&ide_lock, flags); - } else if (hwif->cbl != ATA_CBL_PATA40_SHORT) { + if (hwif->cbl != ATA_CBL_PATA40_SHORT) { u8 ata66 = 0, mask = hwif->channel ? 0x02 : 0x01; pci_read_config_byte(hwif->pci_dev, 0x49, &ata66); @@ -220,73 +194,53 @@ static void __devinit init_hwif_aec62xx(ide_hwif_t *hwif) } } -static int __devinit init_setup_aec62xx(struct pci_dev *dev, ide_pci_device_t *d) -{ - return ide_setup_pci_device(dev, d); -} - -static int __devinit init_setup_aec6x80(struct pci_dev *dev, ide_pci_device_t *d) -{ - unsigned long dma_base = pci_resource_start(dev, 4); - - if (inb(dma_base + 2) & 0x10) { - d->name = (dev->device == PCI_DEVICE_ID_ARTOP_ATP865R) ? - "AEC6880R" : "AEC6880"; - d->udma_mask = 0x7f; /* udma0-6 */ - } - - return ide_setup_pci_device(dev, d); -} - -static ide_pci_device_t aec62xx_chipsets[] __devinitdata = { +static const struct ide_port_info aec62xx_chipsets[] __devinitdata = { { /* 0 */ .name = "AEC6210", - .init_setup = init_setup_aec62xx, .init_chipset = init_chipset_aec62xx, .init_hwif = init_hwif_aec62xx, - .autodma = AUTODMA, .enablebits = {{0x4a,0x02,0x02}, {0x4a,0x04,0x04}}, - .bootable = OFF_BOARD, + .host_flags = IDE_HFLAG_SERIALIZE | + IDE_HFLAG_NO_ATAPI_DMA | + IDE_HFLAG_OFF_BOARD, .pio_mask = ATA_PIO4, - .udma_mask = 0x07, /* udma0-2 */ + .mwdma_mask = ATA_MWDMA2, + .udma_mask = ATA_UDMA2, },{ /* 1 */ .name = "AEC6260", - .init_setup = init_setup_aec62xx, .init_chipset = init_chipset_aec62xx, .init_hwif = init_hwif_aec62xx, - .autodma = NOAUTODMA, - .bootable = OFF_BOARD, + .host_flags = IDE_HFLAG_NO_ATAPI_DMA | IDE_HFLAG_NO_AUTODMA | + IDE_HFLAG_OFF_BOARD, .pio_mask = ATA_PIO4, - .udma_mask = 0x1f, /* udma0-4 */ + .mwdma_mask = ATA_MWDMA2, + .udma_mask = ATA_UDMA4, },{ /* 2 */ .name = "AEC6260R", - .init_setup = init_setup_aec62xx, .init_chipset = init_chipset_aec62xx, .init_hwif = init_hwif_aec62xx, - .autodma = AUTODMA, .enablebits = {{0x4a,0x02,0x02}, {0x4a,0x04,0x04}}, - .bootable = NEVER_BOARD, + .host_flags = IDE_HFLAG_NO_ATAPI_DMA, .pio_mask = ATA_PIO4, - .udma_mask = 0x1f, /* udma0-4 */ + .mwdma_mask = ATA_MWDMA2, + .udma_mask = ATA_UDMA4, },{ /* 3 */ .name = "AEC6280", - .init_setup = init_setup_aec6x80, .init_chipset = init_chipset_aec62xx, .init_hwif = init_hwif_aec62xx, - .autodma = AUTODMA, - .bootable = OFF_BOARD, + .host_flags = IDE_HFLAG_NO_ATAPI_DMA | IDE_HFLAG_OFF_BOARD, .pio_mask = ATA_PIO4, - .udma_mask = 0x3f, /* udma0-5 */ + .mwdma_mask = ATA_MWDMA2, + .udma_mask = ATA_UDMA5, },{ /* 4 */ .name = "AEC6280R", - .init_setup = init_setup_aec6x80, .init_chipset = init_chipset_aec62xx, .init_hwif = init_hwif_aec62xx, - .autodma = AUTODMA, .enablebits = {{0x4a,0x02,0x02}, {0x4a,0x04,0x04}}, - .bootable = OFF_BOARD, + .host_flags = IDE_HFLAG_NO_ATAPI_DMA | IDE_HFLAG_OFF_BOARD, .pio_mask = ATA_PIO4, - .udma_mask = 0x3f, /* udma0-5 */ + .mwdma_mask = ATA_MWDMA2, + .udma_mask = ATA_UDMA5, } }; @@ -299,14 +253,26 @@ static ide_pci_device_t aec62xx_chipsets[] __devinitdata = { * finds a device matching our IDE device tables. * * NOTE: since we're going to modify the 'name' field for AEC-6[26]80[R] - * chips, pass a local copy of 'struct pci_device_id' down the call chain. + * chips, pass a local copy of 'struct ide_port_info' down the call chain. */ - + static int __devinit aec62xx_init_one(struct pci_dev *dev, const struct pci_device_id *id) { - ide_pci_device_t d = aec62xx_chipsets[id->driver_data]; + struct ide_port_info d; + u8 idx = id->driver_data; + + d = aec62xx_chipsets[idx]; + + if (idx == 3 || idx == 4) { + unsigned long dma_base = pci_resource_start(dev, 4); + + if (inb(dma_base + 2) & 0x10) { + d.name = (idx == 4) ? "AEC6880R" : "AEC6880"; + d.udma_mask = ATA_UDMA6; + } + } - return d.init_setup(dev, &d); + return ide_setup_pci_device(dev, &d); } static const struct pci_device_id aec62xx_pci_tbl[] = { diff --git a/drivers/ide/pci/alim15x3.c b/drivers/ide/pci/alim15x3.c index 31d4e50647d..a607dd31a64 100644 --- a/drivers/ide/pci/alim15x3.c +++ b/drivers/ide/pci/alim15x3.c @@ -1,5 +1,5 @@ /* - * linux/drivers/ide/pci/alim15x3.c Version 0.26 Jul 14 2007 + * linux/drivers/ide/pci/alim15x3.c Version 0.29 Sep 16 2007 * * Copyright (C) 1998-2000 Michel Aubry, Maintainer * Copyright (C) 1998-2000 Andrzej Krzysztofowicz, Maintainer @@ -492,6 +492,13 @@ static unsigned int __devinit init_chipset_ali15x3 (struct pci_dev *dev, const c * clear bit 7 */ pci_write_config_byte(dev, 0x4b, tmpbyte & 0x7F); + /* + * check m1533, 0x5e, bit 1~4 == 1001 => & 00011110 = 00010010 + */ + if (m5229_revision >= 0x20 && isa_dev) { + pci_read_config_byte(isa_dev, 0x5e, &tmpbyte); + chip_is_1543c_e = ((tmpbyte & 0x1e) == 0x12) ? 1: 0; + } goto out; } @@ -537,7 +544,30 @@ static unsigned int __devinit init_chipset_ali15x3 (struct pci_dev *dev, const c pci_write_config_byte(isa_dev, 0x79, tmpbyte | 0x02); } } + out: + /* + * CD_ROM DMA on (m5229, 0x53, bit0) + * Enable this bit even if we want to use PIO. + * PIO FIFO off (m5229, 0x53, bit1) + * The hardware will use 0x54h and 0x55h to control PIO FIFO. + * (Not on later devices it seems) + * + * 0x53 changes meaning on later revs - we must no touch + * bit 1 on them. Need to check if 0x20 is the right break. + */ + if (m5229_revision >= 0x20) { + pci_read_config_byte(dev, 0x53, &tmpbyte); + + if (m5229_revision <= 0x20) + tmpbyte = (tmpbyte & (~0x02)) | 0x01; + else if (m5229_revision == 0xc7 || m5229_revision == 0xc8) + tmpbyte |= 0x03; + else + tmpbyte |= 0x01; + + pci_write_config_byte(dev, 0x53, tmpbyte); + } pci_dev_put(north); pci_dev_put(isa_dev); local_irq_restore(flags); @@ -616,36 +646,8 @@ static u8 __devinit ata66_ali15x3(ide_hwif_t *hwif) if ((tmpbyte & (1 << hwif->channel)) == 0) cbl = ATA_CBL_PATA80; } - } else { - /* - * check m1533, 0x5e, bit 1~4 == 1001 => & 00011110 = 00010010 - */ - pci_read_config_byte(isa_dev, 0x5e, &tmpbyte); - chip_is_1543c_e = ((tmpbyte & 0x1e) == 0x12) ? 1: 0; } - /* - * CD_ROM DMA on (m5229, 0x53, bit0) - * Enable this bit even if we want to use PIO - * PIO FIFO off (m5229, 0x53, bit1) - * The hardware will use 0x54h and 0x55h to control PIO FIFO - * (Not on later devices it seems) - * - * 0x53 changes meaning on later revs - we must no touch - * bit 1 on them. Need to check if 0x20 is the right break - */ - - pci_read_config_byte(dev, 0x53, &tmpbyte); - - if(m5229_revision <= 0x20) - tmpbyte = (tmpbyte & (~0x02)) | 0x01; - else if (m5229_revision == 0xc7 || m5229_revision == 0xc8) - tmpbyte |= 0x03; - else - tmpbyte |= 0x01; - - pci_write_config_byte(dev, 0x53, tmpbyte); - local_irq_restore(flags); return cbl; @@ -664,35 +666,8 @@ static void __devinit init_hwif_common_ali15x3 (ide_hwif_t *hwif) hwif->set_dma_mode = &ali_set_dma_mode; hwif->udma_filter = &ali_udma_filter; - /* don't use LBA48 DMA on ALi devices before rev 0xC5 */ - hwif->no_lba48_dma = (m5229_revision <= 0xC4) ? 1 : 0; - - if (!hwif->dma_base) { - hwif->drives[0].autotune = 1; - hwif->drives[1].autotune = 1; + if (hwif->dma_base == 0) return; - } - - /* - * check in ->init_dma guarantees m5229_revision >= 0x20 here - */ - - if (m5229_revision > 0x20) - hwif->atapi_dma = 1; - - if (m5229_revision <= 0x20) - hwif->ultra_mask = 0x00; /* no udma */ - else if (m5229_revision < 0xC2) - hwif->ultra_mask = 0x07; /* udma0-2 */ - else if (m5229_revision == 0xC2 || m5229_revision == 0xC3) - hwif->ultra_mask = 0x1f; /* udma0-4 */ - else if (m5229_revision == 0xC4) - hwif->ultra_mask = 0x3f; /* udma0-5 */ - else - hwif->ultra_mask = 0x7f; /* udma0-6 */ - - hwif->mwdma_mask = 0x07; - hwif->swdma_mask = 0x07; hwif->dma_setup = &ali15x3_dma_setup; @@ -771,14 +746,15 @@ static void __devinit init_dma_ali15x3 (ide_hwif_t *hwif, unsigned long dmabase) ide_setup_dma(hwif, dmabase, 8); } -static ide_pci_device_t ali15x3_chipset __devinitdata = { +static const struct ide_port_info ali15x3_chipset __devinitdata = { .name = "ALI15X3", .init_chipset = init_chipset_ali15x3, .init_hwif = init_hwif_ali15x3, .init_dma = init_dma_ali15x3, - .autodma = AUTODMA, - .bootable = ON_BOARD, + .host_flags = IDE_HFLAG_BOOTABLE, .pio_mask = ATA_PIO5, + .swdma_mask = ATA_SWDMA2, + .mwdma_mask = ATA_MWDMA2, }; /** @@ -796,15 +772,34 @@ static int __devinit alim15x3_init_one(struct pci_dev *dev, const struct pci_dev { }, }; - ide_pci_device_t *d = &ali15x3_chipset; + struct ide_port_info d = ali15x3_chipset; + u8 rev = dev->revision; if (pci_dev_present(ati_rs100)) printk(KERN_WARNING "alim15x3: ATI Radeon IGP Northbridge is not yet fully tested.\n"); + /* don't use LBA48 DMA on ALi devices before rev 0xC5 */ + if (rev <= 0xC4) + d.host_flags |= IDE_HFLAG_NO_LBA48_DMA; + + if (rev >= 0x20) { + if (rev == 0x20) + d.host_flags |= IDE_HFLAG_NO_ATAPI_DMA; + + if (rev < 0xC2) + d.udma_mask = ATA_UDMA2; + else if (rev == 0xC2 || rev == 0xC3) + d.udma_mask = ATA_UDMA4; + else if (rev == 0xC4) + d.udma_mask = ATA_UDMA5; + else + d.udma_mask = ATA_UDMA6; + } + #if defined(CONFIG_SPARC64) - d->init_hwif = init_hwif_common_ali15x3; + d.init_hwif = init_hwif_common_ali15x3; #endif /* CONFIG_SPARC64 */ - return ide_setup_pci_device(dev, d); + return ide_setup_pci_device(dev, &d); } diff --git a/drivers/ide/pci/amd74xx.c b/drivers/ide/pci/amd74xx.c index 3bf3d931eea..8d4125ec252 100644 --- a/drivers/ide/pci/amd74xx.c +++ b/drivers/ide/pci/amd74xx.c @@ -77,7 +77,7 @@ static struct amd_ide_chip { }; static struct amd_ide_chip *amd_config; -static ide_pci_device_t *amd_chipset; +static const struct ide_port_info *amd_chipset; static unsigned int amd_80w; static unsigned int amd_clock; @@ -233,7 +233,6 @@ static unsigned int __devinit init_chipset_amd74xx(struct pci_dev *dev, const ch * Print the boot message. */ - pci_read_config_byte(dev, PCI_REVISION_ID, &t); printk(KERN_INFO "%s: %s (rev %02x) UDMA%s controller\n", amd_chipset->name, pci_name(dev), dev->revision, amd_dma[fls(amd_config->udma_mask) - 1]); @@ -243,29 +242,18 @@ static unsigned int __devinit init_chipset_amd74xx(struct pci_dev *dev, const ch static void __devinit init_hwif_amd74xx(ide_hwif_t *hwif) { - int i; - if (hwif->irq == 0) /* 0 is bogus but will do for now */ hwif->irq = pci_get_legacy_ide_irq(hwif->pci_dev, hwif->channel); hwif->set_pio_mode = &amd_set_pio_mode; hwif->set_dma_mode = &amd_set_drive; - for (i = 0; i < 2; i++) { - hwif->drives[i].io_32bit = 1; - hwif->drives[i].unmask = 1; - hwif->drives[i].autotune = 1; - } - if (!hwif->dma_base) return; - hwif->atapi_dma = 1; - hwif->ultra_mask = amd_config->udma_mask; - hwif->mwdma_mask = 0x07; - if ((amd_config->flags & AMD_BAD_SWDMA) == 0) - hwif->swdma_mask = 0x07; + if (amd_config->flags & AMD_BAD_SWDMA) + hwif->swdma_mask = 0x00; if (hwif->cbl != ATA_CBL_PATA40_SHORT) { if ((amd_80w >> hwif->channel) & 1) @@ -275,18 +263,24 @@ static void __devinit init_hwif_amd74xx(ide_hwif_t *hwif) } } +#define IDE_HFLAGS_AMD \ + (IDE_HFLAG_PIO_NO_BLACKLIST | \ + IDE_HFLAG_PIO_NO_DOWNGRADE | \ + IDE_HFLAG_POST_SET_MODE | \ + IDE_HFLAG_IO_32BIT | \ + IDE_HFLAG_UNMASK_IRQS | \ + IDE_HFLAG_BOOTABLE) + #define DECLARE_AMD_DEV(name_str) \ { \ .name = name_str, \ .init_chipset = init_chipset_amd74xx, \ .init_hwif = init_hwif_amd74xx, \ - .autodma = AUTODMA, \ .enablebits = {{0x40,0x02,0x02}, {0x40,0x01,0x01}}, \ - .bootable = ON_BOARD, \ - .host_flags = IDE_HFLAG_PIO_NO_BLACKLIST \ - | IDE_HFLAG_PIO_NO_DOWNGRADE \ - | IDE_HFLAG_POST_SET_MODE, \ + .host_flags = IDE_HFLAGS_AMD, \ .pio_mask = ATA_PIO5, \ + .swdma_mask = ATA_SWDMA2, \ + .mwdma_mask = ATA_MWDMA2, \ } #define DECLARE_NV_DEV(name_str) \ @@ -294,16 +288,14 @@ static void __devinit init_hwif_amd74xx(ide_hwif_t *hwif) .name = name_str, \ .init_chipset = init_chipset_amd74xx, \ .init_hwif = init_hwif_amd74xx, \ - .autodma = AUTODMA, \ .enablebits = {{0x50,0x02,0x02}, {0x50,0x01,0x01}}, \ - .bootable = ON_BOARD, \ - .host_flags = IDE_HFLAG_PIO_NO_BLACKLIST \ - | IDE_HFLAG_PIO_NO_DOWNGRADE \ - | IDE_HFLAG_POST_SET_MODE, \ + .host_flags = IDE_HFLAGS_AMD, \ .pio_mask = ATA_PIO5, \ + .swdma_mask = ATA_SWDMA2, \ + .mwdma_mask = ATA_MWDMA2, \ } -static ide_pci_device_t amd74xx_chipsets[] __devinitdata = { +static const struct ide_port_info amd74xx_chipsets[] __devinitdata = { /* 0 */ DECLARE_AMD_DEV("AMD7401"), /* 1 */ DECLARE_AMD_DEV("AMD7409"), /* 2 */ DECLARE_AMD_DEV("AMD7411"), diff --git a/drivers/ide/pci/atiixp.c b/drivers/ide/pci/atiixp.c index 446900da132..ef8e0164ef7 100644 --- a/drivers/ide/pci/atiixp.c +++ b/drivers/ide/pci/atiixp.c @@ -172,21 +172,12 @@ static void __devinit init_hwif_atiixp(ide_hwif_t *hwif) u8 ch = hwif->channel; struct pci_dev *pdev = hwif->pci_dev; - if (!hwif->irq) - hwif->irq = ch ? 15 : 14; - hwif->set_pio_mode = &atiixp_set_pio_mode; hwif->set_dma_mode = &atiixp_set_dma_mode; - hwif->drives[0].autotune = 1; - hwif->drives[1].autotune = 1; if (!hwif->dma_base) return; - hwif->atapi_dma = 1; - hwif->ultra_mask = 0x3f; - hwif->mwdma_mask = 0x07; - pci_read_config_byte(pdev, ATIIXP_IDE_UDMA_MODE + ch, &udma_mode); if ((udma_mode & 0x07) >= 0x04 || (udma_mode & 0x70) >= 0x40) @@ -198,23 +189,24 @@ static void __devinit init_hwif_atiixp(ide_hwif_t *hwif) hwif->dma_host_off = &atiixp_dma_host_off; } - -static ide_pci_device_t atiixp_pci_info[] __devinitdata = { +static const struct ide_port_info atiixp_pci_info[] __devinitdata = { { /* 0 */ .name = "ATIIXP", .init_hwif = init_hwif_atiixp, - .autodma = AUTODMA, .enablebits = {{0x48,0x01,0x00}, {0x48,0x08,0x00}}, - .bootable = ON_BOARD, + .host_flags = IDE_HFLAG_LEGACY_IRQS | IDE_HFLAG_BOOTABLE, .pio_mask = ATA_PIO4, + .mwdma_mask = ATA_MWDMA2, + .udma_mask = ATA_UDMA5, },{ /* 1 */ .name = "SB600_PATA", .init_hwif = init_hwif_atiixp, - .autodma = AUTODMA, .enablebits = {{0x48,0x01,0x00}, {0x00,0x00,0x00}}, - .bootable = ON_BOARD, - .host_flags = IDE_HFLAG_SINGLE, + .host_flags = IDE_HFLAG_SINGLE | IDE_HFLAG_LEGACY_IRQS | + IDE_HFLAG_BOOTABLE, .pio_mask = ATA_PIO4, + .mwdma_mask = ATA_MWDMA2, + .udma_mask = ATA_UDMA5, }, }; diff --git a/drivers/ide/pci/cmd640.c b/drivers/ide/pci/cmd640.c index f369645e4d1..4aa48104e0c 100644 --- a/drivers/ide/pci/cmd640.c +++ b/drivers/ide/pci/cmd640.c @@ -185,6 +185,8 @@ static u8 recovery_counts[4] = {16, 16, 16, 16}; /* Recovery count (encoded) */ #endif /* CONFIG_BLK_DEV_CMD640_ENHANCED */ +static DEFINE_SPINLOCK(cmd640_lock); + /* * These are initialized to point at the devices we control */ @@ -258,12 +260,12 @@ static u8 get_cmd640_reg_vlb (u16 reg) static u8 get_cmd640_reg(u16 reg) { - u8 b; unsigned long flags; + u8 b; - spin_lock_irqsave(&ide_lock, flags); + spin_lock_irqsave(&cmd640_lock, flags); b = __get_cmd640_reg(reg); - spin_unlock_irqrestore(&ide_lock, flags); + spin_unlock_irqrestore(&cmd640_lock, flags); return b; } @@ -271,9 +273,9 @@ static void put_cmd640_reg(u16 reg, u8 val) { unsigned long flags; - spin_lock_irqsave(&ide_lock, flags); + spin_lock_irqsave(&cmd640_lock, flags); __put_cmd640_reg(reg,val); - spin_unlock_irqrestore(&ide_lock, flags); + spin_unlock_irqrestore(&cmd640_lock, flags); } static int __init match_pci_cmd640_device (void) @@ -351,7 +353,7 @@ static int __init secondary_port_responding (void) { unsigned long flags; - spin_lock_irqsave(&ide_lock, flags); + spin_lock_irqsave(&cmd640_lock, flags); outb_p(0x0a, 0x170 + IDE_SELECT_OFFSET); /* select drive0 */ udelay(100); @@ -359,11 +361,11 @@ static int __init secondary_port_responding (void) outb_p(0x1a, 0x170 + IDE_SELECT_OFFSET); /* select drive1 */ udelay(100); if ((inb_p(0x170 + IDE_SELECT_OFFSET) & 0x1f) != 0x1a) { - spin_unlock_irqrestore(&ide_lock, flags); + spin_unlock_irqrestore(&cmd640_lock, flags); return 0; /* nothing responded */ } } - spin_unlock_irqrestore(&ide_lock, flags); + spin_unlock_irqrestore(&cmd640_lock, flags); return 1; /* success */ } @@ -440,11 +442,11 @@ static void __init setup_device_ptrs (void) static void set_prefetch_mode (unsigned int index, int mode) { ide_drive_t *drive = cmd_drives[index]; + unsigned long flags; int reg = prefetch_regs[index]; u8 b; - unsigned long flags; - spin_lock_irqsave(&ide_lock, flags); + spin_lock_irqsave(&cmd640_lock, flags); b = __get_cmd640_reg(reg); if (mode) { /* want prefetch on? */ #if CMD640_PREFETCH_MASKS @@ -460,7 +462,7 @@ static void set_prefetch_mode (unsigned int index, int mode) b |= prefetch_masks[index]; /* disable prefetch */ } __put_cmd640_reg(reg, b); - spin_unlock_irqrestore(&ide_lock, flags); + spin_unlock_irqrestore(&cmd640_lock, flags); } /* @@ -561,7 +563,7 @@ static void program_drive_counts (unsigned int index) /* * Now that everything is ready, program the new timings */ - spin_lock_irqsave(&ide_lock, flags); + spin_lock_irqsave(&cmd640_lock, flags); /* * Program the address_setup clocks into ARTTIM reg, * and then the active/recovery counts into the DRWTIM reg @@ -570,7 +572,7 @@ static void program_drive_counts (unsigned int index) setup_count |= __get_cmd640_reg(arttim_regs[index]) & 0x3f; __put_cmd640_reg(arttim_regs[index], setup_count); __put_cmd640_reg(drwtim_regs[index], pack_nibbles(active_count, recovery_count)); - spin_unlock_irqrestore(&ide_lock, flags); + spin_unlock_irqrestore(&cmd640_lock, flags); } /* @@ -670,20 +672,20 @@ static void cmd640_set_pio_mode(ide_drive_t *drive, const u8 pio) static int pci_conf1(void) { - u32 tmp; unsigned long flags; + u32 tmp; - spin_lock_irqsave(&ide_lock, flags); + spin_lock_irqsave(&cmd640_lock, flags); outb(0x01, 0xCFB); tmp = inl(0xCF8); outl(0x80000000, 0xCF8); if (inl(0xCF8) == 0x80000000) { outl(tmp, 0xCF8); - spin_unlock_irqrestore(&ide_lock, flags); + spin_unlock_irqrestore(&cmd640_lock, flags); return 1; } outl(tmp, 0xCF8); - spin_unlock_irqrestore(&ide_lock, flags); + spin_unlock_irqrestore(&cmd640_lock, flags); return 0; } @@ -691,15 +693,15 @@ static int pci_conf2(void) { unsigned long flags; - spin_lock_irqsave(&ide_lock, flags); + spin_lock_irqsave(&cmd640_lock, flags); outb(0x00, 0xCFB); outb(0x00, 0xCF8); outb(0x00, 0xCFA); if (inb(0xCF8) == 0x00 && inb(0xCF8) == 0x00) { - spin_unlock_irqrestore(&ide_lock, flags); + spin_unlock_irqrestore(&cmd640_lock, flags); return 1; } - spin_unlock_irqrestore(&ide_lock, flags); + spin_unlock_irqrestore(&cmd640_lock, flags); return 0; } diff --git a/drivers/ide/pci/cmd64x.c b/drivers/ide/pci/cmd64x.c index f3d3bde8dab..ea0143ef5fe 100644 --- a/drivers/ide/pci/cmd64x.c +++ b/drivers/ide/pci/cmd64x.c @@ -439,11 +439,8 @@ static unsigned int __devinit init_chipset_cmd64x(struct pci_dev *dev, const cha u8 mrdmode = 0; if (dev->device == PCI_DEVICE_ID_CMD_646) { - u8 rev = 0; - pci_read_config_byte(dev, PCI_REVISION_ID, &rev); - - switch (rev) { + switch (dev->revision) { case 0x07: case 0x05: printk("%s: UltraDMA capable\n", name); @@ -505,22 +502,13 @@ static u8 __devinit ata66_cmd64x(ide_hwif_t *hwif) static void __devinit init_hwif_cmd64x(ide_hwif_t *hwif) { struct pci_dev *dev = hwif->pci_dev; - u8 rev = 0; - - pci_read_config_byte(dev, PCI_REVISION_ID, &rev); hwif->set_pio_mode = &cmd64x_set_pio_mode; hwif->set_dma_mode = &cmd64x_set_dma_mode; - hwif->drives[0].autotune = hwif->drives[1].autotune = 1; - if (!hwif->dma_base) return; - hwif->atapi_dma = 1; - hwif->mwdma_mask = 0x07; - hwif->ultra_mask = hwif->cds->udma_mask; - /* * UltraDMA only supported on PCI646U and PCI646U2, which * correspond to revisions 0x03, 0x05 and 0x07 respectively. @@ -533,7 +521,7 @@ static void __devinit init_hwif_cmd64x(ide_hwif_t *hwif) * * So we only do UltraDMA on revision 0x05 and 0x07 chipsets. */ - if (dev->device == PCI_DEVICE_ID_CMD_646 && rev < 5) + if (dev->device == PCI_DEVICE_ID_CMD_646 && dev->revision < 5) hwif->ultra_mask = 0x00; if (hwif->cbl != ATA_CBL_PATA40_SHORT) @@ -547,11 +535,10 @@ static void __devinit init_hwif_cmd64x(ide_hwif_t *hwif) hwif->ide_dma_test_irq = &cmd648_ide_dma_test_irq; break; case PCI_DEVICE_ID_CMD_646: - hwif->chipset = ide_cmd646; - if (rev == 0x01) { + if (dev->revision == 0x01) { hwif->ide_dma_end = &cmd646_1_ide_dma_end; break; - } else if (rev >= 0x03) + } else if (dev->revision >= 0x03) goto alt_irq_bits; /* fall thru */ default: @@ -561,80 +548,62 @@ static void __devinit init_hwif_cmd64x(ide_hwif_t *hwif) } } -static int __devinit init_setup_cmd64x(struct pci_dev *dev, ide_pci_device_t *d) -{ - return ide_setup_pci_device(dev, d); -} - -static int __devinit init_setup_cmd646(struct pci_dev *dev, ide_pci_device_t *d) -{ - /* - * The original PCI0646 didn't have the primary channel enable bit, - * it appeared starting with PCI0646U (i.e. revision ID 3). - */ - if (dev->revision < 3) - d->enablebits[0].reg = 0; - - return ide_setup_pci_device(dev, d); -} - -static ide_pci_device_t cmd64x_chipsets[] __devinitdata = { +static const struct ide_port_info cmd64x_chipsets[] __devinitdata = { { /* 0 */ .name = "CMD643", - .init_setup = init_setup_cmd64x, .init_chipset = init_chipset_cmd64x, .init_hwif = init_hwif_cmd64x, - .autodma = AUTODMA, .enablebits = {{0x00,0x00,0x00}, {0x51,0x08,0x08}}, - .bootable = ON_BOARD, - .host_flags = IDE_HFLAG_ABUSE_PREFETCH, + .host_flags = IDE_HFLAG_ABUSE_PREFETCH | IDE_HFLAG_BOOTABLE, .pio_mask = ATA_PIO5, + .mwdma_mask = ATA_MWDMA2, .udma_mask = 0x00, /* no udma */ },{ /* 1 */ .name = "CMD646", - .init_setup = init_setup_cmd646, .init_chipset = init_chipset_cmd64x, .init_hwif = init_hwif_cmd64x, - .autodma = AUTODMA, .enablebits = {{0x51,0x04,0x04}, {0x51,0x08,0x08}}, - .bootable = ON_BOARD, - .host_flags = IDE_HFLAG_ABUSE_PREFETCH, + .host_flags = IDE_HFLAG_ABUSE_PREFETCH | IDE_HFLAG_BOOTABLE, .pio_mask = ATA_PIO5, - .udma_mask = 0x07, /* udma0-2 */ + .mwdma_mask = ATA_MWDMA2, + .udma_mask = ATA_UDMA2, },{ /* 2 */ .name = "CMD648", - .init_setup = init_setup_cmd64x, .init_chipset = init_chipset_cmd64x, .init_hwif = init_hwif_cmd64x, - .autodma = AUTODMA, .enablebits = {{0x51,0x04,0x04}, {0x51,0x08,0x08}}, - .bootable = ON_BOARD, - .host_flags = IDE_HFLAG_ABUSE_PREFETCH, + .chipset = ide_cmd646, + .host_flags = IDE_HFLAG_ABUSE_PREFETCH | IDE_HFLAG_BOOTABLE, .pio_mask = ATA_PIO5, - .udma_mask = 0x1f, /* udma0-4 */ + .mwdma_mask = ATA_MWDMA2, + .udma_mask = ATA_UDMA4, },{ /* 3 */ .name = "CMD649", - .init_setup = init_setup_cmd64x, .init_chipset = init_chipset_cmd64x, .init_hwif = init_hwif_cmd64x, - .autodma = AUTODMA, .enablebits = {{0x51,0x04,0x04}, {0x51,0x08,0x08}}, - .bootable = ON_BOARD, - .host_flags = IDE_HFLAG_ABUSE_PREFETCH, + .host_flags = IDE_HFLAG_ABUSE_PREFETCH | IDE_HFLAG_BOOTABLE, .pio_mask = ATA_PIO5, - .udma_mask = 0x3f, /* udma0-5 */ + .mwdma_mask = ATA_MWDMA2, + .udma_mask = ATA_UDMA5, } }; -/* - * We may have to modify enablebits for PCI0646, so we'd better pass - * a local copy of the ide_pci_device_t structure down the call chain... - */ static int __devinit cmd64x_init_one(struct pci_dev *dev, const struct pci_device_id *id) { - ide_pci_device_t d = cmd64x_chipsets[id->driver_data]; + struct ide_port_info d; + u8 idx = id->driver_data; + + d = cmd64x_chipsets[idx]; + + /* + * The original PCI0646 didn't have the primary channel enable bit, + * it appeared starting with PCI0646U (i.e. revision ID 3). + */ + if (idx == 1 && dev->revision < 3) + d.enablebits[0].reg = 0; - return d.init_setup(dev, &d); + return ide_setup_pci_device(dev, &d); } static const struct pci_device_id cmd64x_pci_tbl[] = { diff --git a/drivers/ide/pci/cs5520.c b/drivers/ide/pci/cs5520.c index a8bf4940ca9..0466462fd21 100644 --- a/drivers/ide/pci/cs5520.c +++ b/drivers/ide/pci/cs5520.c @@ -106,18 +106,6 @@ static void cs5520_set_dma_mode(ide_drive_t *drive, const u8 speed) } /* - * We provide a callback for our nonstandard DMA location - */ - -static void __devinit cs5520_init_setup_dma(struct pci_dev *dev, ide_pci_device_t *d, ide_hwif_t *hwif) -{ - unsigned long bmide = pci_resource_start(dev, 2); /* Not the usual 4 */ - if(hwif->mate && hwif->mate->dma_base) /* Second channel at primary + 8 */ - bmide += 8; - ide_setup_dma(hwif, bmide, 8); -} - -/* * We wrap the DMA activate to set the vdma flag. This is needed * so that the IDE DMA layer issues PIO not DMA commands over the * DMA channel @@ -125,6 +113,7 @@ static void __devinit cs5520_init_setup_dma(struct pci_dev *dev, ide_pci_device_ static int cs5520_dma_on(ide_drive_t *drive) { + /* ATAPI is harder so leave it for now */ drive->vdma = 1; return 0; } @@ -134,33 +123,25 @@ static void __devinit init_hwif_cs5520(ide_hwif_t *hwif) hwif->set_pio_mode = &cs5520_set_pio_mode; hwif->set_dma_mode = &cs5520_set_dma_mode; - if (hwif->dma_base == 0) { - hwif->drives[1].autotune = hwif->drives[0].autotune = 1; + if (hwif->dma_base == 0) return; - } hwif->ide_dma_on = &cs5520_dma_on; - - /* ATAPI is harder so leave it for now */ - hwif->atapi_dma = 0; - hwif->ultra_mask = 0; - hwif->swdma_mask = 0; - hwif->mwdma_mask = 0; } #define DECLARE_CS_DEV(name_str) \ { \ .name = name_str, \ - .init_setup_dma = cs5520_init_setup_dma, \ .init_hwif = init_hwif_cs5520, \ - .autodma = AUTODMA, \ - .bootable = ON_BOARD, \ .host_flags = IDE_HFLAG_ISA_PORTS | \ - IDE_HFLAG_VDMA, \ + IDE_HFLAG_CS5520 | \ + IDE_HFLAG_VDMA | \ + IDE_HFLAG_NO_ATAPI_DMA | \ + IDE_HFLAG_BOOTABLE, \ .pio_mask = ATA_PIO4, \ } -static ide_pci_device_t cyrix_chipsets[] __devinitdata = { +static const struct ide_port_info cyrix_chipsets[] __devinitdata = { /* 0 */ DECLARE_CS_DEV("Cyrix 5510"), /* 1 */ DECLARE_CS_DEV("Cyrix 5520") }; @@ -173,9 +154,8 @@ static ide_pci_device_t cyrix_chipsets[] __devinitdata = { static int __devinit cs5520_init_one(struct pci_dev *dev, const struct pci_device_id *id) { - ide_hwif_t *hwif = NULL, *mate = NULL; - ata_index_t index; - ide_pci_device_t *d = &cyrix_chipsets[id->driver_data]; + const struct ide_port_info *d = &cyrix_chipsets[id->driver_data]; + u8 idx[4] = { 0xff, 0xff, 0xff, 0xff }; ide_setup_pci_noise(dev, d); @@ -191,29 +171,14 @@ static int __devinit cs5520_init_one(struct pci_dev *dev, const struct pci_devic return -ENODEV; } - index.all = 0xf0f0; - /* * Now the chipset is configured we can let the core * do all the device setup for us */ - ide_pci_setup_ports(dev, d, 14, &index); - - if ((index.b.low & 0xf0) != 0xf0) - hwif = &ide_hwifs[index.b.low]; - if ((index.b.high & 0xf0) != 0xf0) - mate = &ide_hwifs[index.b.high]; - - if (hwif) - probe_hwif_init(hwif); - if (mate) - probe_hwif_init(mate); + ide_pci_setup_ports(dev, d, 14, &idx[0]); - if (hwif) - ide_proc_register_port(hwif); - if (mate) - ide_proc_register_port(mate); + ide_device_add(idx); return 0; } diff --git a/drivers/ide/pci/cs5530.c b/drivers/ide/pci/cs5530.c index 0d23b8aabe9..599408952bd 100644 --- a/drivers/ide/pci/cs5530.c +++ b/drivers/ide/pci/cs5530.c @@ -1,5 +1,5 @@ /* - * linux/drivers/ide/pci/cs5530.c Version 0.76 Aug 3 2007 + * linux/drivers/ide/pci/cs5530.c Version 0.77 Sep 24 2007 * * Copyright (C) 2000 Andre Hedrick <andre@linux-ide.org> * Copyright (C) 2000 Mark Lord <mlord@pobox.com> @@ -146,7 +146,6 @@ static void cs5530_set_dma_mode(ide_drive_t *drive, const u8 mode) static unsigned int __devinit init_chipset_cs5530 (struct pci_dev *dev, const char *name) { struct pci_dev *master_0 = NULL, *cs5530_0 = NULL; - unsigned long flags; if (pci_resource_start(dev, 4) == 0) return -EFAULT; @@ -171,9 +170,6 @@ static unsigned int __devinit init_chipset_cs5530 (struct pci_dev *dev, const ch goto out; } - spin_lock_irqsave(&ide_lock, flags); - /* all CPUs (there should only be one CPU with this chipset) */ - /* * Enable BusMaster and MemoryWriteAndInvalidate for the cs5530: * --> OR 0x14 into 16-bit PCI COMMAND reg of function 0 of the cs5530 @@ -224,8 +220,6 @@ static unsigned int __devinit init_chipset_cs5530 (struct pci_dev *dev, const ch pci_write_config_byte(master_0, 0x42, 0x00); pci_write_config_byte(master_0, 0x43, 0xc1); - spin_unlock_irqrestore(&ide_lock, flags); - out: pci_dev_put(master_0); pci_dev_put(cs5530_0); @@ -245,9 +239,6 @@ static void __devinit init_hwif_cs5530 (ide_hwif_t *hwif) unsigned long basereg; u32 d0_timings; - if (hwif->mate) - hwif->serialized = hwif->mate->serialized = 1; - hwif->set_pio_mode = &cs5530_set_pio_mode; hwif->set_dma_mode = &cs5530_set_dma_mode; @@ -258,27 +249,22 @@ static void __devinit init_hwif_cs5530 (ide_hwif_t *hwif) if (CS5530_BAD_PIO(inl(basereg + 8))) outl(cs5530_pio_timings[(d0_timings >> 31) & 1][0], basereg + 8); - hwif->drives[0].autotune = 1; - hwif->drives[1].autotune = 1; - if (hwif->dma_base == 0) return; - hwif->atapi_dma = 1; - hwif->ultra_mask = 0x07; - hwif->mwdma_mask = 0x07; - hwif->udma_filter = cs5530_udma_filter; } -static ide_pci_device_t cs5530_chipset __devinitdata = { +static const struct ide_port_info cs5530_chipset __devinitdata = { .name = "CS5530", .init_chipset = init_chipset_cs5530, .init_hwif = init_hwif_cs5530, - .autodma = AUTODMA, - .bootable = ON_BOARD, + .host_flags = IDE_HFLAG_SERIALIZE | + IDE_HFLAG_POST_SET_MODE | + IDE_HFLAG_BOOTABLE, .pio_mask = ATA_PIO4, - .host_flags = IDE_HFLAG_POST_SET_MODE, + .mwdma_mask = ATA_MWDMA2, + .udma_mask = ATA_UDMA2, }; static int __devinit cs5530_init_one(struct pci_dev *dev, const struct pci_device_id *id) diff --git a/drivers/ide/pci/cs5535.c b/drivers/ide/pci/cs5535.c index e4891a16afe..9094916e378 100644 --- a/drivers/ide/pci/cs5535.c +++ b/drivers/ide/pci/cs5535.c @@ -84,7 +84,7 @@ static void cs5535_set_speed(ide_drive_t *drive, const u8 speed) /* Set the PIO timings */ if ((speed & XFER_MODE) == XFER_PIO) { - ide_drive_t *pair = &drive->hwif->drives[drive->dn ^ 1]; + ide_drive_t *pair = ide_get_paired_drive(drive); u8 cmd, pioa; cmd = pioa = speed - XFER_PIO_0; @@ -180,25 +180,20 @@ static void __devinit init_hwif_cs5535(ide_hwif_t *hwif) hwif->set_pio_mode = &cs5535_set_pio_mode; hwif->set_dma_mode = &cs5535_set_dma_mode; - hwif->drives[1].autotune = hwif->drives[0].autotune = 1; - if (hwif->dma_base == 0) return; - hwif->atapi_dma = 1; - hwif->ultra_mask = 0x1F; - hwif->mwdma_mask = 0x07; - hwif->cbl = cs5535_cable_detect(hwif->pci_dev); } -static ide_pci_device_t cs5535_chipset __devinitdata = { +static const struct ide_port_info cs5535_chipset __devinitdata = { .name = "CS5535", .init_hwif = init_hwif_cs5535, - .autodma = AUTODMA, - .bootable = ON_BOARD, - .host_flags = IDE_HFLAG_SINGLE | IDE_HFLAG_POST_SET_MODE, + .host_flags = IDE_HFLAG_SINGLE | IDE_HFLAG_POST_SET_MODE | + IDE_HFLAG_BOOTABLE, .pio_mask = ATA_PIO4, + .mwdma_mask = ATA_MWDMA2, + .udma_mask = ATA_UDMA4, }; static int __devinit cs5535_init_one(struct pci_dev *dev, diff --git a/drivers/ide/pci/cy82c693.c b/drivers/ide/pci/cy82c693.c index c498ecfd7fc..3ef4fc10fe2 100644 --- a/drivers/ide/pci/cy82c693.c +++ b/drivers/ide/pci/cy82c693.c @@ -1,5 +1,5 @@ /* - * linux/drivers/ide/pci/cy82c693.c Version 0.40 Sep. 10, 2002 + * linux/drivers/ide/pci/cy82c693.c Version 0.41 Aug 27, 2007 * * Copyright (C) 1998-2000 Andreas S. Krebs (akrebs@altavista.net), Maintainer * Copyright (C) 1998-2002 Andre Hedrick <andre@linux-ide.org>, Integrator @@ -428,18 +428,10 @@ static unsigned int __devinit init_chipset_cy82c693(struct pci_dev *dev, const c */ static void __devinit init_hwif_cy82c693(ide_hwif_t *hwif) { - hwif->chipset = ide_cy82c693; hwif->set_pio_mode = &cy82c693_set_pio_mode; - if (!hwif->dma_base) { - hwif->drives[0].autotune = 1; - hwif->drives[1].autotune = 1; + if (hwif->dma_base == 0) return; - } - - hwif->atapi_dma = 1; - hwif->mwdma_mask = 0x04; - hwif->swdma_mask = 0x04; hwif->ide_dma_on = &cy82c693_ide_dma_on; } @@ -456,15 +448,17 @@ static void __devinit init_iops_cy82c693(ide_hwif_t *hwif) } } -static ide_pci_device_t cy82c693_chipset __devinitdata = { +static const struct ide_port_info cy82c693_chipset __devinitdata = { .name = "CY82C693", .init_chipset = init_chipset_cy82c693, .init_iops = init_iops_cy82c693, .init_hwif = init_hwif_cy82c693, - .autodma = AUTODMA, - .bootable = ON_BOARD, - .host_flags = IDE_HFLAG_SINGLE | IDE_HFLAG_TRUST_BIOS_FOR_DMA, + .chipset = ide_cy82c693, + .host_flags = IDE_HFLAG_SINGLE | IDE_HFLAG_TRUST_BIOS_FOR_DMA | + IDE_HFLAG_BOOTABLE, .pio_mask = ATA_PIO4, + .swdma_mask = ATA_SWDMA2_ONLY, + .mwdma_mask = ATA_MWDMA2_ONLY, }; static int __devinit cy82c693_init_one(struct pci_dev *dev, const struct pci_device_id *id) diff --git a/drivers/ide/pci/delkin_cb.c b/drivers/ide/pci/delkin_cb.c index 46f4a888c03..83829081640 100644 --- a/drivers/ide/pci/delkin_cb.c +++ b/drivers/ide/pci/delkin_cb.c @@ -80,7 +80,7 @@ delkin_cb_probe (struct pci_dev *dev, const struct pci_device_id *id) hw.irq = dev->irq; hw.chipset = ide_pci; /* this enables IRQ sharing */ - rc = ide_register_hw_with_fixup(&hw, 0, &hwif, ide_undecoded_slave); + rc = ide_register_hw(&hw, &ide_undecoded_slave, 0, &hwif); if (rc < 0) { printk(KERN_ERR "delkin_cb: ide_register_hw failed (%d)\n", rc); pci_disable_device(dev); diff --git a/drivers/ide/pci/generic.c b/drivers/ide/pci/generic.c index cce6311b02d..f44d70852c3 100644 --- a/drivers/ide/pci/generic.c +++ b/drivers/ide/pci/generic.c @@ -54,130 +54,61 @@ __setup("all-generic-ide", ide_generic_all_on); module_param_named(all_generic_ide, ide_generic_all, bool, 0444); MODULE_PARM_DESC(all_generic_ide, "IDE generic will claim all unknown PCI IDE storage controllers."); -static void __devinit init_hwif_generic (ide_hwif_t *hwif) -{ - switch(hwif->pci_dev->device) { - case PCI_DEVICE_ID_UMC_UM8673F: - case PCI_DEVICE_ID_UMC_UM8886A: - case PCI_DEVICE_ID_UMC_UM8886BF: - hwif->irq = hwif->channel ? 15 : 14; - break; - default: - break; +#define IDE_HFLAGS_UMC (IDE_HFLAG_NO_DMA | IDE_HFLAG_FORCE_LEGACY_IRQS) + +#define DECLARE_GENERIC_PCI_DEV(name_str, extra_flags) \ + { \ + .name = name_str, \ + .host_flags = IDE_HFLAG_TRUST_BIOS_FOR_DMA | \ + extra_flags | \ + IDE_HFLAG_BOOTABLE, \ + .swdma_mask = ATA_SWDMA2, \ + .mwdma_mask = ATA_MWDMA2, \ + .udma_mask = ATA_UDMA6, \ } - if (!(hwif->dma_base)) - return; - - hwif->atapi_dma = 1; - hwif->ultra_mask = 0x7f; - hwif->mwdma_mask = 0x07; - hwif->swdma_mask = 0x07; -} - -#if 0 - /* Logic to add back later on */ - - if ((dev->class >> 8) == PCI_CLASS_STORAGE_IDE) { - ide_pci_device_t *unknown = unknown_chipset; - init_setup_unknown(dev, unknown); - return 1; - } - return 0; -#endif +static const struct ide_port_info generic_chipsets[] __devinitdata = { + /* 0 */ DECLARE_GENERIC_PCI_DEV("Unknown", 0), -static ide_pci_device_t generic_chipsets[] __devinitdata = { - { /* 0 */ - .name = "Unknown", - .init_hwif = init_hwif_generic, - .autodma = AUTODMA, - .bootable = ON_BOARD, - .host_flags = IDE_HFLAG_TRUST_BIOS_FOR_DMA, - },{ /* 1 */ + { /* 1 */ .name = "NS87410", - .init_hwif = init_hwif_generic, - .autodma = AUTODMA, .enablebits = {{0x43,0x08,0x08}, {0x47,0x08,0x08}}, - .bootable = ON_BOARD, - .host_flags = IDE_HFLAG_TRUST_BIOS_FOR_DMA, - },{ /* 2 */ - .name = "SAMURAI", - .init_hwif = init_hwif_generic, - .autodma = AUTODMA, - .bootable = ON_BOARD, - .host_flags = IDE_HFLAG_TRUST_BIOS_FOR_DMA, - },{ /* 3 */ - .name = "HT6565", - .init_hwif = init_hwif_generic, - .autodma = AUTODMA, - .bootable = ON_BOARD, - .host_flags = IDE_HFLAG_TRUST_BIOS_FOR_DMA, - },{ /* 4 */ - .name = "UM8673F", - .init_hwif = init_hwif_generic, - .autodma = NODMA, - .bootable = ON_BOARD, - .host_flags = IDE_HFLAG_TRUST_BIOS_FOR_DMA, - },{ /* 5 */ - .name = "UM8886A", - .init_hwif = init_hwif_generic, - .autodma = NODMA, - .bootable = ON_BOARD, - .host_flags = IDE_HFLAG_TRUST_BIOS_FOR_DMA, - },{ /* 6 */ - .name = "UM8886BF", - .init_hwif = init_hwif_generic, - .autodma = NODMA, - .bootable = ON_BOARD, - .host_flags = IDE_HFLAG_TRUST_BIOS_FOR_DMA, - },{ /* 7 */ - .name = "HINT_IDE", - .init_hwif = init_hwif_generic, - .autodma = AUTODMA, - .bootable = ON_BOARD, - .host_flags = IDE_HFLAG_TRUST_BIOS_FOR_DMA, - },{ /* 8 */ - .name = "VIA_IDE", - .init_hwif = init_hwif_generic, - .autodma = NOAUTODMA, - .bootable = ON_BOARD, - .host_flags = IDE_HFLAG_TRUST_BIOS_FOR_DMA, - },{ /* 9 */ - .name = "OPTI621V", - .init_hwif = init_hwif_generic, - .autodma = NOAUTODMA, - .bootable = ON_BOARD, - .host_flags = IDE_HFLAG_TRUST_BIOS_FOR_DMA, - },{ /* 10 */ + .host_flags = IDE_HFLAG_TRUST_BIOS_FOR_DMA | + IDE_HFLAG_BOOTABLE, + .swdma_mask = ATA_SWDMA2, + .mwdma_mask = ATA_MWDMA2, + .udma_mask = ATA_UDMA6, + }, + + /* 2 */ DECLARE_GENERIC_PCI_DEV("SAMURAI", 0), + /* 3 */ DECLARE_GENERIC_PCI_DEV("HT6565", 0), + /* 4 */ DECLARE_GENERIC_PCI_DEV("UM8673F", IDE_HFLAGS_UMC), + /* 5 */ DECLARE_GENERIC_PCI_DEV("UM8886A", IDE_HFLAGS_UMC), + /* 6 */ DECLARE_GENERIC_PCI_DEV("UM8886BF", IDE_HFLAGS_UMC), + /* 7 */ DECLARE_GENERIC_PCI_DEV("HINT_IDE", 0), + /* 8 */ DECLARE_GENERIC_PCI_DEV("VIA_IDE", IDE_HFLAG_NO_AUTODMA), + /* 9 */ DECLARE_GENERIC_PCI_DEV("OPTI621V", IDE_HFLAG_NO_AUTODMA), + + { /* 10 */ .name = "VIA8237SATA", - .init_hwif = init_hwif_generic, - .autodma = AUTODMA, - .bootable = OFF_BOARD, - .host_flags = IDE_HFLAG_TRUST_BIOS_FOR_DMA, - },{ /* 11 */ - .name = "Piccolo0102", - .init_hwif = init_hwif_generic, - .autodma = NOAUTODMA, - .bootable = ON_BOARD, - .host_flags = IDE_HFLAG_TRUST_BIOS_FOR_DMA, - },{ /* 12 */ - .name = "Piccolo0103", - .init_hwif = init_hwif_generic, - .autodma = NOAUTODMA, - .bootable = ON_BOARD, - .host_flags = IDE_HFLAG_TRUST_BIOS_FOR_DMA, - },{ /* 13 */ - .name = "Piccolo0105", - .init_hwif = init_hwif_generic, - .autodma = NOAUTODMA, - .bootable = ON_BOARD, - .host_flags = IDE_HFLAG_TRUST_BIOS_FOR_DMA, - },{ /* 14 */ + .host_flags = IDE_HFLAG_TRUST_BIOS_FOR_DMA | + IDE_HFLAG_OFF_BOARD, + .swdma_mask = ATA_SWDMA2, + .mwdma_mask = ATA_MWDMA2, + .udma_mask = ATA_UDMA6, + }, + + /* 11 */ DECLARE_GENERIC_PCI_DEV("Piccolo0102", IDE_HFLAG_NO_AUTODMA), + /* 12 */ DECLARE_GENERIC_PCI_DEV("Piccolo0103", IDE_HFLAG_NO_AUTODMA), + /* 13 */ DECLARE_GENERIC_PCI_DEV("Piccolo0105", IDE_HFLAG_NO_AUTODMA), + + { /* 14 */ .name = "Revolution", - .init_hwif = init_hwif_generic, - .autodma = AUTODMA, - .bootable = OFF_BOARD, - .host_flags = IDE_HFLAG_TRUST_BIOS_FOR_DMA, + .host_flags = IDE_HFLAG_TRUST_BIOS_FOR_DMA | + IDE_HFLAG_OFF_BOARD, + .swdma_mask = ATA_SWDMA2, + .mwdma_mask = ATA_MWDMA2, + .udma_mask = ATA_UDMA6, } }; @@ -192,7 +123,7 @@ static ide_pci_device_t generic_chipsets[] __devinitdata = { static int __devinit generic_init_one(struct pci_dev *dev, const struct pci_device_id *id) { - ide_pci_device_t *d = &generic_chipsets[id->driver_data]; + const struct ide_port_info *d = &generic_chipsets[id->driver_data]; int ret = -ENODEV; /* Don't use the generic entry unless instructed to do so */ diff --git a/drivers/ide/pci/hpt34x.c b/drivers/ide/pci/hpt34x.c index 44ac0e2f7a0..ae6307fae4f 100644 --- a/drivers/ide/pci/hpt34x.c +++ b/drivers/ide/pci/hpt34x.c @@ -125,49 +125,45 @@ static unsigned int __devinit init_chipset_hpt34x(struct pci_dev *dev, const cha static void __devinit init_hwif_hpt34x(ide_hwif_t *hwif) { - u16 pcicmd = 0; - hwif->set_pio_mode = &hpt34x_set_pio_mode; hwif->set_dma_mode = &hpt34x_set_mode; +} - hwif->drives[0].autotune = 1; - hwif->drives[1].autotune = 1; - - pci_read_config_word(hwif->pci_dev, PCI_COMMAND, &pcicmd); - - if (!hwif->dma_base) - return; - +static const struct ide_port_info hpt34x_chipsets[] __devinitdata = { + { /* 0 */ + .name = "HPT343", + .init_chipset = init_chipset_hpt34x, + .init_hwif = init_hwif_hpt34x, + .extra = 16, + .host_flags = IDE_HFLAG_NO_ATAPI_DMA | + IDE_HFLAG_NO_AUTODMA, + .pio_mask = ATA_PIO5, + }, + { /* 1 */ + .name = "HPT345", + .init_chipset = init_chipset_hpt34x, + .init_hwif = init_hwif_hpt34x, + .extra = 16, + .host_flags = IDE_HFLAG_NO_ATAPI_DMA | + IDE_HFLAG_NO_AUTODMA | + IDE_HFLAG_OFF_BOARD, + .pio_mask = ATA_PIO5, #ifdef CONFIG_HPT34X_AUTODMA - if ((pcicmd & PCI_COMMAND_MEMORY) == 0) - return; - - hwif->ultra_mask = 0x07; - hwif->mwdma_mask = 0x07; - hwif->swdma_mask = 0x07; + .swdma_mask = ATA_SWDMA2, + .mwdma_mask = ATA_MWDMA2, + .udma_mask = ATA_UDMA2, #endif -} - -static ide_pci_device_t hpt34x_chipset __devinitdata = { - .name = "HPT34X", - .init_chipset = init_chipset_hpt34x, - .init_hwif = init_hwif_hpt34x, - .autodma = NOAUTODMA, - .bootable = NEVER_BOARD, - .extra = 16, - .pio_mask = ATA_PIO5, + } }; static int __devinit hpt34x_init_one(struct pci_dev *dev, const struct pci_device_id *id) { - ide_pci_device_t *d = &hpt34x_chipset; - static char *chipset_names[] = {"HPT343", "HPT345"}; + const struct ide_port_info *d; u16 pcicmd = 0; pci_read_config_word(dev, PCI_COMMAND, &pcicmd); - d->name = chipset_names[(pcicmd & PCI_COMMAND_MEMORY) ? 1 : 0]; - d->bootable = (pcicmd & PCI_COMMAND_MEMORY) ? OFF_BOARD : NEVER_BOARD; + d = &hpt34x_chipsets[(pcicmd & PCI_COMMAND_MEMORY) ? 1 : 0]; return ide_setup_pci_device(dev, d); } diff --git a/drivers/ide/pci/hpt366.c b/drivers/ide/pci/hpt366.c index fcb21ddab2c..612b795241b 100644 --- a/drivers/ide/pci/hpt366.c +++ b/drivers/ide/pci/hpt366.c @@ -1,9 +1,10 @@ /* - * linux/drivers/ide/pci/hpt366.c Version 1.14 Oct 1, 2007 + * linux/drivers/ide/pci/hpt366.c Version 1.20 Oct 1, 2007 * * Copyright (C) 1999-2003 Andre Hedrick <andre@linux-ide.org> * Portions Copyright (C) 2001 Sun Microsystems, Inc. * Portions Copyright (C) 2003 Red Hat Inc + * Portions Copyright (C) 2007 Bartlomiej Zolnierkiewicz * Portions Copyright (C) 2005-2007 MontaVista Software, Inc. * * Thanks to HighPoint Technologies for their assistance, and hardware. @@ -393,8 +394,9 @@ enum ata_clock { */ struct hpt_info { + char *chip_name; /* Chip name */ u8 chip_type; /* Chip type */ - u8 max_ultra; /* Max. UltraDMA mode allowed */ + u8 udma_mask; /* Allowed UltraDMA modes mask. */ u8 dpll_clk; /* DPLL clock in MHz */ u8 pci_clk; /* PCI clock in MHz */ u32 **settings; /* Chipset settings table */ @@ -432,78 +434,89 @@ static u32 *hpt37x_settings[NUM_ATA_CLOCKS] = { }; static struct hpt_info hpt36x __devinitdata = { + .chip_name = "HPT36x", .chip_type = HPT36x, - .max_ultra = HPT366_ALLOW_ATA66_3 ? (HPT366_ALLOW_ATA66_4 ? 4 : 3) : 2, + .udma_mask = HPT366_ALLOW_ATA66_3 ? (HPT366_ALLOW_ATA66_4 ? ATA_UDMA4 : ATA_UDMA3) : ATA_UDMA2, .dpll_clk = 0, /* no DPLL */ .settings = hpt36x_settings }; static struct hpt_info hpt370 __devinitdata = { + .chip_name = "HPT370", .chip_type = HPT370, - .max_ultra = HPT370_ALLOW_ATA100_5 ? 5 : 4, + .udma_mask = HPT370_ALLOW_ATA100_5 ? ATA_UDMA5 : ATA_UDMA4, .dpll_clk = 48, .settings = hpt37x_settings }; static struct hpt_info hpt370a __devinitdata = { + .chip_name = "HPT370A", .chip_type = HPT370A, - .max_ultra = HPT370_ALLOW_ATA100_5 ? 5 : 4, + .udma_mask = HPT370_ALLOW_ATA100_5 ? ATA_UDMA5 : ATA_UDMA4, .dpll_clk = 48, .settings = hpt37x_settings }; static struct hpt_info hpt374 __devinitdata = { + .chip_name = "HPT374", .chip_type = HPT374, - .max_ultra = 5, + .udma_mask = ATA_UDMA5, .dpll_clk = 48, .settings = hpt37x_settings }; static struct hpt_info hpt372 __devinitdata = { + .chip_name = "HPT372", .chip_type = HPT372, - .max_ultra = HPT372_ALLOW_ATA133_6 ? 6 : 5, + .udma_mask = HPT372_ALLOW_ATA133_6 ? ATA_UDMA6 : ATA_UDMA5, .dpll_clk = 55, .settings = hpt37x_settings }; static struct hpt_info hpt372a __devinitdata = { + .chip_name = "HPT372A", .chip_type = HPT372A, - .max_ultra = HPT372_ALLOW_ATA133_6 ? 6 : 5, + .udma_mask = HPT372_ALLOW_ATA133_6 ? ATA_UDMA6 : ATA_UDMA5, .dpll_clk = 66, .settings = hpt37x_settings }; static struct hpt_info hpt302 __devinitdata = { + .chip_name = "HPT302", .chip_type = HPT302, - .max_ultra = HPT372_ALLOW_ATA133_6 ? 6 : 5, + .udma_mask = HPT302_ALLOW_ATA133_6 ? ATA_UDMA6 : ATA_UDMA5, .dpll_clk = 66, .settings = hpt37x_settings }; static struct hpt_info hpt371 __devinitdata = { + .chip_name = "HPT371", .chip_type = HPT371, - .max_ultra = HPT371_ALLOW_ATA133_6 ? 6 : 5, + .udma_mask = HPT371_ALLOW_ATA133_6 ? ATA_UDMA6 : ATA_UDMA5, .dpll_clk = 66, .settings = hpt37x_settings }; static struct hpt_info hpt372n __devinitdata = { + .chip_name = "HPT372N", .chip_type = HPT372N, - .max_ultra = HPT372_ALLOW_ATA133_6 ? 6 : 5, + .udma_mask = HPT372_ALLOW_ATA133_6 ? ATA_UDMA6 : ATA_UDMA5, .dpll_clk = 77, .settings = hpt37x_settings }; static struct hpt_info hpt302n __devinitdata = { + .chip_name = "HPT302N", .chip_type = HPT302N, - .max_ultra = HPT302_ALLOW_ATA133_6 ? 6 : 5, + .udma_mask = HPT302_ALLOW_ATA133_6 ? ATA_UDMA6 : ATA_UDMA5, .dpll_clk = 77, .settings = hpt37x_settings }; static struct hpt_info hpt371n __devinitdata = { + .chip_name = "HPT371N", .chip_type = HPT371N, - .max_ultra = HPT371_ALLOW_ATA133_6 ? 6 : 5, + .udma_mask = HPT371_ALLOW_ATA133_6 ? ATA_UDMA6 : ATA_UDMA5, .dpll_clk = 77, .settings = hpt37x_settings }; @@ -676,12 +689,11 @@ static int hpt3xx_quirkproc(ide_drive_t *drive) static void hpt3xx_intrproc(ide_drive_t *drive) { - ide_hwif_t *hwif = HWIF(drive); - if (drive->quirk_list) return; + /* drives in the quirk_list may not like intr setups/cleanups */ - hwif->OUTB(drive->ctl | 2, IDE_CONTROL_REG); + outb(drive->ctl | 2, IDE_CONTROL_REG); } static void hpt3xx_maskproc(ide_drive_t *drive, int mask) @@ -709,8 +721,8 @@ static void hpt3xx_maskproc(ide_drive_t *drive, int mask) enable_irq (hwif->irq); } } else - hwif->OUTB(mask ? (drive->ctl | 2) : (drive->ctl & ~2), - IDE_CONTROL_REG); + outb(mask ? (drive->ctl | 2) : (drive->ctl & ~2), + IDE_CONTROL_REG); } /* @@ -750,9 +762,9 @@ static void hpt370_irq_timeout(ide_drive_t *drive) printk(KERN_DEBUG "%s: %d bytes in FIFO\n", drive->name, bfifo & 0x1ff); /* get DMA command mode */ - dma_cmd = hwif->INB(hwif->dma_command); + dma_cmd = inb(hwif->dma_command); /* stop DMA */ - hwif->OUTB(dma_cmd & ~0x1, hwif->dma_command); + outb(dma_cmd & ~0x1, hwif->dma_command); hpt370_clear_engine(drive); } @@ -767,12 +779,12 @@ static void hpt370_ide_dma_start(ide_drive_t *drive) static int hpt370_ide_dma_end(ide_drive_t *drive) { ide_hwif_t *hwif = HWIF(drive); - u8 dma_stat = hwif->INB(hwif->dma_status); + u8 dma_stat = inb(hwif->dma_status); if (dma_stat & 0x01) { /* wait a little */ udelay(20); - dma_stat = hwif->INB(hwif->dma_status); + dma_stat = inb(hwif->dma_status); if (dma_stat & 0x01) hpt370_irq_timeout(drive); } @@ -833,34 +845,32 @@ static int hpt374_ide_dma_end(ide_drive_t *drive) static void hpt3xxn_set_clock(ide_hwif_t *hwif, u8 mode) { - u8 scr2 = hwif->INB(hwif->dma_master + 0x7b); + u8 scr2 = inb(hwif->dma_master + 0x7b); if ((scr2 & 0x7f) == mode) return; /* Tristate the bus */ - hwif->OUTB(0x80, hwif->dma_master + 0x73); - hwif->OUTB(0x80, hwif->dma_master + 0x77); + outb(0x80, hwif->dma_master + 0x73); + outb(0x80, hwif->dma_master + 0x77); /* Switch clock and reset channels */ - hwif->OUTB(mode, hwif->dma_master + 0x7b); - hwif->OUTB(0xc0, hwif->dma_master + 0x79); + outb(mode, hwif->dma_master + 0x7b); + outb(0xc0, hwif->dma_master + 0x79); /* * Reset the state machines. * NOTE: avoid accidentally enabling the disabled channels. */ - hwif->OUTB(hwif->INB(hwif->dma_master + 0x70) | 0x32, - hwif->dma_master + 0x70); - hwif->OUTB(hwif->INB(hwif->dma_master + 0x74) | 0x32, - hwif->dma_master + 0x74); + outb(inb(hwif->dma_master + 0x70) | 0x32, hwif->dma_master + 0x70); + outb(inb(hwif->dma_master + 0x74) | 0x32, hwif->dma_master + 0x74); /* Complete reset */ - hwif->OUTB(0x00, hwif->dma_master + 0x79); + outb(0x00, hwif->dma_master + 0x79); /* Reconnect channels to bus */ - hwif->OUTB(0x00, hwif->dma_master + 0x73); - hwif->OUTB(0x00, hwif->dma_master + 0x77); + outb(0x00, hwif->dma_master + 0x73); + outb(0x00, hwif->dma_master + 0x77); } /** @@ -1139,7 +1149,7 @@ static unsigned int __devinit init_chipset_hpt366(struct pci_dev *dev, const cha * Select 66 MHz DPLL clock only if UltraATA/133 mode is * supported/enabled, use 50 MHz DPLL clock otherwise... */ - if (info->max_ultra == 6) { + if (info->udma_mask == ATA_UDMA6) { dpll_clk = 66; clock = ATA_CLOCK_66MHZ; } else if (dpll_clk) { /* HPT36x chips don't have DPLL */ @@ -1291,14 +1301,9 @@ static void __devinit init_hwif_hpt366(ide_hwif_t *hwif) if (new_mcr != old_mcr) pci_write_config_byte(dev, hwif->select_data + 1, new_mcr); - hwif->drives[0].autotune = hwif->drives[1].autotune = 1; - if (hwif->dma_base == 0) return; - hwif->ultra_mask = hwif->cds->udma_mask; - hwif->mwdma_mask = 0x07; - /* * The HPT37x uses the CBLID pins as outputs for MA15/MA16 * address lines to access an external EEPROM. To read valid @@ -1354,7 +1359,7 @@ static void __devinit init_dma_hpt366(ide_hwif_t *hwif, unsigned long dmabase) u8 dma_new = 0, dma_old = 0; unsigned long flags; - dma_old = hwif->INB(dmabase + 2); + dma_old = inb(dmabase + 2); local_irq_save(flags); @@ -1365,60 +1370,26 @@ static void __devinit init_dma_hpt366(ide_hwif_t *hwif, unsigned long dmabase) if (masterdma & 0x30) dma_new |= 0x20; if ( slavedma & 0x30) dma_new |= 0x40; if (dma_new != dma_old) - hwif->OUTB(dma_new, dmabase + 2); + outb(dma_new, dmabase + 2); local_irq_restore(flags); ide_setup_dma(hwif, dmabase, 8); } -static int __devinit init_setup_hpt374(struct pci_dev *dev, ide_pci_device_t *d) +static void __devinit hpt374_init(struct pci_dev *dev, struct pci_dev *dev2) { - struct pci_dev *dev2; - - if (PCI_FUNC(dev->devfn) & 1) - return -ENODEV; - - pci_set_drvdata(dev, &hpt374); - - if ((dev2 = pci_get_slot(dev->bus, dev->devfn + 1)) != NULL) { - int ret; - - pci_set_drvdata(dev2, &hpt374); - - if (dev2->irq != dev->irq) { - /* FIXME: we need a core pci_set_interrupt() */ - dev2->irq = dev->irq; - printk(KERN_WARNING "%s: PCI config space interrupt " - "fixed.\n", d->name); - } - ret = ide_setup_pci_devices(dev, dev2, d); - if (ret < 0) - pci_dev_put(dev2); - return ret; + if (dev2->irq != dev->irq) { + /* FIXME: we need a core pci_set_interrupt() */ + dev2->irq = dev->irq; + printk(KERN_INFO "HPT374: PCI config space interrupt fixed\n"); } - return ide_setup_pci_device(dev, d); -} - -static int __devinit init_setup_hpt372n(struct pci_dev *dev, ide_pci_device_t *d) -{ - pci_set_drvdata(dev, &hpt372n); - - return ide_setup_pci_device(dev, d); } -static int __devinit init_setup_hpt371(struct pci_dev *dev, ide_pci_device_t *d) +static void __devinit hpt371_init(struct pci_dev *dev) { - struct hpt_info *info; u8 mcr1 = 0; - if (dev->revision > 1) { - d->name = "HPT371N"; - - info = &hpt371n; - } else - info = &hpt371; - /* * HPT371 chips physically have only one channel, the secondary one, * but the primary channel registers do exist! Go figure... @@ -1428,194 +1399,102 @@ static int __devinit init_setup_hpt371(struct pci_dev *dev, ide_pci_device_t *d) pci_read_config_byte(dev, 0x50, &mcr1); if (mcr1 & 0x04) pci_write_config_byte(dev, 0x50, mcr1 & ~0x04); - - pci_set_drvdata(dev, info); - - return ide_setup_pci_device(dev, d); } -static int __devinit init_setup_hpt372a(struct pci_dev *dev, ide_pci_device_t *d) +static int __devinit hpt36x_init(struct pci_dev *dev, struct pci_dev *dev2) { - struct hpt_info *info; - - if (dev->revision > 1) { - d->name = "HPT372N"; + u8 mcr1 = 0, pin1 = 0, pin2 = 0; - info = &hpt372n; - } else - info = &hpt372a; - pci_set_drvdata(dev, info); - - return ide_setup_pci_device(dev, d); -} - -static int __devinit init_setup_hpt302(struct pci_dev *dev, ide_pci_device_t *d) -{ - struct hpt_info *info; + /* + * Now we'll have to force both channels enabled if + * at least one of them has been enabled by BIOS... + */ + pci_read_config_byte(dev, 0x50, &mcr1); + if (mcr1 & 0x30) + pci_write_config_byte(dev, 0x50, mcr1 | 0x30); - if (dev->revision > 1) { - d->name = "HPT302N"; + pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin1); + pci_read_config_byte(dev2, PCI_INTERRUPT_PIN, &pin2); - info = &hpt302n; - } else - info = &hpt302; - pci_set_drvdata(dev, info); + if (pin1 != pin2 && dev->irq == dev2->irq) { + printk(KERN_INFO "HPT36x: onboard version of chipset, " + "pin1=%d pin2=%d\n", pin1, pin2); + return 1; + } - return ide_setup_pci_device(dev, d); + return 0; } -static int __devinit init_setup_hpt366(struct pci_dev *dev, ide_pci_device_t *d) -{ - struct pci_dev *dev2; - u8 rev = dev->revision; - static char *chipset_names[] = { "HPT366", "HPT366", "HPT368", - "HPT370", "HPT370A", "HPT372", - "HPT372N" }; - static struct hpt_info *info[] = { &hpt36x, &hpt36x, &hpt36x, - &hpt370, &hpt370a, &hpt372, - &hpt372n }; - - if (PCI_FUNC(dev->devfn) & 1) - return -ENODEV; - - switch (rev) { - case 0: - case 1: - case 2: +static const struct ide_port_info hpt366_chipsets[] __devinitdata = { + { /* 0 */ + .name = "HPT36x", + .init_chipset = init_chipset_hpt366, + .init_hwif = init_hwif_hpt366, + .init_dma = init_dma_hpt366, /* * HPT36x chips have one channel per function and have * both channel enable bits located differently and visible * to both functions -- really stupid design decision... :-( * Bit 4 is for the primary channel, bit 5 for the secondary. */ - d->host_flags |= IDE_HFLAG_SINGLE; - d->enablebits[0].mask = d->enablebits[0].val = 0x10; - - d->udma_mask = HPT366_ALLOW_ATA66_3 ? (HPT366_ALLOW_ATA66_4 ? - ATA_UDMA4 : ATA_UDMA3) : ATA_UDMA2; - break; - case 3: - case 4: - d->udma_mask = HPT370_ALLOW_ATA100_5 ? ATA_UDMA5 : ATA_UDMA4; - break; - default: - rev = 6; - /* fall thru */ - case 5: - case 6: - d->udma_mask = HPT372_ALLOW_ATA133_6 ? ATA_UDMA6 : ATA_UDMA5; - break; - } - - d->name = chipset_names[rev]; - - pci_set_drvdata(dev, info[rev]); - - if (rev > 2) - goto init_single; - - if ((dev2 = pci_get_slot(dev->bus, dev->devfn + 1)) != NULL) { - u8 mcr1 = 0, pin1 = 0, pin2 = 0; - int ret; - - pci_set_drvdata(dev2, info[rev]); - - /* - * Now we'll have to force both channels enabled if - * at least one of them has been enabled by BIOS... - */ - pci_read_config_byte(dev, 0x50, &mcr1); - if (mcr1 & 0x30) - pci_write_config_byte(dev, 0x50, mcr1 | 0x30); - - pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin1); - pci_read_config_byte(dev2, PCI_INTERRUPT_PIN, &pin2); - if (pin1 != pin2 && dev->irq == dev2->irq) { - d->bootable = ON_BOARD; - printk("%s: onboard version of chipset, pin1=%d pin2=%d\n", - d->name, pin1, pin2); - } - ret = ide_setup_pci_devices(dev, dev2, d); - if (ret < 0) - pci_dev_put(dev2); - return ret; - } -init_single: - return ide_setup_pci_device(dev, d); -} - -static ide_pci_device_t hpt366_chipsets[] __devinitdata = { - { /* 0 */ - .name = "HPT366", - .init_setup = init_setup_hpt366, - .init_chipset = init_chipset_hpt366, - .init_hwif = init_hwif_hpt366, - .init_dma = init_dma_hpt366, - .autodma = AUTODMA, - .enablebits = {{0x50,0x04,0x04}, {0x54,0x04,0x04}}, - .bootable = OFF_BOARD, + .enablebits = {{0x50,0x10,0x10}, {0x54,0x04,0x04}}, .extra = 240, + .host_flags = IDE_HFLAG_SINGLE | + IDE_HFLAG_NO_ATAPI_DMA | + IDE_HFLAG_OFF_BOARD, .pio_mask = ATA_PIO4, + .mwdma_mask = ATA_MWDMA2, },{ /* 1 */ .name = "HPT372A", - .init_setup = init_setup_hpt372a, .init_chipset = init_chipset_hpt366, .init_hwif = init_hwif_hpt366, .init_dma = init_dma_hpt366, - .autodma = AUTODMA, .enablebits = {{0x50,0x04,0x04}, {0x54,0x04,0x04}}, - .udma_mask = HPT372_ALLOW_ATA133_6 ? ATA_UDMA6 : ATA_UDMA5, - .bootable = OFF_BOARD, .extra = 240, + .host_flags = IDE_HFLAG_NO_ATAPI_DMA | IDE_HFLAG_OFF_BOARD, .pio_mask = ATA_PIO4, + .mwdma_mask = ATA_MWDMA2, },{ /* 2 */ .name = "HPT302", - .init_setup = init_setup_hpt302, .init_chipset = init_chipset_hpt366, .init_hwif = init_hwif_hpt366, .init_dma = init_dma_hpt366, - .autodma = AUTODMA, .enablebits = {{0x50,0x04,0x04}, {0x54,0x04,0x04}}, - .udma_mask = HPT302_ALLOW_ATA133_6 ? ATA_UDMA6 : ATA_UDMA5, - .bootable = OFF_BOARD, .extra = 240, + .host_flags = IDE_HFLAG_NO_ATAPI_DMA | IDE_HFLAG_OFF_BOARD, .pio_mask = ATA_PIO4, + .mwdma_mask = ATA_MWDMA2, },{ /* 3 */ .name = "HPT371", - .init_setup = init_setup_hpt371, .init_chipset = init_chipset_hpt366, .init_hwif = init_hwif_hpt366, .init_dma = init_dma_hpt366, - .autodma = AUTODMA, .enablebits = {{0x50,0x04,0x04}, {0x54,0x04,0x04}}, - .udma_mask = HPT371_ALLOW_ATA133_6 ? ATA_UDMA6 : ATA_UDMA5, - .bootable = OFF_BOARD, .extra = 240, + .host_flags = IDE_HFLAG_NO_ATAPI_DMA | IDE_HFLAG_OFF_BOARD, .pio_mask = ATA_PIO4, + .mwdma_mask = ATA_MWDMA2, },{ /* 4 */ .name = "HPT374", - .init_setup = init_setup_hpt374, .init_chipset = init_chipset_hpt366, .init_hwif = init_hwif_hpt366, .init_dma = init_dma_hpt366, - .autodma = AUTODMA, .enablebits = {{0x50,0x04,0x04}, {0x54,0x04,0x04}}, .udma_mask = ATA_UDMA5, - .bootable = OFF_BOARD, .extra = 240, + .host_flags = IDE_HFLAG_NO_ATAPI_DMA | IDE_HFLAG_OFF_BOARD, .pio_mask = ATA_PIO4, + .mwdma_mask = ATA_MWDMA2, },{ /* 5 */ .name = "HPT372N", - .init_setup = init_setup_hpt372n, .init_chipset = init_chipset_hpt366, .init_hwif = init_hwif_hpt366, .init_dma = init_dma_hpt366, - .autodma = AUTODMA, .enablebits = {{0x50,0x04,0x04}, {0x54,0x04,0x04}}, - .udma_mask = HPT372_ALLOW_ATA133_6 ? ATA_UDMA6 : ATA_UDMA5, - .bootable = OFF_BOARD, .extra = 240, + .host_flags = IDE_HFLAG_NO_ATAPI_DMA | IDE_HFLAG_OFF_BOARD, .pio_mask = ATA_PIO4, + .mwdma_mask = ATA_MWDMA2, } }; @@ -1626,16 +1505,77 @@ static ide_pci_device_t hpt366_chipsets[] __devinitdata = { * * Called when the PCI registration layer (or the IDE initialization) * finds a device matching our IDE device tables. - * - * NOTE: since we'll have to modify some fields of the ide_pci_device_t - * structure depending on the chip's revision, we'd better pass a local - * copy down the call chain... */ static int __devinit hpt366_init_one(struct pci_dev *dev, const struct pci_device_id *id) { - ide_pci_device_t d = hpt366_chipsets[id->driver_data]; + struct hpt_info *info = NULL; + struct pci_dev *dev2 = NULL; + struct ide_port_info d; + u8 idx = id->driver_data; + u8 rev = dev->revision; + + if ((idx == 0 || idx == 4) && (PCI_FUNC(dev->devfn) & 1)) + return -ENODEV; + + switch (idx) { + case 0: + if (rev < 3) + info = &hpt36x; + else { + static struct hpt_info *hpt37x_info[] = + { &hpt370, &hpt370a, &hpt372, &hpt372n }; + + info = hpt37x_info[min_t(u8, rev, 6) - 3]; + idx++; + } + break; + case 1: + info = (rev > 1) ? &hpt372n : &hpt372a; + break; + case 2: + info = (rev > 1) ? &hpt302n : &hpt302; + break; + case 3: + hpt371_init(dev); + info = (rev > 1) ? &hpt371n : &hpt371; + break; + case 4: + info = &hpt374; + break; + case 5: + info = &hpt372n; + break; + } + + d = hpt366_chipsets[idx]; + + d.name = info->chip_name; + d.udma_mask = info->udma_mask; + + pci_set_drvdata(dev, info); + + if (info == &hpt36x || info == &hpt374) + dev2 = pci_get_slot(dev->bus, dev->devfn + 1); + + if (dev2) { + int ret; + + pci_set_drvdata(dev2, info); + + if (info == &hpt374) + hpt374_init(dev, dev2); + else { + if (hpt36x_init(dev, dev2)) + d.host_flags |= IDE_HFLAG_BOOTABLE; + } + + ret = ide_setup_pci_devices(dev, dev2, &d); + if (ret < 0) + pci_dev_put(dev2); + return ret; + } - return d.init_setup(dev, &d); + return ide_setup_pci_device(dev, &d); } static const struct pci_device_id hpt366_pci_tbl[] = { diff --git a/drivers/ide/pci/it8213.c b/drivers/ide/pci/it8213.c index 24a71d03744..90b52ed37bf 100644 --- a/drivers/ide/pci/it8213.c +++ b/drivers/ide/pci/it8213.c @@ -170,17 +170,9 @@ static void __devinit init_hwif_it8213(ide_hwif_t *hwif) hwif->set_dma_mode = &it8213_set_dma_mode; hwif->set_pio_mode = &it8213_set_pio_mode; - hwif->drives[0].autotune = 1; - hwif->drives[1].autotune = 1; - if (!hwif->dma_base) return; - hwif->atapi_dma = 1; - hwif->ultra_mask = 0x7f; - hwif->mwdma_mask = 0x06; - hwif->swdma_mask = 0x04; - pci_read_config_byte(hwif->pci_dev, 0x42, ®42h); if (hwif->cbl != ATA_CBL_PATA40_SHORT) @@ -192,14 +184,16 @@ static void __devinit init_hwif_it8213(ide_hwif_t *hwif) { \ .name = name_str, \ .init_hwif = init_hwif_it8213, \ - .autodma = AUTODMA, \ .enablebits = {{0x41,0x80,0x80}}, \ - .bootable = ON_BOARD, \ - .host_flags = IDE_HFLAG_SINGLE, \ + .host_flags = IDE_HFLAG_SINGLE | \ + IDE_HFLAG_BOOTABLE, \ .pio_mask = ATA_PIO4, \ + .swdma_mask = ATA_SWDMA2_ONLY, \ + .mwdma_mask = ATA_MWDMA12_ONLY, \ + .udma_mask = ATA_UDMA6, \ } -static ide_pci_device_t it8213_chipsets[] __devinitdata = { +static const struct ide_port_info it8213_chipsets[] __devinitdata = { /* 0 */ DECLARE_ITE_DEV("IT8213"), }; diff --git a/drivers/ide/pci/it821x.c b/drivers/ide/pci/it821x.c index f3391a8698a..5c997543531 100644 --- a/drivers/ide/pci/it821x.c +++ b/drivers/ide/pci/it821x.c @@ -95,7 +95,7 @@ struct it821x_dev /* * We allow users to force the card into non raid mode without - * flashing the alternative BIOS. This is also neccessary right now + * flashing the alternative BIOS. This is also necessary right now * for embedded platforms that cannot run a PC BIOS but are using this * device. */ @@ -544,12 +544,10 @@ static void __devinit init_hwif_it821x(ide_hwif_t *hwif) ide_set_hwifdata(hwif, idev); - hwif->atapi_dma = 1; - pci_read_config_byte(hwif->pci_dev, 0x50, &conf); - if(conf & 1) { + if (conf & 1) { idev->smart = 1; - hwif->atapi_dma = 0; + hwif->host_flags |= IDE_HFLAG_NO_ATAPI_DMA; /* Long I/O's although allowed in LBA48 space cause the onboard firmware to enter the twighlight zone */ hwif->rqsize = 256; @@ -566,14 +564,14 @@ static void __devinit init_hwif_it821x(ide_hwif_t *hwif) /* * Not in the docs but according to the reference driver - * this is neccessary. + * this is necessary. */ pci_read_config_byte(hwif->pci_dev, 0x08, &conf); - if(conf == 0x10) { + if (conf == 0x10) { idev->timing10 = 1; - hwif->atapi_dma = 0; - if(!idev->smart) + hwif->host_flags |= IDE_HFLAG_NO_ATAPI_DMA; + if (idev->smart == 0) printk(KERN_WARNING "it821x: Revision 0x10, workarounds activated.\n"); } @@ -587,14 +585,11 @@ static void __devinit init_hwif_it821x(ide_hwif_t *hwif) } else hwif->host_flags |= IDE_HFLAG_NO_SET_MODE; - hwif->drives[0].autotune = 1; - hwif->drives[1].autotune = 1; - if (hwif->dma_base == 0) return; - hwif->ultra_mask = 0x7f; - hwif->mwdma_mask = 0x07; + hwif->ultra_mask = ATA_UDMA6; + hwif->mwdma_mask = ATA_MWDMA2; if (hwif->cbl != ATA_CBL_PATA40_SHORT) hwif->cbl = ata66_it821x(hwif); @@ -638,13 +633,12 @@ static unsigned int __devinit init_chipset_it821x(struct pci_dev *dev, const cha .name = name_str, \ .init_chipset = init_chipset_it821x, \ .init_hwif = init_hwif_it821x, \ - .autodma = AUTODMA, \ - .bootable = ON_BOARD, \ .fixup = it821x_fixups, \ + .host_flags = IDE_HFLAG_BOOTABLE, \ .pio_mask = ATA_PIO4, \ } -static ide_pci_device_t it821x_chipsets[] __devinitdata = { +static const struct ide_port_info it821x_chipsets[] __devinitdata = { /* 0 */ DECLARE_ITE_DEV("IT8212"), }; diff --git a/drivers/ide/pci/jmicron.c b/drivers/ide/pci/jmicron.c index bb893ffcc98..bdf64d99770 100644 --- a/drivers/ide/pci/jmicron.c +++ b/drivers/ide/pci/jmicron.c @@ -111,27 +111,21 @@ static void __devinit init_hwif_jmicron(ide_hwif_t *hwif) hwif->set_pio_mode = &jmicron_set_pio_mode; hwif->set_dma_mode = &jmicron_set_dma_mode; - hwif->drives[0].autotune = 1; - hwif->drives[1].autotune = 1; - if (hwif->dma_base == 0) return; - hwif->atapi_dma = 1; - hwif->ultra_mask = 0x7f; - hwif->mwdma_mask = 0x07; - if (hwif->cbl != ATA_CBL_PATA40_SHORT) hwif->cbl = ata66_jmicron(hwif); } -static ide_pci_device_t jmicron_chipset __devinitdata = { +static const struct ide_port_info jmicron_chipset __devinitdata = { .name = "JMB", .init_hwif = init_hwif_jmicron, - .autodma = AUTODMA, - .bootable = ON_BOARD, + .host_flags = IDE_HFLAG_BOOTABLE, .enablebits = { { 0x40, 0x01, 0x01 }, { 0x40, 0x10, 0x10 } }, .pio_mask = ATA_PIO5, + .mwdma_mask = ATA_MWDMA2, + .udma_mask = ATA_UDMA6, }; /** diff --git a/drivers/ide/pci/ns87415.c b/drivers/ide/pci/ns87415.c index a8cd50ab62f..d4df4642dbb 100644 --- a/drivers/ide/pci/ns87415.c +++ b/drivers/ide/pci/ns87415.c @@ -260,15 +260,15 @@ static void __devinit init_hwif_ns87415 (ide_hwif_t *hwif) hwif->ide_dma_end = &ns87415_ide_dma_end; } -static ide_pci_device_t ns87415_chipset __devinitdata = { +static const struct ide_port_info ns87415_chipset __devinitdata = { .name = "NS87415", #ifdef CONFIG_SUPERIO .init_iops = init_iops_ns87415, #endif .init_hwif = init_hwif_ns87415, - .autodma = AUTODMA, - .bootable = ON_BOARD, - .host_flags = IDE_HFLAG_TRUST_BIOS_FOR_DMA, + .host_flags = IDE_HFLAG_TRUST_BIOS_FOR_DMA | + IDE_HFLAG_NO_ATAPI_DMA | + IDE_HFLAG_BOOTABLE, }; static int __devinit ns87415_init_one(struct pci_dev *dev, const struct pci_device_id *id) diff --git a/drivers/ide/pci/opti621.c b/drivers/ide/pci/opti621.c index 250662ea18a..8953d9c3926 100644 --- a/drivers/ide/pci/opti621.c +++ b/drivers/ide/pci/opti621.c @@ -1,5 +1,5 @@ /* - * linux/drivers/ide/pci/opti621.c Version 0.7 Sept 10, 2002 + * linux/drivers/ide/pci/opti621.c Version 0.9 Sep 24, 2007 * * Copyright (C) 1996-1998 Linus Torvalds & authors (see below) */ @@ -57,9 +57,6 @@ * There is a 25/33MHz switch in configuration * register, but driver is written for use at any frequency which get * (use idebus=xx to select PCI bus speed). - * Use hda=autotune and hdb=autotune for automatical tune of the PIO modes. - * If you get strange results, do not use this and set PIO manually - * by hdparm. * * Version 0.1, Nov 8, 1996 * by Jaromir Koutek, for 2.1.8. @@ -136,6 +133,8 @@ static int reg_base; #define PIO_NOT_EXIST 254 #define PIO_DONT_KNOW 255 +static DEFINE_SPINLOCK(opti621_lock); + /* there are stored pio numbers from other calls of opti621_set_pio_mode */ static void compute_pios(ide_drive_t *drive, const u8 pio) /* Store values into drive->drive_data @@ -281,7 +280,7 @@ static void opti621_set_pio_mode(ide_drive_t *drive, const u8 pio) second.recovery_time, drdy); #endif - spin_lock_irqsave(&ide_lock, flags); + spin_lock_irqsave(&opti621_lock, flags); reg_base = hwif->io_ports[IDE_DATA_OFFSET]; @@ -320,7 +319,7 @@ static void opti621_set_pio_mode(ide_drive_t *drive, const u8 pio) /* and read prefetch for both drives */ write_reg(misc, MISC_REG); - spin_unlock_irqrestore(&ide_lock, flags); + spin_unlock_irqrestore(&opti621_lock, flags); } /* @@ -332,32 +331,27 @@ static void __devinit init_hwif_opti621 (ide_hwif_t *hwif) hwif->drives[1].drive_data = PIO_DONT_KNOW; hwif->set_pio_mode = &opti621_set_pio_mode; - - if (!(hwif->dma_base)) - return; - - hwif->atapi_dma = 1; - hwif->mwdma_mask = 0x07; - hwif->swdma_mask = 0x07; } -static ide_pci_device_t opti621_chipsets[] __devinitdata = { +static const struct ide_port_info opti621_chipsets[] __devinitdata = { { /* 0 */ .name = "OPTI621", .init_hwif = init_hwif_opti621, - .autodma = AUTODMA, .enablebits = {{0x45,0x80,0x00}, {0x40,0x08,0x00}}, - .bootable = ON_BOARD, + .host_flags = IDE_HFLAG_TRUST_BIOS_FOR_DMA | + IDE_HFLAG_BOOTABLE, .pio_mask = ATA_PIO3, - .host_flags = IDE_HFLAG_TRUST_BIOS_FOR_DMA, + .swdma_mask = ATA_SWDMA2, + .mwdma_mask = ATA_MWDMA2, },{ /* 1 */ .name = "OPTI621X", .init_hwif = init_hwif_opti621, - .autodma = AUTODMA, .enablebits = {{0x45,0x80,0x00}, {0x40,0x08,0x00}}, - .bootable = ON_BOARD, + .host_flags = IDE_HFLAG_TRUST_BIOS_FOR_DMA | + IDE_HFLAG_BOOTABLE, .pio_mask = ATA_PIO3, - .host_flags = IDE_HFLAG_TRUST_BIOS_FOR_DMA, + .swdma_mask = ATA_SWDMA2, + .mwdma_mask = ATA_MWDMA2, } }; diff --git a/drivers/ide/pci/pdc202xx_new.c b/drivers/ide/pci/pdc202xx_new.c index 8704b6f3331..4234efeba60 100644 --- a/drivers/ide/pci/pdc202xx_new.c +++ b/drivers/ide/pci/pdc202xx_new.c @@ -332,16 +332,12 @@ static long __devinit detect_pll_input_clock(unsigned long dma_base) static void __devinit apple_kiwi_init(struct pci_dev *pdev) { struct device_node *np = pci_device_to_OF_node(pdev); - unsigned int class_rev = 0; u8 conf; if (np == NULL || !of_device_is_compatible(np, "kiwi-root")) return; - pci_read_config_dword(pdev, PCI_CLASS_REVISION, &class_rev); - class_rev &= 0xff; - - if (class_rev >= 0x03) { + if (pdev->revision >= 0x03) { /* Setup chip magic config stuff (from darwin) */ pci_read_config_byte (pdev, 0x40, &conf); pci_write_config_byte(pdev, 0x40, (conf | 0x01)); @@ -475,32 +471,76 @@ static void __devinit init_hwif_pdc202new(ide_hwif_t *hwif) hwif->quirkproc = &pdcnew_quirkproc; hwif->resetproc = &pdcnew_reset; - hwif->err_stops_fifo = 1; - - hwif->drives[0].autotune = hwif->drives[1].autotune = 1; - if (hwif->dma_base == 0) return; - hwif->atapi_dma = 1; - - hwif->ultra_mask = hwif->cds->udma_mask; - hwif->mwdma_mask = 0x07; - if (hwif->cbl != ATA_CBL_PATA40_SHORT) hwif->cbl = pdcnew_cable_detect(hwif); } -static int __devinit init_setup_pdcnew(struct pci_dev *dev, ide_pci_device_t *d) +static struct pci_dev * __devinit pdc20270_get_dev2(struct pci_dev *dev) { - return ide_setup_pci_device(dev, d); + struct pci_dev *dev2; + + dev2 = pci_get_slot(dev->bus, PCI_DEVFN(PCI_SLOT(dev->devfn) + 2, + PCI_FUNC(dev->devfn))); + if (dev2 && + dev2->vendor == dev->vendor && + dev2->device == dev->device) { + + if (dev2->irq != dev->irq) { + dev2->irq = dev->irq; + printk(KERN_INFO "PDC20270: PCI config space " + "interrupt fixed\n"); + } + + return dev2; + } + + return NULL; } -static int __devinit init_setup_pdc20270(struct pci_dev *dev, ide_pci_device_t *d) +#define DECLARE_PDCNEW_DEV(name_str, udma) \ + { \ + .name = name_str, \ + .init_chipset = init_chipset_pdcnew, \ + .init_hwif = init_hwif_pdc202new, \ + .host_flags = IDE_HFLAG_POST_SET_MODE | \ + IDE_HFLAG_ERROR_STOPS_FIFO | \ + IDE_HFLAG_OFF_BOARD, \ + .pio_mask = ATA_PIO4, \ + .mwdma_mask = ATA_MWDMA2, \ + .udma_mask = udma, \ + } + +static const struct ide_port_info pdcnew_chipsets[] __devinitdata = { + /* 0 */ DECLARE_PDCNEW_DEV("PDC20268", ATA_UDMA5), + /* 1 */ DECLARE_PDCNEW_DEV("PDC20269", ATA_UDMA6), + /* 2 */ DECLARE_PDCNEW_DEV("PDC20270", ATA_UDMA5), + /* 3 */ DECLARE_PDCNEW_DEV("PDC20271", ATA_UDMA6), + /* 4 */ DECLARE_PDCNEW_DEV("PDC20275", ATA_UDMA6), + /* 5 */ DECLARE_PDCNEW_DEV("PDC20276", ATA_UDMA6), + /* 6 */ DECLARE_PDCNEW_DEV("PDC20277", ATA_UDMA6), +}; + +/** + * pdc202new_init_one - called when a pdc202xx is found + * @dev: the pdc202new device + * @id: the matching pci id + * + * Called when the PCI registration layer (or the IDE initialization) + * finds a device matching our IDE device tables. + */ + +static int __devinit pdc202new_init_one(struct pci_dev *dev, const struct pci_device_id *id) { + const struct ide_port_info *d; struct pci_dev *bridge = dev->bus->self; + u8 idx = id->driver_data; + + d = &pdcnew_chipsets[idx]; - if (bridge != NULL && + if (idx == 2 && bridge && bridge->vendor == PCI_VENDOR_ID_DEC && bridge->device == PCI_DEVICE_ID_DEC_21150) { struct pci_dev *dev2; @@ -508,133 +548,26 @@ static int __devinit init_setup_pdc20270(struct pci_dev *dev, ide_pci_device_t * if (PCI_SLOT(dev->devfn) & 2) return -ENODEV; - dev2 = pci_get_slot(dev->bus, PCI_DEVFN(PCI_SLOT(dev->devfn) + 2, - PCI_FUNC(dev->devfn))); - if (dev2 != NULL && - dev2->vendor == dev->vendor && - dev2->device == dev->device) { - int ret; - - if (dev2->irq != dev->irq) { - dev2->irq = dev->irq; + dev2 = pdc20270_get_dev2(dev); - printk(KERN_WARNING "%s: PCI config space " - "interrupt fixed.\n", d->name); - } - - ret = ide_setup_pci_devices(dev, dev2, d); + if (dev2) { + int ret = ide_setup_pci_devices(dev, dev2, d); if (ret < 0) pci_dev_put(dev2); return ret; } } - return ide_setup_pci_device(dev, d); -} -static int __devinit init_setup_pdc20276(struct pci_dev *dev, ide_pci_device_t *d) -{ - struct pci_dev *bridge = dev->bus->self; - - if (bridge != NULL && + if (idx == 5 && bridge && bridge->vendor == PCI_VENDOR_ID_INTEL && - (bridge->device == PCI_DEVICE_ID_INTEL_I960 || - bridge->device == PCI_DEVICE_ID_INTEL_I960RM)) { - - printk(KERN_INFO "%s: attached to I2O RAID controller, " - "skipping.\n", d->name); + (bridge->device == PCI_DEVICE_ID_INTEL_I960 || + bridge->device == PCI_DEVICE_ID_INTEL_I960RM)) { + printk(KERN_INFO "PDC20276: attached to I2O RAID controller, " + "skipping\n"); return -ENODEV; } - return ide_setup_pci_device(dev, d); -} - -static ide_pci_device_t pdcnew_chipsets[] __devinitdata = { - { /* 0 */ - .name = "PDC20268", - .init_setup = init_setup_pdcnew, - .init_chipset = init_chipset_pdcnew, - .init_hwif = init_hwif_pdc202new, - .autodma = AUTODMA, - .bootable = OFF_BOARD, - .pio_mask = ATA_PIO4, - .udma_mask = 0x3f, /* udma0-5 */ - .host_flags = IDE_HFLAG_POST_SET_MODE, - },{ /* 1 */ - .name = "PDC20269", - .init_setup = init_setup_pdcnew, - .init_chipset = init_chipset_pdcnew, - .init_hwif = init_hwif_pdc202new, - .autodma = AUTODMA, - .bootable = OFF_BOARD, - .pio_mask = ATA_PIO4, - .udma_mask = 0x7f, /* udma0-6*/ - .host_flags = IDE_HFLAG_POST_SET_MODE, - },{ /* 2 */ - .name = "PDC20270", - .init_setup = init_setup_pdc20270, - .init_chipset = init_chipset_pdcnew, - .init_hwif = init_hwif_pdc202new, - .autodma = AUTODMA, - .bootable = OFF_BOARD, - .pio_mask = ATA_PIO4, - .udma_mask = 0x3f, /* udma0-5 */ - .host_flags = IDE_HFLAG_POST_SET_MODE, - },{ /* 3 */ - .name = "PDC20271", - .init_setup = init_setup_pdcnew, - .init_chipset = init_chipset_pdcnew, - .init_hwif = init_hwif_pdc202new, - .autodma = AUTODMA, - .bootable = OFF_BOARD, - .pio_mask = ATA_PIO4, - .udma_mask = 0x7f, /* udma0-6*/ - .host_flags = IDE_HFLAG_POST_SET_MODE, - },{ /* 4 */ - .name = "PDC20275", - .init_setup = init_setup_pdcnew, - .init_chipset = init_chipset_pdcnew, - .init_hwif = init_hwif_pdc202new, - .autodma = AUTODMA, - .bootable = OFF_BOARD, - .pio_mask = ATA_PIO4, - .udma_mask = 0x7f, /* udma0-6*/ - .host_flags = IDE_HFLAG_POST_SET_MODE, - },{ /* 5 */ - .name = "PDC20276", - .init_setup = init_setup_pdc20276, - .init_chipset = init_chipset_pdcnew, - .init_hwif = init_hwif_pdc202new, - .autodma = AUTODMA, - .bootable = OFF_BOARD, - .pio_mask = ATA_PIO4, - .udma_mask = 0x7f, /* udma0-6*/ - .host_flags = IDE_HFLAG_POST_SET_MODE, - },{ /* 6 */ - .name = "PDC20277", - .init_setup = init_setup_pdcnew, - .init_chipset = init_chipset_pdcnew, - .init_hwif = init_hwif_pdc202new, - .autodma = AUTODMA, - .bootable = OFF_BOARD, - .pio_mask = ATA_PIO4, - .udma_mask = 0x7f, /* udma0-6*/ - .host_flags = IDE_HFLAG_POST_SET_MODE, - } -}; -/** - * pdc202new_init_one - called when a pdc202xx is found - * @dev: the pdc202new device - * @id: the matching pci id - * - * Called when the PCI registration layer (or the IDE initialization) - * finds a device matching our IDE device tables. - */ - -static int __devinit pdc202new_init_one(struct pci_dev *dev, const struct pci_device_id *id) -{ - ide_pci_device_t *d = &pdcnew_chipsets[id->driver_data]; - - return d->init_setup(dev, d); + return ide_setup_pci_device(dev, d); } static const struct pci_device_id pdc202new_pci_tbl[] = { diff --git a/drivers/ide/pci/pdc202xx_old.c b/drivers/ide/pci/pdc202xx_old.c index e1d2337a9f1..e09742e2ba5 100644 --- a/drivers/ide/pci/pdc202xx_old.c +++ b/drivers/ide/pci/pdc202xx_old.c @@ -1,5 +1,5 @@ /* - * linux/drivers/ide/pci/pdc202xx_old.c Version 0.51 Jul 27, 2007 + * linux/drivers/ide/pci/pdc202xx_old.c Version 0.52 Aug 27, 2007 * * Copyright (C) 1998-2002 Andre Hedrick <andre@linux-ide.org> * Copyright (C) 2006-2007 MontaVista Software, Inc. @@ -97,9 +97,6 @@ static void pdc202xx_set_mode(ide_drive_t *drive, const u8 speed) case XFER_MW_DMA_2: TB = 0x60; TC = 0x03; break; case XFER_MW_DMA_1: TB = 0x60; TC = 0x04; break; case XFER_MW_DMA_0: TB = 0xE0; TC = 0x0F; break; - case XFER_SW_DMA_2: TB = 0x60; TC = 0x05; break; - case XFER_SW_DMA_1: TB = 0x80; TC = 0x06; break; - case XFER_SW_DMA_0: TB = 0xC0; TC = 0x0B; break; case XFER_PIO_4: TA = 0x01; TB = 0x04; break; case XFER_PIO_3: TA = 0x02; TB = 0x06; break; case XFER_PIO_2: TA = 0x03; TB = 0x08; break; @@ -305,13 +302,6 @@ static unsigned int __devinit init_chipset_pdc202xx(struct pci_dev *dev, static void __devinit init_hwif_pdc202xx(ide_hwif_t *hwif) { - struct pci_dev *dev = hwif->pci_dev; - - /* PDC20265 has problems with large LBA48 requests */ - if ((dev->device == PCI_DEVICE_ID_PROMISE_20267) || - (dev->device == PCI_DEVICE_ID_PROMISE_20265)) - hwif->rqsize = 256; - hwif->set_pio_mode = &pdc202xx_set_pio_mode; hwif->set_dma_mode = &pdc202xx_set_mode; @@ -320,18 +310,9 @@ static void __devinit init_hwif_pdc202xx(ide_hwif_t *hwif) if (hwif->pci_dev->device != PCI_DEVICE_ID_PROMISE_20246) hwif->resetproc = &pdc202xx_reset; - hwif->err_stops_fifo = 1; - - hwif->drives[0].autotune = hwif->drives[1].autotune = 1; - if (hwif->dma_base == 0) return; - hwif->ultra_mask = hwif->cds->udma_mask; - hwif->mwdma_mask = 0x07; - hwif->swdma_mask = 0x07; - hwif->atapi_dma = 1; - hwif->dma_lost_irq = &pdc202xx_dma_lost_irq; hwif->dma_timeout = &pdc202xx_dma_timeout; @@ -377,8 +358,8 @@ static void __devinit init_dma_pdc202xx(ide_hwif_t *hwif, unsigned long dmabase) ide_setup_dma(hwif, dmabase, 8); } -static int __devinit init_setup_pdc202ata4(struct pci_dev *dev, - ide_pci_device_t *d) +static void __devinit pdc202ata4_fixup_irq(struct pci_dev *dev, + const char *name) { if ((dev->class >> 8) != PCI_CLASS_STORAGE_IDE) { u8 irq = 0, irq2 = 0; @@ -388,90 +369,45 @@ static int __devinit init_setup_pdc202ata4(struct pci_dev *dev, if (irq != irq2) { pci_write_config_byte(dev, (PCI_INTERRUPT_LINE)|0x80, irq); /* 0xbc */ - printk(KERN_INFO "%s: pci-config space interrupt " - "mirror fixed.\n", d->name); + printk(KERN_INFO "%s: PCI config space interrupt " + "mirror fixed\n", name); } } - return ide_setup_pci_device(dev, d); } -static int __devinit init_setup_pdc20265(struct pci_dev *dev, - ide_pci_device_t *d) -{ - if ((dev->bus->self) && - (dev->bus->self->vendor == PCI_VENDOR_ID_INTEL) && - ((dev->bus->self->device == PCI_DEVICE_ID_INTEL_I960) || - (dev->bus->self->device == PCI_DEVICE_ID_INTEL_I960RM))) { - printk(KERN_INFO "ide: Skipping Promise PDC20265 " - "attached to I2O RAID controller.\n"); - return -ENODEV; +#define DECLARE_PDC2026X_DEV(name_str, udma, extra_flags) \ + { \ + .name = name_str, \ + .init_chipset = init_chipset_pdc202xx, \ + .init_hwif = init_hwif_pdc202xx, \ + .init_dma = init_dma_pdc202xx, \ + .extra = 48, \ + .host_flags = IDE_HFLAG_ERROR_STOPS_FIFO | \ + extra_flags | \ + IDE_HFLAG_OFF_BOARD, \ + .pio_mask = ATA_PIO4, \ + .mwdma_mask = ATA_MWDMA2, \ + .udma_mask = udma, \ } - return ide_setup_pci_device(dev, d); -} -static int __devinit init_setup_pdc202xx(struct pci_dev *dev, - ide_pci_device_t *d) -{ - return ide_setup_pci_device(dev, d); -} - -static ide_pci_device_t pdc202xx_chipsets[] __devinitdata = { +static const struct ide_port_info pdc202xx_chipsets[] __devinitdata = { { /* 0 */ .name = "PDC20246", - .init_setup = init_setup_pdc202ata4, .init_chipset = init_chipset_pdc202xx, .init_hwif = init_hwif_pdc202xx, .init_dma = init_dma_pdc202xx, - .autodma = AUTODMA, - .bootable = OFF_BOARD, .extra = 16, + .host_flags = IDE_HFLAG_ERROR_STOPS_FIFO | + IDE_HFLAG_OFF_BOARD, .pio_mask = ATA_PIO4, - .udma_mask = 0x07, /* udma0-2 */ - },{ /* 1 */ - .name = "PDC20262", - .init_setup = init_setup_pdc202ata4, - .init_chipset = init_chipset_pdc202xx, - .init_hwif = init_hwif_pdc202xx, - .init_dma = init_dma_pdc202xx, - .autodma = AUTODMA, - .bootable = OFF_BOARD, - .extra = 48, - .pio_mask = ATA_PIO4, - .udma_mask = 0x1f, /* udma0-4 */ - },{ /* 2 */ - .name = "PDC20263", - .init_setup = init_setup_pdc202ata4, - .init_chipset = init_chipset_pdc202xx, - .init_hwif = init_hwif_pdc202xx, - .init_dma = init_dma_pdc202xx, - .autodma = AUTODMA, - .bootable = OFF_BOARD, - .extra = 48, - .pio_mask = ATA_PIO4, - .udma_mask = 0x1f, /* udma0-4 */ - },{ /* 3 */ - .name = "PDC20265", - .init_setup = init_setup_pdc20265, - .init_chipset = init_chipset_pdc202xx, - .init_hwif = init_hwif_pdc202xx, - .init_dma = init_dma_pdc202xx, - .autodma = AUTODMA, - .bootable = OFF_BOARD, - .extra = 48, - .pio_mask = ATA_PIO4, - .udma_mask = 0x3f, /* udma0-5 */ - },{ /* 4 */ - .name = "PDC20267", - .init_setup = init_setup_pdc202xx, - .init_chipset = init_chipset_pdc202xx, - .init_hwif = init_hwif_pdc202xx, - .init_dma = init_dma_pdc202xx, - .autodma = AUTODMA, - .bootable = OFF_BOARD, - .extra = 48, - .pio_mask = ATA_PIO4, - .udma_mask = 0x3f, /* udma0-5 */ - } + .mwdma_mask = ATA_MWDMA2, + .udma_mask = ATA_UDMA2, + }, + + /* 1 */ DECLARE_PDC2026X_DEV("PDC20262", ATA_UDMA4, 0), + /* 2 */ DECLARE_PDC2026X_DEV("PDC20263", ATA_UDMA4, 0), + /* 3 */ DECLARE_PDC2026X_DEV("PDC20265", ATA_UDMA5, IDE_HFLAG_RQSIZE_256), + /* 4 */ DECLARE_PDC2026X_DEV("PDC20267", ATA_UDMA5, IDE_HFLAG_RQSIZE_256), }; /** @@ -485,9 +421,28 @@ static ide_pci_device_t pdc202xx_chipsets[] __devinitdata = { static int __devinit pdc202xx_init_one(struct pci_dev *dev, const struct pci_device_id *id) { - ide_pci_device_t *d = &pdc202xx_chipsets[id->driver_data]; + const struct ide_port_info *d; + u8 idx = id->driver_data; + + d = &pdc202xx_chipsets[idx]; + + if (idx < 3) + pdc202ata4_fixup_irq(dev, d->name); + + if (idx == 3) { + struct pci_dev *bridge = dev->bus->self; - return d->init_setup(dev, d); + if (bridge && + bridge->vendor == PCI_VENDOR_ID_INTEL && + (bridge->device == PCI_DEVICE_ID_INTEL_I960 || + bridge->device == PCI_DEVICE_ID_INTEL_I960RM)) { + printk(KERN_INFO "ide: Skipping Promise PDC20265 " + "attached to I2O RAID controller\n"); + return -ENODEV; + } + } + + return ide_setup_pci_device(dev, d); } static const struct pci_device_id pdc202xx_pci_tbl[] = { diff --git a/drivers/ide/pci/piix.c b/drivers/ide/pci/piix.c index a8dd0c0add3..9329d4a810e 100644 --- a/drivers/ide/pci/piix.c +++ b/drivers/ide/pci/piix.c @@ -1,5 +1,5 @@ /* - * linux/drivers/ide/pci/piix.c Version 0.53 Aug 9, 2007 + * linux/drivers/ide/pci/piix.c Version 0.54 Sep 5, 2007 * * Copyright (C) 1998-1999 Andrzej Krzysztofowicz, Author and Maintainer * Copyright (C) 1998-2000 Andre Hedrick <andre@linux-ide.org> @@ -254,53 +254,20 @@ static void piix_set_dma_mode(ide_drive_t *drive, const u8 speed) } /** - * piix_is_ichx - check if ICHx - * @dev: PCI device to check - * - * returns 1 if ICHx, 0 otherwise. - */ -static int piix_is_ichx(struct pci_dev *dev) -{ - switch (dev->device) { - case PCI_DEVICE_ID_INTEL_82801EB_1: - case PCI_DEVICE_ID_INTEL_82801AA_1: - case PCI_DEVICE_ID_INTEL_82801AB_1: - case PCI_DEVICE_ID_INTEL_82801BA_8: - case PCI_DEVICE_ID_INTEL_82801BA_9: - case PCI_DEVICE_ID_INTEL_82801CA_10: - case PCI_DEVICE_ID_INTEL_82801CA_11: - case PCI_DEVICE_ID_INTEL_82801DB_1: - case PCI_DEVICE_ID_INTEL_82801DB_10: - case PCI_DEVICE_ID_INTEL_82801DB_11: - case PCI_DEVICE_ID_INTEL_82801EB_11: - case PCI_DEVICE_ID_INTEL_82801E_11: - case PCI_DEVICE_ID_INTEL_ESB_2: - case PCI_DEVICE_ID_INTEL_ICH6_19: - case PCI_DEVICE_ID_INTEL_ICH7_21: - case PCI_DEVICE_ID_INTEL_ESB2_18: - case PCI_DEVICE_ID_INTEL_ICH8_6: - return 1; - } - - return 0; -} - -/** - * init_chipset_piix - set up the PIIX chipset + * init_chipset_ich - set up the ICH chipset * @dev: PCI device to set up * @name: Name of the device * - * Initialize the PCI device as required. For the PIIX this turns - * out to be nice and simple + * Initialize the PCI device as required. For the ICH this turns + * out to be nice and simple. */ -static unsigned int __devinit init_chipset_piix (struct pci_dev *dev, const char *name) +static unsigned int __devinit init_chipset_ich(struct pci_dev *dev, const char *name) { - if (piix_is_ichx(dev)) { - unsigned int extra = 0; - pci_read_config_dword(dev, 0x54, &extra); - pci_write_config_dword(dev, 0x54, extra|0x400); - } + u32 extra = 0; + + pci_read_config_dword(dev, 0x54, &extra); + pci_write_config_dword(dev, 0x54, extra | 0x400); return 0; } @@ -318,9 +285,9 @@ static void piix_dma_clear_irq(ide_drive_t *drive) u8 dma_stat; /* clear the INTR & ERROR bits */ - dma_stat = hwif->INB(hwif->dma_status); + dma_stat = inb(hwif->dma_status); /* Should we force the bit as well ? */ - hwif->OUTB(dma_stat, hwif->dma_status); + outb(dma_stat, hwif->dma_status); } struct ich_laptop { @@ -374,35 +341,12 @@ static u8 __devinit piix_cable_detect(ide_hwif_t *hwif) static void __devinit init_hwif_piix(ide_hwif_t *hwif) { -#ifndef CONFIG_IA64 - if (!hwif->irq) - hwif->irq = hwif->channel ? 15 : 14; -#endif /* CONFIG_IA64 */ - - if (hwif->pci_dev->device == PCI_DEVICE_ID_INTEL_82371MX) { - /* This is a painful system best to let it self tune for now */ - return; - } - hwif->set_pio_mode = &piix_set_pio_mode; hwif->set_dma_mode = &piix_set_dma_mode; - hwif->drives[0].autotune = 1; - hwif->drives[1].autotune = 1; - if (!hwif->dma_base) return; - /* ICHx need to clear the bmdma status for all interrupts */ - if (piix_is_ichx(hwif->pci_dev)) - hwif->ide_dma_clear_irq = &piix_dma_clear_irq; - - hwif->atapi_dma = 1; - - hwif->ultra_mask = hwif->cds->udma_mask; - hwif->mwdma_mask = 0x06; - hwif->swdma_mask = 0x04; - if (hwif->ultra_mask & 0x78) { if (hwif->cbl != ATA_CBL_PATA40_SHORT) hwif->cbl = piix_cable_detect(hwif); @@ -412,21 +356,49 @@ static void __devinit init_hwif_piix(ide_hwif_t *hwif) hwif->ultra_mask = hwif->mwdma_mask = hwif->swdma_mask = 0; } +static void __devinit init_hwif_ich(ide_hwif_t *hwif) +{ + init_hwif_piix(hwif); + + /* ICHx need to clear the BMDMA status for all interrupts */ + if (hwif->dma_base) + hwif->ide_dma_clear_irq = &piix_dma_clear_irq; +} + +#ifndef CONFIG_IA64 + #define IDE_HFLAGS_PIIX (IDE_HFLAG_LEGACY_IRQS | IDE_HFLAG_BOOTABLE) +#else + #define IDE_HFLAGS_PIIX IDE_HFLAG_BOOTABLE +#endif + #define DECLARE_PIIX_DEV(name_str, udma) \ { \ .name = name_str, \ - .init_chipset = init_chipset_piix, \ .init_hwif = init_hwif_piix, \ - .autodma = AUTODMA, \ .enablebits = {{0x41,0x80,0x80}, {0x43,0x80,0x80}}, \ - .bootable = ON_BOARD, \ + .host_flags = IDE_HFLAGS_PIIX, \ .pio_mask = ATA_PIO4, \ + .swdma_mask = ATA_SWDMA2_ONLY, \ + .mwdma_mask = ATA_MWDMA12_ONLY, \ .udma_mask = udma, \ } -static ide_pci_device_t piix_pci_info[] __devinitdata = { - /* 0 */ DECLARE_PIIX_DEV("PIIXa", 0x00), /* no udma */ - /* 1 */ DECLARE_PIIX_DEV("PIIXb", 0x00), /* no udma */ +#define DECLARE_ICH_DEV(name_str, udma) \ + { \ + .name = name_str, \ + .init_chipset = init_chipset_ich, \ + .init_hwif = init_hwif_ich, \ + .enablebits = {{0x41,0x80,0x80}, {0x43,0x80,0x80}}, \ + .host_flags = IDE_HFLAGS_PIIX, \ + .pio_mask = ATA_PIO4, \ + .swdma_mask = ATA_SWDMA2_ONLY, \ + .mwdma_mask = ATA_MWDMA12_ONLY, \ + .udma_mask = udma, \ + } + +static const struct ide_port_info piix_pci_info[] __devinitdata = { + /* 0 */ DECLARE_PIIX_DEV("PIIXa", 0x00), /* no udma */ + /* 1 */ DECLARE_PIIX_DEV("PIIXb", 0x00), /* no udma */ /* 2 */ { /* @@ -435,36 +407,35 @@ static ide_pci_device_t piix_pci_info[] __devinitdata = { * of the bit 14 of the IDETIM register at offset 0x6c */ .name = "MPIIX", - .init_hwif = init_hwif_piix, - .autodma = NODMA, .enablebits = {{0x6d,0xc0,0x80}, {0x6d,0xc0,0xc0}}, - .bootable = ON_BOARD, - .host_flags = IDE_HFLAG_ISA_PORTS, + .host_flags = IDE_HFLAG_ISA_PORTS | IDE_HFLAG_NO_DMA | + IDE_HFLAGS_PIIX, .pio_mask = ATA_PIO4, + /* This is a painful system best to let it self tune for now */ }, - /* 3 */ DECLARE_PIIX_DEV("PIIX3", 0x00), /* no udma */ - /* 4 */ DECLARE_PIIX_DEV("PIIX4", 0x07), /* udma0-2 */ - /* 5 */ DECLARE_PIIX_DEV("ICH0", 0x07), /* udma0-2 */ - /* 6 */ DECLARE_PIIX_DEV("PIIX4", 0x07), /* udma0-2 */ - /* 7 */ DECLARE_PIIX_DEV("ICH", 0x1f), /* udma0-4 */ - /* 8 */ DECLARE_PIIX_DEV("PIIX4", 0x1f), /* udma0-4 */ - /* 9 */ DECLARE_PIIX_DEV("PIIX4", 0x07), /* udma0-2 */ - /* 10 */ DECLARE_PIIX_DEV("ICH2", 0x3f), /* udma0-5 */ - /* 11 */ DECLARE_PIIX_DEV("ICH2M", 0x3f), /* udma0-5 */ - /* 12 */ DECLARE_PIIX_DEV("ICH3M", 0x3f), /* udma0-5 */ - /* 13 */ DECLARE_PIIX_DEV("ICH3", 0x3f), /* udma0-5 */ - /* 14 */ DECLARE_PIIX_DEV("ICH4", 0x3f), /* udma0-5 */ - /* 15 */ DECLARE_PIIX_DEV("ICH5", 0x3f), /* udma0-5 */ - /* 16 */ DECLARE_PIIX_DEV("C-ICH", 0x3f), /* udma0-5 */ - /* 17 */ DECLARE_PIIX_DEV("ICH4", 0x3f), /* udma0-5 */ - /* 18 */ DECLARE_PIIX_DEV("ICH5-SATA", 0x3f), /* udma0-5 */ - /* 19 */ DECLARE_PIIX_DEV("ICH5", 0x3f), /* udma0-5 */ - /* 20 */ DECLARE_PIIX_DEV("ICH6", 0x3f), /* udma0-5 */ - /* 21 */ DECLARE_PIIX_DEV("ICH7", 0x3f), /* udma0-5 */ - /* 22 */ DECLARE_PIIX_DEV("ICH4", 0x3f), /* udma0-5 */ - /* 23 */ DECLARE_PIIX_DEV("ESB2", 0x3f), /* udma0-5 */ - /* 24 */ DECLARE_PIIX_DEV("ICH8M", 0x3f), /* udma0-5 */ + /* 3 */ DECLARE_PIIX_DEV("PIIX3", 0x00), /* no udma */ + /* 4 */ DECLARE_PIIX_DEV("PIIX4", ATA_UDMA2), + /* 5 */ DECLARE_ICH_DEV("ICH0", ATA_UDMA2), + /* 6 */ DECLARE_PIIX_DEV("PIIX4", ATA_UDMA2), + /* 7 */ DECLARE_ICH_DEV("ICH", ATA_UDMA4), + /* 8 */ DECLARE_PIIX_DEV("PIIX4", ATA_UDMA4), + /* 9 */ DECLARE_PIIX_DEV("PIIX4", ATA_UDMA2), + /* 10 */ DECLARE_ICH_DEV("ICH2", ATA_UDMA5), + /* 11 */ DECLARE_ICH_DEV("ICH2M", ATA_UDMA5), + /* 12 */ DECLARE_ICH_DEV("ICH3M", ATA_UDMA5), + /* 13 */ DECLARE_ICH_DEV("ICH3", ATA_UDMA5), + /* 14 */ DECLARE_ICH_DEV("ICH4", ATA_UDMA5), + /* 15 */ DECLARE_ICH_DEV("ICH5", ATA_UDMA5), + /* 16 */ DECLARE_ICH_DEV("C-ICH", ATA_UDMA5), + /* 17 */ DECLARE_ICH_DEV("ICH4", ATA_UDMA5), + /* 18 */ DECLARE_ICH_DEV("ICH5-SATA", ATA_UDMA5), + /* 19 */ DECLARE_ICH_DEV("ICH5", ATA_UDMA5), + /* 20 */ DECLARE_ICH_DEV("ICH6", ATA_UDMA5), + /* 21 */ DECLARE_ICH_DEV("ICH7", ATA_UDMA5), + /* 22 */ DECLARE_ICH_DEV("ICH4", ATA_UDMA5), + /* 23 */ DECLARE_ICH_DEV("ESB2", ATA_UDMA5), + /* 24 */ DECLARE_ICH_DEV("ICH8M", ATA_UDMA5), }; /** @@ -478,9 +449,7 @@ static ide_pci_device_t piix_pci_info[] __devinitdata = { static int __devinit piix_init_one(struct pci_dev *dev, const struct pci_device_id *id) { - ide_pci_device_t *d = &piix_pci_info[id->driver_data]; - - return ide_setup_pci_device(dev, d); + return ide_setup_pci_device(dev, &piix_pci_info[id->driver_data]); } /** diff --git a/drivers/ide/pci/rz1000.c b/drivers/ide/pci/rz1000.c index 3f506e8d44e..6b10ae260fa 100644 --- a/drivers/ide/pci/rz1000.c +++ b/drivers/ide/pci/rz1000.c @@ -35,13 +35,13 @@ static void __devinit init_hwif_rz1000 (ide_hwif_t *hwif) u16 reg; struct pci_dev *dev = hwif->pci_dev; - hwif->chipset = ide_rz1000; if (!pci_read_config_word (dev, 0x40, ®) && !pci_write_config_word(dev, 0x40, reg & 0xdfff)) { printk(KERN_INFO "%s: disabled chipset read-ahead " "(buggy RZ1000/RZ1001)\n", hwif->name); } else { - hwif->serialized = 1; + if (hwif->mate) + hwif->mate->serialized = hwif->serialized = 1; hwif->drives[0].no_unmask = 1; hwif->drives[1].no_unmask = 1; printk(KERN_INFO "%s: serialized, disabled unmasking " @@ -49,11 +49,11 @@ static void __devinit init_hwif_rz1000 (ide_hwif_t *hwif) } } -static ide_pci_device_t rz1000_chipset __devinitdata = { +static const struct ide_port_info rz1000_chipset __devinitdata = { .name = "RZ100x", .init_hwif = init_hwif_rz1000, - .autodma = NODMA, - .bootable = ON_BOARD, + .chipset = ide_rz1000, + .host_flags = IDE_HFLAG_NO_DMA | IDE_HFLAG_BOOTABLE, }; static int __devinit rz1000_init_one(struct pci_dev *dev, const struct pci_device_id *id) diff --git a/drivers/ide/pci/sc1200.c b/drivers/ide/pci/sc1200.c index 54c5c98a2e2..d2c8b5524f2 100644 --- a/drivers/ide/pci/sc1200.c +++ b/drivers/ide/pci/sc1200.c @@ -362,33 +362,26 @@ static int sc1200_resume (struct pci_dev *dev) */ static void __devinit init_hwif_sc1200 (ide_hwif_t *hwif) { - if (hwif->mate) - hwif->serialized = hwif->mate->serialized = 1; - hwif->set_pio_mode = &sc1200_set_pio_mode; hwif->set_dma_mode = &sc1200_set_dma_mode; - hwif->drives[0].autotune = 1; - hwif->drives[1].autotune = 1; - if (hwif->dma_base == 0) return; hwif->udma_filter = sc1200_udma_filter; hwif->ide_dma_end = &sc1200_ide_dma_end; - - hwif->atapi_dma = 1; - hwif->ultra_mask = 0x07; - hwif->mwdma_mask = 0x07; } -static ide_pci_device_t sc1200_chipset __devinitdata = { +static const struct ide_port_info sc1200_chipset __devinitdata = { .name = "SC1200", .init_hwif = init_hwif_sc1200, - .autodma = AUTODMA, - .bootable = ON_BOARD, - .host_flags = IDE_HFLAG_ABUSE_DMA_MODES | IDE_HFLAG_POST_SET_MODE, + .host_flags = IDE_HFLAG_SERIALIZE | + IDE_HFLAG_POST_SET_MODE | + IDE_HFLAG_ABUSE_DMA_MODES | + IDE_HFLAG_BOOTABLE, .pio_mask = ATA_PIO4, + .mwdma_mask = ATA_MWDMA2, + .udma_mask = ATA_UDMA2, }; static int __devinit sc1200_init_one(struct pci_dev *dev, const struct pci_device_id *id) diff --git a/drivers/ide/pci/scc_pata.c b/drivers/ide/pci/scc_pata.c index bd4c1d3070e..ebb7132b9b8 100644 --- a/drivers/ide/pci/scc_pata.c +++ b/drivers/ide/pci/scc_pata.c @@ -472,7 +472,7 @@ static u8 scc_udma_filter(ide_drive_t *drive) if ((drive->media != ide_disk) && (mask & 0xE0)) { printk(KERN_INFO "%s: limit %s to UDMA4\n", SCC_PATA_NAME, drive->name); - mask = 0x1F; + mask = ATA_UDMA4; } return mask; @@ -538,12 +538,13 @@ static int setup_mmio_scc (struct pci_dev *dev, const char *name) /** * init_setup_scc - set up an SCC PATA Controller * @dev: PCI device - * @d: IDE PCI device + * @d: IDE port info * * Perform the initial set up for this device. */ -static int __devinit init_setup_scc(struct pci_dev *dev, ide_pci_device_t *d) +static int __devinit init_setup_scc(struct pci_dev *dev, + const struct ide_port_info *d) { unsigned long ctl_base; unsigned long dma_base; @@ -683,17 +684,10 @@ static void __devinit init_hwif_scc(ide_hwif_t *hwif) hwif->ide_dma_test_irq = scc_dma_test_irq; hwif->udma_filter = scc_udma_filter; - hwif->drives[0].autotune = IDE_TUNE_AUTO; - hwif->drives[1].autotune = IDE_TUNE_AUTO; - - if (in_be32((void __iomem *)(hwif->config_data + 0xff0)) & CCKCTRL_ATACLKOEN) { - hwif->ultra_mask = 0x7f; /* 133MHz */ - } else { - hwif->ultra_mask = 0x3f; /* 100MHz */ - } - hwif->mwdma_mask = 0x00; - hwif->swdma_mask = 0x00; - hwif->atapi_dma = 1; + if (in_be32((void __iomem *)(hwif->config_data + 0xff0)) & CCKCTRL_ATACLKOEN) + hwif->ultra_mask = ATA_UDMA6; /* 133MHz */ + else + hwif->ultra_mask = ATA_UDMA5; /* 100MHz */ /* we support 80c cable only. */ hwif->cbl = ATA_CBL_PATA80; @@ -702,16 +696,14 @@ static void __devinit init_hwif_scc(ide_hwif_t *hwif) #define DECLARE_SCC_DEV(name_str) \ { \ .name = name_str, \ - .init_setup = init_setup_scc, \ .init_iops = init_iops_scc, \ .init_hwif = init_hwif_scc, \ - .autodma = AUTODMA, \ - .bootable = ON_BOARD, \ - .host_flags = IDE_HFLAG_SINGLE, \ + .host_flags = IDE_HFLAG_SINGLE | \ + IDE_HFLAG_BOOTABLE, \ .pio_mask = ATA_PIO4, \ } -static ide_pci_device_t scc_chipsets[] __devinitdata = { +static const struct ide_port_info scc_chipsets[] __devinitdata = { /* 0 */ DECLARE_SCC_DEV("sccIDE"), }; @@ -726,8 +718,7 @@ static ide_pci_device_t scc_chipsets[] __devinitdata = { static int __devinit scc_init_one(struct pci_dev *dev, const struct pci_device_id *id) { - ide_pci_device_t *d = &scc_chipsets[id->driver_data]; - return d->init_setup(dev, d); + return init_setup_scc(dev, &scc_chipsets[id->driver_data]); } /** diff --git a/drivers/ide/pci/serverworks.c b/drivers/ide/pci/serverworks.c index d3ffc52e22a..a7280311357 100644 --- a/drivers/ide/pci/serverworks.c +++ b/drivers/ide/pci/serverworks.c @@ -158,13 +158,6 @@ static void svwks_set_dma_mode(ide_drive_t *drive, const u8 speed) u8 ultra_enable = 0, ultra_timing = 0, dma_timing = 0; - /* If we are about to put a disk into UDMA mode we screwed up. - Our code assumes we never _ever_ do this on an OSB4 */ - - if(dev->device == PCI_DEVICE_ID_SERVERWORKS_OSB4 && - drive->media == ide_disk && speed >= XFER_UDMA_0) - BUG(); - pci_read_config_byte(dev, (0x56|hwif->channel), &ultra_timing); pci_read_config_byte(dev, 0x54, &ultra_enable); @@ -360,23 +353,10 @@ static u8 __devinit ata66_svwks(ide_hwif_t *hwif) static void __devinit init_hwif_svwks (ide_hwif_t *hwif) { - if (!hwif->irq) - hwif->irq = hwif->channel ? 15 : 14; - hwif->set_pio_mode = &svwks_set_pio_mode; hwif->set_dma_mode = &svwks_set_dma_mode; hwif->udma_filter = &svwks_udma_filter; - hwif->atapi_dma = 1; - - if (hwif->pci_dev->device != PCI_DEVICE_ID_SERVERWORKS_OSB4IDE) - hwif->ultra_mask = 0x3f; - - hwif->mwdma_mask = 0x07; - - hwif->drives[0].autotune = 1; - hwif->drives[1].autotune = 1; - if (!hwif->dma_base) return; @@ -386,72 +366,49 @@ static void __devinit init_hwif_svwks (ide_hwif_t *hwif) } } -static int __devinit init_setup_svwks (struct pci_dev *dev, ide_pci_device_t *d) -{ - return ide_setup_pci_device(dev, d); -} - -static int __devinit init_setup_csb6 (struct pci_dev *dev, ide_pci_device_t *d) -{ - if (!(PCI_FUNC(dev->devfn) & 1)) { - d->bootable = NEVER_BOARD; - if (dev->resource[0].start == 0x01f1) - d->bootable = ON_BOARD; - } - - if ((dev->device == PCI_DEVICE_ID_SERVERWORKS_CSB6IDE || - dev->device == PCI_DEVICE_ID_SERVERWORKS_CSB6IDE2) && - (!(PCI_FUNC(dev->devfn) & 1))) - d->host_flags |= IDE_HFLAG_SINGLE; - else - d->host_flags &= ~IDE_HFLAG_SINGLE; - - return ide_setup_pci_device(dev, d); -} - -static ide_pci_device_t serverworks_chipsets[] __devinitdata = { +static const struct ide_port_info serverworks_chipsets[] __devinitdata = { { /* 0 */ .name = "SvrWks OSB4", - .init_setup = init_setup_svwks, .init_chipset = init_chipset_svwks, .init_hwif = init_hwif_svwks, - .autodma = AUTODMA, - .bootable = ON_BOARD, + .host_flags = IDE_HFLAG_LEGACY_IRQS | IDE_HFLAG_BOOTABLE, .pio_mask = ATA_PIO4, + .mwdma_mask = ATA_MWDMA2, + .udma_mask = 0x00, /* UDMA is problematic on OSB4 */ },{ /* 1 */ .name = "SvrWks CSB5", - .init_setup = init_setup_svwks, .init_chipset = init_chipset_svwks, .init_hwif = init_hwif_svwks, - .autodma = AUTODMA, - .bootable = ON_BOARD, + .host_flags = IDE_HFLAG_LEGACY_IRQS | IDE_HFLAG_BOOTABLE, .pio_mask = ATA_PIO4, + .mwdma_mask = ATA_MWDMA2, + .udma_mask = ATA_UDMA5, },{ /* 2 */ .name = "SvrWks CSB6", - .init_setup = init_setup_csb6, .init_chipset = init_chipset_svwks, .init_hwif = init_hwif_svwks, - .autodma = AUTODMA, - .bootable = ON_BOARD, + .host_flags = IDE_HFLAG_LEGACY_IRQS | IDE_HFLAG_BOOTABLE, .pio_mask = ATA_PIO4, + .mwdma_mask = ATA_MWDMA2, + .udma_mask = ATA_UDMA5, },{ /* 3 */ .name = "SvrWks CSB6", - .init_setup = init_setup_csb6, .init_chipset = init_chipset_svwks, .init_hwif = init_hwif_svwks, - .autodma = AUTODMA, - .bootable = ON_BOARD, - .host_flags = IDE_HFLAG_SINGLE, + .host_flags = IDE_HFLAG_LEGACY_IRQS | IDE_HFLAG_SINGLE | + IDE_HFLAG_BOOTABLE, .pio_mask = ATA_PIO4, + .mwdma_mask = ATA_MWDMA2, + .udma_mask = ATA_UDMA5, },{ /* 4 */ .name = "SvrWks HT1000", - .init_setup = init_setup_svwks, .init_chipset = init_chipset_svwks, .init_hwif = init_hwif_svwks, - .autodma = AUTODMA, - .bootable = ON_BOARD, - .host_flags = IDE_HFLAG_SINGLE, + .host_flags = IDE_HFLAG_LEGACY_IRQS | IDE_HFLAG_SINGLE | + IDE_HFLAG_BOOTABLE, .pio_mask = ATA_PIO4, + .mwdma_mask = ATA_MWDMA2, + .udma_mask = ATA_UDMA5, } }; @@ -466,9 +423,21 @@ static ide_pci_device_t serverworks_chipsets[] __devinitdata = { static int __devinit svwks_init_one(struct pci_dev *dev, const struct pci_device_id *id) { - ide_pci_device_t *d = &serverworks_chipsets[id->driver_data]; + struct ide_port_info d; + u8 idx = id->driver_data; + + d = serverworks_chipsets[idx]; + + if (idx == 2 || idx == 3) { + if ((PCI_FUNC(dev->devfn) & 1) == 0) { + if (pci_resource_start(dev, 0) != 0x01f1) + d.host_flags &= ~IDE_HFLAG_BOOTABLE; + d.host_flags |= IDE_HFLAG_SINGLE; + } else + d.host_flags &= ~IDE_HFLAG_SINGLE; + } - return d->init_setup(dev, d); + return ide_setup_pci_device(dev, &d); } static const struct pci_device_id svwks_pci_tbl[] = { diff --git a/drivers/ide/pci/sgiioc4.c b/drivers/ide/pci/sgiioc4.c index 9a9474f534e..de820aa58cd 100644 --- a/drivers/ide/pci/sgiioc4.c +++ b/drivers/ide/pci/sgiioc4.c @@ -592,8 +592,7 @@ ide_init_sgiioc4(ide_hwif_t * hwif) if (hwif->dma_base == 0) return; - hwif->atapi_dma = 1; - hwif->mwdma_mask = 0x04; + hwif->mwdma_mask = ATA_MWDMA2_ONLY; hwif->dma_setup = &sgiioc4_ide_dma_setup; hwif->dma_start = &sgiioc4_ide_dma_start; @@ -615,6 +614,7 @@ sgiioc4_ide_setup_pci_device(struct pci_dev *dev) void __iomem *virt_base; ide_hwif_t *hwif; int h; + u8 idx[4] = { 0xff, 0xff, 0xff, 0xff }; /* * Find an empty HWIF; if none available, return -ENOMEM. @@ -655,10 +655,12 @@ sgiioc4_ide_setup_pci_device(struct pci_dev *dev) } if (hwif->io_ports[IDE_DATA_OFFSET] != cmd_base) { + hw_regs_t hw; + /* Initialize the IO registers */ - sgiioc4_init_hwif_ports(&hwif->hw, cmd_base, ctl, irqport); - memcpy(hwif->io_ports, hwif->hw.io_ports, - sizeof (hwif->io_ports)); + memset(&hw, 0, sizeof(hw)); + sgiioc4_init_hwif_ports(&hw, cmd_base, ctl, irqport); + memcpy(hwif->io_ports, hw.io_ports, sizeof(hwif->io_ports)); hwif->noprobe = !hwif->io_ports[IDE_DATA_OFFSET]; } @@ -680,11 +682,10 @@ sgiioc4_ide_setup_pci_device(struct pci_dev *dev) ide_init_sgiioc4(hwif); - if (probe_hwif_init(hwif)) - return -EIO; + idx[0] = hwif->index; - /* Create /proc/ide entries */ - ide_proc_register_port(hwif); + if (ide_device_add(idx)) + return -EIO; return 0; } @@ -692,14 +693,12 @@ sgiioc4_ide_setup_pci_device(struct pci_dev *dev) static unsigned int __devinit pci_init_sgiioc4(struct pci_dev *dev) { - unsigned int class_rev; int ret; - pci_read_config_dword(dev, PCI_CLASS_REVISION, &class_rev); - class_rev &= 0xff; printk(KERN_INFO "%s: IDE controller at PCI slot %s, revision %d\n", - DRV_NAME, pci_name(dev), class_rev); - if (class_rev < IOC4_SUPPORTED_FIRMWARE_REV) { + DRV_NAME, pci_name(dev), dev->revision); + + if (dev->revision < IOC4_SUPPORTED_FIRMWARE_REV) { printk(KERN_ERR "Skipping %s IDE controller in slot %s: " "firmware is obsolete - please upgrade to " "revision46 or higher\n", diff --git a/drivers/ide/pci/siimage.c b/drivers/ide/pci/siimage.c index 85d0afd00e6..6d99441c605 100644 --- a/drivers/ide/pci/siimage.c +++ b/drivers/ide/pci/siimage.c @@ -1,5 +1,5 @@ /* - * linux/drivers/ide/pci/siimage.c Version 1.16 Jul 13 2007 + * linux/drivers/ide/pci/siimage.c Version 1.18 Oct 18 2007 * * Copyright (C) 2001-2002 Andre Hedrick <andre@linux-ide.org> * Copyright (C) 2003 Red Hat <alan@redhat.com> @@ -26,7 +26,7 @@ * * If you have strange problems with nVidia chipset systems please * see the SI support documentation and update your system BIOS - * if neccessary + * if necessary * * The Dell DRAC4 has some interesting features including effectively hot * unplugging/replugging the virtual CD interface when the DRAC is reset. @@ -57,8 +57,8 @@ static int pdev_is_sata(struct pci_dev *pdev) { - switch(pdev->device) - { +#ifdef CONFIG_BLK_DEV_IDE_SATA + switch(pdev->device) { case PCI_DEVICE_ID_SII_3112: case PCI_DEVICE_ID_SII_1210SA: return 1; @@ -66,9 +66,10 @@ static int pdev_is_sata(struct pci_dev *pdev) return 0; } BUG(); +#endif return 0; } - + /** * is_sata - check if hwif is SATA * @hwif: interface to check @@ -136,7 +137,7 @@ static inline unsigned long siimage_seldev(ide_drive_t *drive, int r) * SI3112 SATA controller life is a bit simpler. */ -static u8 sil_udma_filter(ide_drive_t *drive) +static u8 sil_pata_udma_filter(ide_drive_t *drive) { ide_hwif_t *hwif = drive->hwif; unsigned long base = (unsigned long) hwif->hwif_data; @@ -147,23 +148,23 @@ static u8 sil_udma_filter(ide_drive_t *drive) else pci_read_config_byte(hwif->pci_dev, 0x8A, &scsc); - if (is_sata(hwif)) { - mask = strstr(drive->id->model, "Maxtor") ? 0x3f : 0x7f; - goto out; - } - if ((scsc & 0x30) == 0x10) /* 133 */ - mask = 0x7f; + mask = ATA_UDMA6; else if ((scsc & 0x30) == 0x20) /* 2xPCI */ - mask = 0x7f; + mask = ATA_UDMA6; else if ((scsc & 0x30) == 0x00) /* 100 */ - mask = 0x3f; + mask = ATA_UDMA5; else /* Disabled ? */ BUG(); -out: + return mask; } +static u8 sil_sata_udma_filter(ide_drive_t *drive) +{ + return strstr(drive->id->model, "Maxtor") ? ATA_UDMA5 : ATA_UDMA6; +} + /** * sil_set_pio_mode - set host controller for PIO mode * @drive: drive @@ -180,7 +181,7 @@ static void sil_set_pio_mode(ide_drive_t *drive, u8 pio) const u16 data_speed[] = { 0x328a, 0x2283, 0x1104, 0x10c3, 0x10c1 }; ide_hwif_t *hwif = HWIF(drive); - ide_drive_t *pair = &hwif->drives[drive->dn ^ 1]; + ide_drive_t *pair = ide_get_paired_drive(drive); u32 speedt = 0; u16 speedp = 0; unsigned long addr = siimage_seldev(drive, 0x04); @@ -340,10 +341,11 @@ static int siimage_io_ide_dma_test_irq (ide_drive_t *drive) static int siimage_mmio_ide_dma_test_irq (ide_drive_t *drive) { ide_hwif_t *hwif = HWIF(drive); - unsigned long base = (unsigned long)hwif->hwif_data; unsigned long addr = siimage_selreg(hwif, 0x1); if (SATA_ERROR_REG) { + unsigned long base = (unsigned long)hwif->hwif_data; + u32 ext_stat = readl((void __iomem *)(base + 0x10)); u8 watchdog = 0; if (ext_stat & ((hwif->channel) ? 0x40 : 0x10)) { @@ -376,7 +378,7 @@ static int siimage_mmio_ide_dma_test_irq (ide_drive_t *drive) } /** - * siimage_busproc - bus isolation ioctl + * sil_sata_busproc - bus isolation IOCTL * @drive: drive to isolate/restore * @state: bus state to set * @@ -384,8 +386,8 @@ static int siimage_mmio_ide_dma_test_irq (ide_drive_t *drive) * SATA controller the work required is quite limited, we * just have to clean up the statistics */ - -static int siimage_busproc (ide_drive_t * drive, int state) + +static int sil_sata_busproc(ide_drive_t * drive, int state) { ide_hwif_t *hwif = HWIF(drive); u32 stat_config = 0; @@ -417,14 +419,14 @@ static int siimage_busproc (ide_drive_t * drive, int state) } /** - * siimage_reset_poll - wait for sata reset + * sil_sata_reset_poll - wait for SATA reset * @drive: drive we are resetting * * Poll the SATA phy and see whether it has come back from the dead * yet. */ - -static int siimage_reset_poll (ide_drive_t *drive) + +static int sil_sata_reset_poll(ide_drive_t *drive) { if (SATA_STATUS_REG) { ide_hwif_t *hwif = HWIF(drive); @@ -436,27 +438,22 @@ static int siimage_reset_poll (ide_drive_t *drive) HWGROUP(drive)->polling = 0; return ide_started; } - return 0; - } else { - return 0; } + + return 0; } /** - * siimage_pre_reset - reset hook + * sil_sata_pre_reset - reset hook * @drive: IDE device being reset * * For the SATA devices we need to handle recalibration/geometry * differently */ - -static void siimage_pre_reset (ide_drive_t *drive) -{ - if (drive->media != ide_disk) - return; - if (is_sata(HWIF(drive))) - { +static void sil_sata_pre_reset(ide_drive_t *drive) +{ + if (drive->media == ide_disk) { drive->special.b.set_geometry = 0; drive->special.b.recalibrate = 0; } @@ -502,7 +499,6 @@ static void siimage_reset (ide_drive_t *drive) drive->failures++; } } - } /** @@ -640,13 +636,9 @@ static unsigned int setup_mmio_siimage (struct pci_dev *dev, const char *name) static unsigned int __devinit init_chipset_siimage(struct pci_dev *dev, const char *name) { - u32 class_rev = 0; - u8 tmpbyte = 0; - u8 BA5_EN = 0; + u8 rev = dev->revision, tmpbyte = 0, BA5_EN = 0; - pci_read_config_dword(dev, PCI_CLASS_REVISION, &class_rev); - class_rev &= 0xff; - pci_write_config_byte(dev, PCI_CACHE_LINE_SIZE, (class_rev) ? 1 : 255); + pci_write_config_byte(dev, PCI_CACHE_LINE_SIZE, rev ? 1 : 255); pci_read_config_byte(dev, 0x8A, &BA5_EN); if ((BA5_EN & 0x01) || (pci_resource_start(dev, 5))) { @@ -762,16 +754,11 @@ static void __devinit init_mmio_iops_siimage(ide_hwif_t *hwif) hwif->sata_misc[SATA_IEN_OFFSET] = base + 0x148; } - hw.irq = hwif->pci_dev->irq; - - memcpy(&hwif->hw, &hw, sizeof(hw)); - memcpy(hwif->io_ports, hwif->hw.io_ports, sizeof(hwif->hw.io_ports)); + memcpy(hwif->io_ports, hw.io_ports, sizeof(hwif->io_ports)); - hwif->irq = hw.irq; + hwif->irq = dev->irq; - base = (unsigned long) addr; - - hwif->dma_base = base + (ch ? 0x08 : 0x00); + hwif->dma_base = (unsigned long)addr + (ch ? 0x08 : 0x00); hwif->mmio = 1; } @@ -825,19 +812,14 @@ static void __devinit siimage_fixup(ide_hwif_t *hwif) static void __devinit init_iops_siimage(ide_hwif_t *hwif) { - struct pci_dev *dev = hwif->pci_dev; - u32 class_rev = 0; - - pci_read_config_dword(dev, PCI_CLASS_REVISION, &class_rev); - class_rev &= 0xff; - hwif->hwif_data = NULL; /* Pessimal until we finish probing */ hwif->rqsize = 15; - if (pci_get_drvdata(dev) == NULL) + if (pci_get_drvdata(hwif->pci_dev) == NULL) return; + init_mmio_iops_siimage(hwif); } @@ -873,34 +855,32 @@ static u8 __devinit ata66_siimage(ide_hwif_t *hwif) static void __devinit init_hwif_siimage(ide_hwif_t *hwif) { + u8 sata = is_sata(hwif); + hwif->resetproc = &siimage_reset; hwif->set_pio_mode = &sil_set_pio_mode; hwif->set_dma_mode = &sil_set_dma_mode; - hwif->reset_poll = &siimage_reset_poll; - hwif->pre_reset = &siimage_pre_reset; - hwif->udma_filter = &sil_udma_filter; - if(is_sata(hwif)) { + if (sata) { static int first = 1; - hwif->busproc = &siimage_busproc; + hwif->busproc = &sil_sata_busproc; + hwif->reset_poll = &sil_sata_reset_poll; + hwif->pre_reset = &sil_sata_pre_reset; + hwif->udma_filter = &sil_sata_udma_filter; if (first) { printk(KERN_INFO "siimage: For full SATA support you should use the libata sata_sil module.\n"); first = 0; } - } - - hwif->drives[0].autotune = hwif->drives[1].autotune = 1; + } else + hwif->udma_filter = &sil_pata_udma_filter; if (hwif->dma_base == 0) return; - hwif->ultra_mask = 0x7f; - hwif->mwdma_mask = 0x07; - - if (!is_sata(hwif)) - hwif->atapi_dma = 1; + if (sata) + hwif->host_flags |= IDE_HFLAG_NO_ATAPI_DMA; if (hwif->cbl != ATA_CBL_PATA40_SHORT) hwif->cbl = ata66_siimage(hwif); @@ -919,12 +899,13 @@ static void __devinit init_hwif_siimage(ide_hwif_t *hwif) .init_iops = init_iops_siimage, \ .init_hwif = init_hwif_siimage, \ .fixup = siimage_fixup, \ - .autodma = AUTODMA, \ - .bootable = ON_BOARD, \ + .host_flags = IDE_HFLAG_BOOTABLE, \ .pio_mask = ATA_PIO4, \ + .mwdma_mask = ATA_MWDMA2, \ + .udma_mask = ATA_UDMA6, \ } -static ide_pci_device_t siimage_chipsets[] __devinitdata = { +static const struct ide_port_info siimage_chipsets[] __devinitdata = { /* 0 */ DECLARE_SII_DEV("SiI680"), /* 1 */ DECLARE_SII_DEV("SiI3112 Serial ATA"), /* 2 */ DECLARE_SII_DEV("Adaptec AAR-1210SA") diff --git a/drivers/ide/pci/sis5513.c b/drivers/ide/pci/sis5513.c index 5a54e2e20b3..6b7bb53acef 100644 --- a/drivers/ide/pci/sis5513.c +++ b/drivers/ide/pci/sis5513.c @@ -264,7 +264,7 @@ static void sis_ata133_program_timings(ide_drive_t *drive, const u8 mode) if (mode >= XFER_MW_DMA_0) { t1 &= ~0x04; /* disable UDMA */ idx = mode - XFER_MW_DMA_0 + 5; - } + } else idx = mode - XFER_PIO_0; t1 |= ini_time_value[clk][idx] << 12; t1 |= act_time_value[clk][idx] << 16; @@ -564,38 +564,30 @@ static void __devinit init_hwif_sis5513 (ide_hwif_t *hwif) { u8 udma_rates[] = { 0x00, 0x00, 0x07, 0x1f, 0x3f, 0x3f, 0x7f, 0x7f }; - if (!hwif->irq) - hwif->irq = hwif->channel ? 15 : 14; - hwif->set_pio_mode = &sis_set_pio_mode; hwif->set_dma_mode = &sis_set_dma_mode; if (chipset_family >= ATA_133) hwif->udma_filter = sis5513_ata133_udma_filter; - hwif->drives[0].autotune = 1; - hwif->drives[1].autotune = 1; - if (hwif->dma_base == 0) return; - hwif->atapi_dma = 1; - hwif->ultra_mask = udma_rates[chipset_family]; - hwif->mwdma_mask = 0x07; if (hwif->cbl != ATA_CBL_PATA40_SHORT) hwif->cbl = ata66_sis5513(hwif); } -static ide_pci_device_t sis5513_chipset __devinitdata = { +static const struct ide_port_info sis5513_chipset __devinitdata = { .name = "SIS5513", .init_chipset = init_chipset_sis5513, .init_hwif = init_hwif_sis5513, - .autodma = NOAUTODMA, .enablebits = {{0x4a,0x02,0x02}, {0x4a,0x04,0x04}}, - .bootable = ON_BOARD, + .host_flags = IDE_HFLAG_LEGACY_IRQS | IDE_HFLAG_NO_AUTODMA | + IDE_HFLAG_BOOTABLE, .pio_mask = ATA_PIO4, + .mwdma_mask = ATA_MWDMA2, }; static int __devinit sis5513_init_one(struct pci_dev *dev, const struct pci_device_id *id) diff --git a/drivers/ide/pci/sl82c105.c b/drivers/ide/pci/sl82c105.c index 771efb8884c..147d783f752 100644 --- a/drivers/ide/pci/sl82c105.c +++ b/drivers/ide/pci/sl82c105.c @@ -361,19 +361,6 @@ static void __devinit init_hwif_sl82c105(ide_hwif_t *hwif) hwif->selectproc = &sl82c105_selectproc; hwif->resetproc = &sl82c105_resetproc; - /* - * We support 32-bit I/O on this interface, and - * it doesn't have problems with interrupts. - */ - hwif->drives[0].io_32bit = hwif->drives[1].io_32bit = 1; - hwif->drives[0].unmask = hwif->drives[1].unmask = 1; - - /* - * We always autotune PIO, this is done before DMA is checked, - * so there's no risk of accidentally disabling DMA - */ - hwif->drives[0].autotune = hwif->drives[1].autotune = 1; - if (!hwif->dma_base) return; @@ -388,8 +375,7 @@ static void __devinit init_hwif_sl82c105(ide_hwif_t *hwif) return; } - hwif->atapi_dma = 1; - hwif->mwdma_mask = 0x07; + hwif->mwdma_mask = ATA_MWDMA2; hwif->ide_dma_on = &sl82c105_ide_dma_on; hwif->dma_off_quietly = &sl82c105_dma_off_quietly; @@ -401,13 +387,15 @@ static void __devinit init_hwif_sl82c105(ide_hwif_t *hwif) hwif->serialized = hwif->mate->serialized = 1; } -static ide_pci_device_t sl82c105_chipset __devinitdata = { +static const struct ide_port_info sl82c105_chipset __devinitdata = { .name = "W82C105", .init_chipset = init_chipset_sl82c105, .init_hwif = init_hwif_sl82c105, - .autodma = NOAUTODMA, .enablebits = {{0x40,0x01,0x01}, {0x40,0x10,0x10}}, - .bootable = ON_BOARD, + .host_flags = IDE_HFLAG_IO_32BIT | + IDE_HFLAG_UNMASK_IRQS | + IDE_HFLAG_NO_AUTODMA | + IDE_HFLAG_BOOTABLE, .pio_mask = ATA_PIO5, }; diff --git a/drivers/ide/pci/slc90e66.c b/drivers/ide/pci/slc90e66.c index fa8df6d4383..eb4445b229e 100644 --- a/drivers/ide/pci/slc90e66.c +++ b/drivers/ide/pci/slc90e66.c @@ -1,5 +1,5 @@ /* - * linux/drivers/ide/pci/slc90e66.c Version 0.18 Aug 9, 2007 + * linux/drivers/ide/pci/slc90e66.c Version 0.19 Sep 24, 2007 * * Copyright (C) 2000-2002 Andre Hedrick <andre@linux-ide.org> * Copyright (C) 2006-2007 MontaVista Software, Inc. <source@mvista.com> @@ -21,6 +21,8 @@ #include <asm/io.h> +static DEFINE_SPINLOCK(slc90e66_lock); + static void slc90e66_set_pio_mode(ide_drive_t *drive, const u8 pio) { ide_hwif_t *hwif = HWIF(drive); @@ -40,7 +42,7 @@ static void slc90e66_set_pio_mode(ide_drive_t *drive, const u8 pio) { 2, 1 }, { 2, 3 }, }; - spin_lock_irqsave(&ide_lock, flags); + spin_lock_irqsave(&slc90e66_lock, flags); pci_read_config_word(dev, master_port, &master_data); if (pio > 1) @@ -71,7 +73,7 @@ static void slc90e66_set_pio_mode(ide_drive_t *drive, const u8 pio) pci_write_config_word(dev, master_port, master_data); if (is_slave) pci_write_config_byte(dev, slave_port, slave_data); - spin_unlock_irqrestore(&ide_lock, flags); + spin_unlock_irqrestore(&slc90e66_lock, flags); } static void slc90e66_set_dma_mode(ide_drive_t *drive, const u8 speed) @@ -133,37 +135,28 @@ static void __devinit init_hwif_slc90e66 (ide_hwif_t *hwif) u8 reg47 = 0; u8 mask = hwif->channel ? 0x01 : 0x02; /* bit0:Primary */ - if (!hwif->irq) - hwif->irq = hwif->channel ? 15 : 14; - hwif->set_pio_mode = &slc90e66_set_pio_mode; hwif->set_dma_mode = &slc90e66_set_dma_mode; pci_read_config_byte(hwif->pci_dev, 0x47, ®47); - hwif->drives[0].autotune = 1; - hwif->drives[1].autotune = 1; - if (hwif->dma_base == 0) return; - hwif->atapi_dma = 1; - hwif->ultra_mask = 0x1f; - hwif->mwdma_mask = 0x06; - hwif->swdma_mask = 0x04; - if (hwif->cbl != ATA_CBL_PATA40_SHORT) /* bit[0(1)]: 0:80, 1:40 */ hwif->cbl = (reg47 & mask) ? ATA_CBL_PATA40 : ATA_CBL_PATA80; } -static ide_pci_device_t slc90e66_chipset __devinitdata = { +static const struct ide_port_info slc90e66_chipset __devinitdata = { .name = "SLC90E66", .init_hwif = init_hwif_slc90e66, - .autodma = AUTODMA, .enablebits = {{0x41,0x80,0x80}, {0x43,0x80,0x80}}, - .bootable = ON_BOARD, + .host_flags = IDE_HFLAG_LEGACY_IRQS | IDE_HFLAG_BOOTABLE, .pio_mask = ATA_PIO4, + .swdma_mask = ATA_SWDMA2_ONLY, + .mwdma_mask = ATA_MWDMA12_ONLY, + .udma_mask = ATA_UDMA4, }; static int __devinit slc90e66_init_one(struct pci_dev *dev, const struct pci_device_id *id) diff --git a/drivers/ide/pci/tc86c001.c b/drivers/ide/pci/tc86c001.c index de62db576ad..a66ebd14664 100644 --- a/drivers/ide/pci/tc86c001.c +++ b/drivers/ide/pci/tc86c001.c @@ -1,5 +1,5 @@ /* - * drivers/ide/pci/tc86c001.c Version 1.00 Dec 12, 2006 + * drivers/ide/pci/tc86c001.c Version 1.01 Sep 5, 2007 * * Copyright (C) 2002 Toshiba Corporation * Copyright (C) 2005-2006 MontaVista Software, Inc. <source@mvista.com> @@ -17,7 +17,7 @@ static void tc86c001_set_mode(ide_drive_t *drive, const u8 speed) { ide_hwif_t *hwif = HWIF(drive); unsigned long scr_port = hwif->config_data + (drive->dn ? 0x02 : 0x00); - u16 mode, scr = hwif->INW(scr_port); + u16 mode, scr = inw(scr_port); switch (speed) { case XFER_UDMA_4: mode = 0x00c0; break; @@ -65,7 +65,7 @@ static int tc86c001_timer_expiry(ide_drive_t *drive) ide_hwif_t *hwif = HWIF(drive); ide_expiry_t *expiry = ide_get_hwifdata(hwif); ide_hwgroup_t *hwgroup = HWGROUP(drive); - u8 dma_stat = hwif->INB(hwif->dma_status); + u8 dma_stat = inb(hwif->dma_status); /* Restore a higher level driver's expiry handler first. */ hwgroup->expiry = expiry; @@ -73,7 +73,7 @@ static int tc86c001_timer_expiry(ide_drive_t *drive) if ((dma_stat & 5) == 1) { /* DMA active and no interrupt */ unsigned long sc_base = hwif->config_data; unsigned long twcr_port = sc_base + (drive->dn ? 0x06 : 0x04); - u8 dma_cmd = hwif->INB(hwif->dma_command); + u8 dma_cmd = inb(hwif->dma_command); printk(KERN_WARNING "%s: DMA interrupt possibly stuck, " "attempting recovery...\n", drive->name); @@ -135,7 +135,7 @@ static int tc86c001_busproc(ide_drive_t *drive, int state) u16 scr1; /* System Control 1 Register bit 11 (ATA Hard Reset) read */ - scr1 = hwif->INW(sc_base + 0x00); + scr1 = inw(sc_base + 0x00); switch (state) { case BUSSTATE_ON: @@ -165,7 +165,7 @@ static int tc86c001_busproc(ide_drive_t *drive, int state) static void __devinit init_hwif_tc86c001(ide_hwif_t *hwif) { unsigned long sc_base = pci_resource_start(hwif->pci_dev, 5); - u16 scr1 = hwif->INW(sc_base + 0x00);; + u16 scr1 = inw(sc_base + 0x00); /* System Control 1 Register bit 15 (Soft Reset) set */ outw(scr1 | 0x8000, sc_base + 0x00); @@ -184,8 +184,6 @@ static void __devinit init_hwif_tc86c001(ide_hwif_t *hwif) hwif->busproc = &tc86c001_busproc; - hwif->drives[0].autotune = hwif->drives[1].autotune = 1; - if (!hwif->dma_base) return; @@ -198,10 +196,6 @@ static void __devinit init_hwif_tc86c001(ide_hwif_t *hwif) /* Sector Count Register limit */ hwif->rqsize = 0xffff; - hwif->atapi_dma = 1; - hwif->ultra_mask = 0x1f; - hwif->mwdma_mask = 0x07; - hwif->dma_start = &tc86c001_dma_start; if (hwif->cbl != ATA_CBL_PATA40_SHORT) { @@ -209,7 +203,7 @@ static void __devinit init_hwif_tc86c001(ide_hwif_t *hwif) * System Control 1 Register bit 13 (PDIAGN): * 0=80-pin cable, 1=40-pin cable */ - scr1 = hwif->INW(sc_base + 0x00); + scr1 = inw(sc_base + 0x00); hwif->cbl = (scr1 & 0x2000) ? ATA_CBL_PATA40 : ATA_CBL_PATA80; } } @@ -224,14 +218,14 @@ static unsigned int __devinit init_chipset_tc86c001(struct pci_dev *dev, return err; } -static ide_pci_device_t tc86c001_chipset __devinitdata = { +static const struct ide_port_info tc86c001_chipset __devinitdata = { .name = "TC86C001", .init_chipset = init_chipset_tc86c001, .init_hwif = init_hwif_tc86c001, - .autodma = AUTODMA, - .bootable = OFF_BOARD, - .host_flags = IDE_HFLAG_SINGLE, + .host_flags = IDE_HFLAG_SINGLE | IDE_HFLAG_OFF_BOARD, .pio_mask = ATA_PIO4, + .mwdma_mask = ATA_MWDMA2, + .udma_mask = ATA_UDMA4, }; static int __devinit tc86c001_init_one(struct pci_dev *dev, diff --git a/drivers/ide/pci/triflex.c b/drivers/ide/pci/triflex.c index 4075c907f05..a227c41d23a 100644 --- a/drivers/ide/pci/triflex.c +++ b/drivers/ide/pci/triflex.c @@ -100,22 +100,16 @@ static void __devinit init_hwif_triflex(ide_hwif_t *hwif) { hwif->set_pio_mode = &triflex_set_pio_mode; hwif->set_dma_mode = &triflex_set_mode; - - if (hwif->dma_base == 0) - return; - - hwif->atapi_dma = 1; - hwif->mwdma_mask = 0x07; - hwif->swdma_mask = 0x07; } -static ide_pci_device_t triflex_device __devinitdata = { +static const struct ide_port_info triflex_device __devinitdata = { .name = "TRIFLEX", .init_hwif = init_hwif_triflex, - .autodma = AUTODMA, .enablebits = {{0x80, 0x01, 0x01}, {0x80, 0x02, 0x02}}, - .bootable = ON_BOARD, + .host_flags = IDE_HFLAG_BOOTABLE, .pio_mask = ATA_PIO4, + .swdma_mask = ATA_SWDMA2, + .mwdma_mask = ATA_MWDMA2, }; static int __devinit triflex_init_one(struct pci_dev *dev, diff --git a/drivers/ide/pci/trm290.c b/drivers/ide/pci/trm290.c index e3d943ada7b..5011ba22e36 100644 --- a/drivers/ide/pci/trm290.c +++ b/drivers/ide/pci/trm290.c @@ -250,8 +250,6 @@ static void __devinit init_hwif_trm290(ide_hwif_t *hwif) u8 reg = 0; struct pci_dev *dev = hwif->pci_dev; - hwif->no_lba48 = 1; - hwif->chipset = ide_trm290; cfgbase = pci_resource_start(dev, 4); if ((dev->class & 5) && cfgbase) { hwif->config_data = cfgbase; @@ -321,14 +319,17 @@ static void __devinit init_hwif_trm290(ide_hwif_t *hwif) #endif } -static ide_pci_device_t trm290_chipset __devinitdata = { +static const struct ide_port_info trm290_chipset __devinitdata = { .name = "TRM290", .init_hwif = init_hwif_trm290, - .autodma = NOAUTODMA, - .bootable = ON_BOARD, + .chipset = ide_trm290, + .host_flags = IDE_HFLAG_NO_ATAPI_DMA | #if 0 /* play it safe for now */ - .host_flags = IDE_HFLAG_TRUST_BIOS_FOR_DMA, + IDE_HFLAG_TRUST_BIOS_FOR_DMA | #endif + IDE_HFLAG_NO_AUTODMA | + IDE_HFLAG_BOOTABLE | + IDE_HFLAG_NO_LBA48, }; static int __devinit trm290_init_one(struct pci_dev *dev, const struct pci_device_id *id) diff --git a/drivers/ide/pci/via82cxxx.c b/drivers/ide/pci/via82cxxx.c index b25fb65b240..a0d3c16b68e 100644 --- a/drivers/ide/pci/via82cxxx.c +++ b/drivers/ide/pci/via82cxxx.c @@ -1,6 +1,6 @@ /* * - * Version 3.49 + * Version 3.50 * * VIA IDE driver for Linux. Supported southbridges: * @@ -422,67 +422,40 @@ static u8 __devinit via82cxxx_cable_detect(ide_hwif_t *hwif) static void __devinit init_hwif_via82cxxx(ide_hwif_t *hwif) { - struct via82cxxx_dev *vdev = pci_get_drvdata(hwif->pci_dev); - int i; - hwif->set_pio_mode = &via_set_pio_mode; hwif->set_dma_mode = &via_set_drive; -#ifdef CONFIG_PPC_CHRP - if(machine_is(chrp) && _chrp_type == _CHRP_Pegasos) { - hwif->irq = hwif->channel ? 15 : 14; - } -#endif - - for (i = 0; i < 2; i++) { - hwif->drives[i].io_32bit = 1; - hwif->drives[i].unmask = (vdev->via_config->flags & VIA_NO_UNMASK) ? 0 : 1; - hwif->drives[i].autotune = 1; - } - if (!hwif->dma_base) return; - hwif->atapi_dma = 1; - - hwif->ultra_mask = vdev->via_config->udma_mask; - hwif->mwdma_mask = 0x07; - hwif->swdma_mask = 0x07; - if (hwif->cbl != ATA_CBL_PATA40_SHORT) hwif->cbl = via82cxxx_cable_detect(hwif); } -static ide_pci_device_t via82cxxx_chipsets[] __devinitdata = { - { /* 0 */ - .name = "VP_IDE", - .init_chipset = init_chipset_via82cxxx, - .init_hwif = init_hwif_via82cxxx, - .autodma = NOAUTODMA, - .enablebits = {{0x40,0x02,0x02}, {0x40,0x01,0x01}}, - .bootable = ON_BOARD, - .host_flags = IDE_HFLAG_PIO_NO_BLACKLIST - | IDE_HFLAG_PIO_NO_DOWNGRADE - | IDE_HFLAG_POST_SET_MODE, - .pio_mask = ATA_PIO5, - },{ /* 1 */ - .name = "VP_IDE", - .init_chipset = init_chipset_via82cxxx, - .init_hwif = init_hwif_via82cxxx, - .autodma = AUTODMA, - .enablebits = {{0x00,0x00,0x00}, {0x00,0x00,0x00}}, - .bootable = ON_BOARD, - .host_flags = IDE_HFLAG_PIO_NO_BLACKLIST - | IDE_HFLAG_PIO_NO_DOWNGRADE - | IDE_HFLAG_POST_SET_MODE, - .pio_mask = ATA_PIO5, - } +static const struct ide_port_info via82cxxx_chipset __devinitdata = { + .name = "VP_IDE", + .init_chipset = init_chipset_via82cxxx, + .init_hwif = init_hwif_via82cxxx, + .enablebits = { { 0x40, 0x02, 0x02 }, { 0x40, 0x01, 0x01 } }, + .host_flags = IDE_HFLAG_PIO_NO_BLACKLIST | + IDE_HFLAG_PIO_NO_DOWNGRADE | + IDE_HFLAG_POST_SET_MODE | + IDE_HFLAG_IO_32BIT | + IDE_HFLAG_BOOTABLE, + .pio_mask = ATA_PIO5, + .swdma_mask = ATA_SWDMA2, + .mwdma_mask = ATA_MWDMA2, }; static int __devinit via_init_one(struct pci_dev *dev, const struct pci_device_id *id) { struct pci_dev *isa = NULL; struct via_isa_bridge *via_config; + u8 idx = id->driver_data; + struct ide_port_info d; + + d = via82cxxx_chipset; + /* * Find the ISA bridge and check we know what it is. */ @@ -492,7 +465,23 @@ static int __devinit via_init_one(struct pci_dev *dev, const struct pci_device_i printk(KERN_WARNING "VP_IDE: Unknown VIA SouthBridge, disabling DMA.\n"); return -ENODEV; } - return ide_setup_pci_device(dev, &via82cxxx_chipsets[id->driver_data]); + + if (idx == 0) + d.host_flags |= IDE_HFLAG_NO_AUTODMA; + else + d.enablebits[1].reg = d.enablebits[0].reg = 0; + + if ((via_config->flags & VIA_NO_UNMASK) == 0) + d.host_flags |= IDE_HFLAG_UNMASK_IRQS; + +#ifdef CONFIG_PPC_CHRP + if (machine_is(chrp) && _chrp_type == _CHRP_Pegasos) + d.host_flags |= IDE_HFLAG_FORCE_LEGACY_IRQS; +#endif + + d.udma_mask = via_config->udma_mask; + + return ide_setup_pci_device(dev, &d); } static const struct pci_device_id via_pci_tbl[] = { diff --git a/drivers/ide/ppc/mpc8xx.c b/drivers/ide/ppc/mpc8xx.c index df2e92034f5..5f0da35ab5a 100644 --- a/drivers/ide/ppc/mpc8xx.c +++ b/drivers/ide/ppc/mpc8xx.c @@ -316,8 +316,8 @@ m8xx_ide_init_hwif_ports(hw_regs_t *hw, unsigned long data_port, ide_hwifs[data_port].pio_mask = ATA_PIO4; ide_hwifs[data_port].set_pio_mode = m8xx_ide_set_pio_mode; + ide_hwifs[data_port].ack_intr = (ide_ack_intr_t *)ide_interrupt_ack; - hw->ack_intr = (ide_ack_intr_t *) ide_interrupt_ack; /* Enable Harddisk Interrupt, * and make it edge sensitive */ @@ -402,8 +402,8 @@ void m8xx_ide_init_hwif_ports (hw_regs_t *hw, ide_hwifs[data_port].pio_mask = ATA_PIO4; ide_hwifs[data_port].set_pio_mode = m8xx_ide_set_pio_mode; + ide_hwifs[data_port].ack_intr = (ide_ack_intr_t *)ide_interrupt_ack; - hw->ack_intr = (ide_ack_intr_t *) ide_interrupt_ack; /* Enable Harddisk Interrupt, * and make it edge sensitive */ diff --git a/drivers/ide/ppc/pmac.c b/drivers/ide/ppc/pmac.c index 1d25a343300..816b5311dad 100644 --- a/drivers/ide/ppc/pmac.c +++ b/drivers/ide/ppc/pmac.c @@ -1039,6 +1039,8 @@ pmac_ide_setup_device(pmac_ide_hwif_t *pmif, ide_hwif_t *hwif) { struct device_node *np = pmif->node; const int *bidp; + u8 idx[4] = { 0xff, 0xff, 0xff, 0xff }; + hw_regs_t hw; pmif->cable_80 = 0; pmif->broken_dma = pmif->broken_dma_warn = 0; @@ -1124,8 +1126,9 @@ pmac_ide_setup_device(pmac_ide_hwif_t *pmif, ide_hwif_t *hwif) /* Tell common code _not_ to mess with resources */ hwif->mmio = 1; hwif->hwif_data = pmif; - pmac_ide_init_hwif_ports(&hwif->hw, pmif->regbase, 0, &hwif->irq); - memcpy(hwif->io_ports, hwif->hw.io_ports, sizeof(hwif->io_ports)); + memset(&hw, 0, sizeof(hw)); + pmac_ide_init_hwif_ports(&hw, pmif->regbase, 0, &hwif->irq); + memcpy(hwif->io_ports, hw.io_ports, sizeof(hwif->io_ports)); hwif->chipset = ide_pmac; hwif->noprobe = !hwif->io_ports[IDE_DATA_OFFSET] || pmif->mediabay; hwif->hold = pmif->mediabay; @@ -1163,10 +1166,9 @@ pmac_ide_setup_device(pmac_ide_hwif_t *pmif, ide_hwif_t *hwif) pmac_ide_setup_dma(pmif, hwif); #endif /* CONFIG_BLK_DEV_IDEDMA_PMAC */ - /* We probe the hwif now */ - probe_hwif_init(hwif); + idx[0] = hwif->index; - ide_proc_register_port(hwif); + ide_device_add(idx); return 0; } @@ -1780,7 +1782,6 @@ pmac_ide_setup_dma(pmac_ide_hwif_t *pmif, ide_hwif_t *hwif) hwif->dma_timeout = &ide_dma_timeout; hwif->dma_lost_irq = &pmac_ide_dma_lost_irq; - hwif->atapi_dma = 1; switch(pmif->kind) { case controller_sh_ata6: hwif->ultra_mask = pmif->cable_80 ? 0x7f : 0x07; diff --git a/drivers/ide/setup-pci.c b/drivers/ide/setup-pci.c index 3d101f73f91..02d14bf85ab 100644 --- a/drivers/ide/setup-pci.c +++ b/drivers/ide/setup-pci.c @@ -147,14 +147,15 @@ static int ide_setup_pci_baseregs (struct pci_dev *dev, const char *name) #ifdef CONFIG_BLK_DEV_IDEDMA_PCI /** * ide_get_or_set_dma_base - setup BMIBA - * @hwif: Interface + * @d: IDE port info + * @hwif: IDE interface * * Fetch the DMA Bus-Master-I/O-Base-Address (BMIBA) from PCI space. * Where a device has a partner that is already in DMA mode we check * and enforce IDE simplex rules. */ -static unsigned long ide_get_or_set_dma_base (ide_hwif_t *hwif) +static unsigned long ide_get_or_set_dma_base(const struct ide_port_info *d, ide_hwif_t *hwif) { unsigned long dma_base = 0; struct pci_dev *dev = hwif->pci_dev; @@ -165,14 +166,15 @@ static unsigned long ide_get_or_set_dma_base (ide_hwif_t *hwif) if (hwif->mate && hwif->mate->dma_base) { dma_base = hwif->mate->dma_base - (hwif->channel ? 0 : 8); } else { - dma_base = pci_resource_start(dev, 4); - if (!dma_base) { - printk(KERN_ERR "%s: dma_base is invalid\n", - hwif->cds->name); - } + u8 baridx = (d->host_flags & IDE_HFLAG_CS5520) ? 2 : 4; + + dma_base = pci_resource_start(dev, baridx); + + if (dma_base == 0) + printk(KERN_ERR "%s: DMA base is invalid\n", d->name); } - if (dma_base) { + if ((d->host_flags & IDE_HFLAG_CS5520) == 0 && dma_base) { u8 simplex_stat = 0; dma_base += hwif->channel ? 8 : 0; @@ -183,13 +185,13 @@ static unsigned long ide_get_or_set_dma_base (ide_hwif_t *hwif) case PCI_DEVICE_ID_CMD_643: case PCI_DEVICE_ID_SERVERWORKS_CSB5IDE: case PCI_DEVICE_ID_REVOLUTION: - simplex_stat = hwif->INB(dma_base + 2); - hwif->OUTB((simplex_stat&0x60),(dma_base + 2)); - simplex_stat = hwif->INB(dma_base + 2); + simplex_stat = inb(dma_base + 2); + outb(simplex_stat & 0x60, dma_base + 2); + simplex_stat = inb(dma_base + 2); if (simplex_stat & 0x80) { printk(KERN_INFO "%s: simplex device: " - "DMA forced\n", - hwif->cds->name); + "DMA forced\n", + d->name); } break; default: @@ -212,8 +214,8 @@ static unsigned long ide_get_or_set_dma_base (ide_hwif_t *hwif) */ if (hwif->mate && hwif->mate->dma_base) { printk(KERN_INFO "%s: simplex device: " - "DMA disabled\n", - hwif->cds->name); + "DMA disabled\n", + d->name); dma_base = 0; } } @@ -223,10 +225,11 @@ static unsigned long ide_get_or_set_dma_base (ide_hwif_t *hwif) } #endif /* CONFIG_BLK_DEV_IDEDMA_PCI */ -void ide_setup_pci_noise (struct pci_dev *dev, ide_pci_device_t *d) +void ide_setup_pci_noise(struct pci_dev *dev, const struct ide_port_info *d) { - printk(KERN_INFO "%s: IDE controller at PCI slot %s\n", - d->name, pci_name(dev)); + printk(KERN_INFO "%s: IDE controller (0x%04x:0x%04x rev 0x%02x) at " + " PCI slot %s\n", d->name, dev->vendor, dev->device, + dev->revision, pci_name(dev)); } EXPORT_SYMBOL_GPL(ide_setup_pci_noise); @@ -235,15 +238,15 @@ EXPORT_SYMBOL_GPL(ide_setup_pci_noise); /** * ide_pci_enable - do PCI enables * @dev: PCI device - * @d: IDE pci device data + * @d: IDE port info * * Enable the IDE PCI device. We attempt to enable the device in full * but if that fails then we only need BAR4 so we will enable that. * * Returns zero on success or an error code */ - -static int ide_pci_enable(struct pci_dev *dev, ide_pci_device_t *d) + +static int ide_pci_enable(struct pci_dev *dev, const struct ide_port_info *d) { int ret; @@ -258,9 +261,9 @@ static int ide_pci_enable(struct pci_dev *dev, ide_pci_device_t *d) } /* - * assume all devices can do 32-bit dma for now. we can add a - * dma mask field to the ide_pci_device_t if we need it (or let - * lower level driver set the dma mask) + * assume all devices can do 32-bit DMA for now, we can add + * a DMA mask field to the struct ide_port_info if we need it + * (or let lower level driver set the DMA mask) */ ret = pci_set_dma_mask(dev, DMA_32BIT_MASK); if (ret < 0) { @@ -282,13 +285,13 @@ out: /** * ide_pci_configure - configure an unconfigured device * @dev: PCI device - * @d: IDE pci device data + * @d: IDE port info * * Enable and configure the PCI device we have been passed. * Returns zero on success or an error code. */ - -static int ide_pci_configure(struct pci_dev *dev, ide_pci_device_t *d) + +static int ide_pci_configure(struct pci_dev *dev, const struct ide_port_info *d) { u16 pcicmd = 0; /* @@ -316,15 +319,15 @@ static int ide_pci_configure(struct pci_dev *dev, ide_pci_device_t *d) /** * ide_pci_check_iomem - check a register is I/O - * @dev: pci device - * @d: ide_pci_device - * @bar: bar number + * @dev: PCI device + * @d: IDE port info + * @bar: BAR number * * Checks if a BAR is configured and points to MMIO space. If so * print an error and return an error code. Otherwise return 0 */ - -static int ide_pci_check_iomem(struct pci_dev *dev, ide_pci_device_t *d, int bar) + +static int ide_pci_check_iomem(struct pci_dev *dev, const struct ide_port_info *d, int bar) { ulong flags = pci_resource_flags(dev, bar); @@ -346,7 +349,7 @@ static int ide_pci_check_iomem(struct pci_dev *dev, ide_pci_device_t *d, int bar /** * ide_hwif_configure - configure an IDE interface * @dev: PCI device holding interface - * @d: IDE pci data + * @d: IDE port info * @mate: Paired interface if any * * Perform the initial set up for the hardware interface structure. This @@ -355,11 +358,12 @@ static int ide_pci_check_iomem(struct pci_dev *dev, ide_pci_device_t *d, int bar * * Returns the new hardware interface structure, or NULL on a failure */ - -static ide_hwif_t *ide_hwif_configure(struct pci_dev *dev, ide_pci_device_t *d, ide_hwif_t *mate, int port, int irq) + +static ide_hwif_t *ide_hwif_configure(struct pci_dev *dev, const struct ide_port_info *d, ide_hwif_t *mate, int port, int irq) { unsigned long ctl = 0, base = 0; ide_hwif_t *hwif; + u8 bootable = (d->host_flags & IDE_HFLAG_BOOTABLE) ? 1 : 0; if ((d->host_flags & IDE_HFLAG_ISA_PORTS) == 0) { /* Possibly we should fail if these checks report true */ @@ -380,23 +384,24 @@ static ide_hwif_t *ide_hwif_configure(struct pci_dev *dev, ide_pci_device_t *d, ctl = port ? 0x374 : 0x3f4; base = port ? 0x170 : 0x1f0; } - if ((hwif = ide_match_hwif(base, d->bootable, d->name)) == NULL) + if ((hwif = ide_match_hwif(base, bootable, d->name)) == NULL) return NULL; /* no room in ide_hwifs[] */ if (hwif->io_ports[IDE_DATA_OFFSET] != base || hwif->io_ports[IDE_CONTROL_OFFSET] != (ctl | 2)) { - memset(&hwif->hw, 0, sizeof(hwif->hw)); -#ifndef IDE_ARCH_OBSOLETE_INIT - ide_std_init_ports(&hwif->hw, base, (ctl | 2)); - hwif->hw.io_ports[IDE_IRQ_OFFSET] = 0; + hw_regs_t hw; + + memset(&hw, 0, sizeof(hw)); +#ifndef CONFIG_IDE_ARCH_OBSOLETE_INIT + ide_std_init_ports(&hw, base, ctl | 2); #else - ide_init_hwif_ports(&hwif->hw, base, (ctl | 2), NULL); + ide_init_hwif_ports(&hw, base, ctl | 2, NULL); #endif - memcpy(hwif->io_ports, hwif->hw.io_ports, sizeof(hwif->io_ports)); + memcpy(hwif->io_ports, hw.io_ports, sizeof(hwif->io_ports)); hwif->noprobe = !hwif->io_ports[IDE_DATA_OFFSET]; } - hwif->chipset = ide_pci; + hwif->chipset = d->chipset ? d->chipset : ide_pci; hwif->pci_dev = dev; - hwif->cds = (struct ide_pci_device_s *) d; + hwif->cds = d; hwif->channel = port; if (!hwif->irq) @@ -411,28 +416,25 @@ static ide_hwif_t *ide_hwif_configure(struct pci_dev *dev, ide_pci_device_t *d, /** * ide_hwif_setup_dma - configure DMA interface * @dev: PCI device - * @d: IDE pci data - * @hwif: Hardware interface we are configuring + * @d: IDE port info + * @hwif: IDE interface * * Set up the DMA base for the interface. Enable the master bits as * necessary and attempt to bring the device DMA into a ready to use * state */ - -#ifndef CONFIG_BLK_DEV_IDEDMA_PCI -static void ide_hwif_setup_dma(struct pci_dev *dev, ide_pci_device_t *d, ide_hwif_t *hwif) -{ -} -#else -static void ide_hwif_setup_dma(struct pci_dev *dev, ide_pci_device_t *d, ide_hwif_t *hwif) + +static void ide_hwif_setup_dma(struct pci_dev *dev, const struct ide_port_info *d, ide_hwif_t *hwif) { +#ifdef CONFIG_BLK_DEV_IDEDMA_PCI u16 pcicmd; + pci_read_config_word(dev, PCI_COMMAND, &pcicmd); - if ((d->autodma == AUTODMA) || + if ((d->host_flags & IDE_HFLAG_NO_AUTODMA) == 0 || ((dev->class >> 8) == PCI_CLASS_STORAGE_IDE && (dev->class & 0x80))) { - unsigned long dma_base = ide_get_or_set_dma_base(hwif); + unsigned long dma_base = ide_get_or_set_dma_base(d, hwif); if (dma_base && !(pcicmd & PCI_COMMAND_MASTER)) { /* * Set up BM-DMA capability @@ -456,13 +458,13 @@ static void ide_hwif_setup_dma(struct pci_dev *dev, ide_pci_device_t *d, ide_hwi "(BIOS)\n", hwif->name, d->name); } } -} #endif /* CONFIG_BLK_DEV_IDEDMA_PCI*/ +} /** * ide_setup_pci_controller - set up IDE PCI * @dev: PCI device - * @d: IDE PCI data + * @d: IDE port info * @noisy: verbose flag * @config: returned as 1 if we configured the hardware * @@ -470,11 +472,10 @@ static void ide_hwif_setup_dma(struct pci_dev *dev, ide_pci_device_t *d, ide_hwi * up the PCI side of the device, checks that the device is enabled * and enables it if need be */ - -static int ide_setup_pci_controller(struct pci_dev *dev, ide_pci_device_t *d, int noisy, int *config) + +static int ide_setup_pci_controller(struct pci_dev *dev, const struct ide_port_info *d, int noisy, int *config) { int ret; - u32 class_rev; u16 pcicmd; if (noisy) @@ -497,10 +498,6 @@ static int ide_setup_pci_controller(struct pci_dev *dev, ide_pci_device_t *d, in printk(KERN_INFO "%s: device enabled (Linux)\n", d->name); } - pci_read_config_dword(dev, PCI_CLASS_REVISION, &class_rev); - class_rev &= 0xff; - if (noisy) - printk(KERN_INFO "%s: chipset revision %d\n", d->name, class_rev); out: return ret; } @@ -508,9 +505,9 @@ out: /** * ide_pci_setup_ports - configure ports/devices on PCI IDE * @dev: PCI device - * @d: IDE pci device info + * @d: IDE port info * @pciirq: IRQ line - * @index: ata index to update + * @idx: ATA index table to update * * Scan the interfaces attached to this device and do any * necessary per port setup. Attach the devices and ask the @@ -520,26 +517,25 @@ out: * but is also used directly as a helper function by some controllers * where the chipset setup is not the default PCI IDE one. */ - -void ide_pci_setup_ports(struct pci_dev *dev, ide_pci_device_t *d, int pciirq, ata_index_t *index) + +void ide_pci_setup_ports(struct pci_dev *dev, const struct ide_port_info *d, int pciirq, u8 *idx) { int channels = (d->host_flags & IDE_HFLAG_SINGLE) ? 1 : 2, port; - int at_least_one_hwif_enabled = 0; ide_hwif_t *hwif, *mate = NULL; u8 tmp; - index->all = 0xf0f0; - /* * Set up the IDE ports */ - + for (port = 0; port < channels; ++port) { - ide_pci_enablebit_t *e = &(d->enablebits[port]); - + const ide_pci_enablebit_t *e = &(d->enablebits[port]); + if (e->reg && (pci_read_config_byte(dev, e->reg, &tmp) || - (tmp & e->mask) != e->val)) + (tmp & e->mask) != e->val)) { + printk(KERN_INFO "%s: IDE port disabled\n", d->name); continue; /* port not enabled */ + } if ((hwif = ide_hwif_configure(dev, d, mate, port, pciirq)) == NULL) continue; @@ -547,27 +543,49 @@ void ide_pci_setup_ports(struct pci_dev *dev, ide_pci_device_t *d, int pciirq, a /* setup proper ancestral information */ hwif->gendev.parent = &dev->dev; - if (hwif->channel) { - index->b.high = hwif->index; - } else { - index->b.low = hwif->index; - } + *(idx + port) = hwif->index; if (d->init_iops) d->init_iops(hwif); - if (d->autodma == NODMA) - goto bypass_legacy_dma; - - if(d->init_setup_dma) - d->init_setup_dma(dev, d, hwif); - else + if ((d->host_flags & IDE_HFLAG_NO_DMA) == 0) ide_hwif_setup_dma(dev, d, hwif); -bypass_legacy_dma: + + if ((!hwif->irq && (d->host_flags & IDE_HFLAG_LEGACY_IRQS)) || + (d->host_flags & IDE_HFLAG_FORCE_LEGACY_IRQS)) + hwif->irq = port ? 15 : 14; + + hwif->fixup = d->fixup; + hwif->host_flags = d->host_flags; hwif->pio_mask = d->pio_mask; + if ((d->host_flags & IDE_HFLAG_SERIALIZE) && hwif->mate) + hwif->mate->serialized = hwif->serialized = 1; + + if (d->host_flags & IDE_HFLAG_IO_32BIT) { + hwif->drives[0].io_32bit = 1; + hwif->drives[1].io_32bit = 1; + } + + if (d->host_flags & IDE_HFLAG_UNMASK_IRQS) { + hwif->drives[0].unmask = 1; + hwif->drives[1].unmask = 1; + } + + if (hwif->dma_base) { + hwif->swdma_mask = d->swdma_mask; + hwif->mwdma_mask = d->mwdma_mask; + hwif->ultra_mask = d->udma_mask; + } + + hwif->drives[0].autotune = 1; + hwif->drives[1].autotune = 1; + + if (d->host_flags & IDE_HFLAG_RQSIZE_256) + hwif->rqsize = 256; + if (d->init_hwif) /* Call chipset-specific routine * for each enabled hwif @@ -575,10 +593,7 @@ bypass_legacy_dma: d->init_hwif(hwif); mate = hwif; - at_least_one_hwif_enabled = 1; } - if (!at_least_one_hwif_enabled) - printk(KERN_INFO "%s: neither IDE port enabled (BIOS)\n", d->name); } EXPORT_SYMBOL_GPL(ide_pci_setup_ports); @@ -590,13 +605,13 @@ EXPORT_SYMBOL_GPL(ide_pci_setup_ports); * * One thing that is not standardized is the location of the * primary/secondary interface "enable/disable" bits. For chipsets that - * we "know" about, this information is in the ide_pci_device_t struct; + * we "know" about, this information is in the struct ide_port_info; * for all other chipsets, we just assume both interfaces are enabled. */ -static int do_ide_setup_pci_device(struct pci_dev *dev, ide_pci_device_t *d, - ata_index_t *index, u8 noisy) +static int do_ide_setup_pci_device(struct pci_dev *dev, + const struct ide_port_info *d, + u8 *idx, u8 noisy) { - static ata_index_t ata_index = { .b = { .low = 0xff, .high = 0xff } }; int tried_config = 0; int pciirq, ret; @@ -646,51 +661,35 @@ static int do_ide_setup_pci_device(struct pci_dev *dev, ide_pci_device_t *d, /* FIXME: silent failure can happen */ - *index = ata_index; - ide_pci_setup_ports(dev, d, pciirq, index); + ide_pci_setup_ports(dev, d, pciirq, idx); out: return ret; } -int ide_setup_pci_device(struct pci_dev *dev, ide_pci_device_t *d) +int ide_setup_pci_device(struct pci_dev *dev, const struct ide_port_info *d) { - ide_hwif_t *hwif = NULL, *mate = NULL; - ata_index_t index_list; + u8 idx[4] = { 0xff, 0xff, 0xff, 0xff }; int ret; - ret = do_ide_setup_pci_device(dev, d, &index_list, 1); - if (ret < 0) - goto out; - - if ((index_list.b.low & 0xf0) != 0xf0) - hwif = &ide_hwifs[index_list.b.low]; - if ((index_list.b.high & 0xf0) != 0xf0) - mate = &ide_hwifs[index_list.b.high]; + ret = do_ide_setup_pci_device(dev, d, &idx[0], 1); - if (hwif) - probe_hwif_init_with_fixup(hwif, d->fixup); - if (mate) - probe_hwif_init_with_fixup(mate, d->fixup); + if (ret >= 0) + ide_device_add(idx); - if (hwif) - ide_proc_register_port(hwif); - if (mate) - ide_proc_register_port(mate); -out: return ret; } EXPORT_SYMBOL_GPL(ide_setup_pci_device); int ide_setup_pci_devices(struct pci_dev *dev1, struct pci_dev *dev2, - ide_pci_device_t *d) + const struct ide_port_info *d) { struct pci_dev *pdev[] = { dev1, dev2 }; - ata_index_t index_list[2]; int ret, i; + u8 idx[4] = { 0xff, 0xff, 0xff, 0xff }; for (i = 0; i < 2; i++) { - ret = do_ide_setup_pci_device(pdev[i], d, index_list + i, !i); + ret = do_ide_setup_pci_device(pdev[i], d, &idx[i*2], !i); /* * FIXME: Mom, mom, they stole me the helper function to undo * do_ide_setup_pci_device() on the first device! @@ -699,25 +698,7 @@ int ide_setup_pci_devices(struct pci_dev *dev1, struct pci_dev *dev2, goto out; } - for (i = 0; i < 2; i++) { - u8 idx[2] = { index_list[i].b.low, index_list[i].b.high }; - int j; - - for (j = 0; j < 2; j++) { - if ((idx[j] & 0xf0) != 0xf0) - probe_hwif_init(ide_hwifs + idx[j]); - } - } - - for (i = 0; i < 2; i++) { - u8 idx[2] = { index_list[i].b.low, index_list[i].b.high }; - int j; - - for (j = 0; j < 2; j++) { - if ((idx[j] & 0xf0) != 0xf0) - ide_proc_register_port(ide_hwifs + idx[j]); - } - } + ide_device_add(idx); out: return ret; } @@ -742,9 +723,6 @@ static LIST_HEAD(ide_pci_drivers); * hands the controllers off to the core PCI code to do the rest of * the work. * - * The driver_data of the driver table must point to an ide_pci_device_t - * describing the interface. - * * Returns are the same as for pci_register_driver */ |