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-rw-r--r--drivers/mfd/glamo/glamo-core.c33
-rw-r--r--drivers/mfd/glamo/glamo-core.h35
-rw-r--r--drivers/mfd/glamo/glamo-regs.h24
3 files changed, 76 insertions, 16 deletions
diff --git a/drivers/mfd/glamo/glamo-core.c b/drivers/mfd/glamo/glamo-core.c
index e0e39409595..2b47b65f8af 100644
--- a/drivers/mfd/glamo/glamo-core.c
+++ b/drivers/mfd/glamo/glamo-core.c
@@ -221,10 +221,31 @@ static struct resource glamo_fb_resources[] = {
.flags = IORESOURCE_MEM,
}, {
.name = "glamo-fb-mem",
- .start = GLAMO_OFFSET_FB,
- .end = GLAMO_OFFSET_FB + GLAMO_FB_SIZE - 1,
+ .start = GLAMO_MEM_BASE + GLAMO_OFFSET_FB,
+ .end = GLAMO_MEM_BASE + GLAMO_OFFSET_FB + GLAMO_FB_SIZE - 1,
.flags = IORESOURCE_MEM,
- },
+ }, {
+ .name = "glamo-cmdq-regs",
+ .start = GLAMO_REGOFS_CMDQUEUE,
+ .end = GLAMO_REGOFS_RISC - 1,
+ .flags = IORESOURCE_MEM,
+ }, {
+ .name = "glamo-command-queue",
+ .start = GLAMO_MEM_BASE + GLAMO_OFFSET_CMDQ,
+ .end = GLAMO_MEM_BASE + GLAMO_OFFSET_CMDQ +
+ GLAMO_CMDQ_SIZE - 1,
+ .flags = IORESOURCE_MEM,
+ }, {
+ .name = "glamo-2d-regs",
+ .start = GLAMO_REGOFS_2D,
+ .end = GLAMO_REGOFS_3D- 1,
+ .flags = IORESOURCE_MEM,
+ }, {
+ .name = "glamo-2d-irq",
+ .start = GLAMO_IRQ_2D,
+ .end = GLAMO_IRQ_2D,
+ .flags = IORESOURCE_IRQ,
+ }
};
static struct resource glamo_mmc_resources[] = {
@@ -235,9 +256,9 @@ static struct resource glamo_mmc_resources[] = {
.flags = IORESOURCE_MEM
}, {
.name = "glamo-mmc-mem",
- .start = GLAMO_OFFSET_FB + GLAMO_FB_SIZE,
- .end = GLAMO_OFFSET_FB + GLAMO_FB_SIZE +
- GLAMO_MMC_BUFFER_SIZE - 1,
+ .start = GLAMO_MEM_BASE + GLAMO_OFFSET_MMC,
+ .end = GLAMO_MEM_BASE + GLAMO_OFFSET_MMC
+ + GLAMO_MMC_BUFFER_SIZE - 1,
.flags = IORESOURCE_MEM
}, {
.start = GLAMO_IRQ_MMC,
diff --git a/drivers/mfd/glamo/glamo-core.h b/drivers/mfd/glamo/glamo-core.h
index e5b1a35518a..702430450b4 100644
--- a/drivers/mfd/glamo/glamo-core.h
+++ b/drivers/mfd/glamo/glamo-core.h
@@ -3,18 +3,33 @@
#include <linux/mfd/glamo.h>
+/* Amount of Glamo memory */
+#define GLAMO_INTERNAL_RAM_SIZE 0x800000
+
+/* Arbitrarily determined amount for the hardware cursor */
+#define GLAMO_CURSOR_SIZE (4096)
+#define GLAMO_MMC_BUFFER_SIZE (64 * 1024) /* 64k MMC buffer */
+#define GLAMO_CMDQ_SIZE (128 * 1024) /* 128k ring buffer */
+/* Remaining memory will be used for 2D and 3D graphics */
+#define GLAMO_FB_SIZE (GLAMO_INTERNAL_RAM_SIZE \
+ - GLAMO_CURSOR_SIZE \
+ - GLAMO_MMC_BUFFER_SIZE \
+ - GLAMO_CMDQ_SIZE)
+/* A 640x480, 16bpp, double-buffered framebuffer */
+#if (GLAMO_FB_SIZE < (640 * 480 * 4)) /* == 0x12c000 */
+#error Not enough Glamo VRAM for framebuffer!
+#endif
+
/* for the time being, we put the on-screen framebuffer into the lowest
* VRAM space. This should make the code easily compatible with the various
- * 2MB/4MB/8MB variants of the Smedia chips */
-#define GLAMO_OFFSET_VRAM 0x800000
-#define GLAMO_OFFSET_FB (GLAMO_OFFSET_VRAM)
-
-/* we only allocate the minimum possible size for the framebuffer to make
- * sure we have sufficient memory for other functions of the chip */
-/*#define GLAMO_FB_SIZE (640*480*4) *//* == 0x12c000 */
-#define GLAMO_INTERNAL_RAM_SIZE 0x800000
-#define GLAMO_MMC_BUFFER_SIZE (64 * 1024)
-#define GLAMO_FB_SIZE (GLAMO_INTERNAL_RAM_SIZE - GLAMO_MMC_BUFFER_SIZE)
+ * 2MB/4MB/8MB variants of the Smedia chips
+ * glamo-fb.c assumes FB comes first, followed by cursor, so DON'T MOVE THEM
+ * (see glamo_regs[] in glamo-fb.c for more information) */
+#define GLAMO_MEM_BASE (0x800000)
+#define GLAMO_OFFSET_FB (0x000000)
+#define GLAMO_OFFSET_CURSOR (GLAMO_OFFSET_FB + GLAMO_FB_SIZE)
+#define GLAMO_OFFSET_MMC (GLAMO_OFFSET_CURSOR + GLAMO_CURSOR_SIZE)
+#define GLAMO_OFFSET_CMDQ (GLAMO_OFFSET_MMC + GLAMO_MMC_BUFFER_SIZE)
enum glamo_pll {
GLAMO_PLL1,
diff --git a/drivers/mfd/glamo/glamo-regs.h b/drivers/mfd/glamo/glamo-regs.h
index 59848e1122e..8b2fd474fcd 100644
--- a/drivers/mfd/glamo/glamo-regs.h
+++ b/drivers/mfd/glamo/glamo-regs.h
@@ -627,4 +627,28 @@ enum glamo_core_revisions {
GLAMO_CORE_REV_A3 = 0x0003,
};
+enum glamo_register_cq {
+ GLAMO_REG_CMDQ_BASE_ADDRL = 0x00,
+ GLAMO_REG_CMDQ_BASE_ADDRH = 0x02,
+ GLAMO_REG_CMDQ_LEN = 0x04,
+ GLAMO_REG_CMDQ_WRITE_ADDRL = 0x06,
+ GLAMO_REG_CMDQ_WRITE_ADDRH = 0x08,
+ GLAMO_REG_CMDQ_FLIP = 0x0a,
+ GLAMO_REG_CMDQ_CONTROL = 0x0c,
+ GLAMO_REG_CMDQ_READ_ADDRL = 0x0e,
+ GLAMO_REG_CMDQ_READ_ADDRH = 0x10,
+ GLAMO_REG_CMDQ_STATUS = 0x12,
+};
+
+#define REG_2D(x) (GLAMO_REGOFS_2D+(x))
+
+enum glamo_register_2d {
+ GLAMO_REG_2D_DST_X = REG_2D(0x0a),
+ GLAMO_REG_2D_COMMAND1 = REG_2D(0x3a),
+ GLAMO_REG_2D_STATUS = REG_2D(0x42),
+ GLAMO_REG_2D_ID1 = REG_2D(0x44),
+ GLAMO_REG_2D_ID2 = REG_2D(0x46),
+ GLAMO_REG_2D_ID3 = REG_2D(0x48),
+};
+
#endif /* _GLAMO_REGS_H */