diff options
Diffstat (limited to 'drivers/usb')
| -rw-r--r-- | drivers/usb/core/hcd-pci.c | 38 | ||||
| -rw-r--r-- | drivers/usb/core/hub.c | 1 | ||||
| -rw-r--r-- | drivers/usb/host/ehci-hcd.c | 160 | ||||
| -rw-r--r-- | drivers/usb/host/ehci-hub.c | 7 | ||||
| -rw-r--r-- | drivers/usb/host/ehci-pci.c | 359 | ||||
| -rw-r--r-- | drivers/usb/host/ohci-pci.c | 36 | ||||
| -rw-r--r-- | drivers/usb/media/sn9c102_core.c | 2 | ||||
| -rw-r--r-- | drivers/usb/serial/ftdi_sio.c | 2 | ||||
| -rw-r--r-- | drivers/usb/serial/ftdi_sio.h | 7 | ||||
| -rw-r--r-- | drivers/usb/serial/ipw.c | 1 | ||||
| -rw-r--r-- | drivers/usb/storage/unusual_devs.h | 9 |
11 files changed, 316 insertions, 306 deletions
diff --git a/drivers/usb/core/hcd-pci.c b/drivers/usb/core/hcd-pci.c index 7feb829362d..5131d88e8c5 100644 --- a/drivers/usb/core/hcd-pci.c +++ b/drivers/usb/core/hcd-pci.c @@ -20,9 +20,17 @@ #include <linux/kernel.h> #include <linux/module.h> #include <linux/pci.h> +#include <linux/usb.h> + #include <asm/io.h> #include <asm/irq.h> -#include <linux/usb.h> + +#ifdef CONFIG_PPC_PMAC +#include <asm/machdep.h> +#include <asm/pmac_feature.h> +#include <asm/pci-bridge.h> +#include <asm/prom.h> +#endif #include "usb.h" #include "hcd.h" @@ -277,8 +285,22 @@ int usb_hcd_pci_suspend (struct pci_dev *dev, pm_message_t message) } done: - if (retval == 0) + if (retval == 0) { dev->dev.power.power_state = PMSG_SUSPEND; + +#ifdef CONFIG_PPC_PMAC + /* Disable ASIC clocks for USB */ + if (_machine == _MACH_Pmac) { + struct device_node *of_node; + + of_node = pci_device_to_OF_node (dev); + if (of_node) + pmac_call_feature(PMAC_FTR_USB_ENABLE, + of_node, 0, 0); + } +#endif + } + return retval; } EXPORT_SYMBOL (usb_hcd_pci_suspend); @@ -301,6 +323,18 @@ int usb_hcd_pci_resume (struct pci_dev *dev) return 0; } +#ifdef CONFIG_PPC_PMAC + /* Reenable ASIC clocks for USB */ + if (_machine == _MACH_Pmac) { + struct device_node *of_node; + + of_node = pci_device_to_OF_node (dev); + if (of_node) + pmac_call_feature (PMAC_FTR_USB_ENABLE, + of_node, 0, 1); + } +#endif + /* NOTE: chip docs cover clean "real suspend" cases (what Linux * calls "standby", "suspend to RAM", and so on). There are also * dirty cases when swsusp fakes a suspend in "shutdown" mode. diff --git a/drivers/usb/core/hub.c b/drivers/usb/core/hub.c index 840727948d8..f78bd124d29 100644 --- a/drivers/usb/core/hub.c +++ b/drivers/usb/core/hub.c @@ -1669,7 +1669,6 @@ int usb_suspend_device(struct usb_device *udev) return 0; #endif } -EXPORT_SYMBOL_GPL(usb_suspend_device); /* * If the USB "suspend" state is in use (rather than "global suspend"), diff --git a/drivers/usb/host/ehci-hcd.c b/drivers/usb/host/ehci-hcd.c index af3c05eb86f..29f52a44b92 100644 --- a/drivers/usb/host/ehci-hcd.c +++ b/drivers/usb/host/ehci-hcd.c @@ -411,50 +411,39 @@ static void ehci_stop (struct usb_hcd *hcd) dbg_status (ehci, "ehci_stop completed", readl (&ehci->regs->status)); } -static int ehci_run (struct usb_hcd *hcd) +/* one-time init, only for memory state */ +static int ehci_init(struct usb_hcd *hcd) { - struct ehci_hcd *ehci = hcd_to_ehci (hcd); + struct ehci_hcd *ehci = hcd_to_ehci(hcd); u32 temp; int retval; u32 hcc_params; - int first; - - /* skip some things on restart paths */ - first = (ehci->watchdog.data == 0); - if (first) { - init_timer (&ehci->watchdog); - ehci->watchdog.function = ehci_watchdog; - ehci->watchdog.data = (unsigned long) ehci; - } + + spin_lock_init(&ehci->lock); + + init_timer(&ehci->watchdog); + ehci->watchdog.function = ehci_watchdog; + ehci->watchdog.data = (unsigned long) ehci; /* * hw default: 1K periodic list heads, one per frame. * periodic_size can shrink by USBCMD update if hcc_params allows. */ ehci->periodic_size = DEFAULT_I_TDPS; - if (first && (retval = ehci_mem_init (ehci, GFP_KERNEL)) < 0) + if ((retval = ehci_mem_init(ehci, GFP_KERNEL)) < 0) return retval; /* controllers may cache some of the periodic schedule ... */ - hcc_params = readl (&ehci->caps->hcc_params); - if (HCC_ISOC_CACHE (hcc_params)) // full frame cache + hcc_params = readl(&ehci->caps->hcc_params); + if (HCC_ISOC_CACHE(hcc_params)) // full frame cache ehci->i_thresh = 8; else // N microframes cached - ehci->i_thresh = 2 + HCC_ISOC_THRES (hcc_params); + ehci->i_thresh = 2 + HCC_ISOC_THRES(hcc_params); ehci->reclaim = NULL; ehci->reclaim_ready = 0; ehci->next_uframe = -1; - /* controller state: unknown --> reset */ - - /* EHCI spec section 4.1 */ - if ((retval = ehci_reset (ehci)) != 0) { - ehci_mem_cleanup (ehci); - return retval; - } - writel (ehci->periodic_dma, &ehci->regs->frame_list); - /* * dedicate a qh for the async ring head, since we couldn't unlink * a 'real' qh without stopping the async schedule [4.8]. use it @@ -462,37 +451,13 @@ static int ehci_run (struct usb_hcd *hcd) * its dummy is used in hw_alt_next of many tds, to prevent the qh * from automatically advancing to the next td after short reads. */ - if (first) { - ehci->async->qh_next.qh = NULL; - ehci->async->hw_next = QH_NEXT (ehci->async->qh_dma); - ehci->async->hw_info1 = cpu_to_le32 (QH_HEAD); - ehci->async->hw_token = cpu_to_le32 (QTD_STS_HALT); - ehci->async->hw_qtd_next = EHCI_LIST_END; - ehci->async->qh_state = QH_STATE_LINKED; - ehci->async->hw_alt_next = QTD_NEXT (ehci->async->dummy->qtd_dma); - } - writel ((u32)ehci->async->qh_dma, &ehci->regs->async_next); - - /* - * hcc_params controls whether ehci->regs->segment must (!!!) - * be used; it constrains QH/ITD/SITD and QTD locations. - * pci_pool consistent memory always uses segment zero. - * streaming mappings for I/O buffers, like pci_map_single(), - * can return segments above 4GB, if the device allows. - * - * NOTE: the dma mask is visible through dma_supported(), so - * drivers can pass this info along ... like NETIF_F_HIGHDMA, - * Scsi_Host.highmem_io, and so forth. It's readonly to all - * host side drivers though. - */ - if (HCC_64BIT_ADDR (hcc_params)) { - writel (0, &ehci->regs->segment); -#if 0 -// this is deeply broken on almost all architectures - if (!dma_set_mask (hcd->self.controller, DMA_64BIT_MASK)) - ehci_info (ehci, "enabled 64bit DMA\n"); -#endif - } + ehci->async->qh_next.qh = NULL; + ehci->async->hw_next = QH_NEXT(ehci->async->qh_dma); + ehci->async->hw_info1 = cpu_to_le32(QH_HEAD); + ehci->async->hw_token = cpu_to_le32(QTD_STS_HALT); + ehci->async->hw_qtd_next = EHCI_LIST_END; + ehci->async->qh_state = QH_STATE_LINKED; + ehci->async->hw_alt_next = QTD_NEXT(ehci->async->dummy->qtd_dma); /* clear interrupt enables, set irq latency */ if (log2_irq_thresh < 0 || log2_irq_thresh > 6) @@ -507,13 +472,13 @@ static int ehci_run (struct usb_hcd *hcd) * make problems: throughput reduction (!), data errors... */ if (park) { - park = min (park, (unsigned) 3); + park = min(park, (unsigned) 3); temp |= CMD_PARK; temp |= park << 8; } - ehci_info (ehci, "park %d\n", park); + ehci_dbg(ehci, "park %d\n", park); } - if (HCC_PGM_FRAMELISTLEN (hcc_params)) { + if (HCC_PGM_FRAMELISTLEN(hcc_params)) { /* periodic schedule size can be smaller than default */ temp &= ~(3 << 2); temp |= (EHCI_TUNE_FLS << 2); @@ -521,16 +486,63 @@ static int ehci_run (struct usb_hcd *hcd) case 0: ehci->periodic_size = 1024; break; case 1: ehci->periodic_size = 512; break; case 2: ehci->periodic_size = 256; break; - default: BUG (); + default: BUG(); } } + ehci->command = temp; + + ehci->reboot_notifier.notifier_call = ehci_reboot; + register_reboot_notifier(&ehci->reboot_notifier); + + return 0; +} + +/* start HC running; it's halted, ehci_init() has been run (once) */ +static int ehci_run (struct usb_hcd *hcd) +{ + struct ehci_hcd *ehci = hcd_to_ehci (hcd); + int retval; + u32 temp; + u32 hcc_params; + + /* EHCI spec section 4.1 */ + if ((retval = ehci_reset(ehci)) != 0) { + unregister_reboot_notifier(&ehci->reboot_notifier); + ehci_mem_cleanup(ehci); + return retval; + } + writel(ehci->periodic_dma, &ehci->regs->frame_list); + writel((u32)ehci->async->qh_dma, &ehci->regs->async_next); + + /* + * hcc_params controls whether ehci->regs->segment must (!!!) + * be used; it constrains QH/ITD/SITD and QTD locations. + * pci_pool consistent memory always uses segment zero. + * streaming mappings for I/O buffers, like pci_map_single(), + * can return segments above 4GB, if the device allows. + * + * NOTE: the dma mask is visible through dma_supported(), so + * drivers can pass this info along ... like NETIF_F_HIGHDMA, + * Scsi_Host.highmem_io, and so forth. It's readonly to all + * host side drivers though. + */ + hcc_params = readl(&ehci->caps->hcc_params); + if (HCC_64BIT_ADDR(hcc_params)) { + writel(0, &ehci->regs->segment); +#if 0 +// this is deeply broken on almost all architectures + if (!dma_set_mask(hcd->self.controller, DMA_64BIT_MASK)) + ehci_info(ehci, "enabled 64bit DMA\n"); +#endif + } + + // Philips, Intel, and maybe others need CMD_RUN before the // root hub will detect new devices (why?); NEC doesn't - temp |= CMD_RUN; - writel (temp, &ehci->regs->command); - dbg_cmd (ehci, "init", temp); - - /* set async sleep time = 10 us ... ? */ + ehci->command &= ~(CMD_LRESET|CMD_IAAD|CMD_PSE|CMD_ASE|CMD_RESET); + ehci->command |= CMD_RUN; + writel (ehci->command, &ehci->regs->command); + dbg_cmd (ehci, "init", ehci->command); /* * Start, enabling full USB 2.0 functionality ... usb 1.1 devices @@ -538,26 +550,23 @@ static int ehci_run (struct usb_hcd *hcd) * involved with the root hub. (Except where one is integrated, * and there's no companion controller unless maybe for USB OTG.) */ - if (first) { - ehci->reboot_notifier.notifier_call = ehci_reboot; - register_reboot_notifier (&ehci->reboot_notifier); - } - hcd->state = HC_STATE_RUNNING; writel (FLAG_CF, &ehci->regs->configured_flag); - readl (&ehci->regs->command); /* unblock posted write */ + readl (&ehci->regs->command); /* unblock posted writes */ temp = HC_VERSION(readl (&ehci->caps->hc_capbase)); ehci_info (ehci, - "USB %x.%x %s, EHCI %x.%02x, driver %s\n", + "USB %x.%x started, EHCI %x.%02x, driver %s\n", ((ehci->sbrn & 0xf0)>>4), (ehci->sbrn & 0x0f), - first ? "initialized" : "restarted", temp >> 8, temp & 0xff, DRIVER_VERSION); writel (INTR_MASK, &ehci->regs->intr_enable); /* Turn On Interrupts */ - if (first) - create_debug_files (ehci); + /* GRR this is run-once init(), being done every time the HC starts. + * So long as they're part of class devices, we can't do it init() + * since the class device isn't created that early. + */ + create_debug_files(ehci); return 0; } @@ -636,9 +645,8 @@ static irqreturn_t ehci_irq (struct usb_hcd *hcd, struct pt_regs *regs) * stop that signaling. */ ehci->reset_done [i] = jiffies + msecs_to_jiffies (20); - mod_timer (&hcd->rh_timer, - ehci->reset_done [i] + 1); ehci_dbg (ehci, "port %d remote wakeup\n", i + 1); + usb_hcd_resume_root_hub(hcd); } } diff --git a/drivers/usb/host/ehci-hub.c b/drivers/usb/host/ehci-hub.c index 88cb4ada686..82caf336e9b 100644 --- a/drivers/usb/host/ehci-hub.c +++ b/drivers/usb/host/ehci-hub.c @@ -94,6 +94,13 @@ static int ehci_bus_resume (struct usb_hcd *hcd) msleep(5); spin_lock_irq (&ehci->lock); + /* Ideally and we've got a real resume here, and no port's power + * was lost. (For PCI, that means Vaux was maintained.) But we + * could instead be restoring a swsusp snapshot -- so that BIOS was + * the last user of the controller, not reset/pm hardware keeping + * state we gave to it. + */ + /* re-init operational registers in case we lost power */ if (readl (&ehci->regs->intr_enable) == 0) { /* at least some APM implementations will try to deliver diff --git a/drivers/usb/host/ehci-pci.c b/drivers/usb/host/ehci-pci.c index dfd9bd0b182..441c26064b4 100644 --- a/drivers/usb/host/ehci-pci.c +++ b/drivers/usb/host/ehci-pci.c @@ -27,7 +27,7 @@ /* EHCI 0.96 (and later) section 5.1 says how to kick BIOS/SMM/... * off the controller (maybe it can boot from highspeed USB disks). */ -static int bios_handoff (struct ehci_hcd *ehci, int where, u32 cap) +static int bios_handoff(struct ehci_hcd *ehci, int where, u32 cap) { struct pci_dev *pdev = to_pci_dev(ehci_to_hcd(ehci)->self.controller); @@ -48,7 +48,7 @@ static int bios_handoff (struct ehci_hcd *ehci, int where, u32 cap) where, cap); // some BIOS versions seem buggy... // return 1; - ehci_warn (ehci, "continuing after BIOS bug...\n"); + ehci_warn(ehci, "continuing after BIOS bug...\n"); /* disable all SMIs, and clear "BIOS owns" flag */ pci_write_config_dword(pdev, where + 4, 0); pci_write_config_byte(pdev, where + 2, 0); @@ -58,96 +58,47 @@ static int bios_handoff (struct ehci_hcd *ehci, int where, u32 cap) return 0; } -/* called by khubd or root hub init threads */ -static int ehci_pci_reset (struct usb_hcd *hcd) +/* called after powerup, by probe or system-pm "wakeup" */ +static int ehci_pci_reinit(struct ehci_hcd *ehci, struct pci_dev *pdev) { - struct ehci_hcd *ehci = hcd_to_ehci (hcd); u32 temp; + int retval; unsigned count = 256/4; - spin_lock_init (&ehci->lock); - - ehci->caps = hcd->regs; - ehci->regs = hcd->regs + HC_LENGTH (readl (&ehci->caps->hc_capbase)); - dbg_hcs_params (ehci, "reset"); - dbg_hcc_params (ehci, "reset"); - - /* cache this readonly data; minimize chip reads */ - ehci->hcs_params = readl (&ehci->caps->hcs_params); - - if (hcd->self.controller->bus == &pci_bus_type) { - struct pci_dev *pdev = to_pci_dev(hcd->self.controller); - - switch (pdev->vendor) { - case PCI_VENDOR_ID_TDI: - if (pdev->device == PCI_DEVICE_ID_TDI_EHCI) { - ehci->is_tdi_rh_tt = 1; - tdi_reset (ehci); - } - break; - case PCI_VENDOR_ID_AMD: - /* AMD8111 EHCI doesn't work, according to AMD errata */ - if (pdev->device == 0x7463) { - ehci_info (ehci, "ignoring AMD8111 (errata)\n"); - return -EIO; - } - break; - case PCI_VENDOR_ID_NVIDIA: - /* NVidia reports that certain chips don't handle - * QH, ITD, or SITD addresses above 2GB. (But TD, - * data buffer, and periodic schedule are normal.) - */ - switch (pdev->device) { - case 0x003c: /* MCP04 */ - case 0x005b: /* CK804 */ - case 0x00d8: /* CK8 */ - case 0x00e8: /* CK8S */ - if (pci_set_consistent_dma_mask(pdev, - DMA_31BIT_MASK) < 0) - ehci_warn (ehci, "can't enable NVidia " - "workaround for >2GB RAM\n"); - break; - } - break; - } - - /* optional debug port, normally in the first BAR */ - temp = pci_find_capability (pdev, 0x0a); - if (temp) { - pci_read_config_dword(pdev, temp, &temp); - temp >>= 16; - if ((temp & (3 << 13)) == (1 << 13)) { - temp &= 0x1fff; - ehci->debug = hcd->regs + temp; - temp = readl (&ehci->debug->control); - ehci_info (ehci, "debug port %d%s\n", - HCS_DEBUG_PORT(ehci->hcs_params), - (temp & DBGP_ENABLED) - ? " IN USE" - : ""); - if (!(temp & DBGP_ENABLED)) - ehci->debug = NULL; - } + /* optional debug port, normally in the first BAR */ + temp = pci_find_capability(pdev, 0x0a); + if (temp) { + pci_read_config_dword(pdev, temp, &temp); + temp >>= 16; + if ((temp & (3 << 13)) == (1 << 13)) { + temp &= 0x1fff; + ehci->debug = ehci_to_hcd(ehci)->regs + temp; + temp = readl(&ehci->debug->control); + ehci_info(ehci, "debug port %d%s\n", + HCS_DEBUG_PORT(ehci->hcs_params), + (temp & DBGP_ENABLED) + ? " IN USE" + : ""); + if (!(temp & DBGP_ENABLED)) + ehci->debug = NULL; } + } - temp = HCC_EXT_CAPS (readl (&ehci->caps->hcc_params)); - } else - temp = 0; + temp = HCC_EXT_CAPS(readl(&ehci->caps->hcc_params)); /* EHCI 0.96 and later may have "extended capabilities" */ while (temp && count--) { u32 cap; - pci_read_config_dword (to_pci_dev(hcd->self.controller), - temp, &cap); - ehci_dbg (ehci, "capability %04x at %02x\n", cap, temp); + pci_read_config_dword(pdev, temp, &cap); + ehci_dbg(ehci, "capability %04x at %02x\n", cap, temp); switch (cap & 0xff) { case 1: /* BIOS/SMM/... handoff */ - if (bios_handoff (ehci, temp, cap) != 0) + if (bios_handoff(ehci, temp, cap) != 0) return -EOPNOTSUPP; break; case 0: /* illegal reserved capability */ - ehci_warn (ehci, "illegal capability!\n"); + ehci_dbg(ehci, "illegal capability!\n"); cap = 0; /* FALLTHROUGH */ default: /* unknown */ @@ -156,77 +107,109 @@ static int ehci_pci_reset (struct usb_hcd *hcd) temp = (cap >> 8) & 0xff; } if (!count) { - ehci_err (ehci, "bogus capabilities ... PCI problems!\n"); + ehci_err(ehci, "bogus capabilities ... PCI problems!\n"); return -EIO; } - if (ehci_is_TDI(ehci)) - ehci_reset (ehci); - ehci_port_power (ehci, 0); + /* PCI Memory-Write-Invalidate cycle support is optional (uncommon) */ + retval = pci_set_mwi(pdev); + if (!retval) + ehci_dbg(ehci, "MWI active\n"); + + ehci_port_power(ehci, 0); + + return 0; +} + +/* called by khubd or root hub (re)init threads; leaves HC in halt state */ +static int ehci_pci_reset(struct usb_hcd *hcd) +{ + struct ehci_hcd *ehci = hcd_to_ehci(hcd); + struct pci_dev *pdev = to_pci_dev(hcd->self.controller); + u32 temp; + int retval; + + ehci->caps = hcd->regs; + ehci->regs = hcd->regs + HC_LENGTH(readl(&ehci->caps->hc_capbase)); + dbg_hcs_params(ehci, "reset"); + dbg_hcc_params(ehci, "reset"); + + /* cache this readonly data; minimize chip reads */ + ehci->hcs_params = readl(&ehci->caps->hcs_params); + + retval = ehci_halt(ehci); + if (retval) + return retval; + + /* NOTE: only the parts below this line are PCI-specific */ + + switch (pdev->vendor) { + case PCI_VENDOR_ID_TDI: + if (pdev->device == PCI_DEVICE_ID_TDI_EHCI) { + ehci->is_tdi_rh_tt = 1; + tdi_reset(ehci); + } + break; + case PCI_VENDOR_ID_AMD: + /* AMD8111 EHCI doesn't work, according to AMD errata */ + if (pdev->device == 0x7463) { + ehci_info(ehci, "ignoring AMD8111 (errata)\n"); + return -EIO; + } + break; + case PCI_VENDOR_ID_NVIDIA: + /* NVidia reports that certain chips don't handle + * QH, ITD, or SITD addresses above 2GB. (But TD, + * data buffer, and periodic schedule are normal.) + */ + switch (pdev->device) { + case 0x003c: /* MCP04 */ + case 0x005b: /* CK804 */ + case 0x00d8: /* CK8 */ + case 0x00e8: /* CK8S */ + if (pci_set_consistent_dma_mask(pdev, + DMA_31BIT_MASK) < 0) + ehci_warn(ehci, "can't enable NVidia " + "workaround for >2GB RAM\n"); + break; + } + break; + } + + if (ehci_is_TDI(ehci)) + ehci_reset(ehci); /* at least the Genesys GL880S needs fixup here */ temp = HCS_N_CC(ehci->hcs_params) * HCS_N_PCC(ehci->hcs_params); temp &= 0x0f; if (temp && HCS_N_PORTS(ehci->hcs_params) > temp) { - ehci_dbg (ehci, "bogus port configuration: " + ehci_dbg(ehci, "bogus port configuration: " "cc=%d x pcc=%d < ports=%d\n", HCS_N_CC(ehci->hcs_params), HCS_N_PCC(ehci->hcs_params), HCS_N_PORTS(ehci->hcs_params)); - if (hcd->self.controller->bus == &pci_bus_type) { - struct pci_dev *pdev; - - pdev = to_pci_dev(hcd->self.controller); - switch (pdev->vendor) { - case 0x17a0: /* GENESYS */ - /* GL880S: should be PORTS=2 */ - temp |= (ehci->hcs_params & ~0xf); - ehci->hcs_params = temp; - break; - case PCI_VENDOR_ID_NVIDIA: - /* NF4: should be PCC=10 */ - break; - } + switch (pdev->vendor) { + case 0x17a0: /* GENESYS */ + /* GL880S: should be PORTS=2 */ + temp |= (ehci->hcs_params & ~0xf); + ehci->hcs_params = temp; + break; + case PCI_VENDOR_ID_NVIDIA: + /* NF4: should be PCC=10 */ + break; } } - /* force HC to halt state */ - return ehci_halt (ehci); -} - -static int ehci_pci_start (struct usb_hcd *hcd) -{ - struct ehci_hcd *ehci = hcd_to_ehci (hcd); - int result = 0; - - if (hcd->self.controller->bus == &pci_bus_type) { - struct pci_dev *pdev; - u16 port_wake; - - pdev = to_pci_dev(hcd->self.controller); - - /* Serial Bus Release Number is at PCI 0x60 offset */ - pci_read_config_byte(pdev, 0x60, &ehci->sbrn); - - /* port wake capability, reported by boot firmware */ - pci_read_config_word(pdev, 0x62, &port_wake); - hcd->can_wakeup = (port_wake & 1) != 0; + /* Serial Bus Release Number is at PCI 0x60 offset */ + pci_read_config_byte(pdev, 0x60, &ehci->sbrn); - /* help hc dma work well with cachelines */ - result = pci_set_mwi(pdev); - if (result) - ehci_dbg(ehci, "unable to enable MWI - not fatal.\n"); - } - - return ehci_run (hcd); -} + /* REVISIT: per-port wake capability (PCI 0x62) currently unused */ -/* always called by thread; normally rmmod */ + retval = ehci_pci_reinit(ehci, pdev); -static void ehci_pci_stop (struct usb_hcd *hcd) -{ - ehci_stop (hcd); + /* finish init */ + return ehci_init(hcd); } /*-------------------------------------------------------------------------*/ @@ -235,90 +218,88 @@ static void ehci_pci_stop (struct usb_hcd *hcd) /* suspend/resume, section 4.3 */ -/* These routines rely on the bus (pci, platform, etc) +/* These routines rely on the PCI bus glue * to handle powerdown and wakeup, and currently also on * transceivers that don't need any software attention to set up * the right sort of wakeup. + * Also they depend on separate root hub suspend/resume. */ -static int ehci_pci_suspend (struct usb_hcd *hcd, pm_message_t message) +static int ehci_pci_suspend(struct usb_hcd *hcd, pm_message_t message) { - struct ehci_hcd *ehci = hcd_to_ehci (hcd); + struct ehci_hcd *ehci = hcd_to_ehci(hcd); - if (time_before (jiffies, ehci->next_statechange)) - msleep (100); + if (time_before(jiffies, ehci->next_statechange)) + msleep(10); -#ifdef CONFIG_USB_SUSPEND - (void) usb_suspend_device (hcd->self.root_hub); -#else - usb_lock_device (hcd->self.root_hub); - (void) ehci_bus_suspend (hcd); - usb_unlock_device (hcd->self.root_hub); -#endif - - // save (PCI) FLADJ in case of Vaux power loss + // could save FLADJ in case of Vaux power loss // ... we'd only use it to handle clock skew return 0; } -static int ehci_pci_resume (struct usb_hcd *hcd) +static int ehci_pci_resume(struct usb_hcd *hcd) { - struct ehci_hcd *ehci = hcd_to_ehci (hcd); + struct ehci_hcd *ehci = hcd_to_ehci(hcd); unsigned port; struct usb_device *root = hcd->self.root_hub; + struct pci_dev *pdev = to_pci_dev(hcd->self.controller); int retval = -EINVAL; - // maybe restore (PCI) FLADJ + // maybe restore FLADJ - if (time_before (jiffies, ehci->next_statechange)) - msleep (100); + if (time_before(jiffies, ehci->next_statechange)) + msleep(100); + + /* If CF is clear, we lost PCI Vaux power and need to restart. */ + if (readl(&ehci->regs->configured_flag) != FLAG_CF) + goto restart; /* If any port is suspended (or owned by the companion), * we know we can/must resume the HC (and mustn't reset it). + * We just defer that to the root hub code. */ - for (port = HCS_N_PORTS (ehci->hcs_params); port > 0; ) { + for (port = HCS_N_PORTS(ehci->hcs_params); port > 0; ) { u32 status; port--; - status = readl (&ehci->regs->port_status [port]); + status = readl(&ehci->regs->port_status [port]); if (!(status & PORT_POWER)) continue; - if (status & (PORT_SUSPEND | PORT_OWNER)) { - down (&hcd->self.root_hub->serialize); - retval = ehci_bus_resume (hcd); - up (&hcd->self.root_hub->serialize); - break; + if (status & (PORT_SUSPEND | PORT_RESUME | PORT_OWNER)) { + usb_hcd_resume_root_hub(hcd); + return 0; } + } + +restart: + ehci_dbg(ehci, "lost power, restarting\n"); + for (port = HCS_N_PORTS(ehci->hcs_params); port > 0; ) { + port--; if (!root->children [port]) continue; - dbg_port (ehci, __FUNCTION__, port + 1, status); - usb_set_device_state (root->children[port], + usb_set_device_state(root->children[port], USB_STATE_NOTATTACHED); } /* Else reset, to cope with power loss or flush-to-storage - * style "resume" having activated BIOS during reboot. + * style "resume" having let BIOS kick in during reboot. */ - if (port == 0) { - (void) ehci_halt (ehci); - (void) ehci_reset (ehci); - (void) ehci_pci_reset (hcd); - - /* emptying the schedule aborts any urbs */ - spin_lock_irq (&ehci->lock); - if (ehci->reclaim) - ehci->reclaim_ready = 1; - ehci_work (ehci, NULL); - spin_unlock_irq (&ehci->lock); - - /* restart; khubd will disconnect devices */ - retval = ehci_run (hcd); - - /* here we "know" root ports should always stay powered; - * but some controllers may lose all power. - */ - ehci_port_power (ehci, 1); - } + (void) ehci_halt(ehci); + (void) ehci_reset(ehci); + (void) ehci_pci_reinit(ehci, pdev); + + /* emptying the schedule aborts any urbs */ + spin_lock_irq(&ehci->lock); + if (ehci->reclaim) + ehci->reclaim_ready = 1; + ehci_work(ehci, NULL); + spin_unlock_irq(&ehci->lock); + + /* restart; khubd will disconnect devices */ + retval = ehci_run(hcd); + + /* here we "know" root ports should always stay powered */ + ehci_port_power(ehci, 1); return retval; } @@ -339,12 +320,12 @@ static const struct hc_driver ehci_pci_hc_driver = { * basic lifecycle operations */ .reset = ehci_pci_reset, - .start = ehci_pci_start, + .start = ehci_run, #ifdef CONFIG_PM .suspend = ehci_pci_suspend, .resume = ehci_pci_resume, #endif - .stop = ehci_pci_stop, + .stop = ehci_stop, /* * managing i/o requests and associated device resources @@ -377,7 +358,7 @@ static const struct pci_device_id pci_ids [] = { { }, { /* end: all zeroes */ } }; -MODULE_DEVICE_TABLE (pci, pci_ids); +MODULE_DEVICE_TABLE(pci, pci_ids); /* pci driver glue; this is a "new style" PCI driver module */ static struct pci_driver ehci_pci_driver = { @@ -393,22 +374,22 @@ static struct pci_driver ehci_pci_driver = { #endif }; -static int __init ehci_hcd_pci_init (void) +static int __init ehci_hcd_pci_init(void) { if (usb_disabled()) return -ENODEV; - pr_debug ("%s: block sizes: qh %Zd qtd %Zd itd %Zd sitd %Zd\n", + pr_debug("%s: block sizes: qh %Zd qtd %Zd itd %Zd sitd %Zd\n", hcd_name, - sizeof (struct ehci_qh), sizeof (struct ehci_qtd), - sizeof (struct ehci_itd), sizeof (struct ehci_sitd)); + sizeof(struct ehci_qh), sizeof(struct ehci_qtd), + sizeof(struct ehci_itd), sizeof(struct ehci_sitd)); - return pci_register_driver (&ehci_pci_driver); + return pci_register_driver(&ehci_pci_driver); } -module_init (ehci_hcd_pci_init); +module_init(ehci_hcd_pci_init); -static void __exit ehci_hcd_pci_cleanup (void) +static void __exit ehci_hcd_pci_cleanup(void) { - pci_unregister_driver (&ehci_pci_driver); + pci_unregister_driver(&ehci_pci_driver); } -module_exit (ehci_hcd_pci_cleanup); +module_exit(ehci_hcd_pci_cleanup); diff --git a/drivers/usb/host/ohci-pci.c b/drivers/usb/host/ohci-pci.c index a59e536441e..5f22e6590cd 100644 --- a/drivers/usb/host/ohci-pci.c +++ b/drivers/usb/host/ohci-pci.c @@ -14,15 +14,6 @@ * This file is licenced under the GPL. */ -#include <linux/jiffies.h> - -#ifdef CONFIG_PPC_PMAC -#include <asm/machdep.h> -#include <asm/pmac_feature.h> -#include <asm/pci-bridge.h> -#include <asm/prom.h> -#endif - #ifndef CONFIG_PCI #error "This file is PCI bus glue. CONFIG_PCI must be defined." #endif @@ -115,39 +106,12 @@ ohci_pci_start (struct usb_hcd *hcd) static int ohci_pci_suspend (struct usb_hcd *hcd, pm_message_t message) { /* root hub was already suspended */ - - /* FIXME these PMAC things get called in the wrong places. ASIC - * clocks should be turned off AFTER entering D3, and on BEFORE - * trying to enter D0. Evidently the PCI layer doesn't currently - * provide the right sort of platform hooks for this ... - */ -#ifdef CONFIG_PPC_PMAC - if (_machine == _MACH_Pmac) { - struct device_node *of_node; - - /* Disable USB PAD & cell clock */ - of_node = pci_device_to_OF_node (to_pci_dev(hcd->self.controller)); - if (of_node) - pmac_call_feature(PMAC_FTR_USB_ENABLE, of_node, 0, 0); - } -#endif /* CONFIG_PPC_PMAC */ return 0; } static int ohci_pci_resume (struct usb_hcd *hcd) { -#ifdef CONFIG_PPC_PMAC - if (_machine == _MACH_Pmac) { - struct device_node *of_node; - - /* Re-enable USB PAD & cell clock */ - of_node = pci_device_to_OF_node (to_pci_dev(hcd->self.controller)); - if (of_node) - pmac_call_feature (PMAC_FTR_USB_ENABLE, of_node, 0, 1); - } -#endif /* CONFIG_PPC_PMAC */ - usb_hcd_resume_root_hub(hcd); return 0; } diff --git a/drivers/usb/media/sn9c102_core.c b/drivers/usb/media/sn9c102_core.c index cf8cfbabefd..b2e66e3b90a 100644 --- a/drivers/usb/media/sn9c102_core.c +++ b/drivers/usb/media/sn9c102_core.c @@ -199,7 +199,7 @@ static void sn9c102_release_buffers(struct sn9c102_device* cam) { if (cam->nbuffers) { rvfree(cam->frame[0].bufmem, - cam->nbuffers * cam->frame[0].buf.length); + cam->nbuffers * PAGE_ALIGN(cam->frame[0].buf.length)); cam->nbuffers = 0; } } diff --git a/drivers/usb/serial/ftdi_sio.c b/drivers/usb/serial/ftdi_sio.c index 61204bf7cd7..06e04b442ff 100644 --- a/drivers/usb/serial/ftdi_sio.c +++ b/drivers/usb/serial/ftdi_sio.c @@ -475,6 +475,8 @@ static struct usb_device_id id_table_combined [] = { { USB_DEVICE(FTDI_VID, FTDI_ARTEMIS_PID) }, { USB_DEVICE(FTDI_VID, FTDI_ATIK_ATK16_PID) }, { USB_DEVICE(FTDI_VID, FTDI_ATIK_ATK16HR_PID) }, + { USB_DEVICE(KOBIL_VID, KOBIL_CONV_B1_PID) }, + { USB_DEVICE(KOBIL_VID, KOBIL_CONV_KAAN_PID) }, { }, /* Optional parameter entry */ { } /* Terminating entry */ }; diff --git a/drivers/usb/serial/ftdi_sio.h b/drivers/usb/serial/ftdi_sio.h index ddb63df31ce..773ea3eca08 100644 --- a/drivers/usb/serial/ftdi_sio.h +++ b/drivers/usb/serial/ftdi_sio.h @@ -128,6 +128,13 @@ #define SEALEVEL_2803_8_PID 0X2883 /* SeaLINK+8 (2803) Port 8 */ /* + * The following are the values for two KOBIL chipcard terminals. + */ +#define KOBIL_VID 0x0d46 /* KOBIL Vendor ID */ +#define KOBIL_CONV_B1_PID 0x2020 /* KOBIL Konverter for B1 */ +#define KOBIL_CONV_KAAN_PID 0x2021 /* KOBIL_Konverter for KAAN */ + +/* * DSS-20 Sync Station for Sony Ericsson P800 */ diff --git a/drivers/usb/serial/ipw.c b/drivers/usb/serial/ipw.c index a02fada8536..7744b8148bc 100644 --- a/drivers/usb/serial/ipw.c +++ b/drivers/usb/serial/ipw.c @@ -46,7 +46,6 @@ #include <linux/module.h> #include <linux/spinlock.h> #include <linux/usb.h> -#include <linux/usb.h> #include <asm/uaccess.h> #include "usb-serial.h" diff --git a/drivers/usb/storage/unusual_devs.h b/drivers/usb/storage/unusual_devs.h index 0a9858f69a9..f5f47a34b16 100644 --- a/drivers/usb/storage/unusual_devs.h +++ b/drivers/usb/storage/unusual_devs.h @@ -1118,6 +1118,15 @@ UNUSUAL_DEV( 0x2735, 0x100b, 0x0000, 0x9999, US_SC_DEVICE, US_PR_DEVICE, NULL, US_FL_GO_SLOW ), +/* + * David Härdeman <david@2gen.com> + * The key makes the SCSI stack print confusing (but harmless) messages + */ +UNUSUAL_DEV( 0x4146, 0xba01, 0x0100, 0x0100, + "Iomega", + "Micro Mini 1GB", + US_SC_DEVICE, US_PR_DEVICE, NULL, US_FL_NOT_LOCKABLE ), + #ifdef CONFIG_USB_STORAGE_SDDR55 UNUSUAL_DEV( 0x55aa, 0xa103, 0x0000, 0x9999, "Sandisk", |