diff options
Diffstat (limited to 'include/asm-mips/war.h')
| -rw-r--r-- | include/asm-mips/war.h | 25 |
1 files changed, 17 insertions, 8 deletions
diff --git a/include/asm-mips/war.h b/include/asm-mips/war.h index ec0eeebd880..9de52a5b0f3 100644 --- a/include/asm-mips/war.h +++ b/include/asm-mips/war.h @@ -169,10 +169,9 @@ /* * On the RM9000 there is a problem which makes the CreateDirtyExclusive - * cache operation unusable on SMP systems. + * eache operation unusable on SMP systems. */ -#if defined(CONFIG_MOMENCO_JAGUAR_ATX) || defined(CONFIG_PMC_YOSEMITE) || \ - defined(CONFIG_BASLER_EXCITE) +#if defined(CONFIG_PMC_YOSEMITE) || defined(CONFIG_BASLER_EXCITE) #define RM9000_CDEX_SMP_WAR 1 #endif @@ -182,11 +181,10 @@ * I-cache line worth of instructions being fetched may case spurious * exceptions. */ -#if defined(CONFIG_BASLER_EXCITE) || defined(CONFIG_MOMENCO_JAGUAR_ATX) || \ - defined(CONFIG_MIPS_ATLAS) || defined(CONFIG_MIPS_MALTA) || \ - defined(CONFIG_MOMENCO_OCELOT) || defined(CONFIG_MOMENCO_OCELOT_3) || \ - defined(CONFIG_MOMENCO_OCELOT_C) || defined(CONFIG_PMC_YOSEMITE) || \ - defined(CONFIG_SGI_IP32) || defined(CONFIG_WR_PPMC) +#if defined(CONFIG_BASLER_EXCITE) || defined(CONFIG_MIPS_ATLAS) || \ + defined(CONFIG_MIPS_MALTA) || defined(CONFIG_MOMENCO_OCELOT) || \ + defined(CONFIG_PMC_YOSEMITE) || defined(CONFIG_SGI_IP32) || \ + defined(CONFIG_WR_PPMC) #define ICACHE_REFILLS_WORKAROUND_WAR 1 #endif @@ -200,6 +198,14 @@ #endif /* + * 34K core erratum: "Problems Executing the TLBR Instruction" + */ +#if defined(CONFIG_PMC_MSP7120_EVAL) || defined(CONFIG_PMC_MSP7120_GW) || \ + defined(CONFIG_PMC_MSP7120_FPGA) +#define MIPS34K_MISSED_ITLB_WAR 1 +#endif + +/* * Workarounds default to off */ #ifndef ICACHE_REFILLS_WORKAROUND_WAR @@ -238,5 +244,8 @@ #ifndef R10000_LLSC_WAR #define R10000_LLSC_WAR 0 #endif +#ifndef MIPS34K_MISSED_ITLB_WAR +#define MIPS34K_MISSED_ITLB_WAR 0 +#endif #endif /* _ASM_WAR_H */ |