diff options
Diffstat (limited to 'include/asm-mips')
28 files changed, 125 insertions, 215 deletions
diff --git a/include/asm-mips/bitops.h b/include/asm-mips/bitops.h index 89436b96ad6..8959da245cf 100644 --- a/include/asm-mips/bitops.h +++ b/include/asm-mips/bitops.h @@ -54,6 +54,7 @@ static inline void set_bit(unsigned long nr, volatile unsigned long *addr) { unsigned long *m = ((unsigned long *) addr) + (nr >> SZLONG_LOG); + unsigned short bit = nr & SZLONG_MASK; unsigned long temp; if (cpu_has_llsc && R10000_LLSC_WAR) { @@ -65,9 +66,9 @@ static inline void set_bit(unsigned long nr, volatile unsigned long *addr) " beqzl %0, 1b \n" " .set mips0 \n" : "=&r" (temp), "=m" (*m) - : "ir" (1UL << (nr & SZLONG_MASK)), "m" (*m)); + : "ir" (1UL << bit), "m" (*m)); #ifdef CONFIG_CPU_MIPSR2 - } else if (__builtin_constant_p(nr)) { + } else if (__builtin_constant_p(bit)) { __asm__ __volatile__( "1: " __LL "%0, %1 # set_bit \n" " " __INS "%0, %4, %2, 1 \n" @@ -77,7 +78,7 @@ static inline void set_bit(unsigned long nr, volatile unsigned long *addr) "2: b 1b \n" " .previous \n" : "=&r" (temp), "=m" (*m) - : "ir" (nr & SZLONG_MASK), "m" (*m), "r" (~0)); + : "ir" (bit), "m" (*m), "r" (~0)); #endif /* CONFIG_CPU_MIPSR2 */ } else if (cpu_has_llsc) { __asm__ __volatile__( @@ -91,14 +92,14 @@ static inline void set_bit(unsigned long nr, volatile unsigned long *addr) " .previous \n" " .set mips0 \n" : "=&r" (temp), "=m" (*m) - : "ir" (1UL << (nr & SZLONG_MASK)), "m" (*m)); + : "ir" (1UL << bit), "m" (*m)); } else { volatile unsigned long *a = addr; unsigned long mask; unsigned long flags; a += nr >> SZLONG_LOG; - mask = 1UL << (nr & SZLONG_MASK); + mask = 1UL << bit; local_irq_save(flags); *a |= mask; local_irq_restore(flags); @@ -118,6 +119,7 @@ static inline void set_bit(unsigned long nr, volatile unsigned long *addr) static inline void clear_bit(unsigned long nr, volatile unsigned long *addr) { unsigned long *m = ((unsigned long *) addr) + (nr >> SZLONG_LOG); + unsigned short bit = nr & SZLONG_MASK; unsigned long temp; if (cpu_has_llsc && R10000_LLSC_WAR) { @@ -129,9 +131,9 @@ static inline void clear_bit(unsigned long nr, volatile unsigned long *addr) " beqzl %0, 1b \n" " .set mips0 \n" : "=&r" (temp), "=m" (*m) - : "ir" (~(1UL << (nr & SZLONG_MASK))), "m" (*m)); + : "ir" (~(1UL << bit)), "m" (*m)); #ifdef CONFIG_CPU_MIPSR2 - } else if (__builtin_constant_p(nr)) { + } else if (__builtin_constant_p(bit)) { __asm__ __volatile__( "1: " __LL "%0, %1 # clear_bit \n" " " __INS "%0, $0, %2, 1 \n" @@ -141,7 +143,7 @@ static inline void clear_bit(unsigned long nr, volatile unsigned long *addr) "2: b 1b \n" " .previous \n" : "=&r" (temp), "=m" (*m) - : "ir" (nr & SZLONG_MASK), "m" (*m)); + : "ir" (bit), "m" (*m)); #endif /* CONFIG_CPU_MIPSR2 */ } else if (cpu_has_llsc) { __asm__ __volatile__( @@ -155,14 +157,14 @@ static inline void clear_bit(unsigned long nr, volatile unsigned long *addr) " .previous \n" " .set mips0 \n" : "=&r" (temp), "=m" (*m) - : "ir" (~(1UL << (nr & SZLONG_MASK))), "m" (*m)); + : "ir" (~(1UL << bit)), "m" (*m)); } else { volatile unsigned long *a = addr; unsigned long mask; unsigned long flags; a += nr >> SZLONG_LOG; - mask = 1UL << (nr & SZLONG_MASK); + mask = 1UL << bit; local_irq_save(flags); *a &= ~mask; local_irq_restore(flags); @@ -180,6 +182,8 @@ static inline void clear_bit(unsigned long nr, volatile unsigned long *addr) */ static inline void change_bit(unsigned long nr, volatile unsigned long *addr) { + unsigned short bit = nr & SZLONG_MASK; + if (cpu_has_llsc && R10000_LLSC_WAR) { unsigned long *m = ((unsigned long *) addr) + (nr >> SZLONG_LOG); unsigned long temp; @@ -192,7 +196,7 @@ static inline void change_bit(unsigned long nr, volatile unsigned long *addr) " beqzl %0, 1b \n" " .set mips0 \n" : "=&r" (temp), "=m" (*m) - : "ir" (1UL << (nr & SZLONG_MASK)), "m" (*m)); + : "ir" (1UL << bit), "m" (*m)); } else if (cpu_has_llsc) { unsigned long *m = ((unsigned long *) addr) + (nr >> SZLONG_LOG); unsigned long temp; @@ -208,14 +212,14 @@ static inline void change_bit(unsigned long nr, volatile unsigned long *addr) " .previous \n" " .set mips0 \n" : "=&r" (temp), "=m" (*m) - : "ir" (1UL << (nr & SZLONG_MASK)), "m" (*m)); + : "ir" (1UL << bit), "m" (*m)); } else { volatile unsigned long *a = addr; unsigned long mask; unsigned long flags; a += nr >> SZLONG_LOG; - mask = 1UL << (nr & SZLONG_MASK); + mask = 1UL << bit; local_irq_save(flags); *a ^= mask; local_irq_restore(flags); @@ -233,6 +237,8 @@ static inline void change_bit(unsigned long nr, volatile unsigned long *addr) static inline int test_and_set_bit(unsigned long nr, volatile unsigned long *addr) { + unsigned short bit = nr & SZLONG_MASK; + if (cpu_has_llsc && R10000_LLSC_WAR) { unsigned long *m = ((unsigned long *) addr) + (nr >> SZLONG_LOG); unsigned long temp, res; @@ -246,7 +252,7 @@ static inline int test_and_set_bit(unsigned long nr, " and %2, %0, %3 \n" " .set mips0 \n" : "=&r" (temp), "=m" (*m), "=&r" (res) - : "r" (1UL << (nr & SZLONG_MASK)), "m" (*m) + : "r" (1UL << bit), "m" (*m) : "memory"); return res != 0; @@ -269,7 +275,7 @@ static inline int test_and_set_bit(unsigned long nr, " .previous \n" " .set pop \n" : "=&r" (temp), "=m" (*m), "=&r" (res) - : "r" (1UL << (nr & SZLONG_MASK)), "m" (*m) + : "r" (1UL << bit), "m" (*m) : "memory"); return res != 0; @@ -280,7 +286,7 @@ static inline int test_and_set_bit(unsigned long nr, unsigned long flags; a += nr >> SZLONG_LOG; - mask = 1UL << (nr & SZLONG_MASK); + mask = 1UL << bit; local_irq_save(flags); retval = (mask & *a) != 0; *a |= mask; @@ -303,6 +309,8 @@ static inline int test_and_set_bit(unsigned long nr, static inline int test_and_clear_bit(unsigned long nr, volatile unsigned long *addr) { + unsigned short bit = nr & SZLONG_MASK; + if (cpu_has_llsc && R10000_LLSC_WAR) { unsigned long *m = ((unsigned long *) addr) + (nr >> SZLONG_LOG); unsigned long temp, res; @@ -317,7 +325,7 @@ static inline int test_and_clear_bit(unsigned long nr, " and %2, %0, %3 \n" " .set mips0 \n" : "=&r" (temp), "=m" (*m), "=&r" (res) - : "r" (1UL << (nr & SZLONG_MASK)), "m" (*m) + : "r" (1UL << bit), "m" (*m) : "memory"); return res != 0; @@ -336,7 +344,7 @@ static inline int test_and_clear_bit(unsigned long nr, "2: b 1b \n" " .previous \n" : "=&r" (temp), "=m" (*m), "=&r" (res) - : "ri" (nr & SZLONG_MASK), "m" (*m) + : "ri" (bit), "m" (*m) : "memory"); return res; @@ -361,7 +369,7 @@ static inline int test_and_clear_bit(unsigned long nr, " .previous \n" " .set pop \n" : "=&r" (temp), "=m" (*m), "=&r" (res) - : "r" (1UL << (nr & SZLONG_MASK)), "m" (*m) + : "r" (1UL << bit), "m" (*m) : "memory"); return res != 0; @@ -372,7 +380,7 @@ static inline int test_and_clear_bit(unsigned long nr, unsigned long flags; a += nr >> SZLONG_LOG; - mask = 1UL << (nr & SZLONG_MASK); + mask = 1UL << bit; local_irq_save(flags); retval = (mask & *a) != 0; *a &= ~mask; @@ -395,6 +403,8 @@ static inline int test_and_clear_bit(unsigned long nr, static inline int test_and_change_bit(unsigned long nr, volatile unsigned long *addr) { + unsigned short bit = nr & SZLONG_MASK; + if (cpu_has_llsc && R10000_LLSC_WAR) { unsigned long *m = ((unsigned long *) addr) + (nr >> SZLONG_LOG); unsigned long temp, res; @@ -408,7 +418,7 @@ static inline int test_and_change_bit(unsigned long nr, " and %2, %0, %3 \n" " .set mips0 \n" : "=&r" (temp), "=m" (*m), "=&r" (res) - : "r" (1UL << (nr & SZLONG_MASK)), "m" (*m) + : "r" (1UL << bit), "m" (*m) : "memory"); return res != 0; @@ -431,7 +441,7 @@ static inline int test_and_change_bit(unsigned long nr, " .previous \n" " .set pop \n" : "=&r" (temp), "=m" (*m), "=&r" (res) - : "r" (1UL << (nr & SZLONG_MASK)), "m" (*m) + : "r" (1UL << bit), "m" (*m) : "memory"); return res != 0; @@ -441,7 +451,7 @@ static inline int test_and_change_bit(unsigned long nr, unsigned long flags; a += nr >> SZLONG_LOG; - mask = 1UL << (nr & SZLONG_MASK); + mask = 1UL << bit; local_irq_save(flags); retval = (mask & *a) != 0; *a ^= mask; diff --git a/include/asm-mips/dma.h b/include/asm-mips/dma.h index e06ef0776d4..833437d31ef 100644 --- a/include/asm-mips/dma.h +++ b/include/asm-mips/dma.h @@ -74,7 +74,7 @@ * */ -#ifndef GENERIC_ISA_DMA_SUPPORT_BROKEN +#ifndef CONFIG_GENERIC_ISA_DMA_SUPPORT_BROKEN #define MAX_DMA_CHANNELS 8 #endif diff --git a/include/asm-mips/ds1742.h b/include/asm-mips/ds1742.h deleted file mode 100644 index c2f2c32da63..00000000000 --- a/include/asm-mips/ds1742.h +++ /dev/null @@ -1,13 +0,0 @@ -/* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * Copyright (C) 2006 by Ralf Baechle (ralf@linux-mips.org) - */ -#ifndef _ASM_DS1742_H -#define _ASM_DS1742_H - -#include <ds1742.h> - -#endif /* _ASM_DS1742_H */ diff --git a/include/asm-mips/ioctl.h b/include/asm-mips/ioctl.h index cba641a6ce0..2036fcb9f11 100644 --- a/include/asm-mips/ioctl.h +++ b/include/asm-mips/ioctl.h @@ -38,11 +38,6 @@ #define _IOC_DIRSHIFT (_IOC_SIZESHIFT+_IOC_SIZEBITS) /* - * We to additionally limit parameters to a maximum 255 bytes. - */ -#define _IOC_SLMASK 0xff - -/* * Direction bits _IOC_NONE could be 0, but OSF/1 gives it a bit. * And this turns out useful to catch old ioctl numbers in header * files for us. diff --git a/include/asm-mips/jmr3927/jmr3927.h b/include/asm-mips/jmr3927/jmr3927.h index baf412967af..c50e68ffa3a 100644 --- a/include/asm-mips/jmr3927/jmr3927.h +++ b/include/asm-mips/jmr3927/jmr3927.h @@ -179,12 +179,6 @@ static inline int jmr3927_have_isac(void) #define jmr3927_have_nvram() \ ((jmr3927_ioc_reg_in(JMR3927_IOC_REV_ADDR) & JMR3927_IDT_MASK) == JMR3927_IOC_IDT) -/* NVRAM macro */ -#define jmr3927_nvram_in(ofs) \ - jmr3927_ioc_reg_in(JMR3927_IOC_NVRAMB_ADDR + ((ofs) << 1)) -#define jmr3927_nvram_out(d, ofs) \ - jmr3927_ioc_reg_out(d, JMR3927_IOC_NVRAMB_ADDR + ((ofs) << 1)) - /* LED macro */ #define jmr3927_led_set(n/*0-16*/) jmr3927_ioc_reg_out(~(n), JMR3927_IOC_LED_ADDR) #define jmr3927_io_led_set(n/*0-3*/) jmr3927_isac_reg_out((n), JMR3927_ISAC_LED_ADDR) diff --git a/include/asm-mips/lasat/lasat.h b/include/asm-mips/lasat/lasat.h index 181afc5c0f1..42077e367a5 100644 --- a/include/asm-mips/lasat/lasat.h +++ b/include/asm-mips/lasat/lasat.h @@ -237,8 +237,6 @@ static inline void lasat_ndelay(unsigned int ns) __delay(ns / lasat_ndelay_divider); } -extern void (* prom_printf)(const char *fmt, ...); - #endif /* !defined (_LANGUAGE_ASSEMBLY) */ #define LASAT_SERVICEMODE_MAGIC_1 0xdeadbeef diff --git a/include/asm-mips/mach-atlas/mc146818rtc.h b/include/asm-mips/mach-atlas/mc146818rtc.h index a73a5698420..51d337e1bbd 100644 --- a/include/asm-mips/mach-atlas/mc146818rtc.h +++ b/include/asm-mips/mach-atlas/mc146818rtc.h @@ -55,6 +55,6 @@ static inline void CMOS_WRITE(unsigned char data, unsigned long addr) #define RTC_ALWAYS_BCD 0 -#define mc146818_decode_year(year) ((year) < 70 ? (year) + 2000 : (year) + 1970) +#define mc146818_decode_year(year) ((year) < 70 ? (year) + 2000 : (year) + 1900) #endif /* __ASM_MACH_ATLAS_MC146818RTC_H */ diff --git a/include/asm-mips/mach-generic/dma-coherence.h b/include/asm-mips/mach-generic/dma-coherence.h index df71822fd27..76e04e7feb8 100644 --- a/include/asm-mips/mach-generic/dma-coherence.h +++ b/include/asm-mips/mach-generic/dma-coherence.h @@ -11,22 +11,24 @@ struct device; -static dma_addr_t plat_map_dma_mem(struct device *dev, void *addr, size_t size) +static inline dma_addr_t plat_map_dma_mem(struct device *dev, void *addr, + size_t size) { return virt_to_phys(addr); } -static dma_addr_t plat_map_dma_mem_page(struct device *dev, struct page *page) +static inline dma_addr_t plat_map_dma_mem_page(struct device *dev, + struct page *page) { return page_to_phys(page); } -static unsigned long plat_dma_addr_to_phys(dma_addr_t dma_addr) +static inline unsigned long plat_dma_addr_to_phys(dma_addr_t dma_addr) { return dma_addr; } -static void plat_unmap_dma_mem(dma_addr_t dma_addr) +static inline void plat_unmap_dma_mem(dma_addr_t dma_addr) { } diff --git a/include/asm-mips/mach-generic/mc146818rtc.h b/include/asm-mips/mach-generic/mc146818rtc.h index 90c2e6f77fa..0b9a942f079 100644 --- a/include/asm-mips/mach-generic/mc146818rtc.h +++ b/include/asm-mips/mach-generic/mc146818rtc.h @@ -30,7 +30,7 @@ static inline void CMOS_WRITE(unsigned char data, unsigned long addr) #define RTC_ALWAYS_BCD 1 #ifndef mc146818_decode_year -#define mc146818_decode_year(year) ((year) < 70 ? (year) + 2000 : (year) + 1970) +#define mc146818_decode_year(year) ((year) < 70 ? (year) + 2000 : (year) + 1900) #endif #endif /* __ASM_MACH_GENERIC_MC146818RTC_H */ diff --git a/include/asm-mips/mach-ip27/topology.h b/include/asm-mips/mach-ip27/topology.h index 44790fdc5d0..61d9be3f317 100644 --- a/include/asm-mips/mach-ip27/topology.h +++ b/include/asm-mips/mach-ip27/topology.h @@ -28,7 +28,6 @@ extern unsigned char __node_distances[MAX_COMPACT_NODES][MAX_COMPACT_NODES]; .busy_factor = 32, \ .imbalance_pct = 125, \ .cache_nice_tries = 1, \ - .per_cpu_gain = 100, \ .flags = SD_LOAD_BALANCE \ | SD_BALANCE_EXEC \ | SD_WAKE_BALANCE, \ diff --git a/include/asm-mips/mach-jmr3927/ds1742.h b/include/asm-mips/mach-jmr3927/ds1742.h deleted file mode 100644 index 8a8fef6d07f..00000000000 --- a/include/asm-mips/mach-jmr3927/ds1742.h +++ /dev/null @@ -1,16 +0,0 @@ -/* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * Copyright (C) 2003, 06 by Ralf Baechle - */ -#ifndef __ASM_MACH_JMR3927_DS1742_H -#define __ASM_MACH_JMR3927_DS1742_H - -#include <asm/jmr3927/jmr3927.h> - -#define rtc_read(reg) (jmr3927_nvram_in(reg)) -#define rtc_write(data, reg) (jmr3927_nvram_out((data),(reg))) - -#endif /* __ASM_MACH_JMR3927_DS1742_H */ diff --git a/include/asm-mips/mach-jmr3927/mangle-port.h b/include/asm-mips/mach-jmr3927/mangle-port.h new file mode 100644 index 00000000000..501a202631b --- /dev/null +++ b/include/asm-mips/mach-jmr3927/mangle-port.h @@ -0,0 +1,18 @@ +#ifndef __ASM_MACH_JMR3927_MANGLE_PORT_H +#define __ASM_MACH_JMR3927_MANGLE_PORT_H + +extern unsigned long __swizzle_addr_b(unsigned long port); +#define __swizzle_addr_w(port) (port) +#define __swizzle_addr_l(port) (port) +#define __swizzle_addr_q(port) (port) + +#define ioswabb(a,x) (x) +#define __mem_ioswabb(a,x) (x) +#define ioswabw(a,x) le16_to_cpu(x) +#define __mem_ioswabw(a,x) (x) +#define ioswabl(a,x) le32_to_cpu(x) +#define __mem_ioswabl(a,x) (x) +#define ioswabq(a,x) le64_to_cpu(x) +#define __mem_ioswabq(a,x) (x) + +#endif /* __ASM_MACH_JMR3927_MANGLE_PORT_H */ diff --git a/include/asm-mips/mach-mips/mc146818rtc.h b/include/asm-mips/mach-mips/mc146818rtc.h index 6730ba06657..ea612f37f61 100644 --- a/include/asm-mips/mach-mips/mc146818rtc.h +++ b/include/asm-mips/mach-mips/mc146818rtc.h @@ -43,6 +43,6 @@ static inline void CMOS_WRITE(unsigned char data, unsigned long addr) #define RTC_ALWAYS_BCD 0 -#define mc146818_decode_year(year) ((year) < 70 ? (year) + 2000 : (year) + 1970) +#define mc146818_decode_year(year) ((year) < 70 ? (year) + 2000 : (year) + 1900) #endif /* __ASM_MACH_MALTA_MC146818RTC_H */ diff --git a/include/asm-mips/mach-rm/mc146818rtc.h b/include/asm-mips/mach-rm/mc146818rtc.h index d37ae68dc6a..145bce096fe 100644 --- a/include/asm-mips/mach-rm/mc146818rtc.h +++ b/include/asm-mips/mach-rm/mc146818rtc.h @@ -7,11 +7,15 @@ * * RTC routines for PC style attached Dallas chip with ARC epoch. */ -#ifndef __ASM_MACH_RM200_MC146818RTC_H -#define __ASM_MACH_RM200_MC146818RTC_H +#ifndef __ASM_MACH_RM_MC146818RTC_H +#define __ASM_MACH_RM_MC146818RTC_H +#ifdef CONFIG_CPU_BIG_ENDIAN +#define mc146818_decode_year(year) ((year) < 70 ? (year) + 2000 : (year) + 1900) +#else #define mc146818_decode_year(year) ((year) + 1980) +#endif #include_next <mc146818rtc.h> -#endif /* __ASM_MACH_RM200_MC146818RTC_H */ +#endif /* __ASM_MACH_RM_MC146818RTC_H */ diff --git a/include/asm-mips/mips-boards/prom.h b/include/asm-mips/mips-boards/prom.h index 7bf6f5f6ab9..daaf9f98fc6 100644 --- a/include/asm-mips/mips-boards/prom.h +++ b/include/asm-mips/mips-boards/prom.h @@ -28,8 +28,6 @@ extern char *prom_getcmdline(void); extern char *prom_getenv(char *name); -extern void setup_prom_printf(int tty_no); -extern void prom_printf(char *fmt, ...); extern void prom_init_cmdline(void); extern void prom_meminit(void); extern void prom_fixup_mem_map(unsigned long start_mem, unsigned long end_mem); diff --git a/include/asm-mips/mips_mt.h b/include/asm-mips/mips_mt.h index fdfff0b8ce4..8045abc78d0 100644 --- a/include/asm-mips/mips_mt.h +++ b/include/asm-mips/mips_mt.h @@ -6,6 +6,8 @@ #ifndef __ASM_MIPS_MT_H #define __ASM_MIPS_MT_H +#include <linux/cpumask.h> + extern cpumask_t mt_fpu_cpumask; extern unsigned long mt_fpemul_threshold; diff --git a/include/asm-mips/ptrace.h b/include/asm-mips/ptrace.h index 8a1f2b6f04a..1906938285c 100644 --- a/include/asm-mips/ptrace.h +++ b/include/asm-mips/ptrace.h @@ -21,6 +21,7 @@ #define FPC_EIR 70 #define DSP_BASE 71 /* 3 more hi / lo register pairs */ #define DSP_CONTROL 77 +#define ACX 78 /* * This struct defines the way the registers are stored on the stack during a @@ -39,6 +40,9 @@ struct pt_regs { unsigned long cp0_status; unsigned long hi; unsigned long lo; +#ifdef CONFIG_CPU_HAS_SMARTMIPS + unsigned long acx; +#endif unsigned long cp0_badvaddr; unsigned long cp0_cause; unsigned long cp0_epc; diff --git a/include/asm-mips/sgialib.h b/include/asm-mips/sgialib.h index 73f09731550..bfce5c786f1 100644 --- a/include/asm-mips/sgialib.h +++ b/include/asm-mips/sgialib.h @@ -33,9 +33,6 @@ extern int prom_flags; extern void prom_putchar(char c); extern char prom_getchar(void); -/* Generic printf() using ARCS console I/O. */ -extern void prom_printf(char *fmt, ...); - /* Memory descriptor management. */ #define PROM_MAX_PMEMBLOCKS 32 struct prom_pmemblock { diff --git a/include/asm-mips/sibyte/sb1250.h b/include/asm-mips/sibyte/sb1250.h index 2ba6988ddc8..dfb29e13bce 100644 --- a/include/asm-mips/sibyte/sb1250.h +++ b/include/asm-mips/sibyte/sb1250.h @@ -57,8 +57,6 @@ extern void bcm1480_mask_irq(int cpu, int irq); extern void bcm1480_unmask_irq(int cpu, int irq); extern void bcm1480_smp_finish(void); -extern void prom_printf(char *fmt, ...); - #define AT_spin \ __asm__ __volatile__ ( \ ".set noat\n" \ diff --git a/include/asm-mips/sibyte/trace_prof.h b/include/asm-mips/sibyte/trace_prof.h deleted file mode 100644 index 557792075e9..00000000000 --- a/include/asm-mips/sibyte/trace_prof.h +++ /dev/null @@ -1,110 +0,0 @@ -/* - * Copyright (C) 2001 Broadcom Corporation - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version 2 - * of the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - */ - -#ifndef __ASM_SIBYTE_TRACE_PROF_H -#define __ASM_SIBYTE_TRACE_PROF_H - -#undef DBG -#if SBPROF_TB_DEBUG -#define DBG(a) a -#else -#define DBG(a) -#endif - -#define SBPROF_TB_MAJOR 240 -#define DEVNAME "bcm1250_tbprof" - -typedef u_int64_t tb_sample_t[6*256]; - -struct sbprof_tb { - int open; - tb_sample_t *sbprof_tbbuf; - int next_tb_sample; - - volatile int tb_enable; - volatile int tb_armed; - - wait_queue_head_t tb_sync; - wait_queue_head_t tb_read; -}; - -#define MAX_SAMPLE_BYTES (24*1024*1024) -#define MAX_TBSAMPLE_BYTES (12*1024*1024) - -#define MAX_SAMPLES (MAX_SAMPLE_BYTES/sizeof(u_int32_t)) -#define TB_SAMPLE_SIZE (sizeof(tb_sample_t)) -#define MAX_TB_SAMPLES (MAX_TBSAMPLE_BYTES/TB_SAMPLE_SIZE) - -/* IOCTLs */ -#define SBPROF_ZBSTART _IOW('s', 0, int) -#define SBPROF_ZBSTOP _IOW('s', 1, int) -#define SBPROF_ZBWAITFULL _IOW('s', 2, int) - -/*************************************************************************** - * Routines for gathering ZBbus profiles using trace buffer - ***************************************************************************/ - -/* Requires: Already called zclk_timer_init with a value that won't - saturate 40 bits. No subsequent use of SCD performance counters - or trace buffer. - Effect: Starts gathering random ZBbus profiles using trace buffer. */ -extern int sbprof_zbprof_start(struct file *filp); - -/* Effect: Stops collection of ZBbus profiles */ -extern int sbprof_zbprof_stop(void); - - -/*************************************************************************** - * Routines for using 40-bit SCD cycle counter - * - * Client responsible for either handling interrupts or making sure - * the cycles counter never saturates, e.g., by doing - * zclk_timer_init(0) at least every 2^40 - 1 ZCLKs. - ***************************************************************************/ - -/* Configures SCD counter 0 to count ZCLKs starting from val; - Configures SCD counters1,2,3 to count nothing. - Must not be called while gathering ZBbus profiles. - -unsigned long long val; */ -#define zclk_timer_init(val) \ - __asm__ __volatile__ (".set push;" \ - ".set mips64;" \ - "la $8, 0xb00204c0;" /* SCD perf_cnt_cfg */ \ - "sd %0, 0x10($8);" /* write val to counter0 */ \ - "sd %1, 0($8);" /* config counter0 for zclks*/ \ - ".set pop" \ - : /* no outputs */ \ - /* enable, counter0 */ \ - : /* inputs */ "r"(val), "r" ((1ULL << 33) | 1ULL) \ - : /* modifies */ "$8" ) - - -/* Reads SCD counter 0 and puts result in value - unsigned long long val; */ -#define zclk_get(val) \ - __asm__ __volatile__ (".set push;" \ - ".set mips64;" \ - "la $8, 0xb00204c0;" /* SCD perf_cnt_cfg */ \ - "ld %0, 0x10($8);" /* write val to counter0 */ \ - ".set pop" \ - : /* outputs */ "=r"(val) \ - : /* inputs */ \ - : /* modifies */ "$8" ) - -#endif /* __ASM_SIBYTE_TRACE_PROF_H */ diff --git a/include/asm-mips/sigcontext.h b/include/asm-mips/sigcontext.h index 972947474eb..9ce0607d7a4 100644 --- a/include/asm-mips/sigcontext.h +++ b/include/asm-mips/sigcontext.h @@ -23,7 +23,7 @@ struct sigcontext { unsigned long long sc_pc; unsigned long long sc_regs[32]; unsigned long long sc_fpregs[32]; - unsigned int sc_ownedfp; /* Unused */ + unsigned int sc_acx; /* Was sc_ownedfp */ unsigned int sc_fpc_csr; unsigned int sc_fpc_eir; /* Unused */ unsigned int sc_used_math; @@ -79,7 +79,7 @@ struct sigcontext32 { __u64 sc_pc; __u64 sc_regs[32]; __u64 sc_fpregs[32]; - __u32 sc_ownedfp; /* Unused */ + __u32 sc_acx; /* Only MIPS32; was sc_ownedfp */ __u32 sc_fpc_csr; __u32 sc_fpc_eir; /* Unused */ __u32 sc_used_math; diff --git a/include/asm-mips/smtc.h b/include/asm-mips/smtc.h index e1941d1b872..44dfa4adecf 100644 --- a/include/asm-mips/smtc.h +++ b/include/asm-mips/smtc.h @@ -34,6 +34,9 @@ typedef long asiduse; extern asiduse smtc_live_asid[MAX_SMTC_TLBS][MAX_SMTC_ASIDS]; +struct mm_struct; +struct task_struct; + void smtc_get_new_mmu_context(struct mm_struct *mm, unsigned long cpu); void smtc_flush_tlb_asid(unsigned long asid); diff --git a/include/asm-mips/smtc_ipi.h b/include/asm-mips/smtc_ipi.h index 55f3419f654..360ea6d250c 100644 --- a/include/asm-mips/smtc_ipi.h +++ b/include/asm-mips/smtc_ipi.h @@ -4,6 +4,8 @@ #ifndef __ASM_SMTC_IPI_H #define __ASM_SMTC_IPI_H +#include <linux/spinlock.h> + //#define SMTC_IPI_DEBUG #ifdef SMTC_IPI_DEBUG diff --git a/include/asm-mips/sni.h b/include/asm-mips/sni.h index 62f9be6f732..f257509b914 100644 --- a/include/asm-mips/sni.h +++ b/include/asm-mips/sni.h @@ -141,10 +141,9 @@ extern unsigned int sni_brd_type; #define A20R_PT_TIM0_ACK 0xbc050000 #define A20R_PT_TIM1_ACK 0xbc060000 -#define SNI_MIPS_IRQ_CPU_BASE 16 -#define SNI_MIPS_IRQ_CPU_TIMER (SNI_MIPS_IRQ_CPU_BASE+7) +#define SNI_MIPS_IRQ_CPU_TIMER (MIPS_CPU_IRQ_BASE+7) -#define SNI_A20R_IRQ_BASE SNI_MIPS_IRQ_CPU_BASE +#define SNI_A20R_IRQ_BASE MIPS_CPU_IRQ_BASE #define SNI_A20R_IRQ_TIMER (SNI_A20R_IRQ_BASE+5) #define SNI_DS1216_A20R_BASE 0xbc081ffc @@ -155,7 +154,7 @@ extern unsigned int sni_brd_type; #define SNI_PCIT_INT_START 24 #define SNI_PCIT_INT_END 30 -#define PCIT_IRQ_ETHERNET (SNI_MIPS_IRQ_CPU_BASE + 5) +#define PCIT_IRQ_ETHERNET (MIPS_CPU_IRQ_BASE + 5) #define PCIT_IRQ_INTA (SNI_PCIT_INT_START + 0) #define PCIT_IRQ_INTB (SNI_PCIT_INT_START + 1) #define PCIT_IRQ_INTC (SNI_PCIT_INT_START + 2) @@ -180,7 +179,7 @@ extern unsigned int sni_brd_type; #define PCIMT_IRQ_EISA 29 #define PCIMT_IRQ_SCSI 30 -#define PCIMT_IRQ_ETHERNET (SNI_MIPS_IRQ_CPU_BASE+6) +#define PCIMT_IRQ_ETHERNET (MIPS_CPU_IRQ_BASE+6) #if 0 #define PCIMT_IRQ_TEMPERATURE 24 diff --git a/include/asm-mips/spinlock.h b/include/asm-mips/spinlock.h index f1755d28a36..35e431cd796 100644 --- a/include/asm-mips/spinlock.h +++ b/include/asm-mips/spinlock.h @@ -287,7 +287,7 @@ static inline int __raw_read_trylock(raw_rwlock_t *rw) " .set noreorder # __raw_read_trylock \n" " li %2, 0 \n" "1: ll %1, %3 \n" - " bnez %1, 2f \n" + " bltz %1, 2f \n" " addu %1, 1 \n" " sc %1, %0 \n" " .set reorder \n" @@ -304,7 +304,7 @@ static inline int __raw_read_trylock(raw_rwlock_t *rw) " .set noreorder # __raw_read_trylock \n" " li %2, 0 \n" "1: ll %1, %3 \n" - " bnez %1, 2f \n" + " bltz %1, 2f \n" " addu %1, 1 \n" " sc %1, %0 \n" " beqz %1, 1b \n" diff --git a/include/asm-mips/stackframe.h b/include/asm-mips/stackframe.h index 1fae5dc5813..7afa1fdf70c 100644 --- a/include/asm-mips/stackframe.h +++ b/include/asm-mips/stackframe.h @@ -29,16 +29,25 @@ .endm .macro SAVE_TEMP +#ifdef CONFIG_CPU_HAS_SMARTMIPS + mflhxu v1 + LONG_S v1, PT_LO(sp) + mflhxu v1 + LONG_S v1, PT_HI(sp) + mflhxu v1 + LONG_S v1, PT_ACX(sp) +#else mfhi v1 + LONG_S v1, PT_HI(sp) + mflo v1 + LONG_S v1, PT_LO(sp) +#endif #ifdef CONFIG_32BIT LONG_S $8, PT_R8(sp) LONG_S $9, PT_R9(sp) #endif - LONG_S v1, PT_HI(sp) - mflo v1 LONG_S $10, PT_R10(sp) LONG_S $11, PT_R11(sp) - LONG_S v1, PT_LO(sp) LONG_S $12, PT_R12(sp) LONG_S $13, PT_R13(sp) LONG_S $14, PT_R14(sp) @@ -182,16 +191,25 @@ .endm .macro RESTORE_TEMP +#ifdef CONFIG_CPU_HAS_SMARTMIPS + LONG_L $24, PT_ACX(sp) + mtlhx $24 + LONG_L $24, PT_HI(sp) + mtlhx $24 LONG_L $24, PT_LO(sp) + mtlhx $24 +#else + LONG_L $24, PT_LO(sp) + mtlo $24 + LONG_L $24, PT_HI(sp) + mthi $24 +#endif #ifdef CONFIG_32BIT LONG_L $8, PT_R8(sp) LONG_L $9, PT_R9(sp) #endif - mtlo $24 - LONG_L $24, PT_HI(sp) LONG_L $10, PT_R10(sp) LONG_L $11, PT_R11(sp) - mthi $24 LONG_L $12, PT_R12(sp) LONG_L $13, PT_R13(sp) LONG_L $14, PT_R14(sp) diff --git a/include/asm-mips/uaccess.h b/include/asm-mips/uaccess.h index c62c20e7b5c..b25511787ee 100644 --- a/include/asm-mips/uaccess.h +++ b/include/asm-mips/uaccess.h @@ -435,6 +435,8 @@ extern size_t __copy_user(void *__to, const void *__from, size_t __n); __cu_len; \ }) +extern size_t __copy_user_inatomic(void *__to, const void *__from, size_t __n); + #define __copy_to_user_inatomic(to,from,n) \ ({ \ void __user *__cu_to; \ diff --git a/include/asm-mips/unistd.h b/include/asm-mips/unistd.h index 696cff39a1d..2f1087b3a20 100644 --- a/include/asm-mips/unistd.h +++ b/include/asm-mips/unistd.h @@ -334,16 +334,18 @@ #define __NR_kexec_load (__NR_Linux + 311) #define __NR_getcpu (__NR_Linux + 312) #define __NR_epoll_pwait (__NR_Linux + 313) +#define __NR_ioprio_set (__NR_Linux + 314) +#define __NR_ioprio_get (__NR_Linux + 315) /* * Offset of the last Linux o32 flavoured syscall */ -#define __NR_Linux_syscalls 313 +#define __NR_Linux_syscalls 315 #endif /* _MIPS_SIM == _MIPS_SIM_ABI32 */ #define __NR_O32_Linux 4000 -#define __NR_O32_Linux_syscalls 313 +#define __NR_O32_Linux_syscalls 315 #if _MIPS_SIM == _MIPS_SIM_ABI64 @@ -624,16 +626,18 @@ #define __NR_kexec_load (__NR_Linux + 270) #define __NR_getcpu (__NR_Linux + 271) #define __NR_epoll_pwait (__NR_Linux + 272) +#define __NR_ioprio_set (__NR_Linux + 273) +#define __NR_ioprio_get (__NR_Linux + 274) /* * Offset of the last Linux 64-bit flavoured syscall */ -#define __NR_Linux_syscalls 272 +#define __NR_Linux_syscalls 274 #endif /* _MIPS_SIM == _MIPS_SIM_ABI64 */ #define __NR_64_Linux 5000 -#define __NR_64_Linux_syscalls 272 +#define __NR_64_Linux_syscalls 274 #if _MIPS_SIM == _MIPS_SIM_NABI32 @@ -918,16 +922,18 @@ #define __NR_kexec_load (__NR_Linux + 274) #define __NR_getcpu (__NR_Linux + 275) #define __NR_epoll_pwait (__NR_Linux + 276) +#define __NR_ioprio_set (__NR_Linux + 277) +#define __NR_ioprio_get (__NR_Linux + 278) /* * Offset of the last N32 flavoured syscall */ -#define __NR_Linux_syscalls 276 +#define __NR_Linux_syscalls 278 #endif /* _MIPS_SIM == _MIPS_SIM_NABI32 */ #define __NR_N32_Linux 6000 -#define __NR_N32_Linux_syscalls 276 +#define __NR_N32_Linux_syscalls 278 #ifdef __KERNEL__ |