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-rw-r--r--include/asm-mips/mach-ip27/irq.h2
-rw-r--r--include/asm-mips/qemu.h2
-rw-r--r--include/asm-mips/time.h10
3 files changed, 8 insertions, 6 deletions
diff --git a/include/asm-mips/mach-ip27/irq.h b/include/asm-mips/mach-ip27/irq.h
index 25f0c3f39ad..cf4384bfa84 100644
--- a/include/asm-mips/mach-ip27/irq.h
+++ b/include/asm-mips/mach-ip27/irq.h
@@ -17,4 +17,6 @@
*/
#define NR_IRQS 256
+#include_next <irq.h>
+
#endif /* __ASM_MACH_IP27_IRQ_H */
diff --git a/include/asm-mips/qemu.h b/include/asm-mips/qemu.h
index 531caf44560..487ced4a40d 100644
--- a/include/asm-mips/qemu.h
+++ b/include/asm-mips/qemu.h
@@ -12,7 +12,7 @@
* Interrupt numbers
*/
#define Q_PIC_IRQ_BASE 0
-#define Q_COUNT_COMPARE_IRQ 16
+#define Q_COUNT_COMPARE_IRQ 23
/*
* Qemu clock rate. Unlike on real MIPS this has no relation to the
diff --git a/include/asm-mips/time.h b/include/asm-mips/time.h
index 3516b32c9ef..35555bd5c52 100644
--- a/include/asm-mips/time.h
+++ b/include/asm-mips/time.h
@@ -49,11 +49,6 @@ extern void (*mips_timer_ack)(void);
extern struct clocksource clocksource_mips;
/*
- * The low-level timer interrupt routine.
- */
-extern void ll_timer_interrupt(int irq, void *dev_id);
-
-/*
* profiling and process accouting is done separately in local_timer_interrupt
*/
extern void local_timer_interrupt(int irq, void *dev_id);
@@ -78,4 +73,9 @@ extern unsigned int mips_hpt_frequency;
*/
extern int (*perf_irq)(void);
+/*
+ * Initialize the calling CPU's compare interrupt as clockevent device
+ */
+extern void mips_clockevent_init(void);
+
#endif /* _ASM_TIME_H */