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Diffstat (limited to 'include/asm-s390/unistd.h')
-rw-r--r--include/asm-s390/unistd.h258
1 files changed, 129 insertions, 129 deletions
diff --git a/include/asm-s390/unistd.h b/include/asm-s390/unistd.h
index d49c54cb550..0361ac5dcde 100644
--- a/include/asm-s390/unistd.h
+++ b/include/asm-s390/unistd.h
@@ -355,145 +355,145 @@ do { \
#define _svc_clobber "1", "cc", "memory"
-#define _syscall0(type,name) \
-type name(void) { \
- register long __svcres asm("2"); \
- long __res; \
- __asm__ __volatile__ ( \
- " .if %1 < 256\n" \
- " svc %b1\n" \
- " .else\n" \
- " la %%r1,%1\n" \
- " svc 0\n" \
- " .endif" \
- : "=d" (__svcres) \
- : "i" (__NR_##name) \
- : _svc_clobber ); \
- __res = __svcres; \
- __syscall_return(type,__res); \
+#define _syscall0(type,name) \
+type name(void) { \
+ register long __svcres asm("2"); \
+ long __res; \
+ asm volatile( \
+ " .if %1 < 256\n" \
+ " svc %b1\n" \
+ " .else\n" \
+ " la %%r1,%1\n" \
+ " svc 0\n" \
+ " .endif" \
+ : "=d" (__svcres) \
+ : "i" (__NR_##name) \
+ : _svc_clobber); \
+ __res = __svcres; \
+ __syscall_return(type,__res); \
}
-#define _syscall1(type,name,type1,arg1) \
-type name(type1 arg1) { \
- register type1 __arg1 asm("2") = arg1; \
- register long __svcres asm("2"); \
- long __res; \
- __asm__ __volatile__ ( \
- " .if %1 < 256\n" \
- " svc %b1\n" \
- " .else\n" \
- " la %%r1,%1\n" \
- " svc 0\n" \
- " .endif" \
- : "=d" (__svcres) \
- : "i" (__NR_##name), \
- "0" (__arg1) \
- : _svc_clobber ); \
- __res = __svcres; \
- __syscall_return(type,__res); \
+#define _syscall1(type,name,type1,arg1) \
+type name(type1 arg1) { \
+ register type1 __arg1 asm("2") = arg1; \
+ register long __svcres asm("2"); \
+ long __res; \
+ asm volatile( \
+ " .if %1 < 256\n" \
+ " svc %b1\n" \
+ " .else\n" \
+ " la %%r1,%1\n" \
+ " svc 0\n" \
+ " .endif" \
+ : "=d" (__svcres) \
+ : "i" (__NR_##name), \
+ "0" (__arg1) \
+ : _svc_clobber); \
+ __res = __svcres; \
+ __syscall_return(type,__res); \
}
-#define _syscall2(type,name,type1,arg1,type2,arg2) \
-type name(type1 arg1, type2 arg2) { \
- register type1 __arg1 asm("2") = arg1; \
- register type2 __arg2 asm("3") = arg2; \
- register long __svcres asm("2"); \
- long __res; \
- __asm__ __volatile__ ( \
- " .if %1 < 256\n" \
- " svc %b1\n" \
- " .else\n" \
- " la %%r1,%1\n" \
- " svc 0\n" \
- " .endif" \
- : "=d" (__svcres) \
- : "i" (__NR_##name), \
- "0" (__arg1), \
- "d" (__arg2) \
- : _svc_clobber ); \
- __res = __svcres; \
- __syscall_return(type,__res); \
+#define _syscall2(type,name,type1,arg1,type2,arg2) \
+type name(type1 arg1, type2 arg2) { \
+ register type1 __arg1 asm("2") = arg1; \
+ register type2 __arg2 asm("3") = arg2; \
+ register long __svcres asm("2"); \
+ long __res; \
+ asm volatile( \
+ " .if %1 < 256\n" \
+ " svc %b1\n" \
+ " .else\n" \
+ " la %%r1,%1\n" \
+ " svc 0\n" \
+ " .endif" \
+ : "=d" (__svcres) \
+ : "i" (__NR_##name), \
+ "0" (__arg1), \
+ "d" (__arg2) \
+ : _svc_clobber ); \
+ __res = __svcres; \
+ __syscall_return(type,__res); \
}
-#define _syscall3(type,name,type1,arg1,type2,arg2,type3,arg3)\
-type name(type1 arg1, type2 arg2, type3 arg3) { \
- register type1 __arg1 asm("2") = arg1; \
- register type2 __arg2 asm("3") = arg2; \
- register type3 __arg3 asm("4") = arg3; \
- register long __svcres asm("2"); \
- long __res; \
- __asm__ __volatile__ ( \
- " .if %1 < 256\n" \
- " svc %b1\n" \
- " .else\n" \
- " la %%r1,%1\n" \
- " svc 0\n" \
- " .endif" \
- : "=d" (__svcres) \
- : "i" (__NR_##name), \
- "0" (__arg1), \
- "d" (__arg2), \
- "d" (__arg3) \
- : _svc_clobber ); \
- __res = __svcres; \
- __syscall_return(type,__res); \
+#define _syscall3(type,name,type1,arg1,type2,arg2,type3,arg3) \
+type name(type1 arg1, type2 arg2, type3 arg3) { \
+ register type1 __arg1 asm("2") = arg1; \
+ register type2 __arg2 asm("3") = arg2; \
+ register type3 __arg3 asm("4") = arg3; \
+ register long __svcres asm("2"); \
+ long __res; \
+ asm volatile( \
+ " .if %1 < 256\n" \
+ " svc %b1\n" \
+ " .else\n" \
+ " la %%r1,%1\n" \
+ " svc 0\n" \
+ " .endif" \
+ : "=d" (__svcres) \
+ : "i" (__NR_##name), \
+ "0" (__arg1), \
+ "d" (__arg2), \
+ "d" (__arg3) \
+ : _svc_clobber); \
+ __res = __svcres; \
+ __syscall_return(type,__res); \
}
-#define _syscall4(type,name,type1,arg1,type2,arg2,type3,arg3,\
- type4,name4) \
-type name(type1 arg1, type2 arg2, type3 arg3, type4 arg4) { \
- register type1 __arg1 asm("2") = arg1; \
- register type2 __arg2 asm("3") = arg2; \
- register type3 __arg3 asm("4") = arg3; \
- register type4 __arg4 asm("5") = arg4; \
- register long __svcres asm("2"); \
- long __res; \
- __asm__ __volatile__ ( \
- " .if %1 < 256\n" \
- " svc %b1\n" \
- " .else\n" \
- " la %%r1,%1\n" \
- " svc 0\n" \
- " .endif" \
- : "=d" (__svcres) \
- : "i" (__NR_##name), \
- "0" (__arg1), \
- "d" (__arg2), \
- "d" (__arg3), \
- "d" (__arg4) \
- : _svc_clobber ); \
- __res = __svcres; \
- __syscall_return(type,__res); \
+#define _syscall4(type,name,type1,arg1,type2,arg2,type3,arg3, \
+ type4,name4) \
+type name(type1 arg1, type2 arg2, type3 arg3, type4 arg4) { \
+ register type1 __arg1 asm("2") = arg1; \
+ register type2 __arg2 asm("3") = arg2; \
+ register type3 __arg3 asm("4") = arg3; \
+ register type4 __arg4 asm("5") = arg4; \
+ register long __svcres asm("2"); \
+ long __res; \
+ asm volatile( \
+ " .if %1 < 256\n" \
+ " svc %b1\n" \
+ " .else\n" \
+ " la %%r1,%1\n" \
+ " svc 0\n" \
+ " .endif" \
+ : "=d" (__svcres) \
+ : "i" (__NR_##name), \
+ "0" (__arg1), \
+ "d" (__arg2), \
+ "d" (__arg3), \
+ "d" (__arg4) \
+ : _svc_clobber); \
+ __res = __svcres; \
+ __syscall_return(type,__res); \
}
-#define _syscall5(type,name,type1,arg1,type2,arg2,type3,arg3,\
- type4,name4,type5,name5) \
-type name(type1 arg1, type2 arg2, type3 arg3, type4 arg4, \
- type5 arg5) { \
- register type1 __arg1 asm("2") = arg1; \
- register type2 __arg2 asm("3") = arg2; \
- register type3 __arg3 asm("4") = arg3; \
- register type4 __arg4 asm("5") = arg4; \
- register type5 __arg5 asm("6") = arg5; \
- register long __svcres asm("2"); \
- long __res; \
- __asm__ __volatile__ ( \
- " .if %1 < 256\n" \
- " svc %b1\n" \
- " .else\n" \
- " la %%r1,%1\n" \
- " svc 0\n" \
- " .endif" \
- : "=d" (__svcres) \
- : "i" (__NR_##name), \
- "0" (__arg1), \
- "d" (__arg2), \
- "d" (__arg3), \
- "d" (__arg4), \
- "d" (__arg5) \
- : _svc_clobber ); \
- __res = __svcres; \
- __syscall_return(type,__res); \
+#define _syscall5(type,name,type1,arg1,type2,arg2,type3,arg3, \
+ type4,name4,type5,name5) \
+type name(type1 arg1, type2 arg2, type3 arg3, type4 arg4, \
+ type5 arg5) { \
+ register type1 __arg1 asm("2") = arg1; \
+ register type2 __arg2 asm("3") = arg2; \
+ register type3 __arg3 asm("4") = arg3; \
+ register type4 __arg4 asm("5") = arg4; \
+ register type5 __arg5 asm("6") = arg5; \
+ register long __svcres asm("2"); \
+ long __res; \
+ asm volatile( \
+ " .if %1 < 256\n" \
+ " svc %b1\n" \
+ " .else\n" \
+ " la %%r1,%1\n" \
+ " svc 0\n" \
+ " .endif" \
+ : "=d" (__svcres) \
+ : "i" (__NR_##name), \
+ "0" (__arg1), \
+ "d" (__arg2), \
+ "d" (__arg3), \
+ "d" (__arg4), \
+ "d" (__arg5) \
+ : _svc_clobber); \
+ __res = __svcres; \
+ __syscall_return(type,__res); \
}
#define __ARCH_WANT_IPC_PARSE_VERSION
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-24 13:57:14 +0000